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Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001/*
2 * cx18 buffer queues
3 *
4 * Derived from ivtv-queue.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
Andy Walls1ed9dcc2008-11-22 01:37:34 -03007 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#include "cx18-driver.h"
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030026#include "cx18-queue.h"
Andy Walls21a278b2009-04-15 20:45:10 -030027#include "cx18-streams.h"
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030028#include "cx18-scb.h"
Andy Walls52fcb3e2009-11-08 23:45:24 -030029#include "cx18-io.h"
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030030
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030031void cx18_buf_swap(struct cx18_buffer *buf)
32{
33 int i;
34
35 for (i = 0; i < buf->bytesused; i += 4)
36 swab32s((u32 *)(buf->buf + i));
37}
38
Andy Walls52fcb3e2009-11-08 23:45:24 -030039void _cx18_mdl_swap(struct cx18_mdl *mdl)
40{
41 struct cx18_buffer *buf;
42
43 list_for_each_entry(buf, &mdl->buf_list, list) {
44 if (buf->bytesused == 0)
45 break;
46 cx18_buf_swap(buf);
47 }
48}
49
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030050void cx18_queue_init(struct cx18_queue *q)
51{
52 INIT_LIST_HEAD(&q->list);
Andy Wallsc37b11b2009-11-04 23:13:58 -030053 atomic_set(&q->depth, 0);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030054 q->bytesused = 0;
55}
56
Andy Walls52fcb3e2009-11-08 23:45:24 -030057struct cx18_queue *_cx18_enqueue(struct cx18_stream *s, struct cx18_mdl *mdl,
Andy Walls66c2a6b2008-12-08 23:02:45 -030058 struct cx18_queue *q, int to_front)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030059{
Andy Walls52fcb3e2009-11-08 23:45:24 -030060 /* clear the mdl if it is not to be enqueued to the full queue */
Andy Walls66c2a6b2008-12-08 23:02:45 -030061 if (q != &s->q_full) {
Andy Walls52fcb3e2009-11-08 23:45:24 -030062 mdl->bytesused = 0;
63 mdl->readpos = 0;
64 mdl->m_flags = 0;
65 mdl->skipped = 0;
66 mdl->curr_buf = NULL;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030067 }
Andy Walls66c2a6b2008-12-08 23:02:45 -030068
Andy Walls0ef02892008-12-14 18:52:12 -030069 /* q_busy is restricted to a max buffer count imposed by firmware */
70 if (q == &s->q_busy &&
Andy Wallsc37b11b2009-11-04 23:13:58 -030071 atomic_read(&q->depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
Andy Walls66c2a6b2008-12-08 23:02:45 -030072 q = &s->q_free;
73
Andy Walls40c55202009-04-13 23:08:00 -030074 spin_lock(&q->lock);
75
Andy Wallsb80e1072008-11-28 00:04:21 -030076 if (to_front)
Andy Walls52fcb3e2009-11-08 23:45:24 -030077 list_add(&mdl->list, &q->list); /* LIFO */
Andy Wallsb80e1072008-11-28 00:04:21 -030078 else
Andy Walls52fcb3e2009-11-08 23:45:24 -030079 list_add_tail(&mdl->list, &q->list); /* FIFO */
80 q->bytesused += mdl->bytesused - mdl->readpos;
Andy Wallsc37b11b2009-11-04 23:13:58 -030081 atomic_inc(&q->depth);
Andy Walls66c2a6b2008-12-08 23:02:45 -030082
Andy Walls40c55202009-04-13 23:08:00 -030083 spin_unlock(&q->lock);
Andy Walls66c2a6b2008-12-08 23:02:45 -030084 return q;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030085}
86
Andy Walls52fcb3e2009-11-08 23:45:24 -030087struct cx18_mdl *cx18_dequeue(struct cx18_stream *s, struct cx18_queue *q)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030088{
Andy Walls52fcb3e2009-11-08 23:45:24 -030089 struct cx18_mdl *mdl = NULL;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030090
Andy Walls40c55202009-04-13 23:08:00 -030091 spin_lock(&q->lock);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030092 if (!list_empty(&q->list)) {
Andy Walls52fcb3e2009-11-08 23:45:24 -030093 mdl = list_first_entry(&q->list, struct cx18_mdl, list);
94 list_del_init(&mdl->list);
95 q->bytesused -= mdl->bytesused - mdl->readpos;
96 mdl->skipped = 0;
Andy Wallsc37b11b2009-11-04 23:13:58 -030097 atomic_dec(&q->depth);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030098 }
Andy Walls40c55202009-04-13 23:08:00 -030099 spin_unlock(&q->lock);
Andy Walls52fcb3e2009-11-08 23:45:24 -0300100 return mdl;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300101}
102
Andy Walls52fcb3e2009-11-08 23:45:24 -0300103static void _cx18_mdl_set_buf_bytesused(struct cx18_stream *s,
104 struct cx18_mdl *mdl)
105{
106 struct cx18_buffer *buf;
107 u32 buf_size = s->buf_size;
108 u32 bytesused = mdl->bytesused;
109
110 list_for_each_entry(buf, &mdl->buf_list, list) {
111 buf->readpos = 0;
112 if (bytesused >= buf_size) {
113 buf->bytesused = buf_size;
114 bytesused -= buf_size;
115 } else {
116 buf->bytesused = bytesused;
117 bytesused = 0;
118 }
119 }
120}
121
122static inline void cx18_mdl_set_buf_bytesused(struct cx18_stream *s,
123 struct cx18_mdl *mdl)
124{
125 struct cx18_buffer *buf;
126
127 if (list_is_singular(&mdl->buf_list)) {
128 buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,
129 list);
130 buf->bytesused = mdl->bytesused;
131 buf->readpos = 0;
132 } else {
133 _cx18_mdl_set_buf_bytesused(s, mdl);
134 }
135}
136
137struct cx18_mdl *cx18_queue_get_mdl(struct cx18_stream *s, u32 id,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300138 u32 bytesused)
139{
140 struct cx18 *cx = s->cx;
Andy Walls52fcb3e2009-11-08 23:45:24 -0300141 struct cx18_mdl *mdl;
142 struct cx18_mdl *tmp;
143 struct cx18_mdl *ret = NULL;
Andy Walls40c55202009-04-13 23:08:00 -0300144 LIST_HEAD(sweep_up);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300145
Andy Walls40c55202009-04-13 23:08:00 -0300146 /*
147 * We don't have to acquire multiple q locks here, because we are
148 * serialized by the single threaded work handler.
Andy Walls52fcb3e2009-11-08 23:45:24 -0300149 * MDLs from the firmware will thus remain in order as
Andy Walls40c55202009-04-13 23:08:00 -0300150 * they are moved from q_busy to q_full or to the dvb ring buffer.
151 */
152 spin_lock(&s->q_busy.lock);
Andy Walls52fcb3e2009-11-08 23:45:24 -0300153 list_for_each_entry_safe(mdl, tmp, &s->q_busy.list, list) {
Andy Walls40c55202009-04-13 23:08:00 -0300154 /*
155 * We should find what the firmware told us is done,
156 * right at the front of the queue. If we don't, we likely have
Andy Walls52fcb3e2009-11-08 23:45:24 -0300157 * missed an mdl done message from the firmware.
158 * Once we skip an mdl repeatedly, relative to the size of
Andy Walls40c55202009-04-13 23:08:00 -0300159 * q_busy, we have high confidence we've missed it.
160 */
Andy Walls52fcb3e2009-11-08 23:45:24 -0300161 if (mdl->id != id) {
162 mdl->skipped++;
163 if (mdl->skipped >= atomic_read(&s->q_busy.depth)-1) {
164 /* mdl must have fallen out of rotation */
165 CX18_WARN("Skipped %s, MDL %d, %d "
Andy Wallsbca11a52008-11-19 01:24:33 -0300166 "times - it must have dropped out of "
Andy Walls52fcb3e2009-11-08 23:45:24 -0300167 "rotation\n", s->name, mdl->id,
168 mdl->skipped);
Andy Walls40c55202009-04-13 23:08:00 -0300169 /* Sweep it up to put it back into rotation */
Andy Walls52fcb3e2009-11-08 23:45:24 -0300170 list_move_tail(&mdl->list, &sweep_up);
Andy Wallsc37b11b2009-11-04 23:13:58 -0300171 atomic_dec(&s->q_busy.depth);
Andy Wallsbca11a52008-11-19 01:24:33 -0300172 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300173 continue;
Andy Wallsee2d64f2008-11-16 01:38:19 -0300174 }
Andy Walls40c55202009-04-13 23:08:00 -0300175 /*
Andy Walls52fcb3e2009-11-08 23:45:24 -0300176 * We pull the desired mdl off of the queue here. Something
Andy Walls40c55202009-04-13 23:08:00 -0300177 * will have to put it back on a queue later.
178 */
Andy Walls52fcb3e2009-11-08 23:45:24 -0300179 list_del_init(&mdl->list);
Andy Wallsc37b11b2009-11-04 23:13:58 -0300180 atomic_dec(&s->q_busy.depth);
Andy Walls52fcb3e2009-11-08 23:45:24 -0300181 ret = mdl;
Andy Wallsbca11a52008-11-19 01:24:33 -0300182 break;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300183 }
Andy Walls40c55202009-04-13 23:08:00 -0300184 spin_unlock(&s->q_busy.lock);
185
186 /*
Andy Walls52fcb3e2009-11-08 23:45:24 -0300187 * We found the mdl for which we were looking. Get it ready for
Andy Walls40c55202009-04-13 23:08:00 -0300188 * the caller to put on q_full or in the dvb ring buffer.
189 */
190 if (ret != NULL) {
191 ret->bytesused = bytesused;
192 ret->skipped = 0;
Andy Walls52fcb3e2009-11-08 23:45:24 -0300193 /* 0'ed readpos, m_flags & curr_buf when mdl went on q_busy */
194 cx18_mdl_set_buf_bytesused(s, ret);
195 cx18_mdl_sync_for_cpu(s, ret);
Andy Walls40c55202009-04-13 23:08:00 -0300196 if (s->type != CX18_ENC_STREAM_TYPE_TS)
Andy Walls52fcb3e2009-11-08 23:45:24 -0300197 set_bit(CX18_F_M_NEED_SWAP, &ret->m_flags);
Andy Walls40c55202009-04-13 23:08:00 -0300198 }
199
Andy Walls52fcb3e2009-11-08 23:45:24 -0300200 /* Put any mdls the firmware is ignoring back into normal rotation */
201 list_for_each_entry_safe(mdl, tmp, &sweep_up, list) {
202 list_del_init(&mdl->list);
203 cx18_enqueue(s, mdl, &s->q_free);
Andy Walls40c55202009-04-13 23:08:00 -0300204 }
Andy Wallsbca11a52008-11-19 01:24:33 -0300205 return ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300206}
207
Andy Walls52fcb3e2009-11-08 23:45:24 -0300208/* Move all mdls of a queue, while flushing the mdl */
209static void cx18_queue_flush(struct cx18_stream *s,
210 struct cx18_queue *q_src, struct cx18_queue *q_dst)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300211{
Andy Walls52fcb3e2009-11-08 23:45:24 -0300212 struct cx18_mdl *mdl;
Andy Walls6c9de522008-09-03 17:11:54 -0300213
Andy Walls52fcb3e2009-11-08 23:45:24 -0300214 /* It only makes sense to flush to q_free or q_idle */
215 if (q_src == q_dst || q_dst == &s->q_full || q_dst == &s->q_busy)
Andy Walls6c9de522008-09-03 17:11:54 -0300216 return;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300217
Andy Walls52fcb3e2009-11-08 23:45:24 -0300218 spin_lock(&q_src->lock);
219 spin_lock(&q_dst->lock);
220 while (!list_empty(&q_src->list)) {
221 mdl = list_first_entry(&q_src->list, struct cx18_mdl, list);
222 list_move_tail(&mdl->list, &q_dst->list);
223 mdl->bytesused = 0;
224 mdl->readpos = 0;
225 mdl->m_flags = 0;
226 mdl->skipped = 0;
227 mdl->curr_buf = NULL;
228 atomic_inc(&q_dst->depth);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300229 }
Andy Walls52fcb3e2009-11-08 23:45:24 -0300230 cx18_queue_init(q_src);
231 spin_unlock(&q_src->lock);
232 spin_unlock(&q_dst->lock);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300233}
234
235void cx18_flush_queues(struct cx18_stream *s)
236{
Andy Walls52fcb3e2009-11-08 23:45:24 -0300237 cx18_queue_flush(s, &s->q_busy, &s->q_free);
238 cx18_queue_flush(s, &s->q_full, &s->q_free);
239}
240
241/*
242 * Note, s->buf_pool is not protected by a lock,
243 * the stream better not have *anything* going on when calling this
244 */
245void cx18_unload_queues(struct cx18_stream *s)
246{
247 struct cx18_queue *q_idle = &s->q_idle;
248 struct cx18_mdl *mdl;
249 struct cx18_buffer *buf;
250
251 /* Move all MDLS to q_idle */
252 cx18_queue_flush(s, &s->q_busy, q_idle);
253 cx18_queue_flush(s, &s->q_full, q_idle);
254 cx18_queue_flush(s, &s->q_free, q_idle);
255
256 /* Reset MDL id's and move all buffers back to the stream's buf_pool */
257 spin_lock(&q_idle->lock);
258 list_for_each_entry(mdl, &q_idle->list, list) {
259 while (!list_empty(&mdl->buf_list)) {
260 buf = list_first_entry(&mdl->buf_list,
261 struct cx18_buffer, list);
262 list_move_tail(&buf->list, &s->buf_pool);
263 buf->bytesused = 0;
264 buf->readpos = 0;
265 }
266 mdl->id = s->mdl_base_idx; /* reset id to a "safe" value */
267 /* all other mdl fields were cleared by cx18_queue_flush() */
268 }
269 spin_unlock(&q_idle->lock);
270}
271
272/*
273 * Note, s->buf_pool is not protected by a lock,
274 * the stream better not have *anything* going on when calling this
275 */
276void cx18_load_queues(struct cx18_stream *s)
277{
278 struct cx18 *cx = s->cx;
279 struct cx18_mdl *mdl;
280 struct cx18_buffer *buf;
281 int mdl_id;
282 int i;
Andy Walls1047a832009-11-10 23:28:30 -0300283 u32 partial_buf_size;
Andy Walls52fcb3e2009-11-08 23:45:24 -0300284
285 /*
286 * Attach buffers to MDLs, give the MDLs ids, and add MDLs to q_free
287 * Excess MDLs are left on q_idle
288 * Excess buffers are left in buf_pool and/or on an MDL in q_idle
289 */
290 mdl_id = s->mdl_base_idx;
291 for (mdl = cx18_dequeue(s, &s->q_idle), i = s->bufs_per_mdl;
292 mdl != NULL && i == s->bufs_per_mdl;
293 mdl = cx18_dequeue(s, &s->q_idle)) {
294
295 mdl->id = mdl_id;
296
297 for (i = 0; i < s->bufs_per_mdl; i++) {
298 if (list_empty(&s->buf_pool))
299 break;
300
301 buf = list_first_entry(&s->buf_pool, struct cx18_buffer,
302 list);
303 list_move_tail(&buf->list, &mdl->buf_list);
304
305 /* update the firmware's MDL array with this buffer */
306 cx18_writel(cx, buf->dma_handle,
307 &cx->scb->cpu_mdl[mdl_id + i].paddr);
308 cx18_writel(cx, s->buf_size,
309 &cx->scb->cpu_mdl[mdl_id + i].length);
310 }
311
Andy Walls1047a832009-11-10 23:28:30 -0300312 if (i == s->bufs_per_mdl) {
313 /*
314 * The encoder doesn't honor s->mdl_size. So in the
315 * case of a non-integral number of buffers to meet
316 * mdl_size, we lie about the size of the last buffer
317 * in the MDL to get the encoder to really only send
318 * us mdl_size bytes per MDL transfer.
319 */
320 partial_buf_size = s->mdl_size % s->buf_size;
321 if (partial_buf_size) {
322 cx18_writel(cx, partial_buf_size,
323 &cx->scb->cpu_mdl[mdl_id + i - 1].length);
324 }
Andy Walls52fcb3e2009-11-08 23:45:24 -0300325 cx18_enqueue(s, mdl, &s->q_free);
Andy Walls1047a832009-11-10 23:28:30 -0300326 } else {
327 /* Not enough buffers for this MDL; we won't use it */
328 cx18_push(s, mdl, &s->q_idle);
329 }
Andy Walls52fcb3e2009-11-08 23:45:24 -0300330 mdl_id += i;
331 }
332}
333
334void _cx18_mdl_sync_for_cpu(struct cx18_stream *s, struct cx18_mdl *mdl)
335{
336 int dma = s->dma;
337 u32 buf_size = s->buf_size;
338 struct pci_dev *pci_dev = s->cx->pci_dev;
339 struct cx18_buffer *buf;
340
341 list_for_each_entry(buf, &mdl->buf_list, list)
342 pci_dma_sync_single_for_cpu(pci_dev, buf->dma_handle,
343 buf_size, dma);
344}
345
346void _cx18_mdl_sync_for_device(struct cx18_stream *s, struct cx18_mdl *mdl)
347{
348 int dma = s->dma;
349 u32 buf_size = s->buf_size;
350 struct pci_dev *pci_dev = s->cx->pci_dev;
351 struct cx18_buffer *buf;
352
353 list_for_each_entry(buf, &mdl->buf_list, list)
354 pci_dma_sync_single_for_device(pci_dev, buf->dma_handle,
355 buf_size, dma);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300356}
357
358int cx18_stream_alloc(struct cx18_stream *s)
359{
360 struct cx18 *cx = s->cx;
361 int i;
362
363 if (s->buffers == 0)
364 return 0;
365
Andy Walls22dce182009-11-09 23:55:30 -0300366 CX18_DEBUG_INFO("Allocate %s stream: %d x %d buffers "
367 "(%d.%02d kB total)\n",
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300368 s->name, s->buffers, s->buf_size,
Andy Walls22dce182009-11-09 23:55:30 -0300369 s->buffers * s->buf_size / 1024,
370 (s->buffers * s->buf_size * 100 / 1024) % 100);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300371
Andy Wallsfa655dd2009-11-05 21:51:24 -0300372 if (((char __iomem *)&cx->scb->cpu_mdl[cx->free_mdl_idx + s->buffers] -
Hans Verkuilc6eb8ea2008-09-03 17:11:54 -0300373 (char __iomem *)cx->scb) > SCB_RESERVED_SIZE) {
374 unsigned bufsz = (((char __iomem *)cx->scb) + SCB_RESERVED_SIZE -
375 ((char __iomem *)cx->scb->cpu_mdl));
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300376
377 CX18_ERR("Too many buffers, cannot fit in SCB area\n");
378 CX18_ERR("Max buffers = %zd\n",
Andy Wallsf0076e62009-11-04 22:33:33 -0300379 bufsz / sizeof(struct cx18_mdl_ent));
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300380 return -ENOMEM;
381 }
382
Andy Wallsfa655dd2009-11-05 21:51:24 -0300383 s->mdl_base_idx = cx->free_mdl_idx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300384
Andy Walls52fcb3e2009-11-08 23:45:24 -0300385 /* allocate stream buffers and MDLs */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300386 for (i = 0; i < s->buffers; i++) {
Andy Walls52fcb3e2009-11-08 23:45:24 -0300387 struct cx18_mdl *mdl;
388 struct cx18_buffer *buf;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300389
Andy Walls52fcb3e2009-11-08 23:45:24 -0300390 /* 1 MDL per buffer to handle the worst & also default case */
391 mdl = kzalloc(sizeof(struct cx18_mdl), GFP_KERNEL|__GFP_NOWARN);
392 if (mdl == NULL)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300393 break;
Andy Walls52fcb3e2009-11-08 23:45:24 -0300394
395 buf = kzalloc(sizeof(struct cx18_buffer),
396 GFP_KERNEL|__GFP_NOWARN);
397 if (buf == NULL) {
398 kfree(mdl);
399 break;
400 }
401
Hans Verkuil3f983872008-05-01 10:31:12 -0300402 buf->buf = kmalloc(s->buf_size, GFP_KERNEL|__GFP_NOWARN);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300403 if (buf->buf == NULL) {
Andy Walls52fcb3e2009-11-08 23:45:24 -0300404 kfree(mdl);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300405 kfree(buf);
406 break;
407 }
Andy Walls52fcb3e2009-11-08 23:45:24 -0300408
409 INIT_LIST_HEAD(&mdl->list);
410 INIT_LIST_HEAD(&mdl->buf_list);
411 mdl->id = s->mdl_base_idx; /* a somewhat safe value */
412 cx18_enqueue(s, mdl, &s->q_idle);
413
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300414 INIT_LIST_HEAD(&buf->list);
Andy Walls3d059132009-01-10 21:54:39 -0300415 buf->dma_handle = pci_map_single(s->cx->pci_dev,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300416 buf->buf, s->buf_size, s->dma);
417 cx18_buf_sync_for_cpu(s, buf);
Andy Walls52fcb3e2009-11-08 23:45:24 -0300418 list_add_tail(&buf->list, &s->buf_pool);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300419 }
420 if (i == s->buffers) {
Andy Wallsfa655dd2009-11-05 21:51:24 -0300421 cx->free_mdl_idx += s->buffers;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300422 return 0;
423 }
424 CX18_ERR("Couldn't allocate buffers for %s stream\n", s->name);
425 cx18_stream_free(s);
426 return -ENOMEM;
427}
428
429void cx18_stream_free(struct cx18_stream *s)
430{
Andy Walls52fcb3e2009-11-08 23:45:24 -0300431 struct cx18_mdl *mdl;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300432 struct cx18_buffer *buf;
433
Andy Walls52fcb3e2009-11-08 23:45:24 -0300434 /* move all buffers to buf_pool and all MDLs to q_idle */
435 cx18_unload_queues(s);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300436
Andy Walls52fcb3e2009-11-08 23:45:24 -0300437 /* empty q_idle */
438 while ((mdl = cx18_dequeue(s, &s->q_idle)))
439 kfree(mdl);
440
441 /* empty buf_pool */
442 while (!list_empty(&s->buf_pool)) {
443 buf = list_first_entry(&s->buf_pool, struct cx18_buffer, list);
444 list_del_init(&buf->list);
445
Andy Walls3d059132009-01-10 21:54:39 -0300446 pci_unmap_single(s->cx->pci_dev, buf->dma_handle,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300447 s->buf_size, s->dma);
448 kfree(buf->buf);
449 kfree(buf);
450 }
451}