| Paul Walmsley | 2e12bd7 | 2009-05-28 14:03:59 -0700 | [diff] [blame] | 1 | /* |
| 2 | * SDRC register values for the Micron MT46H32M32LF-6 |
| 3 | * |
| 4 | * Copyright (C) 2008 Texas Instruments, Inc. |
| 5 | * Copyright (C) 2008-2009 Nokia Corporation |
| 6 | * |
| 7 | * Paul Walmsley |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF |
| 15 | #define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF |
| 16 | |
| Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 17 | #include <plat/sdrc.h> |
| Paul Walmsley | 2e12bd7 | 2009-05-28 14:03:59 -0700 | [diff] [blame] | 18 | |
| 19 | /* Micron MT46H32M32LF-6 */ |
| 20 | /* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */ |
| 21 | static struct omap_sdrc_params mt46h32m32lf6_sdrc_params[] = { |
| 22 | [0] = { |
| 23 | .rate = 166000000, |
| 24 | .actim_ctrla = 0x9a9db4c6, |
| 25 | .actim_ctrlb = 0x00011217, |
| 26 | .rfr_ctrl = 0x0004dc01, |
| 27 | .mr = 0x00000032, |
| 28 | }, |
| 29 | [1] = { |
| 30 | .rate = 165941176, |
| 31 | .actim_ctrla = 0x9a9db4c6, |
| 32 | .actim_ctrlb = 0x00011217, |
| 33 | .rfr_ctrl = 0x0004dc01, |
| 34 | .mr = 0x00000032, |
| 35 | }, |
| 36 | [2] = { |
| 37 | .rate = 83000000, |
| 38 | .actim_ctrla = 0x51512283, |
| 39 | .actim_ctrlb = 0x0001120c, |
| 40 | .rfr_ctrl = 0x00025501, |
| 41 | .mr = 0x00000032, |
| 42 | }, |
| 43 | [3] = { |
| 44 | .rate = 82970588, |
| 45 | .actim_ctrla = 0x51512283, |
| 46 | .actim_ctrlb = 0x0001120c, |
| 47 | .rfr_ctrl = 0x00025501, |
| 48 | .mr = 0x00000032, |
| 49 | }, |
| 50 | [4] = { |
| 51 | .rate = 0 |
| 52 | }, |
| 53 | }; |
| 54 | |
| 55 | #endif |