| Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 1 | /* | 
|  | 2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | 
|  | 3 | * | 
|  | 4 | *   This program is free software; you can redistribute it and/or | 
|  | 5 | *   modify it under the terms of the GNU General Public License | 
|  | 6 | *   as published by the Free Software Foundation, version 2. | 
|  | 7 | * | 
|  | 8 | *   This program is distributed in the hope that it will be useful, but | 
|  | 9 | *   WITHOUT ANY WARRANTY; without even the implied warranty of | 
|  | 10 | *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | 
|  | 11 | *   NON INFRINGEMENT.  See the GNU General Public License for | 
|  | 12 | *   more details. | 
|  | 13 | * | 
|  | 14 | * Handle issues around the Tile "home cache" model of coherence. | 
|  | 15 | */ | 
|  | 16 |  | 
|  | 17 | #ifndef _ASM_TILE_HOMECACHE_H | 
|  | 18 | #define _ASM_TILE_HOMECACHE_H | 
|  | 19 |  | 
|  | 20 | #include <asm/page.h> | 
|  | 21 | #include <linux/cpumask.h> | 
|  | 22 |  | 
|  | 23 | struct page; | 
|  | 24 | struct task_struct; | 
|  | 25 | struct vm_area_struct; | 
|  | 26 | struct zone; | 
|  | 27 |  | 
|  | 28 | /* | 
|  | 29 | * Coherence point for the page is its memory controller. | 
|  | 30 | * It is not present in any cache (L1 or L2). | 
|  | 31 | */ | 
|  | 32 | #define PAGE_HOME_UNCACHED -1 | 
|  | 33 |  | 
|  | 34 | /* | 
|  | 35 | * Is this page immutable (unwritable) and thus able to be cached more | 
|  | 36 | * widely than would otherwise be possible?  On tile64 this means we | 
|  | 37 | * mark the PTE to cache locally; on tilepro it means we have "nc" set. | 
|  | 38 | */ | 
|  | 39 | #define PAGE_HOME_IMMUTABLE -2 | 
|  | 40 |  | 
|  | 41 | /* | 
|  | 42 | * Each cpu considers its own cache to be the home for the page, | 
|  | 43 | * which makes it incoherent. | 
|  | 44 | */ | 
|  | 45 | #define PAGE_HOME_INCOHERENT -3 | 
|  | 46 |  | 
|  | 47 | #if CHIP_HAS_CBOX_HOME_MAP() | 
|  | 48 | /* Home for the page is distributed via hash-for-home. */ | 
|  | 49 | #define PAGE_HOME_HASH -4 | 
|  | 50 | #endif | 
|  | 51 |  | 
|  | 52 | /* Homing is unknown or unspecified.  Not valid for page_home(). */ | 
|  | 53 | #define PAGE_HOME_UNKNOWN -5 | 
|  | 54 |  | 
|  | 55 | /* Home on the current cpu.  Not valid for page_home(). */ | 
|  | 56 | #define PAGE_HOME_HERE -6 | 
|  | 57 |  | 
|  | 58 | /* Support wrapper to use instead of explicit hv_flush_remote(). */ | 
|  | 59 | extern void flush_remote(unsigned long cache_pfn, unsigned long cache_length, | 
|  | 60 | const struct cpumask *cache_cpumask, | 
|  | 61 | HV_VirtAddr tlb_va, unsigned long tlb_length, | 
|  | 62 | unsigned long tlb_pgsize, | 
|  | 63 | const struct cpumask *tlb_cpumask, | 
|  | 64 | HV_Remote_ASID *asids, int asidcount); | 
|  | 65 |  | 
|  | 66 | /* Set homing-related bits in a PTE (can also pass a pgprot_t). */ | 
|  | 67 | extern pte_t pte_set_home(pte_t pte, int home); | 
|  | 68 |  | 
|  | 69 | /* Do a cache eviction on the specified cpus. */ | 
|  | 70 | extern void homecache_evict(const struct cpumask *mask); | 
|  | 71 |  | 
|  | 72 | /* | 
|  | 73 | * Change a kernel page's homecache.  It must not be mapped in user space. | 
|  | 74 | * If !CONFIG_HOMECACHE, only usable on LOWMEM, and can only be called when | 
|  | 75 | * no other cpu can reference the page, and causes a full-chip cache/TLB flush. | 
|  | 76 | */ | 
|  | 77 | extern void homecache_change_page_home(struct page *, int order, int home); | 
|  | 78 |  | 
|  | 79 | /* | 
|  | 80 | * Flush a page out of whatever cache(s) it is in. | 
|  | 81 | * This is more than just finv, since it properly handles waiting | 
|  | 82 | * for the data to reach memory on tilepro, but it can be quite | 
|  | 83 | * heavyweight, particularly on hash-for-home memory. | 
|  | 84 | */ | 
|  | 85 | extern void homecache_flush_cache(struct page *, int order); | 
|  | 86 |  | 
|  | 87 | /* | 
|  | 88 | * Allocate a page with the given GFP flags, home, and optionally | 
|  | 89 | * node.  These routines are actually just wrappers around the normal | 
|  | 90 | * alloc_pages() / alloc_pages_node() functions, which set and clear | 
|  | 91 | * a per-cpu variable to communicate with homecache_new_kernel_page(). | 
|  | 92 | * If !CONFIG_HOMECACHE, uses homecache_change_page_home(). | 
|  | 93 | */ | 
|  | 94 | extern struct page *homecache_alloc_pages(gfp_t gfp_mask, | 
|  | 95 | unsigned int order, int home); | 
|  | 96 | extern struct page *homecache_alloc_pages_node(int nid, gfp_t gfp_mask, | 
|  | 97 | unsigned int order, int home); | 
|  | 98 | #define homecache_alloc_page(gfp_mask, home) \ | 
|  | 99 | homecache_alloc_pages(gfp_mask, 0, home) | 
|  | 100 |  | 
|  | 101 | /* | 
|  | 102 | * These routines are just pass-throughs to free_pages() when | 
|  | 103 | * we support full homecaching.  If !CONFIG_HOMECACHE, then these | 
|  | 104 | * routines use homecache_change_page_home() to reset the home | 
|  | 105 | * back to the default before returning the page to the allocator. | 
|  | 106 | */ | 
|  | 107 | void homecache_free_pages(unsigned long addr, unsigned int order); | 
|  | 108 | #define homecache_free_page(page) \ | 
|  | 109 | homecache_free_pages((page), 0) | 
|  | 110 |  | 
|  | 111 |  | 
|  | 112 |  | 
|  | 113 | /* | 
|  | 114 | * Report the page home for LOWMEM pages by examining their kernel PTE, | 
|  | 115 | * or for highmem pages as the default home. | 
|  | 116 | */ | 
|  | 117 | extern int page_home(struct page *); | 
|  | 118 |  | 
|  | 119 | #define homecache_migrate_kthread() do {} while (0) | 
|  | 120 |  | 
|  | 121 | #define homecache_kpte_lock() 0 | 
|  | 122 | #define homecache_kpte_unlock(flags) do {} while (0) | 
|  | 123 |  | 
|  | 124 |  | 
|  | 125 | #endif /* _ASM_TILE_HOMECACHE_H */ |