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review.evervolv.com / android_kernel_oneplus_msm8996 / 1318a481fc37c503a901b96ae06b692ca2b21af5 / . / arch / tile / include / asm / tlbflush.h
blob: 96199d214fb82d55db10d83ff5ef9fddf214a602 [file] [log] [blame]
Chris Metcalf867e3592010-05-28 23:09:12 -0400[diff] [blame]1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15#ifndef _ASM_TILE_TLBFLUSH_H
16#define _ASM_TILE_TLBFLUSH_H
17
18#include <linux/mm.h>
19#include <linux/sched.h>
20#include <linux/smp.h>
21#include <asm/cacheflush.h>
22#include <asm/page.h>
23#include <hv/hypervisor.h>
24
25/*
26 * Rather than associating each mm with its own ASID, we just use
27 * ASIDs to allow us to lazily flush the TLB when we switch mms.
28 * This way we only have to do an actual TLB flush on mm switch
29 * every time we wrap ASIDs, not every single time we switch.
30 *
31 * FIXME: We might improve performance by keeping ASIDs around
32 * properly, though since the hypervisor direct-maps VAs to TSB
33 * entries, we're likely to have lost at least the executable page
34 * mappings by the time we switch back to the original mm.
35 */
36DECLARE_PER_CPU(int, current_asid);
37
38/* The hypervisor tells us what ASIDs are available to us. */
39extern int min_asid, max_asid;
40
41static inline unsigned long hv_page_size(const struct vm_area_struct *vma)
42{
43 return (vma->vm_flags & VM_HUGETLB) ? HPAGE_SIZE : PAGE_SIZE;
44}
45
46/* Pass as vma pointer for non-executable mapping, if no vma available. */
47#define FLUSH_NONEXEC ((const struct vm_area_struct *)-1UL)
48
49/* Flush a single user page on this cpu. */
50static inline void local_flush_tlb_page(const struct vm_area_struct *vma,
51 unsigned long addr,
52 unsigned long page_size)
53{
54 int rc = hv_flush_page(addr, page_size);
55 if (rc < 0)
56 panic("hv_flush_page(%#lx,%#lx) failed: %d",
57 addr, page_size, rc);
58 if (!vma || (vma != FLUSH_NONEXEC && (vma->vm_flags & VM_EXEC)))
59 __flush_icache();
60}
61
62/* Flush range of user pages on this cpu. */
63static inline void local_flush_tlb_pages(const struct vm_area_struct *vma,
64 unsigned long addr,
65 unsigned long page_size,
66 unsigned long len)
67{
68 int rc = hv_flush_pages(addr, page_size, len);
69 if (rc < 0)
70 panic("hv_flush_pages(%#lx,%#lx,%#lx) failed: %d",
71 addr, page_size, len, rc);
72 if (!vma || (vma != FLUSH_NONEXEC && (vma->vm_flags & VM_EXEC)))
73 __flush_icache();
74}
75
76/* Flush all user pages on this cpu. */
77static inline void local_flush_tlb(void)
78{
79 int rc = hv_flush_all(1); /* preserve global mappings */
80 if (rc < 0)
81 panic("hv_flush_all(1) failed: %d", rc);
82 __flush_icache();
83}
84
85/*
86 * Global pages have to be flushed a bit differently. Not a real
87 * performance problem because this does not happen often.
88 */
89static inline void local_flush_tlb_all(void)
90{
91 int i;
92 for (i = 0; ; ++i) {
93 HV_VirtAddrRange r = hv_inquire_virtual(i);
94 if (r.size == 0)
95 break;
96 local_flush_tlb_pages(NULL, r.start, PAGE_SIZE, r.size);
97 local_flush_tlb_pages(NULL, r.start, HPAGE_SIZE, r.size);
98 }
99}
100
101/*
102 * TLB flushing:
103 *
104 * - flush_tlb() flushes the current mm struct TLBs
105 * - flush_tlb_all() flushes all processes TLBs
106 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
107 * - flush_tlb_page(vma, vmaddr) flushes one page
108 * - flush_tlb_range(vma, start, end) flushes a range of pages
109 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
110 * - flush_tlb_others(cpumask, mm, va) flushes TLBs on other cpus
111 *
112 * Here (as in vm_area_struct), "end" means the first byte after
113 * our end address.
114 */
115
116extern void flush_tlb_all(void);
117extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
118extern void flush_tlb_current_task(void);
119extern void flush_tlb_mm(struct mm_struct *);
120extern void flush_tlb_page(const struct vm_area_struct *, unsigned long);
121extern void flush_tlb_page_mm(const struct vm_area_struct *,
122 struct mm_struct *, unsigned long);
123extern void flush_tlb_range(const struct vm_area_struct *,
124 unsigned long start, unsigned long end);
125
126#define flush_tlb() flush_tlb_current_task()
127
128#endif /* _ASM_TILE_TLBFLUSH_H */