blob: fefdfe59c07ca21b2fb42641e5bbdbacd769131e [file] [log] [blame]
Eric Miao49cbe782009-01-20 14:15:18 +08001/*
2 * linux/arch/arm/mach-mmp/pxa168.c
3 *
4 * Code specific to PXA168
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
Eric Miao49cbe782009-01-20 14:15:18 +080010#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/list.h>
Eric Miaoe2bb6652009-01-20 14:38:24 +080014#include <linux/io.h>
Eric Miao49cbe782009-01-20 14:15:18 +080015#include <linux/clk.h>
Haojian Zhuang157d2642011-10-17 20:37:52 +080016#include <linux/platform_device.h>
Eric Miao49cbe782009-01-20 14:15:18 +080017
18#include <asm/mach/time.h>
19#include <mach/addr-map.h>
20#include <mach/cputype.h>
21#include <mach/regs-apbc.h>
Haojian Zhuanga0f266c2009-10-13 15:24:55 +080022#include <mach/regs-apmu.h>
Eric Miao49cbe782009-01-20 14:15:18 +080023#include <mach/irqs.h>
24#include <mach/dma.h>
25#include <mach/devices.h>
Eric Miaoa7a89d92009-01-20 17:20:56 +080026#include <mach/mfp.h>
Tanmay Upadhyay3abd7f62011-07-20 10:00:58 +053027#include <linux/platform_device.h>
28#include <linux/dma-mapping.h>
29#include <mach/pxa168.h>
Eric Miao49cbe782009-01-20 14:15:18 +080030
31#include "common.h"
32#include "clock.h"
33
Eric Miaoa7a89d92009-01-20 17:20:56 +080034#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
35
36static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
37{
38 MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
39 MFP_ADDR_X(GPIO37, GPIO55, 0x000),
40 MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
41 MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
42
43 MFP_ADDR_END,
44};
45
Eric Miaoe2bb6652009-01-20 14:38:24 +080046static void __init pxa168_init_gpio(void)
47{
48 int i;
49
50 /* enable GPIO clock */
51 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
Eric Miaoe2bb6652009-01-20 14:38:24 +080052}
53
Eric Miao49cbe782009-01-20 14:15:18 +080054void __init pxa168_init_irq(void)
55{
56 icu_init_irq();
Eric Miaoe2bb6652009-01-20 14:38:24 +080057 pxa168_init_gpio();
Eric Miao49cbe782009-01-20 14:15:18 +080058}
59
60/* APB peripheral clocks */
61static APBC_CLK(uart1, PXA168_UART1, 1, 14745600);
62static APBC_CLK(uart2, PXA168_UART2, 1, 14745600);
Tanmay Upadhyay26407f82011-05-02 11:29:58 +053063static APBC_CLK(uart3, PXA168_UART3, 1, 14745600);
Eric Miao1a779202009-04-13 15:34:54 +080064static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
65static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
Eric Miaoa27ba762009-04-13 18:29:52 +080066static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
67static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
68static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
69static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
Haojian Zhuang7e499222010-03-19 11:53:17 -040070static APBC_CLK(ssp1, PXA168_SSP1, 4, 0);
71static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
72static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
73static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
74static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
Mark F. Brown6d109462010-09-03 18:28:07 -040075static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
Eric Miao49cbe782009-01-20 14:15:18 +080076
Lei Wen66624982011-06-21 05:37:47 -070077static APMU_CLK(nand, NAND, 0x19b, 156000000);
Mark F. Brown58cf68b2010-08-25 23:51:54 -040078static APMU_CLK(lcd, LCD, 0x7f, 312000000);
Tanmay Upadhyay80def0d2011-05-02 11:29:59 +053079static APMU_CLK(eth, ETH, 0x09, 0);
Tanmay Upadhyay3abd7f62011-07-20 10:00:58 +053080static APMU_CLK(usb, USB, 0x12, 0);
Haojian Zhuanga0f266c2009-10-13 15:24:55 +080081
Eric Miao49cbe782009-01-20 14:15:18 +080082/* device and clock bindings */
83static struct clk_lookup pxa168_clkregs[] = {
84 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
85 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
Tanmay Upadhyay26407f82011-05-02 11:29:58 +053086 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
Eric Miao1a779202009-04-13 15:34:54 +080087 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
88 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
Eric Miaoa27ba762009-04-13 18:29:52 +080089 INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),
90 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
91 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
92 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
Haojian Zhuang7e499222010-03-19 11:53:17 -040093 INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
94 INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
95 INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
96 INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
97 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
Haojian Zhuanga0f266c2009-10-13 15:24:55 +080098 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
Mark F. Brown58cf68b2010-08-25 23:51:54 -040099 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
Mark F. Brown6d109462010-09-03 18:28:07 -0400100 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
Tanmay Upadhyay80def0d2011-05-02 11:29:59 +0530101 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
Tanmay Upadhyay3abd7f62011-07-20 10:00:58 +0530102 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
Eric Miao49cbe782009-01-20 14:15:18 +0800103};
104
105static int __init pxa168_init(void)
106{
107 if (cpu_is_pxa168()) {
Eric Miaoa7a89d92009-01-20 17:20:56 +0800108 mfp_init_base(MFPR_VIRT_BASE);
109 mfp_init_addr(pxa168_mfp_addr_map);
Eric Miao49cbe782009-01-20 14:15:18 +0800110 pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
Russell King0a0300d2010-01-12 12:28:00 +0000111 clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs));
Eric Miao49cbe782009-01-20 14:15:18 +0800112 }
113
114 return 0;
115}
116postcore_initcall(pxa168_init);
117
118/* system timer - clock enabled, 3.25MHz */
119#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
120
121static void __init pxa168_timer_init(void)
122{
123 /* this is early, we have to initialize the CCU registers by
124 * ourselves instead of using clk_* API. Clock rate is defined
125 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
126 */
127 __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA168_TIMERS);
128
129 /* 3.25MHz, bus/functional clock enabled, release reset */
130 __raw_writel(TIMER_CLK_RST, APBC_PXA168_TIMERS);
131
132 timer_init(IRQ_PXA168_TIMER1);
133}
134
135struct sys_timer pxa168_timer = {
136 .init = pxa168_timer_init,
137};
138
Mark F. Brownab5739a2010-09-03 18:28:10 -0400139void pxa168_clear_keypad_wakeup(void)
140{
141 uint32_t val;
142 uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
143
144 /* wake event clear is needed in order to clear keypad interrupt */
145 val = __raw_readl(APMU_WAKE_CLR);
146 __raw_writel(val | mask, APMU_WAKE_CLR);
147}
148
Eric Miao49cbe782009-01-20 14:15:18 +0800149/* on-chip devices */
150PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
151PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
Tanmay Upadhyay26407f82011-05-02 11:29:58 +0530152PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
Eric Miao1a779202009-04-13 15:34:54 +0800153PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
154PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
Eric Miaoa27ba762009-04-13 18:29:52 +0800155PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
156PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
157PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
158PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
Haojian Zhuanga0f266c2009-10-13 15:24:55 +0800159PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
Haojian Zhuang7e499222010-03-19 11:53:17 -0400160PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
161PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
162PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
163PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
164PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
Mark F. Brown58cf68b2010-08-25 23:51:54 -0400165PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
Mark F. Brown6d109462010-09-03 18:28:07 -0400166PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
Tanmay Upadhyay80def0d2011-05-02 11:29:59 +0530167PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
Tanmay Upadhyay3abd7f62011-07-20 10:00:58 +0530168
Haojian Zhuang157d2642011-10-17 20:37:52 +0800169struct resource pxa168_resource_gpio[] = {
170 {
171 .start = 0xd4019000,
172 .end = 0xd4019fff,
173 .flags = IORESOURCE_MEM,
174 }, {
175 .start = IRQ_PXA168_GPIOX,
176 .end = IRQ_PXA168_GPIOX,
177 .flags = IORESOURCE_IRQ,
178 },
179};
180
181struct platform_device pxa168_device_gpio = {
182 .name = "pxa-gpio",
183 .id = -1,
184 .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
185 .resource = pxa168_resource_gpio,
186};
187
Tanmay Upadhyay3abd7f62011-07-20 10:00:58 +0530188struct resource pxa168_usb_host_resources[] = {
189 /* USB Host conroller register base */
190 [0] = {
191 .start = 0xd4209000,
192 .end = 0xd4209000 + 0x200,
193 .flags = IORESOURCE_MEM,
194 .name = "pxa168-usb-host",
195 },
196 /* USB PHY register base */
197 [1] = {
198 .start = 0xd4206000,
199 .end = 0xd4206000 + 0xff,
200 .flags = IORESOURCE_MEM,
201 .name = "pxa168-usb-phy",
202 },
203 [2] = {
204 .start = IRQ_PXA168_USB2,
205 .end = IRQ_PXA168_USB2,
206 .flags = IORESOURCE_IRQ,
207 },
208};
209
210static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
211struct platform_device pxa168_device_usb_host = {
212 .name = "pxa168-ehci",
213 .id = -1,
214 .dev = {
215 .dma_mask = &pxa168_usb_host_dmamask,
216 .coherent_dma_mask = DMA_BIT_MASK(32),
217 },
218
219 .num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
220 .resource = pxa168_usb_host_resources,
221};
222
223int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)
224{
225 pxa168_device_usb_host.dev.platform_data = pdata;
226 return platform_device_register(&pxa168_device_usb_host);
227}