blob: f8eed9a4abc132b0ebe0c410b5c8b7142996d393 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatre01f81622009-01-08 10:20:02 -08003 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
Winkler, Tomas759ef892008-12-09 11:28:58 -080022 * Intel Linux Wireless <ilw@linux.intel.com>
Zhu Yib481de92007-09-25 17:54:57 -070023 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
Zhu Yib481de92007-09-25 17:54:57 -070029#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/dma-mapping.h>
32#include <linux/delay.h>
33#include <linux/skbuff.h>
34#include <linux/netdevice.h>
35#include <linux/wireless.h>
36#include <net/mac80211.h>
Zhu Yib481de92007-09-25 17:54:57 -070037#include <linux/etherdevice.h>
Zhu Yi12342c42007-12-20 11:27:32 +080038#include <asm/unaligned.h>
Zhu Yib481de92007-09-25 17:54:57 -070039
Assaf Krauss6bc913b2008-03-11 16:17:18 -070040#include "iwl-eeprom.h"
Tomas Winkler3e0d4cb2008-04-24 11:55:38 -070041#include "iwl-dev.h"
Tomas Winklerfee12472008-04-03 16:05:21 -070042#include "iwl-core.h"
Tomas Winkler3395f6e2008-03-25 16:33:37 -070043#include "iwl-io.h"
Zhu Yib481de92007-09-25 17:54:57 -070044#include "iwl-helpers.h"
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -070045#include "iwl-calib.h"
Tomas Winkler5083e562008-05-29 16:35:15 +080046#include "iwl-sta.h"
Johannes Berge932a602009-10-02 13:44:03 -070047#include "iwl-agn-led.h"
Zhu Yib481de92007-09-25 17:54:57 -070048
Tomas Winkler630fe9b2008-06-12 09:47:08 +080049static int iwl4965_send_tx_power(struct iwl_priv *priv);
Reinette Chatre3d816c72009-08-07 15:41:37 -070050static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
Tomas Winkler630fe9b2008-06-12 09:47:08 +080051
Reinette Chatrea0987a82008-12-02 12:14:06 -080052/* Highest firmware API version supported */
53#define IWL4965_UCODE_API_MAX 2
54
55/* Lowest firmware API version supported */
56#define IWL4965_UCODE_API_MIN 2
57
58#define IWL4965_FW_PRE "iwlwifi-4965-"
59#define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
60#define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
Tomas Winklerd16dc482008-07-11 11:53:38 +080061
62
Assaf Krauss1ea87392008-03-18 14:57:50 -070063/* module parameters */
64static struct iwl_mod_params iwl4965_mod_params = {
Emmanuel Grumbach038669e2008-04-23 17:15:04 -070065 .num_of_queues = IWL49_NUM_QUEUES,
Tomas Winkler9f17b312008-07-11 11:53:35 +080066 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
Assaf Krauss1ea87392008-03-18 14:57:50 -070067 .amsdu_size_8K = 1,
Ester Kummer3a1081e2008-05-06 11:05:14 +080068 .restart_fw = 1,
Assaf Krauss1ea87392008-03-18 14:57:50 -070069 /* the rest are 0 by default */
70};
71
Tomas Winkler57aab752008-04-14 21:16:03 -070072/* check contents of special bootstrap uCode SRAM */
73static int iwl4965_verify_bsm(struct iwl_priv *priv)
74{
75 __le32 *image = priv->ucode_boot.v_addr;
76 u32 len = priv->ucode_boot.len;
77 u32 reg;
78 u32 val;
79
Tomas Winklere1623442009-01-27 14:27:56 -080080 IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
Tomas Winkler57aab752008-04-14 21:16:03 -070081
82 /* verify BSM SRAM contents */
83 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
84 for (reg = BSM_SRAM_LOWER_BOUND;
85 reg < BSM_SRAM_LOWER_BOUND + len;
86 reg += sizeof(u32), image++) {
87 val = iwl_read_prph(priv, reg);
88 if (val != le32_to_cpu(*image)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +080089 IWL_ERR(priv, "BSM uCode verification failed at "
Tomas Winkler57aab752008-04-14 21:16:03 -070090 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
91 BSM_SRAM_LOWER_BOUND,
92 reg - BSM_SRAM_LOWER_BOUND, len,
93 val, le32_to_cpu(*image));
94 return -EIO;
95 }
96 }
97
Tomas Winklere1623442009-01-27 14:27:56 -080098 IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
Tomas Winkler57aab752008-04-14 21:16:03 -070099
100 return 0;
101}
102
103/**
104 * iwl4965_load_bsm - Load bootstrap instructions
105 *
106 * BSM operation:
107 *
108 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
109 * in special SRAM that does not power down during RFKILL. When powering back
110 * up after power-saving sleeps (or during initial uCode load), the BSM loads
111 * the bootstrap program into the on-board processor, and starts it.
112 *
113 * The bootstrap program loads (via DMA) instructions and data for a new
114 * program from host DRAM locations indicated by the host driver in the
115 * BSM_DRAM_* registers. Once the new program is loaded, it starts
116 * automatically.
117 *
118 * When initializing the NIC, the host driver points the BSM to the
119 * "initialize" uCode image. This uCode sets up some internal data, then
120 * notifies host via "initialize alive" that it is complete.
121 *
122 * The host then replaces the BSM_DRAM_* pointer values to point to the
123 * normal runtime uCode instructions and a backup uCode data cache buffer
124 * (filled initially with starting data values for the on-board processor),
125 * then triggers the "initialize" uCode to load and launch the runtime uCode,
126 * which begins normal operation.
127 *
128 * When doing a power-save shutdown, runtime uCode saves data SRAM into
129 * the backup data cache in DRAM before SRAM is powered down.
130 *
131 * When powering back up, the BSM loads the bootstrap program. This reloads
132 * the runtime uCode instructions and the backup data cache into SRAM,
133 * and re-launches the runtime uCode from where it left off.
134 */
135static int iwl4965_load_bsm(struct iwl_priv *priv)
136{
137 __le32 *image = priv->ucode_boot.v_addr;
138 u32 len = priv->ucode_boot.len;
139 dma_addr_t pinst;
140 dma_addr_t pdata;
141 u32 inst_len;
142 u32 data_len;
143 int i;
144 u32 done;
145 u32 reg_offset;
146 int ret;
147
Tomas Winklere1623442009-01-27 14:27:56 -0800148 IWL_DEBUG_INFO(priv, "Begin load bsm\n");
Tomas Winkler57aab752008-04-14 21:16:03 -0700149
Reinette Chatrec03ea162009-08-07 15:41:44 -0700150 priv->ucode_type = UCODE_RT;
Ron Rindjunskyfe9b6b72008-05-29 16:35:06 +0800151
Tomas Winkler57aab752008-04-14 21:16:03 -0700152 /* make sure bootstrap program is no larger than BSM's SRAM size */
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800153 if (len > IWL49_MAX_BSM_SIZE)
Tomas Winkler57aab752008-04-14 21:16:03 -0700154 return -EINVAL;
155
156 /* Tell bootstrap uCode where to find the "Initialize" uCode
157 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
Tomas Winkler2d878892008-05-29 16:34:51 +0800158 * NOTE: iwl_init_alive_start() will replace these values,
Tomas Winkler57aab752008-04-14 21:16:03 -0700159 * after the "initialize" uCode has run, to point to
Tomas Winkler2d878892008-05-29 16:34:51 +0800160 * runtime/protocol instructions and backup data cache.
161 */
Tomas Winkler57aab752008-04-14 21:16:03 -0700162 pinst = priv->ucode_init.p_addr >> 4;
163 pdata = priv->ucode_init_data.p_addr >> 4;
164 inst_len = priv->ucode_init.len;
165 data_len = priv->ucode_init_data.len;
166
Tomas Winkler57aab752008-04-14 21:16:03 -0700167 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
168 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
169 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
170 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
171
172 /* Fill BSM memory with bootstrap instructions */
173 for (reg_offset = BSM_SRAM_LOWER_BOUND;
174 reg_offset < BSM_SRAM_LOWER_BOUND + len;
175 reg_offset += sizeof(u32), image++)
176 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
177
178 ret = iwl4965_verify_bsm(priv);
Mohamed Abbasa8b50a02009-05-22 11:01:47 -0700179 if (ret)
Tomas Winkler57aab752008-04-14 21:16:03 -0700180 return ret;
Tomas Winkler57aab752008-04-14 21:16:03 -0700181
182 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
183 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800184 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
Tomas Winkler57aab752008-04-14 21:16:03 -0700185 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
186
187 /* Load bootstrap code into instruction SRAM now,
188 * to prepare to load "initialize" uCode */
189 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
190
191 /* Wait for load of bootstrap uCode to finish */
192 for (i = 0; i < 100; i++) {
193 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
194 if (!(done & BSM_WR_CTRL_REG_BIT_START))
195 break;
196 udelay(10);
197 }
198 if (i < 100)
Tomas Winklere1623442009-01-27 14:27:56 -0800199 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
Tomas Winkler57aab752008-04-14 21:16:03 -0700200 else {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800201 IWL_ERR(priv, "BSM write did not complete!\n");
Tomas Winkler57aab752008-04-14 21:16:03 -0700202 return -EIO;
203 }
204
205 /* Enable future boot loads whenever power management unit triggers it
206 * (e.g. when powering back up after power-save shutdown) */
207 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
208
Tomas Winkler57aab752008-04-14 21:16:03 -0700209
210 return 0;
211}
212
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800213/**
214 * iwl4965_set_ucode_ptrs - Set uCode address location
215 *
216 * Tell initialization uCode where to find runtime uCode.
217 *
218 * BSM registers initially contain pointers to initialization uCode.
219 * We need to replace them to load runtime uCode inst and data,
220 * and to save runtime data when powering down.
221 */
222static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
223{
224 dma_addr_t pinst;
225 dma_addr_t pdata;
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800226 int ret = 0;
227
228 /* bits 35:4 for 4965 */
229 pinst = priv->ucode_code.p_addr >> 4;
230 pdata = priv->ucode_data_backup.p_addr >> 4;
231
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800232 /* Tell bootstrap uCode where to find image to load */
233 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
234 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
235 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
236 priv->ucode_data.len);
237
Tomas Winklera96a27f2008-10-23 23:48:56 -0700238 /* Inst byte count must be last to set up, bit 31 signals uCode
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800239 * that all new ptr/size info is in place */
240 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
241 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
Tomas Winklere1623442009-01-27 14:27:56 -0800242 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800243
244 return ret;
245}
246
247/**
248 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
249 *
250 * Called after REPLY_ALIVE notification received from "initialize" uCode.
251 *
252 * The 4965 "initialize" ALIVE reply contains calibration data for:
253 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
254 * (3945 does not contain this data).
255 *
256 * Tell "initialize" uCode to go ahead and load the runtime uCode.
257*/
258static void iwl4965_init_alive_start(struct iwl_priv *priv)
259{
260 /* Check alive response for "valid" sign from uCode */
261 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
262 /* We had an error bringing up the hardware, so take it
263 * all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800264 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800265 goto restart;
266 }
267
268 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
269 * This is a paranoid check, because we would not have gotten the
270 * "initialize" alive if code weren't properly loaded. */
271 if (iwl_verify_ucode(priv)) {
272 /* Runtime instruction load was bad;
273 * take it all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800274 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800275 goto restart;
276 }
277
278 /* Calculate temperature */
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +0800279 priv->temperature = iwl4965_hw_get_temperature(priv);
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800280
281 /* Send pointers to protocol/runtime uCode image ... init code will
282 * load and launch runtime uCode, which will send us another "Alive"
283 * notification. */
Tomas Winklere1623442009-01-27 14:27:56 -0800284 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800285 if (iwl4965_set_ucode_ptrs(priv)) {
286 /* Runtime instruction load won't happen;
287 * take it all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800288 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800289 goto restart;
290 }
291 return;
292
293restart:
294 queue_work(priv->workqueue, &priv->restart);
295}
296
Wey-Yi Guy7aafef12009-08-07 15:41:38 -0700297static bool is_ht40_channel(__le32 rxon_flags)
Zhu Yib481de92007-09-25 17:54:57 -0700298{
Wey-Yi Guya2b0f022009-05-22 11:01:49 -0700299 int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
300 >> RXON_FLG_CHANNEL_MODE_POS;
301 return ((chan_mod == CHANNEL_MODE_PURE_40) ||
302 (chan_mod == CHANNEL_MODE_MIXED));
Zhu Yib481de92007-09-25 17:54:57 -0700303}
304
Tomas Winkler8614f362008-04-23 17:14:55 -0700305/*
306 * EEPROM handlers
307 */
Tomas Winkler0ef2ca62008-10-23 23:48:51 -0700308static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
Tomas Winkler8614f362008-04-23 17:14:55 -0700309{
Tomas Winkler0ef2ca62008-10-23 23:48:51 -0700310 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
Tomas Winkler8614f362008-04-23 17:14:55 -0700311}
Zhu Yib481de92007-09-25 17:54:57 -0700312
Tomas Winklerda1bc452008-05-29 16:35:00 +0800313/*
Tomas Winklera96a27f2008-10-23 23:48:56 -0700314 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
Tomas Winklerda1bc452008-05-29 16:35:00 +0800315 * must be called under priv->lock and mac access
316 */
317static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
Zhu Yib481de92007-09-25 17:54:57 -0700318{
Tomas Winklerda1bc452008-05-29 16:35:00 +0800319 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
Zhu Yib481de92007-09-25 17:54:57 -0700320}
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800321
Tomas Winkler91238712008-04-23 17:14:53 -0700322static int iwl4965_apm_init(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700323{
Tomas Winkler91238712008-04-23 17:14:53 -0700324 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700325
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700326 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
Tomas Winkler91238712008-04-23 17:14:53 -0700327 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
Zhu Yib481de92007-09-25 17:54:57 -0700328
Tomas Winkler8f061892008-05-29 16:34:56 +0800329 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
330 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
331 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
332
Tomas Winkler91238712008-04-23 17:14:53 -0700333 /* set "initialization complete" bit to move adapter
334 * D0U* --> D0A* state */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700335 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winkler91238712008-04-23 17:14:53 -0700336
337 /* wait for clock stabilization */
Abhijeet Kolekar1739d332009-10-02 13:44:05 -0700338 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
339 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
Zhu, Yi73d7b5a2008-12-05 07:58:40 -0800340 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
Tomas Winkler91238712008-04-23 17:14:53 -0700341 if (ret < 0) {
Tomas Winklere1623442009-01-27 14:27:56 -0800342 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
Tomas Winkler91238712008-04-23 17:14:53 -0700343 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700344 }
345
Tomas Winkler91238712008-04-23 17:14:53 -0700346 /* enable DMA */
Tomas Winkler8f061892008-05-29 16:34:56 +0800347 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
348 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700349
350 udelay(20);
351
Tomas Winkler8f061892008-05-29 16:34:56 +0800352 /* disable L1-Active */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700353 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
Tomas Winkler91238712008-04-23 17:14:53 -0700354 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700355
Tomas Winkler91238712008-04-23 17:14:53 -0700356out:
Tomas Winkler91238712008-04-23 17:14:53 -0700357 return ret;
358}
359
Tomas Winkler694cc562008-04-24 11:55:22 -0700360
361static void iwl4965_nic_config(struct iwl_priv *priv)
362{
363 unsigned long flags;
Tomas Winkler694cc562008-04-24 11:55:22 -0700364 u16 radio_cfg;
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800365 u16 lctl;
Tomas Winkler694cc562008-04-24 11:55:22 -0700366
367 spin_lock_irqsave(&priv->lock, flags);
368
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800369 lctl = iwl_pcie_link_ctl(priv);
Tomas Winkler694cc562008-04-24 11:55:22 -0700370
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800371 /* HW bug W/A - negligible power consumption */
372 /* L1-ASPM is enabled by BIOS */
373 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
374 /* L1-ASPM enabled: disable L0S */
Tomas Winkler8f061892008-05-29 16:34:56 +0800375 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
376 else
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800377 /* L1-ASPM disabled: enable L0S */
Tomas Winkler8f061892008-05-29 16:34:56 +0800378 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
Tomas Winkler694cc562008-04-24 11:55:22 -0700379
380 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
381
382 /* write radio config values to register */
383 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
384 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
385 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
386 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
387 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
388
389 /* set CSR_HW_CONFIG_REG for uCode use */
390 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
391 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
392 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
393
394 priv->calib_info = (struct iwl_eeprom_calib_info *)
395 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
396
397 spin_unlock_irqrestore(&priv->lock, flags);
398}
399
Tomas Winkler7f066102008-05-29 16:34:57 +0800400static int iwl4965_apm_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700401{
Tomas Winkler7f066102008-05-29 16:34:57 +0800402 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700403
Abhijeet Kolekard68b6032009-10-02 13:44:04 -0700404 iwl_apm_stop_master(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700405
Zhu Yib481de92007-09-25 17:54:57 -0700406
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700407 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
Zhu Yib481de92007-09-25 17:54:57 -0700408
409 udelay(10);
410
Tomas Winkler7f066102008-05-29 16:34:57 +0800411 /* FIXME: put here L1A -L0S w/a */
412
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700413 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winklerf118a912008-05-29 16:34:58 +0800414
Abhijeet Kolekar1739d332009-10-02 13:44:05 -0700415 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
416 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
Zhu, Yi73d7b5a2008-12-05 07:58:40 -0800417 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
Zhu, Yi42802d72008-12-05 07:58:39 -0800418 if (ret < 0)
Tomas Winkler7f066102008-05-29 16:34:57 +0800419 goto out;
420
Zhu Yib481de92007-09-25 17:54:57 -0700421 udelay(10);
422
Tomas Winkler7f066102008-05-29 16:34:57 +0800423 /* Enable DMA and BSM Clock */
424 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
425 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700426
Tomas Winkler7f066102008-05-29 16:34:57 +0800427 udelay(10);
Zhu Yib481de92007-09-25 17:54:57 -0700428
Tomas Winkler7f066102008-05-29 16:34:57 +0800429 /* disable L1A */
430 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
431 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700432
Zhu Yib481de92007-09-25 17:54:57 -0700433 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
434 wake_up_interruptible(&priv->wait_command_queue);
435
Tomas Winkler7f066102008-05-29 16:34:57 +0800436out:
Tomas Winkler7f066102008-05-29 16:34:57 +0800437 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700438}
439
Zhu Yib481de92007-09-25 17:54:57 -0700440/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
441 * Called after every association, but this runs only once!
442 * ... once chain noise is calibrated the first time, it's good forever. */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700443static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700444{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700445 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
Zhu Yib481de92007-09-25 17:54:57 -0700446
Tomas Winkler3109ece2008-03-28 16:33:35 -0700447 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
Tomas Winklerf69f42a2008-10-23 23:48:52 -0700448 struct iwl_calib_diff_gain_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700449
450 memset(&cmd, 0, sizeof(cmd));
Tomas Winkler0d950d82008-11-25 13:36:01 -0800451 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
Zhu Yib481de92007-09-25 17:54:57 -0700452 cmd.diff_gain_a = 0;
453 cmd.diff_gain_b = 0;
454 cmd.diff_gain_c = 0;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700455 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
456 sizeof(cmd), &cmd))
Winkler, Tomas15b16872008-12-19 10:37:33 +0800457 IWL_ERR(priv,
458 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
Zhu Yib481de92007-09-25 17:54:57 -0700459 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
Tomas Winklere1623442009-01-27 14:27:56 -0800460 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
Zhu Yib481de92007-09-25 17:54:57 -0700461 }
Zhu Yib481de92007-09-25 17:54:57 -0700462}
463
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700464static void iwl4965_gain_computation(struct iwl_priv *priv,
465 u32 *average_noise,
466 u16 min_average_noise_antenna_i,
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -0700467 u32 min_average_noise,
468 u8 default_chain)
Zhu Yib481de92007-09-25 17:54:57 -0700469{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700470 int i, ret;
471 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
Zhu Yib481de92007-09-25 17:54:57 -0700472
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700473 data->delta_gain_code[min_average_noise_antenna_i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700474
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -0700475 for (i = default_chain; i < NUM_RX_CHAINS; i++) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700476 s32 delta_g = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700477
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700478 if (!(data->disconn_array[i]) &&
479 (data->delta_gain_code[i] ==
Zhu Yib481de92007-09-25 17:54:57 -0700480 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700481 delta_g = average_noise[i] - min_average_noise;
482 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
483 data->delta_gain_code[i] =
484 min(data->delta_gain_code[i],
485 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
Zhu Yib481de92007-09-25 17:54:57 -0700486
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700487 data->delta_gain_code[i] =
488 (data->delta_gain_code[i] | (1 << 2));
489 } else {
490 data->delta_gain_code[i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700491 }
Zhu Yib481de92007-09-25 17:54:57 -0700492 }
Tomas Winklere1623442009-01-27 14:27:56 -0800493 IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700494 data->delta_gain_code[0],
495 data->delta_gain_code[1],
496 data->delta_gain_code[2]);
Zhu Yib481de92007-09-25 17:54:57 -0700497
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700498 /* Differential gain gets sent to uCode only once */
499 if (!data->radio_write) {
Tomas Winklerf69f42a2008-10-23 23:48:52 -0700500 struct iwl_calib_diff_gain_cmd cmd;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700501 data->radio_write = 1;
Zhu Yib481de92007-09-25 17:54:57 -0700502
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700503 memset(&cmd, 0, sizeof(cmd));
Tomas Winkler0d950d82008-11-25 13:36:01 -0800504 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700505 cmd.diff_gain_a = data->delta_gain_code[0];
506 cmd.diff_gain_b = data->delta_gain_code[1];
507 cmd.diff_gain_c = data->delta_gain_code[2];
508 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
509 sizeof(cmd), &cmd);
510 if (ret)
Tomas Winklere1623442009-01-27 14:27:56 -0800511 IWL_DEBUG_CALIB(priv, "fail sending cmd "
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700512 "REPLY_PHY_CALIBRATION_CMD \n");
Zhu Yib481de92007-09-25 17:54:57 -0700513
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700514 /* TODO we might want recalculate
515 * rx_chain in rxon cmd */
516
517 /* Mark so we run this algo only once! */
518 data->state = IWL_CHAIN_NOISE_CALIBRATED;
Zhu Yib481de92007-09-25 17:54:57 -0700519 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700520 data->chain_noise_a = 0;
521 data->chain_noise_b = 0;
522 data->chain_noise_c = 0;
523 data->chain_signal_a = 0;
524 data->chain_signal_b = 0;
525 data->chain_signal_c = 0;
526 data->beacon_count = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700527}
528
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800529static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
530 __le32 *tx_flags)
531{
Johannes Berge6a98542008-10-21 12:40:02 +0200532 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800533 *tx_flags |= TX_CMD_FLG_RTS_MSK;
534 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
Johannes Berge6a98542008-10-21 12:40:02 +0200535 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800536 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
537 *tx_flags |= TX_CMD_FLG_CTS_MSK;
538 }
539}
540
Zhu Yib481de92007-09-25 17:54:57 -0700541static void iwl4965_bg_txpower_work(struct work_struct *work)
542{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700543 struct iwl_priv *priv = container_of(work, struct iwl_priv,
Zhu Yib481de92007-09-25 17:54:57 -0700544 txpower_work);
545
546 /* If a scan happened to start before we got here
547 * then just return; the statistics notification will
548 * kick off another scheduled work to compensate for
549 * any temperature delta we missed here. */
550 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
551 test_bit(STATUS_SCANNING, &priv->status))
552 return;
553
554 mutex_lock(&priv->mutex);
555
Tomas Winklera96a27f2008-10-23 23:48:56 -0700556 /* Regardless of if we are associated, we must reconfigure the
Zhu Yib481de92007-09-25 17:54:57 -0700557 * TX power since frames can be sent on non-radar channels while
558 * not associated */
Tomas Winkler630fe9b2008-06-12 09:47:08 +0800559 iwl4965_send_tx_power(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700560
561 /* Update last_temperature to keep is_calib_needed from running
562 * when it isn't needed... */
563 priv->last_temperature = priv->temperature;
564
565 mutex_unlock(&priv->mutex);
566}
567
568/*
569 * Acquire priv->lock before calling this function !
570 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700571static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
Zhu Yib481de92007-09-25 17:54:57 -0700572{
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700573 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
Zhu Yib481de92007-09-25 17:54:57 -0700574 (index & 0xff) | (txq_id << 8));
Tomas Winkler12a81f62008-04-03 16:05:20 -0700575 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
Zhu Yib481de92007-09-25 17:54:57 -0700576}
577
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800578/**
579 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
580 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
581 * @scd_retry: (1) Indicates queue will be used in aggregation mode
582 *
583 * NOTE: Acquire priv->lock before calling this function !
Zhu Yib481de92007-09-25 17:54:57 -0700584 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700585static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +0800586 struct iwl_tx_queue *txq,
Zhu Yib481de92007-09-25 17:54:57 -0700587 int tx_fifo_id, int scd_retry)
588{
589 int txq_id = txq->q.id;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800590
591 /* Find out whether to activate Tx queue */
Abhijeet Kolekarc3056062008-11-12 13:14:08 -0800592 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
Zhu Yib481de92007-09-25 17:54:57 -0700593
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800594 /* Set up and activate */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700595 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700596 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
597 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
598 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
599 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
600 IWL49_SCD_QUEUE_STTS_REG_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700601
602 txq->sched_retry = scd_retry;
603
Tomas Winklere1623442009-01-27 14:27:56 -0800604 IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800605 active ? "Activate" : "Deactivate",
Zhu Yib481de92007-09-25 17:54:57 -0700606 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
607}
608
609static const u16 default_queue_to_tx_fifo[] = {
610 IWL_TX_FIFO_AC3,
611 IWL_TX_FIFO_AC2,
612 IWL_TX_FIFO_AC1,
613 IWL_TX_FIFO_AC0,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700614 IWL49_CMD_FIFO_NUM,
Zhu Yib481de92007-09-25 17:54:57 -0700615 IWL_TX_FIFO_HCCA_1,
616 IWL_TX_FIFO_HCCA_2
617};
618
Emmanuel Grumbachbe1f3ab62008-06-12 09:47:18 +0800619static int iwl4965_alive_notify(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700620{
621 u32 a;
Zhu Yib481de92007-09-25 17:54:57 -0700622 unsigned long flags;
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800623 int i, chan;
Winkler, Tomas40fc95d2008-11-19 15:32:27 -0800624 u32 reg_val;
Zhu Yib481de92007-09-25 17:54:57 -0700625
626 spin_lock_irqsave(&priv->lock, flags);
627
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800628 /* Clear 4965's internal Tx Scheduler data base */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700629 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700630 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
631 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700632 iwl_write_targ_mem(priv, a, 0);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700633 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700634 iwl_write_targ_mem(priv, a, 0);
Huaxu Wan39d5e0c2009-10-02 13:44:00 -0700635 for (; a < priv->scd_base_addr +
636 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700637 iwl_write_targ_mem(priv, a, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700638
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800639 /* Tel 4965 where to find Tx byte count tables */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700640 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800641 priv->scd_bc_tbls.dma >> 10);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800642
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800643 /* Enable DMA channel */
644 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
645 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
646 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
647 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
648
Winkler, Tomas40fc95d2008-11-19 15:32:27 -0800649 /* Update FH chicken bits */
650 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
651 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
652 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
653
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800654 /* Disable chain mode for all queues */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700655 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700656
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800657 /* Initialize each Tx queue (including the command queue) */
Tomas Winkler5425e492008-04-15 16:01:38 -0700658 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800659
660 /* TFD circular buffer read/write indexes */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700661 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700662 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800663
664 /* Max Tx Window size for Scheduler-ACK mode */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700665 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700666 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
667 (SCD_WIN_SIZE <<
668 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
669 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800670
671 /* Frame limit */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700672 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700673 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
674 sizeof(u32),
675 (SCD_FRAME_LIMIT <<
676 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
677 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700678
679 }
Tomas Winkler12a81f62008-04-03 16:05:20 -0700680 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
Tomas Winkler5425e492008-04-15 16:01:38 -0700681 (1 << priv->hw_params.max_txq_num) - 1);
Zhu Yib481de92007-09-25 17:54:57 -0700682
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800683 /* Activate all Tx DMA/FIFO channels */
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800684 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
Zhu Yib481de92007-09-25 17:54:57 -0700685
686 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800687
688 /* Map each Tx/cmd queue to its corresponding fifo */
Zhu Yib481de92007-09-25 17:54:57 -0700689 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
690 int ac = default_queue_to_tx_fifo[i];
Ron Rindjunsky36470742008-05-15 13:54:10 +0800691 iwl_txq_ctx_activate(priv, i);
Zhu Yib481de92007-09-25 17:54:57 -0700692 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
693 }
694
Zhu Yib481de92007-09-25 17:54:57 -0700695 spin_unlock_irqrestore(&priv->lock, flags);
696
Mohamed Abbasa8b50a02009-05-22 11:01:47 -0700697 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700698}
699
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700700static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
701 .min_nrg_cck = 97,
Wey-Yi Guyfe6efb42009-06-12 13:22:54 -0700702 .max_nrg_cck = 0, /* not used, set to 0 */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700703
704 .auto_corr_min_ofdm = 85,
705 .auto_corr_min_ofdm_mrc = 170,
706 .auto_corr_min_ofdm_x1 = 105,
707 .auto_corr_min_ofdm_mrc_x1 = 220,
708
709 .auto_corr_max_ofdm = 120,
710 .auto_corr_max_ofdm_mrc = 210,
711 .auto_corr_max_ofdm_x1 = 140,
712 .auto_corr_max_ofdm_mrc_x1 = 270,
713
714 .auto_corr_min_cck = 125,
715 .auto_corr_max_cck = 200,
716 .auto_corr_min_cck_mrc = 200,
717 .auto_corr_max_cck_mrc = 400,
718
719 .nrg_th_cck = 100,
720 .nrg_th_ofdm = 100,
721};
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700722
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700723static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
724{
725 /* want Kelvin */
Wey-Yi Guy672639d2009-07-24 11:13:01 -0700726 priv->hw_params.ct_kill_threshold =
727 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700728}
729
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800730/**
Tomas Winkler5425e492008-04-15 16:01:38 -0700731 * iwl4965_hw_set_hw_params
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800732 *
733 * Called when initializing driver
734 */
Emmanuel Grumbachbe1f3ab62008-06-12 09:47:18 +0800735static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700736{
Assaf Krauss316c30d2008-03-14 10:38:46 -0700737
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700738 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
Assaf Krauss1ea87392008-03-18 14:57:50 -0700739 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800740 IWL_ERR(priv,
741 "invalid queues_num, should be between %d and %d\n",
742 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
Tomas Winkler059ff822008-04-14 21:16:14 -0700743 return -EINVAL;
Assaf Krauss316c30d2008-03-14 10:38:46 -0700744 }
745
Tomas Winkler5425e492008-04-15 16:01:38 -0700746 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
Zhu Yif3f911d2008-12-02 12:14:04 -0800747 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800748 priv->hw_params.scd_bc_tbls_size =
749 IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
Samuel Ortiza8e74e22009-01-23 13:45:14 -0800750 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
Tomas Winkler5425e492008-04-15 16:01:38 -0700751 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
752 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700753 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
754 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
755 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -0700756 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700757
Winkler, Tomas141c43a2009-01-08 10:19:53 -0800758 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
759
Tomas Winklerec35cf22008-04-15 16:01:39 -0700760 priv->hw_params.tx_chains_num = 2;
761 priv->hw_params.rx_chains_num = 2;
Guy Cohenfde0db32008-04-21 15:42:01 -0700762 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
763 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700764 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
765 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700766
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700767 priv->hw_params.sens = &iwl4965_sensitivity;
Tomas Winkler3e82a822008-02-13 11:32:31 -0800768
Tomas Winkler059ff822008-04-14 21:16:14 -0700769 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700770}
771
Zhu Yib481de92007-09-25 17:54:57 -0700772static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
773{
774 s32 sign = 1;
775
776 if (num < 0) {
777 sign = -sign;
778 num = -num;
779 }
780 if (denom < 0) {
781 sign = -sign;
782 denom = -denom;
783 }
784 *res = 1;
785 *res = ((num * 2 + denom) / (denom * 2)) * sign;
786
787 return 1;
788}
789
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800790/**
791 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
792 *
793 * Determines power supply voltage compensation for txpower calculations.
794 * Returns number of 1/2-dB steps to subtract from gain table index,
795 * to compensate for difference between power supply voltage during
796 * factory measurements, vs. current power supply voltage.
797 *
798 * Voltage indication is higher for lower voltage.
799 * Lower voltage requires more gain (lower gain table index).
800 */
Zhu Yib481de92007-09-25 17:54:57 -0700801static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
802 s32 current_voltage)
803{
804 s32 comp = 0;
805
806 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
807 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
808 return 0;
809
810 iwl4965_math_div_round(current_voltage - eeprom_voltage,
811 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
812
813 if (current_voltage > eeprom_voltage)
814 comp *= 2;
815 if ((comp < -2) || (comp > 2))
816 comp = 0;
817
818 return comp;
819}
820
Zhu Yib481de92007-09-25 17:54:57 -0700821static s32 iwl4965_get_tx_atten_grp(u16 channel)
822{
823 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
824 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
825 return CALIB_CH_GROUP_5;
826
827 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
828 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
829 return CALIB_CH_GROUP_1;
830
831 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
832 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
833 return CALIB_CH_GROUP_2;
834
835 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
836 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
837 return CALIB_CH_GROUP_3;
838
839 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
840 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
841 return CALIB_CH_GROUP_4;
842
Zhu Yib481de92007-09-25 17:54:57 -0700843 return -1;
844}
845
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700846static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700847{
848 s32 b = -1;
849
850 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -0700851 if (priv->calib_info->band_info[b].ch_from == 0)
Zhu Yib481de92007-09-25 17:54:57 -0700852 continue;
853
Tomas Winkler073d3f52008-04-21 15:41:52 -0700854 if ((channel >= priv->calib_info->band_info[b].ch_from)
855 && (channel <= priv->calib_info->band_info[b].ch_to))
Zhu Yib481de92007-09-25 17:54:57 -0700856 break;
857 }
858
859 return b;
860}
861
862static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
863{
864 s32 val;
865
866 if (x2 == x1)
867 return y1;
868 else {
869 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
870 return val + y2;
871 }
872}
873
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800874/**
875 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
876 *
877 * Interpolates factory measurements from the two sample channels within a
878 * sub-band, to apply to channel of interest. Interpolation is proportional to
879 * differences in channel frequencies, which is proportional to differences
880 * in channel number.
881 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700882static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
Tomas Winkler073d3f52008-04-21 15:41:52 -0700883 struct iwl_eeprom_calib_ch_info *chan_info)
Zhu Yib481de92007-09-25 17:54:57 -0700884{
885 s32 s = -1;
886 u32 c;
887 u32 m;
Tomas Winkler073d3f52008-04-21 15:41:52 -0700888 const struct iwl_eeprom_calib_measure *m1;
889 const struct iwl_eeprom_calib_measure *m2;
890 struct iwl_eeprom_calib_measure *omeas;
Zhu Yib481de92007-09-25 17:54:57 -0700891 u32 ch_i1;
892 u32 ch_i2;
893
894 s = iwl4965_get_sub_band(priv, channel);
895 if (s >= EEPROM_TX_POWER_BANDS) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800896 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
Zhu Yib481de92007-09-25 17:54:57 -0700897 return -1;
898 }
899
Tomas Winkler073d3f52008-04-21 15:41:52 -0700900 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
901 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
Zhu Yib481de92007-09-25 17:54:57 -0700902 chan_info->ch_num = (u8) channel;
903
Tomas Winklere1623442009-01-27 14:27:56 -0800904 IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700905 channel, s, ch_i1, ch_i2);
906
907 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
908 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -0700909 m1 = &(priv->calib_info->band_info[s].ch1.
Zhu Yib481de92007-09-25 17:54:57 -0700910 measurements[c][m]);
Tomas Winkler073d3f52008-04-21 15:41:52 -0700911 m2 = &(priv->calib_info->band_info[s].ch2.
Zhu Yib481de92007-09-25 17:54:57 -0700912 measurements[c][m]);
913 omeas = &(chan_info->measurements[c][m]);
914
915 omeas->actual_pow =
916 (u8) iwl4965_interpolate_value(channel, ch_i1,
917 m1->actual_pow,
918 ch_i2,
919 m2->actual_pow);
920 omeas->gain_idx =
921 (u8) iwl4965_interpolate_value(channel, ch_i1,
922 m1->gain_idx, ch_i2,
923 m2->gain_idx);
924 omeas->temperature =
925 (u8) iwl4965_interpolate_value(channel, ch_i1,
926 m1->temperature,
927 ch_i2,
928 m2->temperature);
929 omeas->pa_det =
930 (s8) iwl4965_interpolate_value(channel, ch_i1,
931 m1->pa_det, ch_i2,
932 m2->pa_det);
933
Tomas Winklere1623442009-01-27 14:27:56 -0800934 IWL_DEBUG_TXPOWER(priv,
935 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
936 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
937 IWL_DEBUG_TXPOWER(priv,
938 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
939 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
940 IWL_DEBUG_TXPOWER(priv,
941 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
942 m1->pa_det, m2->pa_det, omeas->pa_det);
943 IWL_DEBUG_TXPOWER(priv,
944 "chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
945 m1->temperature, m2->temperature,
946 omeas->temperature);
Zhu Yib481de92007-09-25 17:54:57 -0700947 }
948 }
949
950 return 0;
951}
952
953/* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
954 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
955static s32 back_off_table[] = {
956 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
957 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
958 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
959 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
960 10 /* CCK */
961};
962
963/* Thermal compensation values for txpower for various frequency ranges ...
964 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800965static struct iwl4965_txpower_comp_entry {
Zhu Yib481de92007-09-25 17:54:57 -0700966 s32 degrees_per_05db_a;
967 s32 degrees_per_05db_a_denom;
968} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
969 {9, 2}, /* group 0 5.2, ch 34-43 */
970 {4, 1}, /* group 1 5.2, ch 44-70 */
971 {4, 1}, /* group 2 5.2, ch 71-124 */
972 {4, 1}, /* group 3 5.2, ch 125-200 */
973 {3, 1} /* group 4 2.4, ch all */
974};
975
976static s32 get_min_power_index(s32 rate_power_index, u32 band)
977{
978 if (!band) {
979 if ((rate_power_index & 7) <= 4)
980 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
981 }
982 return MIN_TX_GAIN_INDEX;
983}
984
985struct gain_entry {
986 u8 dsp;
987 u8 radio;
988};
989
990static const struct gain_entry gain_table[2][108] = {
991 /* 5.2GHz power gain index table */
992 {
993 {123, 0x3F}, /* highest txpower */
994 {117, 0x3F},
995 {110, 0x3F},
996 {104, 0x3F},
997 {98, 0x3F},
998 {110, 0x3E},
999 {104, 0x3E},
1000 {98, 0x3E},
1001 {110, 0x3D},
1002 {104, 0x3D},
1003 {98, 0x3D},
1004 {110, 0x3C},
1005 {104, 0x3C},
1006 {98, 0x3C},
1007 {110, 0x3B},
1008 {104, 0x3B},
1009 {98, 0x3B},
1010 {110, 0x3A},
1011 {104, 0x3A},
1012 {98, 0x3A},
1013 {110, 0x39},
1014 {104, 0x39},
1015 {98, 0x39},
1016 {110, 0x38},
1017 {104, 0x38},
1018 {98, 0x38},
1019 {110, 0x37},
1020 {104, 0x37},
1021 {98, 0x37},
1022 {110, 0x36},
1023 {104, 0x36},
1024 {98, 0x36},
1025 {110, 0x35},
1026 {104, 0x35},
1027 {98, 0x35},
1028 {110, 0x34},
1029 {104, 0x34},
1030 {98, 0x34},
1031 {110, 0x33},
1032 {104, 0x33},
1033 {98, 0x33},
1034 {110, 0x32},
1035 {104, 0x32},
1036 {98, 0x32},
1037 {110, 0x31},
1038 {104, 0x31},
1039 {98, 0x31},
1040 {110, 0x30},
1041 {104, 0x30},
1042 {98, 0x30},
1043 {110, 0x25},
1044 {104, 0x25},
1045 {98, 0x25},
1046 {110, 0x24},
1047 {104, 0x24},
1048 {98, 0x24},
1049 {110, 0x23},
1050 {104, 0x23},
1051 {98, 0x23},
1052 {110, 0x22},
1053 {104, 0x18},
1054 {98, 0x18},
1055 {110, 0x17},
1056 {104, 0x17},
1057 {98, 0x17},
1058 {110, 0x16},
1059 {104, 0x16},
1060 {98, 0x16},
1061 {110, 0x15},
1062 {104, 0x15},
1063 {98, 0x15},
1064 {110, 0x14},
1065 {104, 0x14},
1066 {98, 0x14},
1067 {110, 0x13},
1068 {104, 0x13},
1069 {98, 0x13},
1070 {110, 0x12},
1071 {104, 0x08},
1072 {98, 0x08},
1073 {110, 0x07},
1074 {104, 0x07},
1075 {98, 0x07},
1076 {110, 0x06},
1077 {104, 0x06},
1078 {98, 0x06},
1079 {110, 0x05},
1080 {104, 0x05},
1081 {98, 0x05},
1082 {110, 0x04},
1083 {104, 0x04},
1084 {98, 0x04},
1085 {110, 0x03},
1086 {104, 0x03},
1087 {98, 0x03},
1088 {110, 0x02},
1089 {104, 0x02},
1090 {98, 0x02},
1091 {110, 0x01},
1092 {104, 0x01},
1093 {98, 0x01},
1094 {110, 0x00},
1095 {104, 0x00},
1096 {98, 0x00},
1097 {93, 0x00},
1098 {88, 0x00},
1099 {83, 0x00},
1100 {78, 0x00},
1101 },
1102 /* 2.4GHz power gain index table */
1103 {
1104 {110, 0x3f}, /* highest txpower */
1105 {104, 0x3f},
1106 {98, 0x3f},
1107 {110, 0x3e},
1108 {104, 0x3e},
1109 {98, 0x3e},
1110 {110, 0x3d},
1111 {104, 0x3d},
1112 {98, 0x3d},
1113 {110, 0x3c},
1114 {104, 0x3c},
1115 {98, 0x3c},
1116 {110, 0x3b},
1117 {104, 0x3b},
1118 {98, 0x3b},
1119 {110, 0x3a},
1120 {104, 0x3a},
1121 {98, 0x3a},
1122 {110, 0x39},
1123 {104, 0x39},
1124 {98, 0x39},
1125 {110, 0x38},
1126 {104, 0x38},
1127 {98, 0x38},
1128 {110, 0x37},
1129 {104, 0x37},
1130 {98, 0x37},
1131 {110, 0x36},
1132 {104, 0x36},
1133 {98, 0x36},
1134 {110, 0x35},
1135 {104, 0x35},
1136 {98, 0x35},
1137 {110, 0x34},
1138 {104, 0x34},
1139 {98, 0x34},
1140 {110, 0x33},
1141 {104, 0x33},
1142 {98, 0x33},
1143 {110, 0x32},
1144 {104, 0x32},
1145 {98, 0x32},
1146 {110, 0x31},
1147 {104, 0x31},
1148 {98, 0x31},
1149 {110, 0x30},
1150 {104, 0x30},
1151 {98, 0x30},
1152 {110, 0x6},
1153 {104, 0x6},
1154 {98, 0x6},
1155 {110, 0x5},
1156 {104, 0x5},
1157 {98, 0x5},
1158 {110, 0x4},
1159 {104, 0x4},
1160 {98, 0x4},
1161 {110, 0x3},
1162 {104, 0x3},
1163 {98, 0x3},
1164 {110, 0x2},
1165 {104, 0x2},
1166 {98, 0x2},
1167 {110, 0x1},
1168 {104, 0x1},
1169 {98, 0x1},
1170 {110, 0x0},
1171 {104, 0x0},
1172 {98, 0x0},
1173 {97, 0},
1174 {96, 0},
1175 {95, 0},
1176 {94, 0},
1177 {93, 0},
1178 {92, 0},
1179 {91, 0},
1180 {90, 0},
1181 {89, 0},
1182 {88, 0},
1183 {87, 0},
1184 {86, 0},
1185 {85, 0},
1186 {84, 0},
1187 {83, 0},
1188 {82, 0},
1189 {81, 0},
1190 {80, 0},
1191 {79, 0},
1192 {78, 0},
1193 {77, 0},
1194 {76, 0},
1195 {75, 0},
1196 {74, 0},
1197 {73, 0},
1198 {72, 0},
1199 {71, 0},
1200 {70, 0},
1201 {69, 0},
1202 {68, 0},
1203 {67, 0},
1204 {66, 0},
1205 {65, 0},
1206 {64, 0},
1207 {63, 0},
1208 {62, 0},
1209 {61, 0},
1210 {60, 0},
1211 {59, 0},
1212 }
1213};
1214
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001215static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001216 u8 is_ht40, u8 ctrl_chan_high,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001217 struct iwl4965_tx_power_db *tx_power_tbl)
Zhu Yib481de92007-09-25 17:54:57 -07001218{
1219 u8 saturation_power;
1220 s32 target_power;
1221 s32 user_target_power;
1222 s32 power_limit;
1223 s32 current_temp;
1224 s32 reg_limit;
1225 s32 current_regulatory;
1226 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1227 int i;
1228 int c;
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001229 const struct iwl_channel_info *ch_info = NULL;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001230 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1231 const struct iwl_eeprom_calib_measure *measurement;
Zhu Yib481de92007-09-25 17:54:57 -07001232 s16 voltage;
1233 s32 init_voltage;
1234 s32 voltage_compensation;
1235 s32 degrees_per_05db_num;
1236 s32 degrees_per_05db_denom;
1237 s32 factory_temp;
1238 s32 temperature_comp[2];
1239 s32 factory_gain_index[2];
1240 s32 factory_actual_pwr[2];
1241 s32 power_index;
1242
Winkler, Tomas62ea9c52009-01-19 15:30:29 -08001243 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
Zhu Yib481de92007-09-25 17:54:57 -07001244 * are used for indexing into txpower table) */
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001245 user_target_power = 2 * priv->tx_power_user_lmt;
Zhu Yib481de92007-09-25 17:54:57 -07001246
1247 /* Get current (RXON) channel, band, width */
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001248 IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1249 is_ht40);
Zhu Yib481de92007-09-25 17:54:57 -07001250
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001251 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1252
1253 if (!is_channel_valid(ch_info))
Zhu Yib481de92007-09-25 17:54:57 -07001254 return -EINVAL;
1255
1256 /* get txatten group, used to select 1) thermal txpower adjustment
1257 * and 2) mimo txpower balance between Tx chains. */
1258 txatten_grp = iwl4965_get_tx_atten_grp(channel);
Samuel Ortiza3139c52008-12-19 10:37:09 +08001259 if (txatten_grp < 0) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001260 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
Samuel Ortiza3139c52008-12-19 10:37:09 +08001261 channel);
Zhu Yib481de92007-09-25 17:54:57 -07001262 return -EINVAL;
Samuel Ortiza3139c52008-12-19 10:37:09 +08001263 }
Zhu Yib481de92007-09-25 17:54:57 -07001264
Tomas Winklere1623442009-01-27 14:27:56 -08001265 IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001266 channel, txatten_grp);
1267
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001268 if (is_ht40) {
Zhu Yib481de92007-09-25 17:54:57 -07001269 if (ctrl_chan_high)
1270 channel -= 2;
1271 else
1272 channel += 2;
1273 }
1274
1275 /* hardware txpower limits ...
1276 * saturation (clipping distortion) txpowers are in half-dBm */
1277 if (band)
Tomas Winkler073d3f52008-04-21 15:41:52 -07001278 saturation_power = priv->calib_info->saturation_power24;
Zhu Yib481de92007-09-25 17:54:57 -07001279 else
Tomas Winkler073d3f52008-04-21 15:41:52 -07001280 saturation_power = priv->calib_info->saturation_power52;
Zhu Yib481de92007-09-25 17:54:57 -07001281
1282 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1283 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1284 if (band)
1285 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1286 else
1287 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1288 }
1289
1290 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1291 * max_power_avg values are in dBm, convert * 2 */
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001292 if (is_ht40)
1293 reg_limit = ch_info->ht40_max_power_avg * 2;
Zhu Yib481de92007-09-25 17:54:57 -07001294 else
1295 reg_limit = ch_info->max_power_avg * 2;
1296
1297 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1298 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1299 if (band)
1300 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1301 else
1302 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1303 }
1304
1305 /* Interpolate txpower calibration values for this channel,
1306 * based on factory calibration tests on spaced channels. */
1307 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1308
1309 /* calculate tx gain adjustment based on power supply voltage */
Tomas Winkler073d3f52008-04-21 15:41:52 -07001310 voltage = priv->calib_info->voltage;
Zhu Yib481de92007-09-25 17:54:57 -07001311 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1312 voltage_compensation =
1313 iwl4965_get_voltage_compensation(voltage, init_voltage);
1314
Tomas Winklere1623442009-01-27 14:27:56 -08001315 IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001316 init_voltage,
1317 voltage, voltage_compensation);
1318
1319 /* get current temperature (Celsius) */
1320 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1321 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1322 current_temp = KELVIN_TO_CELSIUS(current_temp);
1323
1324 /* select thermal txpower adjustment params, based on channel group
1325 * (same frequency group used for mimo txatten adjustment) */
1326 degrees_per_05db_num =
1327 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1328 degrees_per_05db_denom =
1329 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1330
1331 /* get per-chain txpower values from factory measurements */
1332 for (c = 0; c < 2; c++) {
1333 measurement = &ch_eeprom_info.measurements[c][1];
1334
1335 /* txgain adjustment (in half-dB steps) based on difference
1336 * between factory and current temperature */
1337 factory_temp = measurement->temperature;
1338 iwl4965_math_div_round((current_temp - factory_temp) *
1339 degrees_per_05db_denom,
1340 degrees_per_05db_num,
1341 &temperature_comp[c]);
1342
1343 factory_gain_index[c] = measurement->gain_idx;
1344 factory_actual_pwr[c] = measurement->actual_pow;
1345
Tomas Winklere1623442009-01-27 14:27:56 -08001346 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1347 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
Zhu Yib481de92007-09-25 17:54:57 -07001348 "curr tmp %d, comp %d steps\n",
1349 factory_temp, current_temp,
1350 temperature_comp[c]);
1351
Tomas Winklere1623442009-01-27 14:27:56 -08001352 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001353 factory_gain_index[c],
1354 factory_actual_pwr[c]);
1355 }
1356
1357 /* for each of 33 bit-rates (including 1 for CCK) */
1358 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1359 u8 is_mimo_rate;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001360 union iwl4965_tx_power_dual_stream tx_power;
Zhu Yib481de92007-09-25 17:54:57 -07001361
1362 /* for mimo, reduce each chain's txpower by half
1363 * (3dB, 6 steps), so total output power is regulatory
1364 * compliant. */
1365 if (i & 0x8) {
1366 current_regulatory = reg_limit -
1367 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1368 is_mimo_rate = 1;
1369 } else {
1370 current_regulatory = reg_limit;
1371 is_mimo_rate = 0;
1372 }
1373
1374 /* find txpower limit, either hardware or regulatory */
1375 power_limit = saturation_power - back_off_table[i];
1376 if (power_limit > current_regulatory)
1377 power_limit = current_regulatory;
1378
1379 /* reduce user's txpower request if necessary
1380 * for this rate on this channel */
1381 target_power = user_target_power;
1382 if (target_power > power_limit)
1383 target_power = power_limit;
1384
Tomas Winklere1623442009-01-27 14:27:56 -08001385 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001386 i, saturation_power - back_off_table[i],
1387 current_regulatory, user_target_power,
1388 target_power);
1389
1390 /* for each of 2 Tx chains (radio transmitters) */
1391 for (c = 0; c < 2; c++) {
1392 s32 atten_value;
1393
1394 if (is_mimo_rate)
1395 atten_value =
1396 (s32)le32_to_cpu(priv->card_alive_init.
1397 tx_atten[txatten_grp][c]);
1398 else
1399 atten_value = 0;
1400
1401 /* calculate index; higher index means lower txpower */
1402 power_index = (u8) (factory_gain_index[c] -
1403 (target_power -
1404 factory_actual_pwr[c]) -
1405 temperature_comp[c] -
1406 voltage_compensation +
1407 atten_value);
1408
Tomas Winklere1623442009-01-27 14:27:56 -08001409/* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001410 power_index); */
1411
1412 if (power_index < get_min_power_index(i, band))
1413 power_index = get_min_power_index(i, band);
1414
1415 /* adjust 5 GHz index to support negative indexes */
1416 if (!band)
1417 power_index += 9;
1418
1419 /* CCK, rate 32, reduce txpower for CCK */
1420 if (i == POWER_TABLE_CCK_ENTRY)
1421 power_index +=
1422 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1423
1424 /* stay within the table! */
1425 if (power_index > 107) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001426 IWL_WARN(priv, "txpower index %d > 107\n",
Zhu Yib481de92007-09-25 17:54:57 -07001427 power_index);
1428 power_index = 107;
1429 }
1430 if (power_index < 0) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001431 IWL_WARN(priv, "txpower index %d < 0\n",
Zhu Yib481de92007-09-25 17:54:57 -07001432 power_index);
1433 power_index = 0;
1434 }
1435
1436 /* fill txpower command for this rate/chain */
1437 tx_power.s.radio_tx_gain[c] =
1438 gain_table[band][power_index].radio;
1439 tx_power.s.dsp_predis_atten[c] =
1440 gain_table[band][power_index].dsp;
1441
Tomas Winklere1623442009-01-27 14:27:56 -08001442 IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
Zhu Yib481de92007-09-25 17:54:57 -07001443 "gain 0x%02x dsp %d\n",
1444 c, atten_value, power_index,
1445 tx_power.s.radio_tx_gain[c],
1446 tx_power.s.dsp_predis_atten[c]);
Tomas Winkler3ac7f142008-07-21 02:40:14 +03001447 } /* for each chain */
Zhu Yib481de92007-09-25 17:54:57 -07001448
1449 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1450
Tomas Winkler3ac7f142008-07-21 02:40:14 +03001451 } /* for each rate */
Zhu Yib481de92007-09-25 17:54:57 -07001452
1453 return 0;
1454}
1455
1456/**
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001457 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
Zhu Yib481de92007-09-25 17:54:57 -07001458 *
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001459 * Uses the active RXON for channel, band, and characteristics (ht40, high)
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001460 * The power limit is taken from priv->tx_power_user_lmt.
Zhu Yib481de92007-09-25 17:54:57 -07001461 */
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001462static int iwl4965_send_tx_power(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001463{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001464 struct iwl4965_txpowertable_cmd cmd = { 0 };
Tomas Winkler857485c2008-03-21 13:53:44 -07001465 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07001466 u8 band = 0;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001467 bool is_ht40 = false;
Zhu Yib481de92007-09-25 17:54:57 -07001468 u8 ctrl_chan_high = 0;
1469
1470 if (test_bit(STATUS_SCANNING, &priv->status)) {
1471 /* If this gets hit a lot, switch it to a BUG() and catch
1472 * the stack trace to find out who is calling this during
1473 * a scan. */
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001474 IWL_WARN(priv, "TX Power requested while scanning!\n");
Zhu Yib481de92007-09-25 17:54:57 -07001475 return -EAGAIN;
1476 }
1477
Johannes Berg8318d782008-01-24 19:38:38 +01001478 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001479
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001480 is_ht40 = is_ht40_channel(priv->active_rxon.flags);
Zhu Yib481de92007-09-25 17:54:57 -07001481
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001482 if (is_ht40 &&
Zhu Yib481de92007-09-25 17:54:57 -07001483 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1484 ctrl_chan_high = 1;
1485
1486 cmd.band = band;
1487 cmd.channel = priv->active_rxon.channel;
1488
Tomas Winkler857485c2008-03-21 13:53:44 -07001489 ret = iwl4965_fill_txpower_tbl(priv, band,
Zhu Yib481de92007-09-25 17:54:57 -07001490 le16_to_cpu(priv->active_rxon.channel),
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001491 is_ht40, ctrl_chan_high, &cmd.tx_power);
Tomas Winkler857485c2008-03-21 13:53:44 -07001492 if (ret)
1493 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07001494
Tomas Winkler857485c2008-03-21 13:53:44 -07001495 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1496
1497out:
1498 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07001499}
1500
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001501static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1502{
1503 int ret = 0;
1504 struct iwl4965_rxon_assoc_cmd rxon_assoc;
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001505 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1506 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001507
1508 if ((rxon1->flags == rxon2->flags) &&
1509 (rxon1->filter_flags == rxon2->filter_flags) &&
1510 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1511 (rxon1->ofdm_ht_single_stream_basic_rates ==
1512 rxon2->ofdm_ht_single_stream_basic_rates) &&
1513 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1514 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1515 (rxon1->rx_chain == rxon2->rx_chain) &&
1516 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
Tomas Winklere1623442009-01-27 14:27:56 -08001517 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001518 return 0;
1519 }
1520
1521 rxon_assoc.flags = priv->staging_rxon.flags;
1522 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1523 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1524 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1525 rxon_assoc.reserved = 0;
1526 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1527 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1528 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1529 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1530 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1531
1532 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1533 sizeof(rxon_assoc), &rxon_assoc, NULL);
1534 if (ret)
1535 return ret;
1536
1537 return ret;
1538}
1539
Zhu Yi3c935522008-09-03 11:26:57 +08001540#ifdef IEEE80211_CONF_CHANNEL_SWITCH
Emmanuel Grumbacha33c2f42008-09-03 11:26:56 +08001541static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001542{
1543 int rc;
1544 u8 band = 0;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001545 bool is_ht40 = false;
Zhu Yib481de92007-09-25 17:54:57 -07001546 u8 ctrl_chan_high = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001547 struct iwl4965_channel_switch_cmd cmd = { 0 };
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001548 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001549
Johannes Berg8318d782008-01-24 19:38:38 +01001550 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001551
Assaf Krauss8622e702008-03-21 13:53:43 -07001552 ch_info = iwl_get_channel_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001553
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001554 is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
Zhu Yib481de92007-09-25 17:54:57 -07001555
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001556 if (is_ht40 &&
Zhu Yib481de92007-09-25 17:54:57 -07001557 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1558 ctrl_chan_high = 1;
1559
1560 cmd.band = band;
1561 cmd.expect_beacon = 0;
1562 cmd.channel = cpu_to_le16(channel);
1563 cmd.rxon_flags = priv->active_rxon.flags;
1564 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1565 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1566 if (ch_info)
1567 cmd.expect_beacon = is_channel_radar(ch_info);
1568 else
1569 cmd.expect_beacon = 1;
1570
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001571 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
Zhu Yib481de92007-09-25 17:54:57 -07001572 ctrl_chan_high, &cmd.tx_power);
1573 if (rc) {
Tomas Winklere1623442009-01-27 14:27:56 -08001574 IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc);
Zhu Yib481de92007-09-25 17:54:57 -07001575 return rc;
1576 }
1577
Tomas Winkler857485c2008-03-21 13:53:44 -07001578 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001579 return rc;
1580}
Zhu Yi3c935522008-09-03 11:26:57 +08001581#endif
Zhu Yib481de92007-09-25 17:54:57 -07001582
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001583/**
Tomas Winklere2a722e2008-04-14 21:16:10 -07001584 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001585 */
Tomas Winklere2a722e2008-04-14 21:16:10 -07001586static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +08001587 struct iwl_tx_queue *txq,
Tomas Winklere2a722e2008-04-14 21:16:10 -07001588 u16 byte_cnt)
Zhu Yib481de92007-09-25 17:54:57 -07001589{
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001590 struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
Tomas Winkler127901a2008-10-23 23:48:55 -07001591 int txq_id = txq->q.id;
1592 int write_ptr = txq->q.write_ptr;
1593 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1594 __le16 bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001595
Tomas Winkler127901a2008-10-23 23:48:55 -07001596 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
Zhu Yib481de92007-09-25 17:54:57 -07001597
Tomas Winkler127901a2008-10-23 23:48:55 -07001598 bc_ent = cpu_to_le16(len & 0xFFF);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001599 /* Set up byte count within first 256 entries */
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001600 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001601
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001602 /* If within first 64 entries, duplicate at end */
Tomas Winkler127901a2008-10-23 23:48:55 -07001603 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001604 scd_bc_tbl[txq_id].
Tomas Winkler127901a2008-10-23 23:48:55 -07001605 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001606}
1607
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001608/**
Zhu Yib481de92007-09-25 17:54:57 -07001609 * sign_extend - Sign extend a value using specified bit as sign-bit
1610 *
1611 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1612 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1613 *
1614 * @param oper value to sign extend
1615 * @param index 0 based bit index (0<=index<32) to sign bit
1616 */
1617static s32 sign_extend(u32 oper, int index)
1618{
1619 u8 shift = 31 - index;
1620
1621 return (s32)(oper << shift) >> shift;
1622}
1623
1624/**
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001625 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
Zhu Yib481de92007-09-25 17:54:57 -07001626 * @statistics: Provides the temperature reading from the uCode
1627 *
1628 * A return of <0 indicates bogus data in the statistics
1629 */
Reinette Chatre3d816c72009-08-07 15:41:37 -07001630static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001631{
1632 s32 temperature;
1633 s32 vt;
1634 s32 R1, R2, R3;
1635 u32 R4;
1636
1637 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001638 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1639 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
Zhu Yib481de92007-09-25 17:54:57 -07001640 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1641 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1642 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1643 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1644 } else {
Tomas Winklere1623442009-01-27 14:27:56 -08001645 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
Zhu Yib481de92007-09-25 17:54:57 -07001646 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1647 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1648 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1649 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1650 }
1651
1652 /*
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001653 * Temperature is only 23 bits, so sign extend out to 32.
Zhu Yib481de92007-09-25 17:54:57 -07001654 *
1655 * NOTE If we haven't received a statistics notification yet
1656 * with an updated temperature, use R4 provided to us in the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001657 * "initialize" ALIVE response.
1658 */
Zhu Yib481de92007-09-25 17:54:57 -07001659 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1660 vt = sign_extend(R4, 23);
1661 else
1662 vt = sign_extend(
1663 le32_to_cpu(priv->statistics.general.temperature), 23);
1664
Tomas Winklere1623442009-01-27 14:27:56 -08001665 IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
Zhu Yib481de92007-09-25 17:54:57 -07001666
1667 if (R3 == R1) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001668 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
Zhu Yib481de92007-09-25 17:54:57 -07001669 return -1;
1670 }
1671
1672 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1673 * Add offset to center the adjustment around 0 degrees Centigrade. */
1674 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1675 temperature /= (R3 - R1);
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001676 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
Zhu Yib481de92007-09-25 17:54:57 -07001677
Tomas Winklere1623442009-01-27 14:27:56 -08001678 IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001679 temperature, KELVIN_TO_CELSIUS(temperature));
Zhu Yib481de92007-09-25 17:54:57 -07001680
1681 return temperature;
1682}
1683
1684/* Adjust Txpower only if temperature variance is greater than threshold. */
1685#define IWL_TEMPERATURE_THRESHOLD 3
1686
1687/**
1688 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1689 *
1690 * If the temperature changed has changed sufficiently, then a recalibration
1691 * is needed.
1692 *
1693 * Assumes caller will replace priv->last_temperature once calibration
1694 * executed.
1695 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001696static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001697{
1698 int temp_diff;
1699
1700 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
Tomas Winklere1623442009-01-27 14:27:56 -08001701 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001702 return 0;
1703 }
1704
1705 temp_diff = priv->temperature - priv->last_temperature;
1706
1707 /* get absolute value */
1708 if (temp_diff < 0) {
Tomas Winklere1623442009-01-27 14:27:56 -08001709 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
Zhu Yib481de92007-09-25 17:54:57 -07001710 temp_diff = -temp_diff;
1711 } else if (temp_diff == 0)
Tomas Winklere1623442009-01-27 14:27:56 -08001712 IWL_DEBUG_POWER(priv, "Same temp, \n");
Zhu Yib481de92007-09-25 17:54:57 -07001713 else
Tomas Winklere1623442009-01-27 14:27:56 -08001714 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
Zhu Yib481de92007-09-25 17:54:57 -07001715
1716 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
Tomas Winklere1623442009-01-27 14:27:56 -08001717 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
Zhu Yib481de92007-09-25 17:54:57 -07001718 return 0;
1719 }
1720
Tomas Winklere1623442009-01-27 14:27:56 -08001721 IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
Zhu Yib481de92007-09-25 17:54:57 -07001722
1723 return 1;
1724}
1725
Zhu Yi52256402008-06-30 17:23:31 +08001726static void iwl4965_temperature_calib(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001727{
Zhu Yib481de92007-09-25 17:54:57 -07001728 s32 temp;
Zhu Yib481de92007-09-25 17:54:57 -07001729
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001730 temp = iwl4965_hw_get_temperature(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001731 if (temp < 0)
1732 return;
1733
1734 if (priv->temperature != temp) {
1735 if (priv->temperature)
Tomas Winklere1623442009-01-27 14:27:56 -08001736 IWL_DEBUG_TEMP(priv, "Temperature changed "
Zhu Yib481de92007-09-25 17:54:57 -07001737 "from %dC to %dC\n",
1738 KELVIN_TO_CELSIUS(priv->temperature),
1739 KELVIN_TO_CELSIUS(temp));
1740 else
Tomas Winklere1623442009-01-27 14:27:56 -08001741 IWL_DEBUG_TEMP(priv, "Temperature "
Zhu Yib481de92007-09-25 17:54:57 -07001742 "initialized to %dC\n",
1743 KELVIN_TO_CELSIUS(temp));
1744 }
1745
1746 priv->temperature = temp;
Wey-Yi Guy39b73fb2009-07-24 11:13:02 -07001747 iwl_tt_handler(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001748 set_bit(STATUS_TEMPERATURE, &priv->status);
1749
Emmanuel Grumbach203566f2008-06-12 09:46:54 +08001750 if (!priv->disable_tx_power_cal &&
1751 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1752 iwl4965_is_temp_calib_needed(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001753 queue_work(priv->workqueue, &priv->txpower_work);
1754}
1755
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001756/**
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001757 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1758 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001759static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001760 u16 txq_id)
1761{
1762 /* Simply stop the queue, but don't change any configuration;
1763 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001764 iwl_write_prph(priv,
Tomas Winkler12a81f62008-04-03 16:05:20 -07001765 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001766 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1767 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001768}
1769
1770/**
Ron Rindjunsky7f3e4bb2008-06-12 09:46:55 +08001771 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08001772 * priv->lock must be held by the caller
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001773 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08001774static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1775 u16 ssn_idx, u8 tx_fifo)
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001776{
Tomas Winkler9f17b312008-07-11 11:53:35 +08001777 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1778 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001779 IWL_WARN(priv,
1780 "queue number out of range: %d, must be %d to %d\n",
Tomas Winkler9f17b312008-07-11 11:53:35 +08001781 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1782 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001783 return -EINVAL;
1784 }
1785
1786 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1787
Tomas Winkler12a81f62008-04-03 16:05:20 -07001788 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001789
1790 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1791 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1792 /* supposes that ssn_idx is valid (!= 0xFFF) */
1793 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1794
Tomas Winkler12a81f62008-04-03 16:05:20 -07001795 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Ron Rindjunsky36470742008-05-15 13:54:10 +08001796 iwl_txq_ctx_deactivate(priv, txq_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001797 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1798
1799 return 0;
1800}
1801
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001802/**
1803 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1804 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001805static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
Zhu Yib481de92007-09-25 17:54:57 -07001806 u16 txq_id)
1807{
1808 u32 tbl_dw_addr;
1809 u32 tbl_dw;
1810 u16 scd_q2ratid;
1811
Tomas Winkler30e553e2008-05-29 16:35:16 +08001812 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
Zhu Yib481de92007-09-25 17:54:57 -07001813
1814 tbl_dw_addr = priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001815 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
Zhu Yib481de92007-09-25 17:54:57 -07001816
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001817 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
Zhu Yib481de92007-09-25 17:54:57 -07001818
1819 if (txq_id & 0x1)
1820 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1821 else
1822 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1823
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001824 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
Zhu Yib481de92007-09-25 17:54:57 -07001825
1826 return 0;
1827}
1828
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001829
Zhu Yib481de92007-09-25 17:54:57 -07001830/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001831 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1832 *
Ron Rindjunsky7f3e4bb2008-06-12 09:46:55 +08001833 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001834 * i.e. it must be one of the higher queues used for aggregation
Zhu Yib481de92007-09-25 17:54:57 -07001835 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08001836static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1837 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
Zhu Yib481de92007-09-25 17:54:57 -07001838{
1839 unsigned long flags;
Zhu Yib481de92007-09-25 17:54:57 -07001840 u16 ra_tid;
1841
Tomas Winkler9f17b312008-07-11 11:53:35 +08001842 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1843 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001844 IWL_WARN(priv,
1845 "queue number out of range: %d, must be %d to %d\n",
Tomas Winkler9f17b312008-07-11 11:53:35 +08001846 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1847 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1848 return -EINVAL;
1849 }
Zhu Yib481de92007-09-25 17:54:57 -07001850
1851 ra_tid = BUILD_RAxTID(sta_id, tid);
1852
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001853 /* Modify device's station table to Tx this TID */
Tomas Winkler9f586712008-11-12 13:14:05 -08001854 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
Zhu Yib481de92007-09-25 17:54:57 -07001855
1856 spin_lock_irqsave(&priv->lock, flags);
Zhu Yib481de92007-09-25 17:54:57 -07001857
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001858 /* Stop this Tx queue before configuring it */
Zhu Yib481de92007-09-25 17:54:57 -07001859 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1860
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001861 /* Map receiver-address / traffic-ID to this queue */
Zhu Yib481de92007-09-25 17:54:57 -07001862 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1863
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001864 /* Set this queue as a chain-building queue */
Tomas Winkler12a81f62008-04-03 16:05:20 -07001865 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07001866
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001867 /* Place first TFD at index corresponding to start sequence number.
1868 * Assumes that ssn_idx is valid (!= 0xFFF) */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08001869 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1870 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
Zhu Yib481de92007-09-25 17:54:57 -07001871 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1872
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001873 /* Set up Tx window size and frame limit for this queue */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001874 iwl_write_targ_mem(priv,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001875 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1876 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1877 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001878
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001879 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001880 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1881 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1882 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001883
Tomas Winkler12a81f62008-04-03 16:05:20 -07001884 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07001885
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001886 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
Zhu Yib481de92007-09-25 17:54:57 -07001887 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1888
Zhu Yib481de92007-09-25 17:54:57 -07001889 spin_unlock_irqrestore(&priv->lock, flags);
1890
1891 return 0;
1892}
1893
Tomas Winkler133636d2008-05-05 10:22:34 +08001894
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001895static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1896{
1897 switch (cmd_id) {
1898 case REPLY_RXON:
1899 return (u16) sizeof(struct iwl4965_rxon_cmd);
1900 default:
1901 return len;
1902 }
1903}
1904
Tomas Winkler133636d2008-05-05 10:22:34 +08001905static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1906{
1907 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1908 addsta->mode = cmd->mode;
1909 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1910 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1911 addsta->station_flags = cmd->station_flags;
1912 addsta->station_flags_msk = cmd->station_flags_msk;
1913 addsta->tid_disable_tx = cmd->tid_disable_tx;
1914 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1915 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1916 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
Harvey Harrisonc1b4aa32009-01-29 13:26:44 -08001917 addsta->reserved1 = cpu_to_le16(0);
1918 addsta->reserved2 = cpu_to_le32(0);
Tomas Winkler133636d2008-05-05 10:22:34 +08001919
1920 return (u16)sizeof(struct iwl4965_addsta_cmd);
1921}
Tomas Winklerf20217d2008-05-29 16:35:10 +08001922
Tomas Winklerf20217d2008-05-29 16:35:10 +08001923static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1924{
Tomas Winkler25a65722008-06-12 09:47:07 +08001925 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001926}
1927
1928/**
Tomas Winklera96a27f2008-10-23 23:48:56 -07001929 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
Tomas Winklerf20217d2008-05-29 16:35:10 +08001930 */
1931static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1932 struct iwl_ht_agg *agg,
Tomas Winkler25a65722008-06-12 09:47:07 +08001933 struct iwl4965_tx_resp *tx_resp,
1934 int txq_id, u16 start_idx)
Tomas Winklerf20217d2008-05-29 16:35:10 +08001935{
1936 u16 status;
Tomas Winkler25a65722008-06-12 09:47:07 +08001937 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001938 struct ieee80211_tx_info *info = NULL;
1939 struct ieee80211_hdr *hdr = NULL;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001940 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
Tomas Winkler25a65722008-06-12 09:47:07 +08001941 int i, sh, idx;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001942 u16 seq;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001943 if (agg->wait_for_ba)
Tomas Winklere1623442009-01-27 14:27:56 -08001944 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08001945
1946 agg->frame_count = tx_resp->frame_count;
1947 agg->start_idx = start_idx;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001948 agg->rate_n_flags = rate_n_flags;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001949 agg->bitmap = 0;
1950
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001951 /* num frames attempted by Tx command */
Tomas Winklerf20217d2008-05-29 16:35:10 +08001952 if (agg->frame_count == 1) {
1953 /* Only one frame was attempted; no block-ack will arrive */
1954 status = le16_to_cpu(frame_status[0].status);
Tomas Winkler25a65722008-06-12 09:47:07 +08001955 idx = start_idx;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001956
1957 /* FIXME: code repetition */
Tomas Winklere1623442009-01-27 14:27:56 -08001958 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001959 agg->frame_count, agg->start_idx, idx);
1960
1961 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
Johannes Berge6a98542008-10-21 12:40:02 +02001962 info->status.rates[0].count = tx_resp->failure_frame + 1;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001963 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
Abhijeet Kolekarc3056062008-11-12 13:14:08 -08001964 info->flags |= iwl_is_tx_success(status) ?
Tomas Winklerf20217d2008-05-29 16:35:10 +08001965 IEEE80211_TX_STAT_ACK : 0;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001966 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001967 /* FIXME: code repetition end */
1968
Tomas Winklere1623442009-01-27 14:27:56 -08001969 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001970 status & 0xff, tx_resp->failure_frame);
Tomas Winklere1623442009-01-27 14:27:56 -08001971 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001972
1973 agg->wait_for_ba = 0;
1974 } else {
1975 /* Two or more frames were attempted; expect block-ack */
1976 u64 bitmap = 0;
1977 int start = agg->start_idx;
1978
1979 /* Construct bit-map of pending frames within Tx window */
1980 for (i = 0; i < agg->frame_count; i++) {
1981 u16 sc;
1982 status = le16_to_cpu(frame_status[i].status);
1983 seq = le16_to_cpu(frame_status[i].sequence);
1984 idx = SEQ_TO_INDEX(seq);
1985 txq_id = SEQ_TO_QUEUE(seq);
1986
1987 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1988 AGG_TX_STATE_ABORT_MSK))
1989 continue;
1990
Tomas Winklere1623442009-01-27 14:27:56 -08001991 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001992 agg->frame_count, txq_id, idx);
1993
1994 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
Stanislaw Gruszka6c6a22e2009-09-23 10:51:34 +02001995 if (!hdr) {
1996 IWL_ERR(priv,
1997 "BUG_ON idx doesn't point to valid skb"
1998 " idx=%d, txq_id=%d\n", idx, txq_id);
1999 return -1;
2000 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002001
2002 sc = le16_to_cpu(hdr->seq_ctrl);
2003 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002004 IWL_ERR(priv,
2005 "BUG_ON idx doesn't match seq control"
2006 " idx=%d, seq_idx=%d, seq=%d\n",
2007 idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002008 return -1;
2009 }
2010
Tomas Winklere1623442009-01-27 14:27:56 -08002011 IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08002012 i, idx, SEQ_TO_SN(sc));
2013
2014 sh = idx - start;
2015 if (sh > 64) {
2016 sh = (start - idx) + 0xff;
2017 bitmap = bitmap << sh;
2018 sh = 0;
2019 start = idx;
2020 } else if (sh < -64)
2021 sh = 0xff - (start - idx);
2022 else if (sh < 0) {
2023 sh = start - idx;
2024 start = idx;
2025 bitmap = bitmap << sh;
2026 sh = 0;
2027 }
Emmanuel Grumbach4aa41f12008-07-18 13:53:09 +08002028 bitmap |= 1ULL << sh;
Tomas Winklere1623442009-01-27 14:27:56 -08002029 IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
Emmanuel Grumbach4aa41f12008-07-18 13:53:09 +08002030 start, (unsigned long long)bitmap);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002031 }
2032
2033 agg->bitmap = bitmap;
2034 agg->start_idx = start;
Tomas Winklere1623442009-01-27 14:27:56 -08002035 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08002036 agg->frame_count, agg->start_idx,
2037 (unsigned long long)agg->bitmap);
2038
2039 if (bitmap)
2040 agg->wait_for_ba = 1;
2041 }
2042 return 0;
2043}
Tomas Winklerf20217d2008-05-29 16:35:10 +08002044
2045/**
2046 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2047 */
2048static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2049 struct iwl_rx_mem_buffer *rxb)
2050{
2051 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2052 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2053 int txq_id = SEQ_TO_QUEUE(sequence);
2054 int index = SEQ_TO_INDEX(sequence);
2055 struct iwl_tx_queue *txq = &priv->txq[txq_id];
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002056 struct ieee80211_hdr *hdr;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002057 struct ieee80211_tx_info *info;
2058 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Tomas Winkler25a65722008-06-12 09:47:07 +08002059 u32 status = le32_to_cpu(tx_resp->u.status);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002060 int tid = MAX_TID_COUNT;
2061 int sta_id;
2062 int freed;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002063 u8 *qc = NULL;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002064
2065 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002066 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
Tomas Winklerf20217d2008-05-29 16:35:10 +08002067 "is out of range [0-%d] %d %d\n", txq_id,
2068 index, txq->q.n_bd, txq->q.write_ptr,
2069 txq->q.read_ptr);
2070 return;
2071 }
2072
2073 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2074 memset(&info->status, 0, sizeof(info->status));
2075
Tomas Winklerf20217d2008-05-29 16:35:10 +08002076 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002077 if (ieee80211_is_data_qos(hdr->frame_control)) {
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002078 qc = ieee80211_get_qos_ctl(hdr);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002079 tid = qc[0] & 0xf;
2080 }
2081
2082 sta_id = iwl_get_ra_sta_id(priv, hdr);
2083 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002084 IWL_ERR(priv, "Station not known\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08002085 return;
2086 }
2087
2088 if (txq->sched_retry) {
2089 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2090 struct iwl_ht_agg *agg = NULL;
2091
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002092 WARN_ON(!qc);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002093
2094 agg = &priv->stations[sta_id].tid[tid].agg;
2095
Tomas Winkler25a65722008-06-12 09:47:07 +08002096 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002097
Ron Rindjunsky32354272008-07-01 10:44:51 +03002098 /* check if BAR is needed */
2099 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2100 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002101
2102 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
Tomas Winklerf20217d2008-05-29 16:35:10 +08002103 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
Tomas Winklere1623442009-01-27 14:27:56 -08002104 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
Tomas Winklerf20217d2008-05-29 16:35:10 +08002105 "%d index %d\n", scd_ssn , index);
Tomas Winkler17b88922008-05-29 16:35:12 +08002106 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002107 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2108
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002109 if (priv->mac80211_registered &&
2110 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2111 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
Tomas Winklerf20217d2008-05-29 16:35:10 +08002112 if (agg->state == IWL_AGG_OFF)
Johannes Berge4e72fb2009-03-23 17:28:42 +01002113 iwl_wake_queue(priv, txq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002114 else
Johannes Berge4e72fb2009-03-23 17:28:42 +01002115 iwl_wake_queue(priv, txq->swq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002116 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002117 }
2118 } else {
Johannes Berge6a98542008-10-21 12:40:02 +02002119 info->status.rates[0].count = tx_resp->failure_frame + 1;
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002120 info->flags |= iwl_is_tx_success(status) ?
2121 IEEE80211_TX_STAT_ACK : 0;
Tomas Winklere7d326a2008-06-12 09:47:11 +08002122 iwl_hwrate_to_tx_control(priv,
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03002123 le32_to_cpu(tx_resp->rate_n_flags),
2124 info);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002125
Tomas Winklere1623442009-01-27 14:27:56 -08002126 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002127 "rate_n_flags 0x%x retries %d\n",
2128 txq_id,
2129 iwl_get_tx_fail_reason(status), status,
2130 le32_to_cpu(tx_resp->rate_n_flags),
2131 tx_resp->failure_frame);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002132
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002133 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
Tomas Winklered7fafe2008-10-23 23:48:50 -07002134 if (qc && likely(sta_id != IWL_INVALID_STATION))
Tomas Winklerf20217d2008-05-29 16:35:10 +08002135 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002136
2137 if (priv->mac80211_registered &&
2138 (iwl_queue_space(&txq->q) > txq->q.low_mark))
Johannes Berge4e72fb2009-03-23 17:28:42 +01002139 iwl_wake_queue(priv, txq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002140 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002141
Tomas Winklered7fafe2008-10-23 23:48:50 -07002142 if (qc && likely(sta_id != IWL_INVALID_STATION))
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002143 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2144
Tomas Winklerf20217d2008-05-29 16:35:10 +08002145 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
Winkler, Tomas15b16872008-12-19 10:37:33 +08002146 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08002147}
2148
Tomas Winklercaab8f12008-08-04 16:00:42 +08002149static int iwl4965_calc_rssi(struct iwl_priv *priv,
2150 struct iwl_rx_phy_res *rx_resp)
2151{
2152 /* data from PHY/DSP regarding signal strength, etc.,
2153 * contents are always there, not configurable by host. */
2154 struct iwl4965_rx_non_cfg_phy *ncphy =
2155 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2156 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2157 >> IWL49_AGC_DB_POS;
2158
2159 u32 valid_antennae =
2160 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2161 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2162 u8 max_rssi = 0;
2163 u32 i;
2164
2165 /* Find max rssi among 3 possible receivers.
2166 * These values are measured by the digital signal processor (DSP).
2167 * They should stay fairly constant even as the signal strength varies,
2168 * if the radio's automatic gain control (AGC) is working right.
2169 * AGC value (see below) will provide the "interesting" info. */
2170 for (i = 0; i < 3; i++)
2171 if (valid_antennae & (1 << i))
2172 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2173
Tomas Winklere1623442009-01-27 14:27:56 -08002174 IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
Tomas Winklercaab8f12008-08-04 16:00:42 +08002175 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2176 max_rssi, agc);
2177
2178 /* dBm = max_rssi dB - agc dB - constant.
2179 * Higher AGC (higher radio gain) means lower signal. */
Samuel Ortiz250bdd22008-12-19 10:37:11 +08002180 return max_rssi - agc - IWL49_RSSI_OFFSET;
Tomas Winklercaab8f12008-08-04 16:00:42 +08002181}
2182
Tomas Winklerf20217d2008-05-29 16:35:10 +08002183
Zhu Yib481de92007-09-25 17:54:57 -07002184/* Set up 4965-specific Rx frame reply handlers */
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07002185static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002186{
2187 /* Legacy Rx frames */
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08002188 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
Ron Rindjunsky37a44212008-05-29 16:35:18 +08002189 /* Tx response */
Tomas Winklerf20217d2008-05-29 16:35:10 +08002190 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07002191}
2192
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002193static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002194{
2195 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
Zhu Yib481de92007-09-25 17:54:57 -07002196}
2197
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002198static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002199{
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002200 cancel_work_sync(&priv->txpower_work);
Zhu Yib481de92007-09-25 17:54:57 -07002201}
2202
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002203#define IWL4965_UCODE_GET(item) \
2204static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2205 u32 api_ver) \
2206{ \
2207 return le32_to_cpu(ucode->u.v1.item); \
2208}
2209
2210static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2211{
2212 return UCODE_HEADER_SIZE(1);
2213}
2214static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2215 u32 api_ver)
2216{
2217 return 0;
2218}
2219static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2220 u32 api_ver)
2221{
2222 return (u8 *) ucode->u.v1.data;
2223}
2224
2225IWL4965_UCODE_GET(inst_size);
2226IWL4965_UCODE_GET(data_size);
2227IWL4965_UCODE_GET(init_size);
2228IWL4965_UCODE_GET(init_data_size);
2229IWL4965_UCODE_GET(boot_size);
2230
Tomas Winkler3c424c22008-04-15 16:01:42 -07002231static struct iwl_hcmd_ops iwl4965_hcmd = {
Tomas Winkler7e8c5192008-04-15 16:01:43 -07002232 .rxon_assoc = iwl4965_send_rxon_assoc,
Abhijeet Kolekare0158e62009-04-08 11:26:37 -07002233 .commit_rxon = iwl_commit_rxon,
Abhijeet Kolekar45823532009-04-08 11:26:44 -07002234 .set_rxon_chain = iwl_set_rxon_chain,
Tomas Winkler3c424c22008-04-15 16:01:42 -07002235};
2236
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002237static struct iwl_ucode_ops iwl4965_ucode = {
2238 .get_header_size = iwl4965_ucode_get_header_size,
2239 .get_build = iwl4965_ucode_get_build,
2240 .get_inst_size = iwl4965_ucode_get_inst_size,
2241 .get_data_size = iwl4965_ucode_get_data_size,
2242 .get_init_size = iwl4965_ucode_get_init_size,
2243 .get_init_data_size = iwl4965_ucode_get_init_data_size,
2244 .get_boot_size = iwl4965_ucode_get_boot_size,
2245 .get_data = iwl4965_ucode_get_data,
2246};
Tomas Winkler857485c2008-03-21 13:53:44 -07002247static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08002248 .get_hcmd_size = iwl4965_get_hcmd_size,
Tomas Winkler133636d2008-05-05 10:22:34 +08002249 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002250 .chain_noise_reset = iwl4965_chain_noise_reset,
2251 .gain_computation = iwl4965_gain_computation,
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +08002252 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
Tomas Winklercaab8f12008-08-04 16:00:42 +08002253 .calc_rssi = iwl4965_calc_rssi,
Tomas Winkler857485c2008-03-21 13:53:44 -07002254};
2255
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002256static struct iwl_lib_ops iwl4965_lib = {
Tomas Winkler5425e492008-04-15 16:01:38 -07002257 .set_hw_params = iwl4965_hw_set_hw_params,
Tomas Winklere2a722e2008-04-14 21:16:10 -07002258 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
Tomas Winklerda1bc452008-05-29 16:35:00 +08002259 .txq_set_sched = iwl4965_txq_set_sched,
Tomas Winkler30e553e2008-05-29 16:35:16 +08002260 .txq_agg_enable = iwl4965_txq_agg_enable,
2261 .txq_agg_disable = iwl4965_txq_agg_disable,
Samuel Ortiz7aaa1d72009-01-19 15:30:26 -08002262 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2263 .txq_free_tfd = iwl_hw_txq_free_tfd,
Samuel Ortiza8e74e22009-01-23 13:45:14 -08002264 .txq_init = iwl_hw_tx_queue_init,
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07002265 .rx_handler_setup = iwl4965_rx_handler_setup,
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002266 .setup_deferred_work = iwl4965_setup_deferred_work,
2267 .cancel_deferred_work = iwl4965_cancel_deferred_work,
Tomas Winkler57aab752008-04-14 21:16:03 -07002268 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2269 .alive_notify = iwl4965_alive_notify,
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +08002270 .init_alive_start = iwl4965_init_alive_start,
Tomas Winkler57aab752008-04-14 21:16:03 -07002271 .load_ucode = iwl4965_load_bsm,
Reinette Chatreb7a79402009-09-25 14:24:23 -07002272 .dump_nic_event_log = iwl_dump_nic_event_log,
2273 .dump_nic_error_log = iwl_dump_nic_error_log,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07002274 .apm_ops = {
Tomas Winkler91238712008-04-23 17:14:53 -07002275 .init = iwl4965_apm_init,
Tomas Winkler7f066102008-05-29 16:34:57 +08002276 .reset = iwl4965_apm_reset,
Abhijeet Kolekard68b6032009-10-02 13:44:04 -07002277 .stop = iwl_apm_stop,
Tomas Winkler694cc562008-04-24 11:55:22 -07002278 .config = iwl4965_nic_config,
Emmanuel Grumbach5b9f8cd2008-10-29 14:05:46 -07002279 .set_pwr_src = iwl_set_pwr_src,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07002280 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002281 .eeprom_ops = {
Tomas Winkler073d3f52008-04-21 15:41:52 -07002282 .regulatory_bands = {
2283 EEPROM_REGULATORY_BAND_1_CHANNELS,
2284 EEPROM_REGULATORY_BAND_2_CHANNELS,
2285 EEPROM_REGULATORY_BAND_3_CHANNELS,
2286 EEPROM_REGULATORY_BAND_4_CHANNELS,
2287 EEPROM_REGULATORY_BAND_5_CHANNELS,
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07002288 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2289 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
Tomas Winkler073d3f52008-04-21 15:41:52 -07002290 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002291 .verify_signature = iwlcore_eeprom_verify_signature,
2292 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2293 .release_semaphore = iwlcore_eeprom_release_semaphore,
Tomas Winkler0ef2ca62008-10-23 23:48:51 -07002294 .calib_version = iwl4965_eeprom_calib_version,
Tomas Winkler073d3f52008-04-21 15:41:52 -07002295 .query_addr = iwlcore_eeprom_query_addr,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002296 },
Tomas Winkler630fe9b2008-06-12 09:47:08 +08002297 .send_tx_power = iwl4965_send_tx_power,
Emmanuel Grumbach5b9f8cd2008-10-29 14:05:46 -07002298 .update_chain_flags = iwl_update_chain_flags,
Abhijeet Kolekar5bbe2332009-04-08 11:26:35 -07002299 .post_associate = iwl_post_associate,
Abhijeet Kolekar60690a62009-04-08 11:26:49 -07002300 .config_ap = iwl_config_ap,
Mohamed Abbasef850d72009-05-22 11:01:50 -07002301 .isr = iwl_isr_legacy,
Wey-Yi Guy62161ae2009-05-21 13:44:23 -07002302 .temp_ops = {
2303 .temperature = iwl4965_temperature_calib,
2304 .set_ct_kill = iwl4965_set_ct_threshold,
2305 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002306};
2307
2308static struct iwl_ops iwl4965_ops = {
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002309 .ucode = &iwl4965_ucode,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002310 .lib = &iwl4965_lib,
Tomas Winkler3c424c22008-04-15 16:01:42 -07002311 .hcmd = &iwl4965_hcmd,
Tomas Winkler857485c2008-03-21 13:53:44 -07002312 .utils = &iwl4965_hcmd_utils,
Johannes Berge932a602009-10-02 13:44:03 -07002313 .led = &iwlagn_led_ops,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002314};
2315
Ron Rindjunskyfed90172008-04-15 16:01:41 -07002316struct iwl_cfg iwl4965_agn_cfg = {
Tomas Winkler82b9a122008-03-04 18:09:30 -08002317 .name = "4965AGN",
Reinette Chatrea0987a82008-12-02 12:14:06 -08002318 .fw_name_pre = IWL4965_FW_PRE,
2319 .ucode_api_max = IWL4965_UCODE_API_MAX,
2320 .ucode_api_min = IWL4965_UCODE_API_MIN,
Tomas Winkler82b9a122008-03-04 18:09:30 -08002321 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
Tomas Winkler073d3f52008-04-21 15:41:52 -07002322 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
Tomas Winkler0ef2ca62008-10-23 23:48:51 -07002323 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2324 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002325 .ops = &iwl4965_ops,
Assaf Krauss1ea87392008-03-18 14:57:50 -07002326 .mod_params = &iwl4965_mod_params,
Daniel C Halperinb2617932009-08-13 13:30:59 -07002327 .use_isr_legacy = true,
2328 .ht_greenfield_support = false,
Johannes Berg96d8c6a2009-09-11 10:50:37 -07002329 .broken_powersave = true,
Wey-Yi Guyf2d0d0e2009-09-11 10:38:14 -07002330 .led_compensation = 61,
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -07002331 .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
Tomas Winkler82b9a122008-03-04 18:09:30 -08002332};
2333
Tomas Winklerd16dc482008-07-11 11:53:38 +08002334/* Module firmware */
Reinette Chatrea0987a82008-12-02 12:14:06 -08002335MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
Tomas Winklerd16dc482008-07-11 11:53:38 +08002336
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002337module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002338MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002339module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
Niels de Vos61a2d072008-07-31 00:07:23 -07002340MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
Assaf Krauss1ea87392008-03-18 14:57:50 -07002341module_param_named(
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002342 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002343MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2344
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002345module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002346MODULE_PARM_DESC(queues_num, "number of hw queues.");
Ron Rindjunsky49779292008-06-30 17:23:21 +08002347/* 11n */
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002348module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
Ron Rindjunsky49779292008-06-30 17:23:21 +08002349MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002350module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2351 int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002352MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
Ron Rindjunsky49779292008-06-30 17:23:21 +08002353
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002354module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
Ester Kummer3a1081e2008-05-06 11:05:14 +08002355MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");