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Kukjin Kimd11135c2011-02-14 14:59:52 +09001/* linux/arch/arm/mach-exynos4/mach-universal_c210.c
Kyungmin Park516607d2010-08-06 19:59:21 +09002 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
Kyungmin Park34d79312010-08-21 09:49:49 +090010#include <linux/platform_device.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090011#include <linux/serial_core.h>
Kyungmin Park34d79312010-08-21 09:49:49 +090012#include <linux/input.h>
Kyungmin Park3b7998f2010-10-08 22:34:56 +090013#include <linux/i2c.h>
Kyungmin Park34d79312010-08-21 09:49:49 +090014#include <linux/gpio_keys.h>
15#include <linux/gpio.h>
Bartlomiej Zolnierkiewicz63f32b32012-03-06 02:25:15 -080016#include <linux/interrupt.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090017#include <linux/fb.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090018#include <linux/mfd/max8998.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090019#include <linux/regulator/machine.h>
20#include <linux/regulator/fixed.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090021#include <linux/regulator/max8952.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090022#include <linux/mmc/host.h>
Marek Szyprowskib908af42011-06-22 13:43:39 +090023#include <linux/i2c-gpio.h>
24#include <linux/i2c/mcs.h>
Marek Szyprowski0b398b62011-06-22 13:43:39 +090025#include <linux/i2c/atmel_mxt_ts.h>
Lukasz Majewski126625e2012-05-09 13:16:53 +020026#include <linux/platform_data/s3c-hsotg.h>
Marek Szyprowski6dafa4a2012-05-12 06:41:00 +090027#include <drm/exynos_drm.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090028
29#include <asm/mach/arch.h>
Marc Zyngier4e44d2c2011-05-30 11:04:53 +010030#include <asm/hardware/gic.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090031#include <asm/mach-types.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090032
33#include <plat/regs-serial.h>
Marek Szyprowski3d3231b2012-04-09 21:10:32 -070034#include <plat/clock.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090035#include <plat/cpu.h>
Kyungmin Parkacf5eda2010-10-08 22:34:52 +090036#include <plat/devs.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090037#include <plat/iic.h>
Marek Szyprowski0b398b62011-06-22 13:43:39 +090038#include <plat/gpio-cfg.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090039#include <plat/fb.h>
Kamil Debskib14f04d2011-07-21 16:43:20 +090040#include <plat/mfc.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090041#include <plat/sdhci.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090042#include <plat/regs-fb-v4.h>
Sylwester Nawrocki05132182011-09-27 07:18:55 +090043#include <plat/fimc-core.h>
Marek Szyprowskifd717cd2012-05-12 06:17:59 +090044#include <plat/s5p-time.h>
Sylwester Nawrocki05132182011-09-27 07:18:55 +090045#include <plat/camport.h>
46#include <plat/mipi_csis.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090047
48#include <mach/map.h>
49
Sylwester Nawrocki05132182011-09-27 07:18:55 +090050#include <media/v4l2-mediabus.h>
51#include <media/s5p_fimc.h>
52#include <media/m5mols.h>
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +090053#include <media/s5k6aa.h>
Sylwester Nawrocki05132182011-09-27 07:18:55 +090054
Kukjin Kimcc511b82011-12-27 08:18:36 +010055#include "common.h"
56
Kyungmin Park516607d2010-08-06 19:59:21 +090057/* Following are default values for UCON, ULCON and UFCON UART registers */
58#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
59 S3C2410_UCON_RXILEVEL | \
60 S3C2410_UCON_TXIRQMODE | \
61 S3C2410_UCON_RXIRQMODE | \
62 S3C2410_UCON_RXFIFO_TOI | \
63 S3C2443_UCON_RXERR_IRQEN)
64
65#define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
66
67#define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
68 S5PV210_UFCON_TXTRIG256 | \
69 S5PV210_UFCON_RXTRIG256)
70
71static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
72 [0] = {
73 .hwport = 0,
74 .ucon = UNIVERSAL_UCON_DEFAULT,
75 .ulcon = UNIVERSAL_ULCON_DEFAULT,
76 .ufcon = UNIVERSAL_UFCON_DEFAULT,
77 },
78 [1] = {
79 .hwport = 1,
80 .ucon = UNIVERSAL_UCON_DEFAULT,
81 .ulcon = UNIVERSAL_ULCON_DEFAULT,
82 .ufcon = UNIVERSAL_UFCON_DEFAULT,
83 },
84 [2] = {
85 .hwport = 2,
86 .ucon = UNIVERSAL_UCON_DEFAULT,
87 .ulcon = UNIVERSAL_ULCON_DEFAULT,
88 .ufcon = UNIVERSAL_UFCON_DEFAULT,
89 },
90 [3] = {
91 .hwport = 3,
92 .ucon = UNIVERSAL_UCON_DEFAULT,
93 .ulcon = UNIVERSAL_ULCON_DEFAULT,
94 .ufcon = UNIVERSAL_UFCON_DEFAULT,
95 },
96};
97
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090098static struct regulator_consumer_supply max8952_consumer =
Kyungmin Parkc1a238a2011-08-11 16:36:41 +090099 REGULATOR_SUPPLY("vdd_arm", NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900100
101static struct max8952_platform_data universal_max8952_pdata __initdata = {
102 .gpio_vid0 = EXYNOS4_GPX0(3),
103 .gpio_vid1 = EXYNOS4_GPX0(4),
104 .gpio_en = -1, /* Not controllable, set "Always High" */
105 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
106 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
107 .sync_freq = 0, /* default: fastest */
108 .ramp_speed = 0, /* default: fastest */
109
110 .reg_data = {
111 .constraints = {
112 .name = "VARM_1.2V",
113 .min_uV = 770000,
114 .max_uV = 1400000,
115 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
116 .always_on = 1,
117 .boot_on = 1,
118 },
119 .num_consumer_supplies = 1,
120 .consumer_supplies = &max8952_consumer,
121 },
122};
123
124static struct regulator_consumer_supply lp3974_buck1_consumer =
Kyungmin Parkc1a238a2011-08-11 16:36:41 +0900125 REGULATOR_SUPPLY("vdd_int", NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900126
127static struct regulator_consumer_supply lp3974_buck2_consumer =
128 REGULATOR_SUPPLY("vddg3d", NULL);
129
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900130static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
131 REGULATOR_SUPPLY("vdet", "s5p-sdo"),
132 REGULATOR_SUPPLY("vdd_reg", "0-003c"),
133};
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900134
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900135static struct regulator_init_data lp3974_buck1_data = {
136 .constraints = {
137 .name = "VINT_1.1V",
138 .min_uV = 750000,
139 .max_uV = 1500000,
140 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
141 REGULATOR_CHANGE_STATUS,
142 .boot_on = 1,
143 .state_mem = {
144 .disabled = 1,
145 },
146 },
147 .num_consumer_supplies = 1,
148 .consumer_supplies = &lp3974_buck1_consumer,
149};
150
151static struct regulator_init_data lp3974_buck2_data = {
152 .constraints = {
153 .name = "VG3D_1.1V",
154 .min_uV = 750000,
155 .max_uV = 1500000,
156 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
157 REGULATOR_CHANGE_STATUS,
158 .boot_on = 1,
159 .state_mem = {
160 .disabled = 1,
161 },
162 },
163 .num_consumer_supplies = 1,
164 .consumer_supplies = &lp3974_buck2_consumer,
165};
166
167static struct regulator_init_data lp3974_buck3_data = {
168 .constraints = {
169 .name = "VCC_1.8V",
170 .min_uV = 1800000,
171 .max_uV = 1800000,
172 .apply_uV = 1,
173 .always_on = 1,
174 .state_mem = {
175 .enabled = 1,
176 },
177 },
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900178 .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
179 .consumer_supplies = lp3974_buck3_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900180};
181
182static struct regulator_init_data lp3974_buck4_data = {
183 .constraints = {
184 .name = "VMEM_1.2V",
185 .min_uV = 1200000,
186 .max_uV = 1200000,
187 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
188 .apply_uV = 1,
189 .state_mem = {
190 .disabled = 1,
191 },
192 },
193};
194
195static struct regulator_init_data lp3974_ldo2_data = {
196 .constraints = {
197 .name = "VALIVE_1.2V",
198 .min_uV = 1200000,
199 .max_uV = 1200000,
200 .apply_uV = 1,
201 .always_on = 1,
202 .state_mem = {
203 .enabled = 1,
204 },
205 },
206};
207
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900208static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
Lukasz Majewski3a36dd02012-05-13 08:27:33 +0900209 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900210 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
211 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900212 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900213};
214
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900215static struct regulator_init_data lp3974_ldo3_data = {
216 .constraints = {
217 .name = "VUSB+MIPI_1.1V",
218 .min_uV = 1100000,
219 .max_uV = 1100000,
220 .apply_uV = 1,
221 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
222 .state_mem = {
223 .disabled = 1,
224 },
225 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900226 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
227 .consumer_supplies = lp3974_ldo3_consumer,
228};
229
230static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
231 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900232};
233
234static struct regulator_init_data lp3974_ldo4_data = {
235 .constraints = {
236 .name = "VADC_3.3V",
237 .min_uV = 3300000,
238 .max_uV = 3300000,
239 .apply_uV = 1,
240 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
241 .state_mem = {
242 .disabled = 1,
243 },
244 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900245 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
246 .consumer_supplies = lp3974_ldo4_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900247};
248
249static struct regulator_init_data lp3974_ldo5_data = {
250 .constraints = {
251 .name = "VTF_2.8V",
252 .min_uV = 2800000,
253 .max_uV = 2800000,
254 .apply_uV = 1,
255 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
256 .state_mem = {
257 .disabled = 1,
258 },
259 },
260};
261
262static struct regulator_init_data lp3974_ldo6_data = {
263 .constraints = {
264 .name = "LDO6",
265 .min_uV = 2000000,
266 .max_uV = 2000000,
267 .apply_uV = 1,
268 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
269 .state_mem = {
270 .disabled = 1,
271 },
272 },
273};
274
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900275static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
276 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
277};
278
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900279static struct regulator_init_data lp3974_ldo7_data = {
280 .constraints = {
281 .name = "VLCD+VMIPI_1.8V",
282 .min_uV = 1800000,
283 .max_uV = 1800000,
284 .apply_uV = 1,
285 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
286 .state_mem = {
287 .disabled = 1,
288 },
289 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900290 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
291 .consumer_supplies = lp3974_ldo7_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900292};
293
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900294static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
Lukasz Majewski3a36dd02012-05-13 08:27:33 +0900295 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900296 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
297};
298
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900299static struct regulator_init_data lp3974_ldo8_data = {
300 .constraints = {
301 .name = "VUSB+VDAC_3.3V",
302 .min_uV = 3300000,
303 .max_uV = 3300000,
304 .apply_uV = 1,
305 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
306 .state_mem = {
307 .disabled = 1,
308 },
309 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900310 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
311 .consumer_supplies = lp3974_ldo8_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900312};
313
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900314static struct regulator_consumer_supply lp3974_ldo9_consumer =
315 REGULATOR_SUPPLY("vddio", "0-003c");
316
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900317static struct regulator_init_data lp3974_ldo9_data = {
318 .constraints = {
319 .name = "VCC_2.8V",
320 .min_uV = 2800000,
321 .max_uV = 2800000,
322 .apply_uV = 1,
323 .always_on = 1,
324 .state_mem = {
325 .enabled = 1,
326 },
327 },
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900328 .num_consumer_supplies = 1,
329 .consumer_supplies = &lp3974_ldo9_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900330};
331
332static struct regulator_init_data lp3974_ldo10_data = {
333 .constraints = {
334 .name = "VPLL_1.1V",
335 .min_uV = 1100000,
336 .max_uV = 1100000,
337 .boot_on = 1,
338 .apply_uV = 1,
339 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
340 .state_mem = {
341 .disabled = 1,
342 },
343 },
344};
345
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900346static struct regulator_consumer_supply lp3974_ldo11_consumer =
347 REGULATOR_SUPPLY("dig_28", "0-001f");
348
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900349static struct regulator_init_data lp3974_ldo11_data = {
350 .constraints = {
351 .name = "CAM_AF_3.3V",
352 .min_uV = 3300000,
353 .max_uV = 3300000,
354 .apply_uV = 1,
355 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
356 .state_mem = {
357 .disabled = 1,
358 },
359 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900360 .num_consumer_supplies = 1,
361 .consumer_supplies = &lp3974_ldo11_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900362};
363
364static struct regulator_init_data lp3974_ldo12_data = {
365 .constraints = {
366 .name = "PS_2.8V",
367 .min_uV = 2800000,
368 .max_uV = 2800000,
369 .apply_uV = 1,
370 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
371 .state_mem = {
372 .disabled = 1,
373 },
374 },
375};
376
377static struct regulator_init_data lp3974_ldo13_data = {
378 .constraints = {
379 .name = "VHIC_1.2V",
380 .min_uV = 1200000,
381 .max_uV = 1200000,
382 .apply_uV = 1,
383 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
384 .state_mem = {
385 .disabled = 1,
386 },
387 },
388};
389
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900390static struct regulator_consumer_supply lp3974_ldo14_consumer =
391 REGULATOR_SUPPLY("dig_18", "0-001f");
392
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900393static struct regulator_init_data lp3974_ldo14_data = {
394 .constraints = {
395 .name = "CAM_I_HOST_1.8V",
396 .min_uV = 1800000,
397 .max_uV = 1800000,
398 .apply_uV = 1,
399 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
400 .state_mem = {
401 .disabled = 1,
402 },
403 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900404 .num_consumer_supplies = 1,
405 .consumer_supplies = &lp3974_ldo14_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900406};
407
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900408
409static struct regulator_consumer_supply lp3974_ldo15_consumer =
410 REGULATOR_SUPPLY("dig_12", "0-001f");
411
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900412static struct regulator_init_data lp3974_ldo15_data = {
413 .constraints = {
414 .name = "CAM_S_DIG+FM33_CORE_1.2V",
415 .min_uV = 1200000,
416 .max_uV = 1200000,
417 .apply_uV = 1,
418 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
419 .state_mem = {
420 .disabled = 1,
421 },
422 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900423 .num_consumer_supplies = 1,
424 .consumer_supplies = &lp3974_ldo15_consumer,
425};
426
427static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900428 REGULATOR_SUPPLY("vdda", "0-003c"),
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900429 REGULATOR_SUPPLY("a_sensor", "0-001f"),
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900430};
431
432static struct regulator_init_data lp3974_ldo16_data = {
433 .constraints = {
434 .name = "CAM_S_ANA_2.8V",
435 .min_uV = 2800000,
436 .max_uV = 2800000,
437 .apply_uV = 1,
438 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
439 .state_mem = {
440 .disabled = 1,
441 },
442 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900443 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
444 .consumer_supplies = lp3974_ldo16_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900445};
446
447static struct regulator_init_data lp3974_ldo17_data = {
448 .constraints = {
449 .name = "VCC_3.0V_LCD",
450 .min_uV = 3000000,
451 .max_uV = 3000000,
452 .apply_uV = 1,
453 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
454 .boot_on = 1,
455 .state_mem = {
456 .disabled = 1,
457 },
458 },
459};
460
461static struct regulator_init_data lp3974_32khz_ap_data = {
462 .constraints = {
463 .name = "32KHz AP",
464 .always_on = 1,
465 .state_mem = {
466 .enabled = 1,
467 },
468 },
469};
470
471static struct regulator_init_data lp3974_32khz_cp_data = {
472 .constraints = {
473 .name = "32KHz CP",
474 .state_mem = {
475 .disabled = 1,
476 },
477 },
478};
479
480static struct regulator_init_data lp3974_vichg_data = {
481 .constraints = {
482 .name = "VICHG",
483 .state_mem = {
484 .disabled = 1,
485 },
486 },
487};
488
489static struct regulator_init_data lp3974_esafeout1_data = {
490 .constraints = {
491 .name = "SAFEOUT1",
Lukasz Majewski3a36dd02012-05-13 08:27:33 +0900492 .min_uV = 4800000,
493 .max_uV = 4800000,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900494 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
Lukasz Majewski3a36dd02012-05-13 08:27:33 +0900495 .always_on = 1,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900496 .state_mem = {
497 .enabled = 1,
498 },
499 },
500};
501
502static struct regulator_init_data lp3974_esafeout2_data = {
503 .constraints = {
504 .name = "SAFEOUT2",
505 .boot_on = 1,
506 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
507 .state_mem = {
508 .enabled = 1,
509 },
510 },
511};
512
513static struct max8998_regulator_data lp3974_regulators[] = {
514 { MAX8998_LDO2, &lp3974_ldo2_data },
515 { MAX8998_LDO3, &lp3974_ldo3_data },
516 { MAX8998_LDO4, &lp3974_ldo4_data },
517 { MAX8998_LDO5, &lp3974_ldo5_data },
518 { MAX8998_LDO6, &lp3974_ldo6_data },
519 { MAX8998_LDO7, &lp3974_ldo7_data },
520 { MAX8998_LDO8, &lp3974_ldo8_data },
521 { MAX8998_LDO9, &lp3974_ldo9_data },
522 { MAX8998_LDO10, &lp3974_ldo10_data },
523 { MAX8998_LDO11, &lp3974_ldo11_data },
524 { MAX8998_LDO12, &lp3974_ldo12_data },
525 { MAX8998_LDO13, &lp3974_ldo13_data },
526 { MAX8998_LDO14, &lp3974_ldo14_data },
527 { MAX8998_LDO15, &lp3974_ldo15_data },
528 { MAX8998_LDO16, &lp3974_ldo16_data },
529 { MAX8998_LDO17, &lp3974_ldo17_data },
530 { MAX8998_BUCK1, &lp3974_buck1_data },
531 { MAX8998_BUCK2, &lp3974_buck2_data },
532 { MAX8998_BUCK3, &lp3974_buck3_data },
533 { MAX8998_BUCK4, &lp3974_buck4_data },
534 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
535 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
536 { MAX8998_ENVICHG, &lp3974_vichg_data },
537 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
538 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
539};
540
541static struct max8998_platform_data universal_lp3974_pdata = {
542 .num_regulators = ARRAY_SIZE(lp3974_regulators),
543 .regulators = lp3974_regulators,
544 .buck1_voltage1 = 1100000, /* INT */
545 .buck1_voltage2 = 1000000,
546 .buck1_voltage3 = 1100000,
547 .buck1_voltage4 = 1000000,
548 .buck1_set1 = EXYNOS4_GPX0(5),
549 .buck1_set2 = EXYNOS4_GPX0(6),
550 .buck2_voltage1 = 1200000, /* G3D */
551 .buck2_voltage2 = 1100000,
552 .buck1_default_idx = 0,
553 .buck2_set3 = EXYNOS4_GPE2(0),
554 .buck2_default_idx = 0,
555 .wakeup = true,
556};
557
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900558
559enum fixed_regulator_id {
560 FIXED_REG_ID_MMC0,
561 FIXED_REG_ID_HDMI_5V,
562 FIXED_REG_ID_CAM_S_IF,
563 FIXED_REG_ID_CAM_I_CORE,
564 FIXED_REG_ID_CAM_VT_DIO,
565};
566
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900567static struct regulator_consumer_supply hdmi_fixed_consumer =
568 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
569
570static struct regulator_init_data hdmi_fixed_voltage_init_data = {
571 .constraints = {
572 .name = "HDMI_5V",
573 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
574 },
575 .num_consumer_supplies = 1,
576 .consumer_supplies = &hdmi_fixed_consumer,
577};
578
579static struct fixed_voltage_config hdmi_fixed_voltage_config = {
580 .supply_name = "HDMI_EN1",
581 .microvolts = 5000000,
582 .gpio = EXYNOS4_GPE0(1),
583 .enable_high = true,
584 .init_data = &hdmi_fixed_voltage_init_data,
585};
586
587static struct platform_device hdmi_fixed_voltage = {
588 .name = "reg-fixed-voltage",
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900589 .id = FIXED_REG_ID_HDMI_5V,
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900590 .dev = {
591 .platform_data = &hdmi_fixed_voltage_config,
592 },
593};
594
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900595/* GPIO I2C 5 (PMIC) */
596static struct i2c_board_info i2c5_devs[] __initdata = {
597 {
598 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
599 .platform_data = &universal_max8952_pdata,
600 }, {
601 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
602 .platform_data = &universal_lp3974_pdata,
603 },
604};
605
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900606/* I2C3 (TSP) */
607static struct mxt_platform_data qt602240_platform_data = {
608 .x_line = 19,
609 .y_line = 11,
610 .x_size = 800,
611 .y_size = 480,
612 .blen = 0x11,
613 .threshold = 0x28,
614 .voltage = 2800000, /* 2.8V */
615 .orient = MXT_DIAGONAL,
Bartlomiej Zolnierkiewicz63f32b32012-03-06 02:25:15 -0800616 .irqflags = IRQF_TRIGGER_FALLING,
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900617};
618
619static struct i2c_board_info i2c3_devs[] __initdata = {
620 {
621 I2C_BOARD_INFO("qt602240_ts", 0x4a),
622 .platform_data = &qt602240_platform_data,
623 },
624};
625
626static void __init universal_tsp_init(void)
627{
628 int gpio;
629
630 /* TSP_LDO_ON: XMDMADDR_11 */
631 gpio = EXYNOS4_GPE2(3);
Jingoo Han321655e2011-12-24 11:58:32 +0900632 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900633 gpio_export(gpio, 0);
634
635 /* TSP_INT: XMDMADDR_7 */
636 gpio = EXYNOS4_GPE1(7);
637 gpio_request(gpio, "TSP_INT");
638
639 s5p_register_gpio_interrupt(gpio);
640 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
641 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
642 i2c3_devs[0].irq = gpio_to_irq(gpio);
643}
644
645
Marek Szyprowskib908af42011-06-22 13:43:39 +0900646/* GPIO I2C 12 (3 Touchkey) */
647static uint32_t touchkey_keymap[] = {
648 /* MCS_KEY_MAP(value, keycode) */
649 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
650 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
651};
652
653static struct mcs_platform_data touchkey_data = {
654 .keymap = touchkey_keymap,
655 .keymap_size = ARRAY_SIZE(touchkey_keymap),
656 .key_maxval = 2,
657};
658
659/* GPIO I2C 3_TOUCH 2.8V */
660#define I2C_GPIO_BUS_12 12
661static struct i2c_gpio_platform_data i2c_gpio12_data = {
662 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
663 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
664};
665
666static struct platform_device i2c_gpio12 = {
667 .name = "i2c-gpio",
668 .id = I2C_GPIO_BUS_12,
669 .dev = {
670 .platform_data = &i2c_gpio12_data,
671 },
672};
673
674static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
675 {
676 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
677 .platform_data = &touchkey_data,
678 },
679};
680
681static void __init universal_touchkey_init(void)
682{
683 int gpio;
684
685 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
686 gpio_request(gpio, "3_TOUCH_INT");
687 s5p_register_gpio_interrupt(gpio);
688 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
689 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
690
691 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
Jingoo Han321655e2011-12-24 11:58:32 +0900692 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
Marek Szyprowskib908af42011-06-22 13:43:39 +0900693}
694
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900695static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
696 .frequency = 300 * 1000,
697 .sda_delay = 200,
698};
699
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900700/* GPIO KEYS */
Kyungmin Park34d79312010-08-21 09:49:49 +0900701static struct gpio_keys_button universal_gpio_keys_tables[] = {
702 {
703 .code = KEY_VOLUMEUP,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900704 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900705 .desc = "gpio-keys: KEY_VOLUMEUP",
706 .type = EV_KEY,
707 .active_low = 1,
708 .debounce_interval = 1,
709 }, {
710 .code = KEY_VOLUMEDOWN,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900711 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900712 .desc = "gpio-keys: KEY_VOLUMEDOWN",
713 .type = EV_KEY,
714 .active_low = 1,
715 .debounce_interval = 1,
716 }, {
717 .code = KEY_CONFIG,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900718 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900719 .desc = "gpio-keys: KEY_CONFIG",
720 .type = EV_KEY,
721 .active_low = 1,
722 .debounce_interval = 1,
723 }, {
724 .code = KEY_CAMERA,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900725 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900726 .desc = "gpio-keys: KEY_CAMERA",
727 .type = EV_KEY,
728 .active_low = 1,
729 .debounce_interval = 1,
730 }, {
731 .code = KEY_OK,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900732 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900733 .desc = "gpio-keys: KEY_OK",
734 .type = EV_KEY,
735 .active_low = 1,
736 .debounce_interval = 1,
737 },
738};
739
740static struct gpio_keys_platform_data universal_gpio_keys_data = {
741 .buttons = universal_gpio_keys_tables,
742 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
743};
744
745static struct platform_device universal_gpio_keys = {
746 .name = "gpio-keys",
747 .dev = {
748 .platform_data = &universal_gpio_keys_data,
749 },
750};
751
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900752/* eMMC */
753static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
754 .max_width = 8,
755 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
Adrian Hunter907d2e72012-02-29 09:17:21 +0200756 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
Marek Szyprowski9b4d1cbb2012-04-24 17:28:12 -0700757 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900758 .cd_type = S3C_SDHCI_CD_PERMANENT,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900759};
760
761static struct regulator_consumer_supply mmc0_supplies[] = {
Jaehoon Chungf5cca862012-03-10 03:59:50 -0800762 REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900763};
764
765static struct regulator_init_data mmc0_fixed_voltage_init_data = {
766 .constraints = {
767 .name = "VMEM_VDD_2.8V",
768 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
769 },
770 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
771 .consumer_supplies = mmc0_supplies,
772};
773
774static struct fixed_voltage_config mmc0_fixed_voltage_config = {
775 .supply_name = "MASSMEMORY_EN",
776 .microvolts = 2800000,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900777 .gpio = EXYNOS4_GPE1(3),
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900778 .enable_high = true,
779 .init_data = &mmc0_fixed_voltage_init_data,
780};
781
782static struct platform_device mmc0_fixed_voltage = {
783 .name = "reg-fixed-voltage",
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900784 .id = FIXED_REG_ID_MMC0,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900785 .dev = {
786 .platform_data = &mmc0_fixed_voltage_config,
787 },
788};
789
790/* SD */
791static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
792 .max_width = 4,
793 .host_caps = MMC_CAP_4_BIT_DATA |
Adrian Hunter907d2e72012-02-29 09:17:21 +0200794 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900795 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900796 .ext_cd_gpio_invert = 1,
797 .cd_type = S3C_SDHCI_CD_GPIO,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900798};
799
800/* WiFi */
801static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
802 .max_width = 4,
803 .host_caps = MMC_CAP_4_BIT_DATA |
Adrian Hunter907d2e72012-02-29 09:17:21 +0200804 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900805 .cd_type = S3C_SDHCI_CD_EXTERNAL,
806};
807
808static void __init universal_sdhci_init(void)
809{
810 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
811 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
812 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
813}
814
Kyungmin Park3b7998f2010-10-08 22:34:56 +0900815/* I2C1 */
816static struct i2c_board_info i2c1_devs[] __initdata = {
817 /* Gyro, To be updated */
818};
819
Marek Szyprowski6dafa4a2012-05-12 06:41:00 +0900820#ifdef CONFIG_DRM_EXYNOS
821static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
822 .panel = {
823 .timing = {
824 .left_margin = 16,
825 .right_margin = 16,
826 .upper_margin = 2,
827 .lower_margin = 28,
828 .hsync_len = 2,
829 .vsync_len = 1,
830 .xres = 480,
831 .yres = 800,
832 .refresh = 55,
833 },
834 },
835 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
836 VIDCON0_CLKSEL_LCD,
837 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
838 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
839 .default_win = 3,
840 .bpp = 32,
841};
842#else
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900843/* Frame Buffer */
844static struct s3c_fb_pd_win universal_fb_win0 = {
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900845 .max_bpp = 32,
846 .default_bpp = 16,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530847 .xres = 480,
848 .yres = 800,
Sylwester Nawrockibcd7bd32012-01-31 13:26:54 +0900849 .virtual_x = 480,
850 .virtual_y = 2 * 800,
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900851};
852
Thomas Abraham79d3c412012-03-24 21:58:48 +0530853static struct fb_videomode universal_lcd_timing = {
854 .left_margin = 16,
855 .right_margin = 16,
856 .upper_margin = 2,
857 .lower_margin = 28,
858 .hsync_len = 2,
859 .vsync_len = 1,
860 .xres = 480,
861 .yres = 800,
862 .refresh = 55,
863};
864
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900865static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
866 .win[0] = &universal_fb_win0,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530867 .vtiming = &universal_lcd_timing,
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900868 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
869 VIDCON0_CLKSEL_LCD,
870 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
871 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
872 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
873};
Marek Szyprowski6dafa4a2012-05-12 06:41:00 +0900874#endif
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900875
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900876static struct regulator_consumer_supply cam_vt_dio_supply =
877 REGULATOR_SUPPLY("vdd_core", "0-003c");
878
879static struct regulator_init_data cam_vt_dio_reg_init_data = {
880 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
881 .num_consumer_supplies = 1,
882 .consumer_supplies = &cam_vt_dio_supply,
883};
884
885static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
886 .supply_name = "CAM_VT_D_IO",
887 .microvolts = 2800000,
888 .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
889 .enable_high = 1,
890 .init_data = &cam_vt_dio_reg_init_data,
891};
892
893static struct platform_device cam_vt_dio_fixed_reg_dev = {
894 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
895 .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
896};
897
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900898static struct regulator_consumer_supply cam_i_core_supply =
899 REGULATOR_SUPPLY("core", "0-001f");
900
901static struct regulator_init_data cam_i_core_reg_init_data = {
902 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
903 .num_consumer_supplies = 1,
904 .consumer_supplies = &cam_i_core_supply,
905};
906
907static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
908 .supply_name = "CAM_I_CORE_1.2V",
909 .microvolts = 1200000,
910 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
911 .enable_high = 1,
912 .init_data = &cam_i_core_reg_init_data,
913};
914
915static struct platform_device cam_i_core_fixed_reg_dev = {
916 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
917 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
918};
919
920static struct regulator_consumer_supply cam_s_if_supply =
921 REGULATOR_SUPPLY("d_sensor", "0-001f");
922
923static struct regulator_init_data cam_s_if_reg_init_data = {
924 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
925 .num_consumer_supplies = 1,
926 .consumer_supplies = &cam_s_if_supply,
927};
928
929static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
930 .supply_name = "CAM_S_IF_1.8V",
931 .microvolts = 1800000,
932 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
933 .enable_high = 1,
934 .init_data = &cam_s_if_reg_init_data,
935};
936
937static struct platform_device cam_s_if_fixed_reg_dev = {
938 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
939 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
940};
941
942static struct s5p_platform_mipi_csis mipi_csis_platdata = {
943 .clk_rate = 166000000UL,
944 .lanes = 2,
945 .alignment = 32,
946 .hs_settle = 12,
947 .phy_enable = s5p_csis_phy_enable,
948};
949
950#define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
951#define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
952#define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900953#define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
954#define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
955
956static int s5k6aa_set_power(int on)
957{
958 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
959 return 0;
960}
961
962static struct s5k6aa_platform_data s5k6aa_platdata = {
963 .mclk_frequency = 21600000UL,
964 .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
965 .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
966 .bus_type = V4L2_MBUS_PARALLEL,
967 .horiz_flip = 1,
968 .set_power = s5k6aa_set_power,
969};
970
971static struct i2c_board_info s5k6aa_board_info = {
972 I2C_BOARD_INFO("S5K6AA", 0x3C),
973 .platform_data = &s5k6aa_platdata,
974};
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900975
976static int m5mols_set_power(struct device *dev, int on)
977{
978 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
979 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
980 return 0;
981}
982
983static struct m5mols_platform_data m5mols_platdata = {
984 .gpio_reset = GPIO_CAM_MEGA_nRST,
985 .reset_polarity = 0,
986 .set_power = m5mols_set_power,
987};
988
989static struct i2c_board_info m5mols_board_info = {
990 I2C_BOARD_INFO("M5MOLS", 0x1F),
991 .platform_data = &m5mols_platdata,
992};
993
994static struct s5p_fimc_isp_info universal_camera_sensors[] = {
995 {
996 .mux_id = 0,
997 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
998 V4L2_MBUS_VSYNC_ACTIVE_LOW,
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900999 .bus_type = FIMC_ITU_601,
1000 .board_info = &s5k6aa_board_info,
1001 .i2c_bus_num = 0,
1002 .clk_frequency = 24000000UL,
1003 }, {
1004 .mux_id = 0,
1005 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
1006 V4L2_MBUS_VSYNC_ACTIVE_LOW,
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001007 .bus_type = FIMC_MIPI_CSI2,
1008 .board_info = &m5mols_board_info,
1009 .i2c_bus_num = 0,
Sylwester Nawrocki3e8ad562012-01-31 12:58:31 +09001010 .clk_frequency = 24000000UL,
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001011 .csi_data_align = 32,
1012 },
1013};
1014
1015static struct s5p_platform_fimc fimc_md_platdata = {
1016 .isp_info = universal_camera_sensors,
1017 .num_clients = ARRAY_SIZE(universal_camera_sensors),
1018};
1019
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001020static struct gpio universal_camera_gpios[] = {
1021 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
1022 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
1023 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
1024 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +09001025 { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
1026 { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001027};
1028
Lukasz Majewski3a36dd02012-05-13 08:27:33 +09001029/* USB OTG */
1030static struct s3c_hsotg_plat universal_hsotg_pdata;
1031
Tushar Behera6325fc42012-03-09 08:02:37 -08001032static void __init universal_camera_init(void)
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001033{
1034 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
1035 &s5p_device_mipi_csis0);
1036 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
1037 &s5p_device_fimc_md);
1038
1039 if (gpio_request_array(universal_camera_gpios,
1040 ARRAY_SIZE(universal_camera_gpios))) {
1041 pr_err("%s: GPIO request failed\n", __func__);
1042 return;
1043 }
1044
1045 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
1046 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
1047 else
1048 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1049
1050 /* Free GPIOs controlled directly by the sensor drivers. */
1051 gpio_free(GPIO_CAM_MEGA_nRST);
1052 gpio_free(GPIO_CAM_8M_ISP_INT);
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +09001053 gpio_free(GPIO_CAM_VGA_NRST);
1054 gpio_free(GPIO_CAM_VGA_NSTBY);
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001055
1056 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
1057 pr_err("Camera port A setup failed\n");
1058}
1059
Kyungmin Park34d79312010-08-21 09:49:49 +09001060static struct platform_device *universal_devices[] __initdata = {
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001061 /* Samsung Platform Devices */
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001062 &s5p_device_mipi_csis0,
Marek Szyprowskiedd967b2011-06-22 13:43:39 +09001063 &s5p_device_fimc0,
1064 &s5p_device_fimc1,
1065 &s5p_device_fimc2,
1066 &s5p_device_fimc3,
Kamil Debski2cd11b02011-12-27 17:16:50 +09001067 &s5p_device_g2d,
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001068 &mmc0_fixed_voltage,
1069 &s3c_device_hsmmc0,
1070 &s3c_device_hsmmc2,
1071 &s3c_device_hsmmc3,
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001072 &s3c_device_i2c0,
Marek Szyprowski0b398b62011-06-22 13:43:39 +09001073 &s3c_device_i2c3,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +09001074 &s3c_device_i2c5,
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001075 &s5p_device_i2c_hdmiphy,
1076 &hdmi_fixed_voltage,
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001077 &s5p_device_hdmi,
1078 &s5p_device_sdo,
1079 &s5p_device_mixer,
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001080
1081 /* Universal Devices */
Marek Szyprowskib908af42011-06-22 13:43:39 +09001082 &i2c_gpio12,
Kyungmin Park34d79312010-08-21 09:49:49 +09001083 &universal_gpio_keys,
Kyungmin Parkacf5eda2010-10-08 22:34:52 +09001084 &s5p_device_onenand,
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +09001085 &s5p_device_fimd0,
Andrzej Pietrasiewicz95e874c2012-03-09 08:24:33 -08001086 &s5p_device_jpeg,
Marek Szyprowski6dafa4a2012-05-12 06:41:00 +09001087#ifdef CONFIG_DRM_EXYNOS
1088 &exynos_device_drm,
1089#endif
Lukasz Majewski3a36dd02012-05-13 08:27:33 +09001090 &s3c_device_usb_hsotg,
Kamil Debskib14f04d2011-07-21 16:43:20 +09001091 &s5p_device_mfc,
1092 &s5p_device_mfc_l,
1093 &s5p_device_mfc_r,
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +09001094 &cam_vt_dio_fixed_reg_dev,
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001095 &cam_i_core_fixed_reg_dev,
1096 &cam_s_if_fixed_reg_dev,
1097 &s5p_device_fimc_md,
Kyungmin Park34d79312010-08-21 09:49:49 +09001098};
1099
Kyungmin Park516607d2010-08-06 19:59:21 +09001100static void __init universal_map_io(void)
1101{
Kukjin Kimcc511b82011-12-27 08:18:36 +01001102 exynos_init_io(NULL, 0);
Kukjin Kim2e274372012-07-12 18:03:52 +09001103 s3c24xx_init_clocks(clk_xusbxti.rate);
Kyungmin Park516607d2010-08-06 19:59:21 +09001104 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
Marek Szyprowskifd717cd2012-05-12 06:17:59 +09001105 s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
Kyungmin Park516607d2010-08-06 19:59:21 +09001106}
1107
Kukjin Kime745e062012-01-21 10:47:14 +09001108static void s5p_tv_setup(void)
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001109{
1110 /* direct HPD to HDMI chip */
Jingoo Han321655e2011-12-24 11:58:32 +09001111 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001112 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1113 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001114}
1115
Kamil Debskib14f04d2011-07-21 16:43:20 +09001116static void __init universal_reserve(void)
1117{
1118 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1119}
1120
Kyungmin Park516607d2010-08-06 19:59:21 +09001121static void __init universal_machine_init(void)
1122{
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001123 universal_sdhci_init();
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001124 s5p_tv_setup();
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001125
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001126 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
Kyungmin Park3b7998f2010-10-08 22:34:56 +09001127 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1128
Marek Szyprowski0b398b62011-06-22 13:43:39 +09001129 universal_tsp_init();
1130 s3c_i2c3_set_platdata(NULL);
1131 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1132
Marek Szyprowski4d838ec2011-03-04 10:19:52 +09001133 s3c_i2c5_set_platdata(NULL);
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001134 s5p_i2c_hdmiphy_set_platdata(NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +09001135 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1136
Marek Szyprowski6dafa4a2012-05-12 06:41:00 +09001137#ifdef CONFIG_DRM_EXYNOS
1138 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
1139 exynos4_fimd0_gpio_setup_24bpp();
1140#else
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +09001141 s5p_fimd0_set_platdata(&universal_lcd_pdata);
Marek Szyprowski6dafa4a2012-05-12 06:41:00 +09001142#endif
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +09001143
Marek Szyprowskib908af42011-06-22 13:43:39 +09001144 universal_touchkey_init();
1145 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1146 ARRAY_SIZE(i2c_gpio12_devs));
1147
Lukasz Majewski3a36dd02012-05-13 08:27:33 +09001148 s3c_hsotg_set_platdata(&universal_hsotg_pdata);
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001149 universal_camera_init();
1150
Kyungmin Park34d79312010-08-21 09:49:49 +09001151 /* Last */
1152 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
Kyungmin Park516607d2010-08-06 19:59:21 +09001153}
1154
1155MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1156 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
Nicolas Pitre2be5a4a2011-07-05 22:38:11 -04001157 .atag_offset = 0x100,
Kukjin Kimd11135c2011-02-14 14:59:52 +09001158 .init_irq = exynos4_init_irq,
Kyungmin Park516607d2010-08-06 19:59:21 +09001159 .map_io = universal_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +01001160 .handle_irq = gic_handle_irq,
Kyungmin Park516607d2010-08-06 19:59:21 +09001161 .init_machine = universal_machine_init,
Shawn Guobb13fab2012-04-26 10:35:40 +08001162 .init_late = exynos_init_late,
Marek Szyprowskifd717cd2012-05-12 06:17:59 +09001163 .timer = &s5p_timer,
Kamil Debskib14f04d2011-07-21 16:43:20 +09001164 .reserve = &universal_reserve,
Russell King9eb48592012-01-03 11:56:53 +01001165 .restart = exynos4_restart,
Kyungmin Park516607d2010-08-06 19:59:21 +09001166MACHINE_END