| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * This file is subject to the terms and conditions of the GNU General Public | 
 | 3 |  * License.  See the file "COPYING" in the main directory of this archive | 
 | 4 |  * for more details. | 
 | 5 |  * | 
 | 6 |  * This file contains NUMA specific prototypes and definitions. | 
 | 7 |  * | 
 | 8 |  * 2002/08/05 Erich Focht <efocht@ess.nec.de> | 
 | 9 |  * | 
 | 10 |  */ | 
 | 11 | #ifndef _ASM_IA64_NUMA_H | 
 | 12 | #define _ASM_IA64_NUMA_H | 
 | 13 |  | 
 | 14 | #include <linux/config.h> | 
 | 15 |  | 
 | 16 | #ifdef CONFIG_NUMA | 
 | 17 |  | 
 | 18 | #include <linux/cache.h> | 
 | 19 | #include <linux/cpumask.h> | 
 | 20 | #include <linux/numa.h> | 
 | 21 | #include <linux/smp.h> | 
 | 22 | #include <linux/threads.h> | 
 | 23 |  | 
 | 24 | #include <asm/mmzone.h> | 
 | 25 |  | 
 | 26 | extern u8 cpu_to_node_map[NR_CPUS] __cacheline_aligned; | 
 | 27 | extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned; | 
 | 28 |  | 
 | 29 | /* Stuff below this line could be architecture independent */ | 
 | 30 |  | 
 | 31 | extern int num_node_memblks;		/* total number of memory chunks */ | 
 | 32 |  | 
 | 33 | /* | 
 | 34 |  * List of node memory chunks. Filled when parsing SRAT table to | 
 | 35 |  * obtain information about memory nodes. | 
 | 36 | */ | 
 | 37 |  | 
 | 38 | struct node_memblk_s { | 
 | 39 | 	unsigned long start_paddr; | 
 | 40 | 	unsigned long size; | 
 | 41 | 	int nid;		/* which logical node contains this chunk? */ | 
 | 42 | 	int bank;		/* which mem bank on this node */ | 
 | 43 | }; | 
 | 44 |  | 
 | 45 | struct node_cpuid_s { | 
 | 46 | 	u16	phys_id;	/* id << 8 | eid */ | 
 | 47 | 	int	nid;		/* logical node containing this CPU */ | 
 | 48 | }; | 
 | 49 |  | 
 | 50 | extern struct node_memblk_s node_memblk[NR_NODE_MEMBLKS]; | 
 | 51 | extern struct node_cpuid_s node_cpuid[NR_CPUS]; | 
 | 52 |  | 
 | 53 | /* | 
 | 54 |  * ACPI 2.0 SLIT (System Locality Information Table) | 
 | 55 |  * http://devresource.hp.com/devresource/Docs/TechPapers/IA64/slit.pdf | 
 | 56 |  * | 
 | 57 |  * This is a matrix with "distances" between nodes, they should be | 
 | 58 |  * proportional to the memory access latency ratios. | 
 | 59 |  */ | 
 | 60 |  | 
 | 61 | extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES]; | 
 | 62 | #define node_distance(from,to) (numa_slit[(from) * num_online_nodes() + (to)]) | 
 | 63 |  | 
 | 64 | extern int paddr_to_nid(unsigned long paddr); | 
 | 65 |  | 
 | 66 | #define local_nodeid (cpu_to_node_map[smp_processor_id()]) | 
 | 67 |  | 
 | 68 | #else /* !CONFIG_NUMA */ | 
 | 69 |  | 
 | 70 | #define paddr_to_nid(addr)	0 | 
 | 71 |  | 
 | 72 | #endif /* CONFIG_NUMA */ | 
 | 73 |  | 
 | 74 | #endif /* _ASM_IA64_NUMA_H */ |