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review.evervolv.com / android_kernel_oneplus_msm8996 / 18bc2b39307b45527efc6c84836953c7a8f2181e / . / include / linux / regulator / ab8500.h
blob: cf496e93c0cf58bb35b8033330f257b6d38fede6 [file] [log] [blame]
Sundar R Iyer549931f2010-07-13 11:51:28 +0530[diff] [blame]1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
Sundar R Iyer549931f2010-07-13 11:51:28 +0530[diff] [blame]8 */
9
10#ifndef __LINUX_MFD_AB8500_REGULATOR_H
11#define __LINUX_MFD_AB8500_REGULATOR_H
12
Lee Jonesd1a82002013-03-28 16:11:01 +0000[diff] [blame]13#include <linux/platform_device.h>
14
Sundar R Iyer549931f2010-07-13 11:51:28 +0530[diff] [blame]15/* AB8500 regulators */
Bengt Jonssoncb189b02010-12-10 11:08:40 +0100[diff] [blame]16enum ab8500_regulator_id {
17 AB8500_LDO_AUX1,
18 AB8500_LDO_AUX2,
19 AB8500_LDO_AUX3,
20 AB8500_LDO_INTCORE,
21 AB8500_LDO_TVOUT,
Bengt Jonssonea05ef32011-03-10 14:43:31 +0100[diff] [blame]22 AB8500_LDO_USB,
Bengt Jonssoncb189b02010-12-10 11:08:40 +0100[diff] [blame]23 AB8500_LDO_AUDIO,
24 AB8500_LDO_ANAMIC1,
25 AB8500_LDO_ANAMIC2,
26 AB8500_LDO_DMIC,
27 AB8500_LDO_ANA,
28 AB8500_NUM_REGULATORS,
29};
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]30
Linus Walleijd6255522012-02-20 21:42:24 +0100[diff] [blame]31/* AB9450 regulators */
32enum ab9540_regulator_id {
33 AB9540_LDO_AUX1,
34 AB9540_LDO_AUX2,
35 AB9540_LDO_AUX3,
36 AB9540_LDO_AUX4,
37 AB9540_LDO_INTCORE,
38 AB9540_LDO_TVOUT,
39 AB9540_LDO_USB,
40 AB9540_LDO_AUDIO,
41 AB9540_LDO_ANAMIC1,
42 AB9540_LDO_ANAMIC2,
43 AB9540_LDO_DMIC,
44 AB9540_LDO_ANA,
45 AB9540_SYSCLKREQ_2,
46 AB9540_SYSCLKREQ_4,
47 AB9540_NUM_REGULATORS,
48};
49
50/* AB8500 and AB9540 register initialization */
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]51struct ab8500_regulator_reg_init {
52 int id;
Lee Jones3c1b8432013-03-21 15:59:01 +0000[diff] [blame]53 u8 mask;
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]54 u8 value;
55};
56
Lee Jones3c1b8432013-03-21 15:59:01 +0000[diff] [blame]57#define INIT_REGULATOR_REGISTER(_id, _mask, _value) \
58 { \
59 .id = _id, \
60 .mask = _mask, \
61 .value = _value, \
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]62 }
63
64/* AB8500 registers */
65enum ab8500_regulator_reg {
66 AB8500_REGUREQUESTCTRL2,
67 AB8500_REGUREQUESTCTRL3,
68 AB8500_REGUREQUESTCTRL4,
69 AB8500_REGUSYSCLKREQ1HPVALID1,
70 AB8500_REGUSYSCLKREQ1HPVALID2,
71 AB8500_REGUHWHPREQ1VALID1,
72 AB8500_REGUHWHPREQ1VALID2,
73 AB8500_REGUHWHPREQ2VALID1,
74 AB8500_REGUHWHPREQ2VALID2,
75 AB8500_REGUSWHPREQVALID1,
76 AB8500_REGUSWHPREQVALID2,
77 AB8500_REGUSYSCLKREQVALID1,
78 AB8500_REGUSYSCLKREQVALID2,
79 AB8500_REGUMISC1,
80 AB8500_VAUDIOSUPPLY,
81 AB8500_REGUCTRL1VAMIC,
82 AB8500_VPLLVANAREGU,
83 AB8500_VREFDDR,
84 AB8500_EXTSUPPLYREGU,
85 AB8500_VAUX12REGU,
86 AB8500_VRF1VAUX3REGU,
87 AB8500_VAUX1SEL,
88 AB8500_VAUX2SEL,
89 AB8500_VRF1VAUX3SEL,
90 AB8500_REGUCTRL2SPARE,
91 AB8500_REGUCTRLDISCH,
92 AB8500_REGUCTRLDISCH2,
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]93 AB8500_NUM_REGULATOR_REGISTERS,
94};
95
Linus Walleijd6255522012-02-20 21:42:24 +0100[diff] [blame]96
97/* AB9540 registers */
98enum ab9540_regulator_reg {
99 AB9540_REGUREQUESTCTRL1,
100 AB9540_REGUREQUESTCTRL2,
101 AB9540_REGUREQUESTCTRL3,
102 AB9540_REGUREQUESTCTRL4,
103 AB9540_REGUSYSCLKREQ1HPVALID1,
104 AB9540_REGUSYSCLKREQ1HPVALID2,
105 AB9540_REGUHWHPREQ1VALID1,
106 AB9540_REGUHWHPREQ1VALID2,
107 AB9540_REGUHWHPREQ2VALID1,
108 AB9540_REGUHWHPREQ2VALID2,
109 AB9540_REGUSWHPREQVALID1,
110 AB9540_REGUSWHPREQVALID2,
111 AB9540_REGUSYSCLKREQVALID1,
112 AB9540_REGUSYSCLKREQVALID2,
113 AB9540_REGUVAUX4REQVALID,
114 AB9540_REGUMISC1,
115 AB9540_VAUDIOSUPPLY,
116 AB9540_REGUCTRL1VAMIC,
117 AB9540_VSMPS1REGU,
118 AB9540_VSMPS2REGU,
119 AB9540_VSMPS3REGU, /* NOTE! PRCMU register */
120 AB9540_VPLLVANAREGU,
121 AB9540_EXTSUPPLYREGU,
122 AB9540_VAUX12REGU,
123 AB9540_VRF1VAUX3REGU,
124 AB9540_VSMPS1SEL1,
125 AB9540_VSMPS1SEL2,
126 AB9540_VSMPS1SEL3,
127 AB9540_VSMPS2SEL1,
128 AB9540_VSMPS2SEL2,
129 AB9540_VSMPS2SEL3,
130 AB9540_VSMPS3SEL1, /* NOTE! PRCMU register */
131 AB9540_VSMPS3SEL2, /* NOTE! PRCMU register */
132 AB9540_VAUX1SEL,
133 AB9540_VAUX2SEL,
134 AB9540_VRF1VAUX3SEL,
135 AB9540_REGUCTRL2SPARE,
136 AB9540_VAUX4REQCTRL,
137 AB9540_VAUX4REGU,
138 AB9540_VAUX4SEL,
139 AB9540_REGUCTRLDISCH,
140 AB9540_REGUCTRLDISCH2,
141 AB9540_REGUCTRLDISCH3,
142 AB9540_NUM_REGULATOR_REGISTERS,
143};
144
Lee Jonesd1a82002013-03-28 16:11:01 +0000[diff] [blame]145/* AB8500 external regulators */
Bengt Jonsson18bc2b32013-03-28 16:11:06 +0000[diff] [blame^]146struct ab8500_ext_regulator_cfg {
147 bool hwreq; /* requires hw mode or high power mode */
148};
149
Lee Jonesd1a82002013-03-28 16:11:01 +0000[diff] [blame]150enum ab8500_ext_regulator_id {
151 AB8500_EXT_SUPPLY1,
152 AB8500_EXT_SUPPLY2,
153 AB8500_EXT_SUPPLY3,
154 AB8500_NUM_EXT_REGULATORS,
155};
156
157/* AB8500 regulator platform data */
Bengt Jonsson732805a2013-03-21 15:59:03 +0000[diff] [blame]158struct ab8500_regulator_platform_data {
159 int num_reg_init;
160 struct ab8500_regulator_reg_init *reg_init;
161 int num_regulator;
162 struct regulator_init_data *regulator;
Lee Jonesd1a82002013-03-28 16:11:01 +0000[diff] [blame]163 int num_ext_regulator;
164 struct regulator_init_data *ext_regulator;
Bengt Jonsson732805a2013-03-21 15:59:03 +0000[diff] [blame]165};
166
Lee Jonesd1a82002013-03-28 16:11:01 +0000[diff] [blame]167/* AB8500 external regulator functions (internal) */
168#ifdef CONFIG_REGULATOR_AB8500_EXT
169int ab8500_ext_regulator_init(struct platform_device *pdev);
170int ab8500_ext_regulator_exit(struct platform_device *pdev);
171#else
172inline int ab8500_ext_regulator_init(struct platform_device *pdev)
173{
174 return 0;
175}
176inline int ab8500_ext_regulator_exit(struct platform_device *pdev)
177{
178 return 0;
179}
180#endif
181
Sundar R Iyer549931f2010-07-13 11:51:28 +0530[diff] [blame]182#endif