blob: c42a860c8d25fd9fda90122b8aa1dd32655136b7 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (c) 2002 Stephen Rothwell, IBM Coproration
3 * Extracted from ptrace.c and ptrace32.c
4 *
5 * This file is subject to the terms and conditions of the GNU General
6 * Public License. See the file README.legal in the main directory of
7 * this archive for more details.
8 */
9
10#ifndef _PPC64_PTRACE_COMMON_H
11#define _PPC64_PTRACE_COMMON_H
Robert Jennings962bca72005-09-10 16:01:07 +100012
13#include <linux/config.h>
Anton Blanchardfd9648d2005-09-10 16:01:11 +100014#include <asm/system.h>
Robert Jennings962bca72005-09-10 16:01:07 +100015
Linus Torvalds1da177e2005-04-16 15:20:36 -070016/*
17 * Set of msr bits that gdb can change on behalf of a process.
18 */
19#define MSR_DEBUGCHANGE (MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1)
20
21/*
22 * Get contents of register REGNO in task TASK.
23 */
24static inline unsigned long get_reg(struct task_struct *task, int regno)
25{
26 unsigned long tmp = 0;
27
28 /*
29 * Put the correct FP bits in, they might be wrong as a result
30 * of our lazy FP restore.
31 */
32 if (regno == PT_MSR) {
33 tmp = ((unsigned long *)task->thread.regs)[PT_MSR];
34 tmp |= task->thread.fpexc_mode;
35 } else if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
36 tmp = ((unsigned long *)task->thread.regs)[regno];
37 }
38
39 return tmp;
40}
41
42/*
43 * Write contents of register REGNO in task TASK.
44 */
45static inline int put_reg(struct task_struct *task, int regno,
46 unsigned long data)
47{
48 if (regno < PT_SOFTE) {
49 if (regno == PT_MSR)
50 data = (data & MSR_DEBUGCHANGE)
51 | (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
52 ((unsigned long *)task->thread.regs)[regno] = data;
53 return 0;
54 }
55 return -EIO;
56}
57
58static inline void set_single_step(struct task_struct *task)
59{
60 struct pt_regs *regs = task->thread.regs;
61 if (regs != NULL)
62 regs->msr |= MSR_SE;
Al Virob5e2fc12006-01-12 01:06:01 -080063 set_tsk_thread_flag(task, TIF_SINGLESTEP);
Linus Torvalds1da177e2005-04-16 15:20:36 -070064}
65
66static inline void clear_single_step(struct task_struct *task)
67{
68 struct pt_regs *regs = task->thread.regs;
69 if (regs != NULL)
70 regs->msr &= ~MSR_SE;
Al Virob5e2fc12006-01-12 01:06:01 -080071 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
Linus Torvalds1da177e2005-04-16 15:20:36 -070072}
73
Robert Jennings962bca72005-09-10 16:01:07 +100074#ifdef CONFIG_ALTIVEC
75/*
76 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
77 * The transfer totals 34 quadword. Quadwords 0-31 contain the
78 * corresponding vector registers. Quadword 32 contains the vscr as the
79 * last word (offset 12) within that quadword. Quadword 33 contains the
80 * vrsave as the first word (offset 0) within the quadword.
81 *
82 * This definition of the VMX state is compatible with the current PPC32
83 * ptrace interface. This allows signal handling and ptrace to use the
84 * same structures. This also simplifies the implementation of a bi-arch
85 * (combined (32- and 64-bit) gdb.
86 */
87
88/*
89 * Get contents of AltiVec register state in task TASK
90 */
91static inline int get_vrregs(unsigned long __user *data,
92 struct task_struct *task)
93{
94 unsigned long regsize;
95
96 /* copy AltiVec registers VR[0] .. VR[31] */
97 regsize = 32 * sizeof(vector128);
98 if (copy_to_user(data, task->thread.vr, regsize))
99 return -EFAULT;
100 data += (regsize / sizeof(unsigned long));
101
102 /* copy VSCR */
103 regsize = 1 * sizeof(vector128);
104 if (copy_to_user(data, &task->thread.vscr, regsize))
105 return -EFAULT;
106 data += (regsize / sizeof(unsigned long));
107
108 /* copy VRSAVE */
109 if (put_user(task->thread.vrsave, (u32 __user *)data))
110 return -EFAULT;
111
112 return 0;
113}
114
115/*
116 * Write contents of AltiVec register state into task TASK.
117 */
118static inline int set_vrregs(struct task_struct *task,
119 unsigned long __user *data)
120{
121 unsigned long regsize;
122
123 /* copy AltiVec registers VR[0] .. VR[31] */
124 regsize = 32 * sizeof(vector128);
125 if (copy_from_user(task->thread.vr, data, regsize))
126 return -EFAULT;
127 data += (regsize / sizeof(unsigned long));
128
129 /* copy VSCR */
130 regsize = 1 * sizeof(vector128);
131 if (copy_from_user(&task->thread.vscr, data, regsize))
132 return -EFAULT;
133 data += (regsize / sizeof(unsigned long));
134
135 /* copy VRSAVE */
136 if (get_user(task->thread.vrsave, (u32 __user *)data))
137 return -EFAULT;
138
139 return 0;
140}
141#endif
142
Anton Blanchardfd9648d2005-09-10 16:01:11 +1000143static inline int ptrace_set_debugreg(struct task_struct *task,
144 unsigned long addr, unsigned long data)
145{
146 /* We only support one DABR and no IABRS at the moment */
147 if (addr > 0)
148 return -EINVAL;
149
150 /* The bottom 3 bits are flags */
151 if ((data & ~0x7UL) >= TASK_SIZE)
152 return -EIO;
153
154 /* Ensure translation is on */
155 if (data && !(data & DABR_TRANSLATION))
156 return -EIO;
157
158 task->thread.dabr = data;
159 return 0;
160}
161
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162#endif /* _PPC64_PTRACE_COMMON_H */