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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _ASM_IO_H
2#define _ASM_IO_H
3
4#include <linux/config.h>
5#include <linux/string.h>
6#include <linux/compiler.h>
7
8/*
9 * This file contains the definitions for the x86 IO instructions
10 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
11 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
12 * versions of the single-IO instructions (inb_p/inw_p/..).
13 *
14 * This file is not meant to be obfuscating: it's just complicated
15 * to (a) handle it all in a way that makes gcc able to optimize it
16 * as well as possible and (b) trying to avoid writing the same thing
17 * over and over again with slight variations and possibly making a
18 * mistake somewhere.
19 */
20
21/*
22 * Thanks to James van Artsdalen for a better timing-fix than
23 * the two short jumps: using outb's to a nonexistent port seems
24 * to guarantee better timings even on fast machines.
25 *
26 * On the other hand, I'd like to be sure of a non-existent port:
27 * I feel a bit unsafe about using 0x80 (should be safe, though)
28 *
29 * Linus
30 */
31
32 /*
33 * Bit simplified and optimized by Jan Hubicka
34 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
35 *
36 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
37 * isa_read[wl] and isa_write[wl] fixed
38 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
39 */
40
41#define IO_SPACE_LIMIT 0xffff
42
43#define XQUAD_PORTIO_BASE 0xfe400000
44#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
45
46#ifdef __KERNEL__
47
48#include <asm-generic/iomap.h>
49
50#include <linux/vmalloc.h>
51
52/*
53 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
54 * access
55 */
56#define xlate_dev_mem_ptr(p) __va(p)
57
58/*
59 * Convert a virtual cached pointer to an uncached pointer
60 */
61#define xlate_dev_kmem_ptr(p) p
62
63/**
64 * virt_to_phys - map virtual addresses to physical
65 * @address: address to remap
66 *
67 * The returned physical address is the physical (CPU) mapping for
68 * the memory address given. It is only valid to use this function on
69 * addresses directly mapped or allocated via kmalloc.
70 *
71 * This function does not give bus mappings for DMA transfers. In
72 * almost all conceivable cases a device driver should not be using
73 * this function
74 */
75
76static inline unsigned long virt_to_phys(volatile void * address)
77{
78 return __pa(address);
79}
80
81/**
82 * phys_to_virt - map physical address to virtual
83 * @address: address to remap
84 *
85 * The returned virtual address is a current CPU mapping for
86 * the memory address given. It is only valid to use this function on
87 * addresses that have a kernel mapping
88 *
89 * This function does not handle bus mappings for DMA transfers. In
90 * almost all conceivable cases a device driver should not be using
91 * this function
92 */
93
94static inline void * phys_to_virt(unsigned long address)
95{
96 return __va(address);
97}
98
99/*
100 * Change "struct page" to physical address.
101 */
102#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
103
104extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
105
106/**
107 * ioremap - map bus memory into CPU space
108 * @offset: bus address of the memory
109 * @size: size of the resource to map
110 *
111 * ioremap performs a platform specific sequence of operations to
112 * make bus memory CPU accessible via the readb/readw/readl/writeb/
113 * writew/writel functions and the other mmio helpers. The returned
114 * address is not guaranteed to be usable directly as a virtual
115 * address.
116 */
117
118static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
119{
120 return __ioremap(offset, size, 0);
121}
122
123extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
124extern void iounmap(volatile void __iomem *addr);
125
126/*
127 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
128 * mappings, before the real ioremap() is functional.
129 * A boot-time mapping is currently limited to at most 16 pages.
130 */
131extern void *bt_ioremap(unsigned long offset, unsigned long size);
132extern void bt_iounmap(void *addr, unsigned long size);
133
Andi Kleene9928672006-01-11 22:43:33 +0100134/* Use early IO mappings for DMI because it's initialized early */
135#define dmi_ioremap bt_ioremap
136#define dmi_iounmap bt_iounmap
137#define dmi_alloc alloc_bootmem
138
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139/*
140 * ISA I/O bus memory addresses are 1:1 with the physical address.
141 */
142#define isa_virt_to_bus virt_to_phys
143#define isa_page_to_bus page_to_phys
144#define isa_bus_to_virt phys_to_virt
145
146/*
147 * However PCI ones are not necessarily 1:1 and therefore these interfaces
148 * are forbidden in portable PCI drivers.
149 *
150 * Allow them on x86 for legacy drivers, though.
151 */
152#define virt_to_bus virt_to_phys
153#define bus_to_virt phys_to_virt
154
155/*
156 * readX/writeX() are used to access memory mapped devices. On some
157 * architectures the memory mapped IO stuff needs to be accessed
158 * differently. On the x86 architecture, we just read/write the
159 * memory location directly.
160 */
161
162static inline unsigned char readb(const volatile void __iomem *addr)
163{
164 return *(volatile unsigned char __force *) addr;
165}
166static inline unsigned short readw(const volatile void __iomem *addr)
167{
168 return *(volatile unsigned short __force *) addr;
169}
170static inline unsigned int readl(const volatile void __iomem *addr)
171{
172 return *(volatile unsigned int __force *) addr;
173}
174#define readb_relaxed(addr) readb(addr)
175#define readw_relaxed(addr) readw(addr)
176#define readl_relaxed(addr) readl(addr)
177#define __raw_readb readb
178#define __raw_readw readw
179#define __raw_readl readl
180
181static inline void writeb(unsigned char b, volatile void __iomem *addr)
182{
183 *(volatile unsigned char __force *) addr = b;
184}
185static inline void writew(unsigned short b, volatile void __iomem *addr)
186{
187 *(volatile unsigned short __force *) addr = b;
188}
189static inline void writel(unsigned int b, volatile void __iomem *addr)
190{
191 *(volatile unsigned int __force *) addr = b;
192}
193#define __raw_writeb writeb
194#define __raw_writew writew
195#define __raw_writel writel
196
197#define mmiowb()
198
199static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
200{
201 memset((void __force *) addr, val, count);
202}
203static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
204{
205 __memcpy(dst, (void __force *) src, count);
206}
207static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
208{
209 __memcpy((void __force *) dst, src, count);
210}
211
212/*
213 * ISA space is 'always mapped' on a typical x86 system, no need to
214 * explicitly ioremap() it. The fact that the ISA IO space is mapped
215 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
216 * are physical addresses. The following constant pointer can be
217 * used as the IO-area pointer (it can be iounmapped as well, so the
218 * analogy with PCI is quite large):
219 */
220#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
221
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222/*
223 * Again, i386 does not require mem IO specific function.
224 */
225
226#define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700227
228/**
229 * check_signature - find BIOS signatures
230 * @io_addr: mmio address to check
231 * @signature: signature block
232 * @length: length of signature
233 *
234 * Perform a signature comparison with the mmio address io_addr. This
235 * address should have been obtained by ioremap.
236 * Returns 1 on a match.
237 */
238
239static inline int check_signature(volatile void __iomem * io_addr,
240 const unsigned char *signature, int length)
241{
242 int retval = 0;
243 do {
244 if (readb(io_addr) != *signature)
245 goto out;
246 io_addr++;
247 signature++;
248 length--;
249 } while (length);
250 retval = 1;
251out:
252 return retval;
253}
254
255/*
256 * Cache management
257 *
258 * This needed for two cases
259 * 1. Out of order aware processors
260 * 2. Accidentally out of order processors (PPro errata #51)
261 */
262
263#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
264
265static inline void flush_write_buffers(void)
266{
267 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
268}
269
270#define dma_cache_inv(_start,_size) flush_write_buffers()
271#define dma_cache_wback(_start,_size) flush_write_buffers()
272#define dma_cache_wback_inv(_start,_size) flush_write_buffers()
273
274#else
275
276/* Nothing to do */
277
278#define dma_cache_inv(_start,_size) do { } while (0)
279#define dma_cache_wback(_start,_size) do { } while (0)
280#define dma_cache_wback_inv(_start,_size) do { } while (0)
281#define flush_write_buffers()
282
283#endif
284
285#endif /* __KERNEL__ */
286
287#ifdef SLOW_IO_BY_JUMPING
288#define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:"
289#else
290#define __SLOW_DOWN_IO "outb %%al,$0x80;"
291#endif
292
293static inline void slow_down_io(void) {
294 __asm__ __volatile__(
295 __SLOW_DOWN_IO
296#ifdef REALLY_SLOW_IO
297 __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
298#endif
299 : : );
300}
301
302#ifdef CONFIG_X86_NUMAQ
303extern void *xquad_portio; /* Where the IO area was mapped */
304#define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
305#define __BUILDIO(bwl,bw,type) \
306static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
307 if (xquad_portio) \
308 write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
309 else \
310 out##bwl##_local(value, port); \
311} \
312static inline void out##bwl(unsigned type value, int port) { \
313 out##bwl##_quad(value, port, 0); \
314} \
315static inline unsigned type in##bwl##_quad(int port, int quad) { \
316 if (xquad_portio) \
317 return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
318 else \
319 return in##bwl##_local(port); \
320} \
321static inline unsigned type in##bwl(int port) { \
322 return in##bwl##_quad(port, 0); \
323}
324#else
325#define __BUILDIO(bwl,bw,type) \
326static inline void out##bwl(unsigned type value, int port) { \
327 out##bwl##_local(value, port); \
328} \
329static inline unsigned type in##bwl(int port) { \
330 return in##bwl##_local(port); \
331}
332#endif
333
334
335#define BUILDIO(bwl,bw,type) \
336static inline void out##bwl##_local(unsigned type value, int port) { \
337 __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
338} \
339static inline unsigned type in##bwl##_local(int port) { \
340 unsigned type value; \
341 __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
342 return value; \
343} \
344static inline void out##bwl##_local_p(unsigned type value, int port) { \
345 out##bwl##_local(value, port); \
346 slow_down_io(); \
347} \
348static inline unsigned type in##bwl##_local_p(int port) { \
349 unsigned type value = in##bwl##_local(port); \
350 slow_down_io(); \
351 return value; \
352} \
353__BUILDIO(bwl,bw,type) \
354static inline void out##bwl##_p(unsigned type value, int port) { \
355 out##bwl(value, port); \
356 slow_down_io(); \
357} \
358static inline unsigned type in##bwl##_p(int port) { \
359 unsigned type value = in##bwl(port); \
360 slow_down_io(); \
361 return value; \
362} \
363static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
364 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
365} \
366static inline void ins##bwl(int port, void *addr, unsigned long count) { \
367 __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
368}
369
370BUILDIO(b,b,char)
371BUILDIO(w,w,short)
372BUILDIO(l,,int)
373
374#endif