| Tomasz Figa | 5b5ff97 | 2013-04-23 17:46:22 +0200 | [diff] [blame] | 1 | * Samsung PWM timers |
| 2 | |
| 3 | Samsung SoCs contain PWM timer blocks which can be used for system clock source |
| 4 | and clock event timers, as well as to drive SoC outputs with PWM signal. Each |
| 5 | PWM timer block provides 5 PWM channels (not all of them can drive physical |
| 6 | outputs - see SoC and board manual). |
| 7 | |
| 8 | Be aware that the clocksource driver supports only uniprocessor systems. |
| 9 | |
| 10 | Required properties: |
| 11 | - compatible : should be one of following: |
| 12 | samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs |
| 13 | samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs |
| 14 | samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs |
| 15 | samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210, |
| 16 | Exynos4210 rev0 SoCs |
| 17 | samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210, |
| Sachin Kamat | 1b3f25c | 2013-10-30 10:09:41 +0530 | [diff] [blame] | 18 | Exynos4x12, Exynos5250 and Exynos5420 SoCs |
| Tomasz Figa | 5b5ff97 | 2013-04-23 17:46:22 +0200 | [diff] [blame] | 19 | - reg: base address and size of register area |
| 20 | - interrupts: list of timer interrupts (one interrupt per timer, starting at |
| 21 | timer 0) |
| Tomasz Figa | f51a87a | 2013-08-26 19:08:56 +0200 | [diff] [blame] | 22 | - clock-names: should contain all following required clock names: |
| 23 | - "timers" - PWM base clock used to generate PWM signals, |
| 24 | and any subset of following optional clock names: |
| 25 | - "pwm-tclk0" - first external PWM clock source, |
| 26 | - "pwm-tclk1" - second external PWM clock source. |
| 27 | Note that not all IP variants allow using all external clock sources. |
| 28 | Refer to SoC documentation to learn which clock source configurations |
| 29 | are available. |
| 30 | - clocks: should contain clock specifiers of all clocks, which input names |
| 31 | have been specified in clock-names property, in same order. |
| Laurent Pinchart | ebeec0a | 2013-07-18 00:54:23 +0200 | [diff] [blame] | 32 | - #pwm-cells: should be 3. See pwm.txt in this directory for a description of |
| 33 | the cells format. The only third cell flag supported by this binding is |
| 34 | PWM_POLARITY_INVERTED. |
| Tomasz Figa | 5b5ff97 | 2013-04-23 17:46:22 +0200 | [diff] [blame] | 35 | |
| 36 | Optional properties: |
| 37 | - samsung,pwm-outputs: list of PWM channels used as PWM outputs on particular |
| 38 | platform - an array of up to 5 elements being indices of PWM channels |
| 39 | (from 0 to 4), the order does not matter. |
| 40 | |
| 41 | Example: |
| 42 | pwm@7f006000 { |
| 43 | compatible = "samsung,s3c6400-pwm"; |
| 44 | reg = <0x7f006000 0x1000>; |
| 45 | interrupt-parent = <&vic0>; |
| 46 | interrupts = <23>, <24>, <25>, <27>, <28>; |
| Tomasz Figa | f51a87a | 2013-08-26 19:08:56 +0200 | [diff] [blame] | 47 | clocks = <&clock 67>; |
| 48 | clock-names = "timers"; |
| Tomasz Figa | 5b5ff97 | 2013-04-23 17:46:22 +0200 | [diff] [blame] | 49 | samsung,pwm-outputs = <0>, <1>; |
| 50 | #pwm-cells = <3>; |
| 51 | } |