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review.evervolv.com / android_kernel_oneplus_msm8996 / 1c7dbb5521a10135203311476304c640e983ced6 / . / arch / arm / boot / dts / omap2430.dtsi
blob: 832f184ae91200bf6f96e8f59f3271b3e24644ac [file] [log] [blame]
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]1/*
2 * Device Tree Source for OMAP243x SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "omap2.dtsi"
12
13/ {
14 compatible = "ti,omap2430", "ti,omap2";
15
16 ocp {
Jon Hunter510c0ff2012-10-25 14:24:14 -0500[diff] [blame]17 counter32k: counter@49020000 {
18 compatible = "ti,omap-counter32k";
19 reg = <0x49020000 0x20>;
20 ti,hwmods = "counter_32k";
21 };
22
Tony Lindgren679e3312012-09-10 10:34:51 -0700[diff] [blame]23 omap2430_pmx: pinmux@49002030 {
24 compatible = "ti,omap2430-padconf", "pinctrl-single";
25 reg = <0x49002030 0x0154>;
26 #address-cells = <1>;
27 #size-cells = <0>;
28 pinctrl-single,register-width = <8>;
29 pinctrl-single,function-mask = <0x3f>;
30 };
31
Jon Hunter1c7dbb52013-02-22 15:33:31 -0600[diff] [blame^]32 gpmc: gpmc@6e000000 {
33 compatible = "ti,omap2430-gpmc";
34 reg = <0x6e000000 0x1000>;
35 #address-cells = <2>;
36 #size-cells = <1>;
37 interrupts = <20>;
38 gpmc,num-cs = <8>;
39 gpmc,num-waitpins = <4>;
40 ti,hwmods = "gpmc";
41 };
42
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]43 mcbsp1: mcbsp@48074000 {
44 compatible = "ti,omap2430-mcbsp";
45 reg = <0x48074000 0xff>;
46 reg-names = "mpu";
47 interrupts = <64>, /* OCP compliant interrupt */
48 <59>, /* TX interrupt */
49 <60>, /* RX interrupt */
50 <61>; /* RX overflow interrupt */
51 interrupt-names = "common", "tx", "rx", "rx_overflow";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]52 ti,buffer-size = <128>;
53 ti,hwmods = "mcbsp1";
54 };
55
56 mcbsp2: mcbsp@48076000 {
57 compatible = "ti,omap2430-mcbsp";
58 reg = <0x48076000 0xff>;
59 reg-names = "mpu";
60 interrupts = <16>, /* OCP compliant interrupt */
61 <62>, /* TX interrupt */
62 <63>; /* RX interrupt */
63 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]64 ti,buffer-size = <128>;
65 ti,hwmods = "mcbsp2";
66 };
67
68 mcbsp3: mcbsp@4808c000 {
69 compatible = "ti,omap2430-mcbsp";
70 reg = <0x4808c000 0xff>;
71 reg-names = "mpu";
72 interrupts = <17>, /* OCP compliant interrupt */
73 <89>, /* TX interrupt */
74 <90>; /* RX interrupt */
75 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]76 ti,buffer-size = <128>;
77 ti,hwmods = "mcbsp3";
78 };
79
80 mcbsp4: mcbsp@4808e000 {
81 compatible = "ti,omap2430-mcbsp";
82 reg = <0x4808e000 0xff>;
83 reg-names = "mpu";
84 interrupts = <18>, /* OCP compliant interrupt */
85 <54>, /* TX interrupt */
86 <55>; /* RX interrupt */
87 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]88 ti,buffer-size = <128>;
89 ti,hwmods = "mcbsp4";
90 };
91
92 mcbsp5: mcbsp@48096000 {
93 compatible = "ti,omap2430-mcbsp";
94 reg = <0x48096000 0xff>;
95 reg-names = "mpu";
96 interrupts = <19>, /* OCP compliant interrupt */
97 <81>, /* TX interrupt */
98 <82>; /* RX interrupt */
99 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]100 ti,buffer-size = <128>;
101 ti,hwmods = "mcbsp5";
102 };
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]103
104 timer1: timer@49018000 {
105 compatible = "ti,omap2-timer";
106 reg = <0x49018000 0x400>;
107 interrupts = <37>;
108 ti,hwmods = "timer1";
109 ti,timer-alwon;
110 };
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]111 };
112};