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Shawn Guo13eed982011-09-06 15:05:25 +08001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
Richard Zhaoa2585612012-04-24 14:19:13 +080013#include <linux/clk.h>
14#include <linux/clkdev.h>
Robert Leeb9d18dc2012-05-21 17:50:30 -050015#include <linux/cpuidle.h>
Shawn Guo0575fb72011-12-09 00:51:26 +010016#include <linux/delay.h>
Robert Leeb9d18dc2012-05-21 17:50:30 -050017#include <linux/export.h>
Shawn Guo13eed982011-09-06 15:05:25 +080018#include <linux/init.h>
Shawn Guo0575fb72011-12-09 00:51:26 +010019#include <linux/io.h>
Shawn Guo13eed982011-09-06 15:05:25 +080020#include <linux/irq.h>
Shawn Guo13eed982011-09-06 15:05:25 +080021#include <linux/of.h>
Shawn Guo0575fb72011-12-09 00:51:26 +010022#include <linux/of_address.h>
Shawn Guo13eed982011-09-06 15:05:25 +080023#include <linux/of_irq.h>
24#include <linux/of_platform.h>
Richard Zhao477fce42011-12-14 09:26:47 +080025#include <linux/phy.h>
Dong Aishengbaa64152012-09-05 10:57:15 +080026#include <linux/regmap.h>
Richard Zhao477fce42011-12-14 09:26:47 +080027#include <linux/micrel_phy.h>
Dong Aishengbaa64152012-09-05 10:57:15 +080028#include <linux/mfd/syscon.h>
Robert Leeb9d18dc2012-05-21 17:50:30 -050029#include <asm/cpuidle.h>
Marc Zyngier58458e02012-01-10 19:44:19 +000030#include <asm/smp_twd.h>
Shawn Guo13eed982011-09-06 15:05:25 +080031#include <asm/hardware/cache-l2x0.h>
32#include <asm/hardware/gic.h>
33#include <asm/mach/arch.h>
Shawn Guo3e549a62013-01-17 16:37:42 +080034#include <asm/mach/map.h>
Shawn Guo13eed982011-09-06 15:05:25 +080035#include <asm/mach/time.h>
David Howells9f97da72012-03-28 18:30:01 +010036#include <asm/system_misc.h>
Shawn Guo13eed982011-09-06 15:05:25 +080037
Shawn Guoe3372472012-09-13 21:01:00 +080038#include "common.h"
Shawn Guoe29248c2012-09-13 21:12:50 +080039#include "cpuidle.h"
Shawn Guo50f2de62012-09-14 14:14:45 +080040#include "hardware.h"
Robert Leeb9d18dc2012-05-21 17:50:30 -050041
Shawn Guob29b3e62012-10-23 19:00:39 +080042#define IMX6Q_ANALOG_DIGPROG 0x260
43
44static int imx6q_revision(void)
45{
46 struct device_node *np;
47 void __iomem *base;
48 static u32 rev;
49
50 if (!rev) {
51 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
52 if (!np)
53 return IMX_CHIP_REVISION_UNKNOWN;
54 base = of_iomap(np, 0);
55 if (!base) {
56 of_node_put(np);
57 return IMX_CHIP_REVISION_UNKNOWN;
58 }
59 rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
60 iounmap(base);
61 of_node_put(np);
62 }
63
64 switch (rev & 0xff) {
65 case 0:
66 return IMX_CHIP_REVISION_1_0;
67 case 1:
68 return IMX_CHIP_REVISION_1_1;
69 case 2:
70 return IMX_CHIP_REVISION_1_2;
71 default:
72 return IMX_CHIP_REVISION_UNKNOWN;
73 }
74}
75
Shawn Guo0575fb72011-12-09 00:51:26 +010076void imx6q_restart(char mode, const char *cmd)
77{
78 struct device_node *np;
79 void __iomem *wdog_base;
80
81 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
82 wdog_base = of_iomap(np, 0);
83 if (!wdog_base)
84 goto soft;
85
86 imx_src_prepare_restart();
87
88 /* enable wdog */
89 writew_relaxed(1 << 2, wdog_base);
90 /* write twice to ensure the request will not get ignored */
91 writew_relaxed(1 << 2, wdog_base);
92
93 /* wait for reset to assert ... */
94 mdelay(500);
95
96 pr_err("Watchdog reset failed to assert reset\n");
97
98 /* delay to allow the serial port to show the message */
99 mdelay(50);
100
101soft:
102 /* we'll take a jump through zero as a poor second */
103 soft_restart(0);
104}
105
Richard Zhao477fce42011-12-14 09:26:47 +0800106/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
107static int ksz9021rn_phy_fixup(struct phy_device *phydev)
108{
Arnd Bergmann9f9ba0f2012-08-16 07:42:50 +0000109 if (IS_BUILTIN(CONFIG_PHYLIB)) {
Shawn Guoef441802012-05-08 21:39:33 +0800110 /* min rx data delay */
111 phy_write(phydev, 0x0b, 0x8105);
112 phy_write(phydev, 0x0c, 0x0000);
Richard Zhao477fce42011-12-14 09:26:47 +0800113
Shawn Guoef441802012-05-08 21:39:33 +0800114 /* max rx/tx clock delay, min rx/tx control delay */
115 phy_write(phydev, 0x0b, 0x8104);
116 phy_write(phydev, 0x0c, 0xf0f0);
117 phy_write(phydev, 0x0b, 0x104);
118 }
Richard Zhao477fce42011-12-14 09:26:47 +0800119
120 return 0;
121}
122
Richard Zhaoa2585612012-04-24 14:19:13 +0800123static void __init imx6q_sabrelite_cko1_setup(void)
124{
125 struct clk *cko1_sel, *ahb, *cko1;
126 unsigned long rate;
127
128 cko1_sel = clk_get_sys(NULL, "cko1_sel");
129 ahb = clk_get_sys(NULL, "ahb");
130 cko1 = clk_get_sys(NULL, "cko1");
131 if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
132 pr_err("cko1 setup failed!\n");
133 goto put_clk;
134 }
135 clk_set_parent(cko1_sel, ahb);
136 rate = clk_round_rate(cko1, 16000000);
137 clk_set_rate(cko1, rate);
Richard Zhaoa2585612012-04-24 14:19:13 +0800138put_clk:
139 if (!IS_ERR(cko1_sel))
140 clk_put(cko1_sel);
141 if (!IS_ERR(ahb))
142 clk_put(ahb);
143 if (!IS_ERR(cko1))
144 clk_put(cko1);
145}
146
Richard Zhao071dea52012-04-27 15:02:59 +0800147static void __init imx6q_sabrelite_init(void)
148{
Arnd Bergmann9f9ba0f2012-08-16 07:42:50 +0000149 if (IS_BUILTIN(CONFIG_PHYLIB))
Shawn Guoef441802012-05-08 21:39:33 +0800150 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
Richard Zhao071dea52012-04-27 15:02:59 +0800151 ksz9021rn_phy_fixup);
Richard Zhaoa2585612012-04-24 14:19:13 +0800152 imx6q_sabrelite_cko1_setup();
Richard Zhao071dea52012-04-27 15:02:59 +0800153}
154
Frank Lid6e0d9f2012-10-30 18:25:22 +0000155static void __init imx6q_1588_init(void)
156{
157 struct regmap *gpr;
158
159 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
160 if (!IS_ERR(gpr))
161 regmap_update_bits(gpr, 0x4, 1 << 21, 1 << 21);
162 else
163 pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n");
164
165}
Richard Zhao396bf1c2012-07-12 10:25:24 +0800166static void __init imx6q_usb_init(void)
167{
Dong Aishengbaa64152012-09-05 10:57:15 +0800168 struct regmap *anatop;
Richard Zhao396bf1c2012-07-12 10:25:24 +0800169
170#define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
171#define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
172
173#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
174#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
175
Dong Aishengbaa64152012-09-05 10:57:15 +0800176 anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
177 if (!IS_ERR(anatop)) {
178 /*
179 * The external charger detector needs to be disabled,
180 * or the signal at DP will be poor
181 */
182 regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
183 BM_ANADIG_USB_CHRG_DETECT_EN_B
184 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
185 regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
186 BM_ANADIG_USB_CHRG_DETECT_EN_B |
187 BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
188 } else {
189 pr_warn("failed to find fsl,imx6q-anatop regmap\n");
190 }
Richard Zhao396bf1c2012-07-12 10:25:24 +0800191}
192
Shawn Guo13eed982011-09-06 15:05:25 +0800193static void __init imx6q_init_machine(void)
194{
Richard Zhao477fce42011-12-14 09:26:47 +0800195 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
Richard Zhao071dea52012-04-27 15:02:59 +0800196 imx6q_sabrelite_init();
Richard Zhao477fce42011-12-14 09:26:47 +0800197
Shawn Guo13eed982011-09-06 15:05:25 +0800198 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
199
200 imx6q_pm_init();
Richard Zhao396bf1c2012-07-12 10:25:24 +0800201 imx6q_usb_init();
Frank Lid6e0d9f2012-10-30 18:25:22 +0000202 imx6q_1588_init();
Shawn Guo13eed982011-09-06 15:05:25 +0800203}
204
Robert Leeb9d18dc2012-05-21 17:50:30 -0500205static struct cpuidle_driver imx6q_cpuidle_driver = {
206 .name = "imx6q_cpuidle",
207 .owner = THIS_MODULE,
208 .en_core_tk_irqen = 1,
209 .states[0] = ARM_CPUIDLE_WFI_STATE,
210 .state_count = 1,
211};
212
213static void __init imx6q_init_late(void)
214{
215 imx_cpuidle_init(&imx6q_cpuidle_driver);
216}
217
Shawn Guo13eed982011-09-06 15:05:25 +0800218static void __init imx6q_map_io(void)
219{
Shawn Guo3e549a62013-01-17 16:37:42 +0800220 debug_ll_io_init();
Shawn Guo13eed982011-09-06 15:05:25 +0800221 imx_scu_map_io();
Shawn Guo13eed982011-09-06 15:05:25 +0800222}
223
Shawn Guo13eed982011-09-06 15:05:25 +0800224static const struct of_device_id imx6q_irq_match[] __initconst = {
225 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
Shawn Guo13eed982011-09-06 15:05:25 +0800226 { /* sentinel */ }
227};
228
229static void __init imx6q_init_irq(void)
230{
231 l2x0_of_init(0, ~0UL);
232 imx_src_init();
233 imx_gpc_init();
234 of_irq_init(imx6q_irq_match);
235}
236
237static void __init imx6q_timer_init(void)
238{
239 mx6q_clocks_init();
Marc Zyngier58458e02012-01-10 19:44:19 +0000240 twd_local_timer_of_register();
Shawn Guob29b3e62012-10-23 19:00:39 +0800241 imx_print_silicon_rev("i.MX6Q", imx6q_revision());
Shawn Guo13eed982011-09-06 15:05:25 +0800242}
243
244static struct sys_timer imx6q_timer = {
245 .init = imx6q_timer_init,
246};
247
248static const char *imx6q_dt_compat[] __initdata = {
Sascha Hauer3f8976d2012-02-17 12:07:00 +0100249 "fsl,imx6q",
Shawn Guo13eed982011-09-06 15:05:25 +0800250 NULL,
251};
252
253DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
Marc Zyngiere4f2d972011-09-08 13:15:22 +0100254 .smp = smp_ops(imx_smp_ops),
Shawn Guo13eed982011-09-06 15:05:25 +0800255 .map_io = imx6q_map_io,
256 .init_irq = imx6q_init_irq,
257 .handle_irq = imx6q_handle_irq,
258 .timer = &imx6q_timer,
259 .init_machine = imx6q_init_machine,
Robert Leeb9d18dc2012-05-21 17:50:30 -0500260 .init_late = imx6q_init_late,
Shawn Guo13eed982011-09-06 15:05:25 +0800261 .dt_compat = imx6q_dt_compat,
Shawn Guo0575fb72011-12-09 00:51:26 +0100262 .restart = imx6q_restart,
Shawn Guo13eed982011-09-06 15:05:25 +0800263MACHINE_END