| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * include/asm-ppc/mpc85xx.h |
| 3 | * |
| 4 | * MPC85xx definitions |
| 5 | * |
| 6 | * Maintainer: Kumar Gala <kumar.gala@freescale.com> |
| 7 | * |
| 8 | * Copyright 2004 Freescale Semiconductor, Inc |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License as published by the |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your |
| 13 | * option) any later version. |
| 14 | */ |
| 15 | |
| 16 | #ifdef __KERNEL__ |
| 17 | #ifndef __ASM_MPC85xx_H__ |
| 18 | #define __ASM_MPC85xx_H__ |
| 19 | |
| 20 | #include <linux/config.h> |
| 21 | #include <asm/mmu.h> |
| 22 | |
| 23 | #ifdef CONFIG_85xx |
| 24 | |
| 25 | #ifdef CONFIG_MPC8540_ADS |
| 26 | #include <platforms/85xx/mpc8540_ads.h> |
| 27 | #endif |
| 28 | #ifdef CONFIG_MPC8555_CDS |
| 29 | #include <platforms/85xx/mpc8555_cds.h> |
| 30 | #endif |
| 31 | #ifdef CONFIG_MPC8560_ADS |
| 32 | #include <platforms/85xx/mpc8560_ads.h> |
| 33 | #endif |
| 34 | #ifdef CONFIG_SBC8560 |
| 35 | #include <platforms/85xx/sbc8560.h> |
| 36 | #endif |
| 37 | #ifdef CONFIG_STX_GP3 |
| 38 | #include <platforms/85xx/stx_gp3.h> |
| 39 | #endif |
| 40 | |
| 41 | #define _IO_BASE isa_io_base |
| 42 | #define _ISA_MEM_BASE isa_mem_base |
| 43 | #ifdef CONFIG_PCI |
| 44 | #define PCI_DRAM_OFFSET pci_dram_offset |
| 45 | #else |
| 46 | #define PCI_DRAM_OFFSET 0 |
| 47 | #endif |
| 48 | |
| 49 | /* |
| 50 | * The "residual" board information structure the boot loader passes |
| 51 | * into the kernel. |
| 52 | */ |
| 53 | extern unsigned char __res[]; |
| 54 | |
| 55 | /* Offset from CCSRBAR */ |
| 56 | #define MPC85xx_CPM_OFFSET (0x80000) |
| 57 | #define MPC85xx_CPM_SIZE (0x40000) |
| 58 | #define MPC85xx_DMA_OFFSET (0x21000) |
| 59 | #define MPC85xx_DMA_SIZE (0x01000) |
| 60 | #define MPC85xx_DMA0_OFFSET (0x21100) |
| 61 | #define MPC85xx_DMA0_SIZE (0x00080) |
| 62 | #define MPC85xx_DMA1_OFFSET (0x21180) |
| 63 | #define MPC85xx_DMA1_SIZE (0x00080) |
| 64 | #define MPC85xx_DMA2_OFFSET (0x21200) |
| 65 | #define MPC85xx_DMA2_SIZE (0x00080) |
| 66 | #define MPC85xx_DMA3_OFFSET (0x21280) |
| 67 | #define MPC85xx_DMA3_SIZE (0x00080) |
| 68 | #define MPC85xx_ENET1_OFFSET (0x24000) |
| 69 | #define MPC85xx_ENET1_SIZE (0x01000) |
| 70 | #define MPC85xx_ENET2_OFFSET (0x25000) |
| 71 | #define MPC85xx_ENET2_SIZE (0x01000) |
| 72 | #define MPC85xx_ENET3_OFFSET (0x26000) |
| 73 | #define MPC85xx_ENET3_SIZE (0x01000) |
| 74 | #define MPC85xx_GUTS_OFFSET (0xe0000) |
| 75 | #define MPC85xx_GUTS_SIZE (0x01000) |
| 76 | #define MPC85xx_IIC1_OFFSET (0x03000) |
| 77 | #define MPC85xx_IIC1_SIZE (0x01000) |
| 78 | #define MPC85xx_OPENPIC_OFFSET (0x40000) |
| 79 | #define MPC85xx_OPENPIC_SIZE (0x40000) |
| 80 | #define MPC85xx_PCI1_OFFSET (0x08000) |
| 81 | #define MPC85xx_PCI1_SIZE (0x01000) |
| 82 | #define MPC85xx_PCI2_OFFSET (0x09000) |
| 83 | #define MPC85xx_PCI2_SIZE (0x01000) |
| 84 | #define MPC85xx_PERFMON_OFFSET (0xe1000) |
| 85 | #define MPC85xx_PERFMON_SIZE (0x01000) |
| 86 | #define MPC85xx_SEC2_OFFSET (0x30000) |
| 87 | #define MPC85xx_SEC2_SIZE (0x10000) |
| 88 | #define MPC85xx_UART0_OFFSET (0x04500) |
| 89 | #define MPC85xx_UART0_SIZE (0x00100) |
| 90 | #define MPC85xx_UART1_OFFSET (0x04600) |
| 91 | #define MPC85xx_UART1_SIZE (0x00100) |
| 92 | |
| 93 | #define MPC85xx_CCSRBAR_SIZE (1024*1024) |
| 94 | |
| 95 | /* Let modules/drivers get at CCSRBAR */ |
| 96 | extern phys_addr_t get_ccsrbar(void); |
| 97 | |
| 98 | #ifdef MODULE |
| 99 | #define CCSRBAR get_ccsrbar() |
| 100 | #else |
| 101 | #define CCSRBAR BOARD_CCSRBAR |
| 102 | #endif |
| 103 | |
| 104 | enum ppc_sys_devices { |
| 105 | MPC85xx_TSEC1, |
| 106 | MPC85xx_TSEC2, |
| 107 | MPC85xx_FEC, |
| 108 | MPC85xx_IIC1, |
| 109 | MPC85xx_DMA0, |
| 110 | MPC85xx_DMA1, |
| 111 | MPC85xx_DMA2, |
| 112 | MPC85xx_DMA3, |
| 113 | MPC85xx_DUART, |
| 114 | MPC85xx_PERFMON, |
| 115 | MPC85xx_SEC2, |
| 116 | MPC85xx_CPM_SPI, |
| 117 | MPC85xx_CPM_I2C, |
| 118 | MPC85xx_CPM_USB, |
| 119 | MPC85xx_CPM_SCC1, |
| 120 | MPC85xx_CPM_SCC2, |
| 121 | MPC85xx_CPM_SCC3, |
| 122 | MPC85xx_CPM_SCC4, |
| 123 | MPC85xx_CPM_FCC1, |
| 124 | MPC85xx_CPM_FCC2, |
| 125 | MPC85xx_CPM_FCC3, |
| 126 | MPC85xx_CPM_MCC1, |
| 127 | MPC85xx_CPM_MCC2, |
| 128 | MPC85xx_CPM_SMC1, |
| 129 | MPC85xx_CPM_SMC2, |
| 130 | }; |
| 131 | |
| 132 | #endif /* CONFIG_85xx */ |
| 133 | #endif /* __ASM_MPC85xx_H__ */ |
| 134 | #endif /* __KERNEL__ */ |