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review.evervolv.com / android_kernel_oneplus_msm8996 / 25918f9811eae1d657db2bccdfcb077038d9454c / . / include / linux / dma_remapping.h
blob: 57c9a8ae4f2df2127dffe7e88aee95b5f2cdce1a [file] [log] [blame]
Suresh Siddhae61d98d2008-07-10 11:16:35 -0700[diff] [blame]1#ifndef _DMA_REMAPPING_H
2#define _DMA_REMAPPING_H
3
4/*
Fenghua Yu5b6985c2008-10-16 18:02:32 -0700[diff] [blame]5 * VT-d hardware uses 4KiB page size regardless of host page size.
Suresh Siddhae61d98d2008-07-10 11:16:35 -0700[diff] [blame]6 */
Fenghua Yu5b6985c2008-10-16 18:02:32 -0700[diff] [blame]7#define VTD_PAGE_SHIFT (12)
8#define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT)
9#define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT)
10#define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK)
Suresh Siddhae61d98d2008-07-10 11:16:35 -0700[diff] [blame]11
Youquan Song6dd9a7c2011-05-25 19:13:49 +0100[diff] [blame]12#define VTD_STRIDE_SHIFT (9)
13#define VTD_STRIDE_MASK (((u64)-1) << VTD_STRIDE_SHIFT)
14
Suresh Siddhae61d98d2008-07-10 11:16:35 -0700[diff] [blame]15#define DMA_PTE_READ (1)
16#define DMA_PTE_WRITE (2)
Youquan Song6dd9a7c2011-05-25 19:13:49 +0100[diff] [blame]17#define DMA_PTE_LARGE_PAGE (1 << 7)
Sheng Yang9cf06692009-03-18 15:33:07 +0800[diff] [blame]18#define DMA_PTE_SNP (1 << 11)
Suresh Siddhae61d98d2008-07-10 11:16:35 -0700[diff] [blame]19
Fenghua Yu4ed0d3e2009-04-24 17:30:20 -0700[diff] [blame]20#define CONTEXT_TT_MULTI_LEVEL 0
Yu Zhao93a23a72009-05-18 13:51:37 +0800[diff] [blame]21#define CONTEXT_TT_DEV_IOTLB 1
Fenghua Yu4ed0d3e2009-04-24 17:30:20 -0700[diff] [blame]22#define CONTEXT_TT_PASS_THROUGH 2
23
Suresh Siddhae61d98d2008-07-10 11:16:35 -0700[diff] [blame]24struct intel_iommu;
Mark McLoughlin99126f72008-11-20 15:49:47 +0000[diff] [blame]25struct dmar_domain;
26struct root_entry;
Suresh Siddhae61d98d2008-07-10 11:16:35 -0700[diff] [blame]27
Ingo Molnarc66b9902009-01-04 10:55:02 +0100[diff] [blame]28
Suresh Siddhad3f13812011-08-23 17:05:25 -0700[diff] [blame]29#ifdef CONFIG_INTEL_IOMMU
Suresh Siddha318fe7d2011-08-23 17:05:20 -0700[diff] [blame]30extern void free_dmar_iommu(struct intel_iommu *iommu);
Weidong Han1b573682008-12-08 15:34:06 +0800[diff] [blame]31extern int iommu_calculate_agaw(struct intel_iommu *iommu);
Fenghua Yu4ed0d3e2009-04-24 17:30:20 -0700[diff] [blame]32extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu);
Suresh Siddhaf5d1b972011-08-23 17:05:22 -0700[diff] [blame]33extern int dmar_disabled;
Eugeni Dodonov8bc1f852011-11-23 16:42:14 -0200[diff] [blame]34extern int intel_iommu_enabled;
Ingo Molnarc66b9902009-01-04 10:55:02 +0100[diff] [blame]35#else
36static inline int iommu_calculate_agaw(struct intel_iommu *iommu)
37{
38 return 0;
39}
Fenghua Yu4ed0d3e2009-04-24 17:30:20 -0700[diff] [blame]40static inline int iommu_calculate_max_sagaw(struct intel_iommu *iommu)
41{
42 return 0;
43}
Suresh Siddha318fe7d2011-08-23 17:05:20 -0700[diff] [blame]44static inline void free_dmar_iommu(struct intel_iommu *iommu)
45{
46}
Suresh Siddhaf5d1b972011-08-23 17:05:22 -0700[diff] [blame]47#define dmar_disabled (1)
Eugeni Dodonov8bc1f852011-11-23 16:42:14 -0200[diff] [blame]48#define intel_iommu_enabled (0)
Ingo Molnarc66b9902009-01-04 10:55:02 +0100[diff] [blame]49#endif
Suresh Siddhae61d98d2008-07-10 11:16:35 -0700[diff] [blame]50
Suresh Siddha2ae21012008-07-10 11:16:43 -0700[diff] [blame]51
Suresh Siddhae61d98d2008-07-10 11:16:35 -0700[diff] [blame]52#endif