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Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001/*
2 * Copyright (C) 2005-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include <linux/clk.h>
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +01009#include <linux/delay.h>
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -070010#include <linux/dw_dmac.h>
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +010011#include <linux/fb.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070012#include <linux/init.h>
13#include <linux/platform_device.h>
David Brownell6b84bbf2007-06-22 19:17:57 -070014#include <linux/dma-mapping.h>
David Brownell3c26e172008-07-27 02:34:45 -070015#include <linux/gpio.h>
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +010016#include <linux/spi/spi.h>
Stelian Pop8d855312008-03-05 00:00:00 +010017#include <linux/usb/atmel_usba_udc.h>
Nicolas Ferre2635d1b2009-12-14 18:01:30 -080018
19#include <mach/atmel-mci.h>
Nicolas Ferrec42aa772008-11-20 15:59:12 +010020#include <linux/atmel-mci.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070021
22#include <asm/io.h>
Haavard Skinnemoene7ba1762007-10-10 14:58:29 +020023#include <asm/irq.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070024
Haavard Skinnemoen3663b732008-08-05 13:57:38 +020025#include <mach/at32ap700x.h>
26#include <mach/board.h>
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +020027#include <mach/hmatrix.h>
Haavard Skinnemoen3663b732008-08-05 13:57:38 +020028#include <mach/portmux.h>
29#include <mach/sram.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070030
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +010031#include <sound/atmel-abdac.h>
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +010032#include <sound/atmel-ac97c.h>
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +010033
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +010034#include <video/atmel_lcdc.h>
35
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070036#include "clock.h"
37#include "pio.h"
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +020038#include "pm.h"
39
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070040
41#define PBMEM(base) \
42 { \
43 .start = base, \
44 .end = base + 0x3ff, \
45 .flags = IORESOURCE_MEM, \
46 }
47#define IRQ(num) \
48 { \
49 .start = num, \
50 .end = num, \
51 .flags = IORESOURCE_IRQ, \
52 }
53#define NAMED_IRQ(num, _name) \
54 { \
55 .start = num, \
56 .end = num, \
57 .name = _name, \
58 .flags = IORESOURCE_IRQ, \
59 }
60
David Brownell6b84bbf2007-06-22 19:17:57 -070061/* REVISIT these assume *every* device supports DMA, but several
62 * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
63 */
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070064#define DEFINE_DEV(_name, _id) \
Yang Hongyang284901a2009-04-06 19:01:15 -070065static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070066static struct platform_device _name##_id##_device = { \
67 .name = #_name, \
68 .id = _id, \
69 .dev = { \
David Brownell6b84bbf2007-06-22 19:17:57 -070070 .dma_mask = &_name##_id##_dma_mask, \
Yang Hongyang284901a2009-04-06 19:01:15 -070071 .coherent_dma_mask = DMA_BIT_MASK(32), \
David Brownell6b84bbf2007-06-22 19:17:57 -070072 }, \
73 .resource = _name##_id##_resource, \
74 .num_resources = ARRAY_SIZE(_name##_id##_resource), \
75}
76#define DEFINE_DEV_DATA(_name, _id) \
Yang Hongyang284901a2009-04-06 19:01:15 -070077static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
David Brownell6b84bbf2007-06-22 19:17:57 -070078static struct platform_device _name##_id##_device = { \
79 .name = #_name, \
80 .id = _id, \
81 .dev = { \
82 .dma_mask = &_name##_id##_dma_mask, \
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070083 .platform_data = &_name##_id##_data, \
Yang Hongyang284901a2009-04-06 19:01:15 -070084 .coherent_dma_mask = DMA_BIT_MASK(32), \
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070085 }, \
86 .resource = _name##_id##_resource, \
87 .num_resources = ARRAY_SIZE(_name##_id##_resource), \
88}
89
Julien Maycaf18f12008-09-24 10:30:47 +020090#define select_peripheral(port, pin_mask, periph, flags) \
91 at32_select_periph(GPIO_##port##_BASE, pin_mask, \
92 GPIO_##periph, flags)
Haavard Skinnemoenc3e2a792006-12-04 13:46:52 +010093
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070094#define DEV_CLK(_name, devname, bus, _index) \
95static struct clk devname##_##_name = { \
96 .name = #_name, \
97 .dev = &devname##_device.dev, \
98 .parent = &bus##_clk, \
99 .mode = bus##_clk_mode, \
100 .get_rate = bus##_clk_get_rate, \
101 .index = _index, \
102}
103
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200104static DEFINE_SPINLOCK(pm_lock);
105
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100106static struct clk osc0;
107static struct clk osc1;
108
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700109static unsigned long osc_get_rate(struct clk *clk)
110{
Alex60ed7952008-03-17 14:55:06 +0100111 return at32_board_osc_rates[clk->index];
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700112}
113
114static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
115{
116 unsigned long div, mul, rate;
117
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200118 div = PM_BFEXT(PLLDIV, control) + 1;
119 mul = PM_BFEXT(PLLMUL, control) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700120
121 rate = clk->parent->get_rate(clk->parent);
122 rate = (rate + div / 2) / div;
123 rate *= mul;
124
125 return rate;
126}
127
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100128static long pll_set_rate(struct clk *clk, unsigned long rate,
129 u32 *pll_ctrl)
130{
131 unsigned long mul;
132 unsigned long mul_best_fit = 0;
133 unsigned long div;
134 unsigned long div_min;
135 unsigned long div_max;
136 unsigned long div_best_fit = 0;
137 unsigned long base;
138 unsigned long pll_in;
139 unsigned long actual = 0;
140 unsigned long rate_error;
141 unsigned long rate_error_prev = ~0UL;
142 u32 ctrl;
143
144 /* Rate must be between 80 MHz and 200 Mhz. */
145 if (rate < 80000000UL || rate > 200000000UL)
146 return -EINVAL;
147
148 ctrl = PM_BF(PLLOPT, 4);
149 base = clk->parent->get_rate(clk->parent);
150
151 /* PLL input frequency must be between 6 MHz and 32 MHz. */
152 div_min = DIV_ROUND_UP(base, 32000000UL);
153 div_max = base / 6000000UL;
154
155 if (div_max < div_min)
156 return -EINVAL;
157
158 for (div = div_min; div <= div_max; div++) {
159 pll_in = (base + div / 2) / div;
160 mul = (rate + pll_in / 2) / pll_in;
161
162 if (mul == 0)
163 continue;
164
165 actual = pll_in * mul;
166 rate_error = abs(actual - rate);
167
168 if (rate_error < rate_error_prev) {
169 mul_best_fit = mul;
170 div_best_fit = div;
171 rate_error_prev = rate_error;
172 }
173
174 if (rate_error == 0)
175 break;
176 }
177
178 if (div_best_fit == 0)
179 return -EINVAL;
180
181 ctrl |= PM_BF(PLLMUL, mul_best_fit - 1);
182 ctrl |= PM_BF(PLLDIV, div_best_fit - 1);
183 ctrl |= PM_BF(PLLCOUNT, 16);
184
185 if (clk->parent == &osc1)
186 ctrl |= PM_BIT(PLLOSC);
187
188 *pll_ctrl = ctrl;
189
190 return actual;
191}
192
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700193static unsigned long pll0_get_rate(struct clk *clk)
194{
195 u32 control;
196
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200197 control = pm_readl(PLL0);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700198
199 return pll_get_rate(clk, control);
200}
201
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100202static void pll1_mode(struct clk *clk, int enabled)
203{
204 unsigned long timeout;
205 u32 status;
206 u32 ctrl;
207
208 ctrl = pm_readl(PLL1);
209
210 if (enabled) {
211 if (!PM_BFEXT(PLLMUL, ctrl) && !PM_BFEXT(PLLDIV, ctrl)) {
212 pr_debug("clk %s: failed to enable, rate not set\n",
213 clk->name);
214 return;
215 }
216
217 ctrl |= PM_BIT(PLLEN);
218 pm_writel(PLL1, ctrl);
219
220 /* Wait for PLL lock. */
221 for (timeout = 10000; timeout; timeout--) {
222 status = pm_readl(ISR);
223 if (status & PM_BIT(LOCK1))
224 break;
225 udelay(10);
226 }
227
228 if (!(status & PM_BIT(LOCK1)))
229 printk(KERN_ERR "clk %s: timeout waiting for lock\n",
230 clk->name);
231 } else {
232 ctrl &= ~PM_BIT(PLLEN);
233 pm_writel(PLL1, ctrl);
234 }
235}
236
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700237static unsigned long pll1_get_rate(struct clk *clk)
238{
239 u32 control;
240
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200241 control = pm_readl(PLL1);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700242
243 return pll_get_rate(clk, control);
244}
245
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100246static long pll1_set_rate(struct clk *clk, unsigned long rate, int apply)
247{
248 u32 ctrl = 0;
249 unsigned long actual_rate;
250
251 actual_rate = pll_set_rate(clk, rate, &ctrl);
252
253 if (apply) {
254 if (actual_rate != rate)
255 return -EINVAL;
256 if (clk->users > 0)
257 return -EBUSY;
258 pr_debug(KERN_INFO "clk %s: new rate %lu (actual rate %lu)\n",
259 clk->name, rate, actual_rate);
260 pm_writel(PLL1, ctrl);
261 }
262
263 return actual_rate;
264}
265
266static int pll1_set_parent(struct clk *clk, struct clk *parent)
267{
268 u32 ctrl;
269
270 if (clk->users > 0)
271 return -EBUSY;
272
273 ctrl = pm_readl(PLL1);
274 WARN_ON(ctrl & PM_BIT(PLLEN));
275
276 if (parent == &osc0)
277 ctrl &= ~PM_BIT(PLLOSC);
278 else if (parent == &osc1)
279 ctrl |= PM_BIT(PLLOSC);
280 else
281 return -EINVAL;
282
283 pm_writel(PLL1, ctrl);
284 clk->parent = parent;
285
286 return 0;
287}
288
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700289/*
290 * The AT32AP7000 has five primary clock sources: One 32kHz
291 * oscillator, two crystal oscillators and two PLLs.
292 */
293static struct clk osc32k = {
294 .name = "osc32k",
295 .get_rate = osc_get_rate,
296 .users = 1,
297 .index = 0,
298};
299static struct clk osc0 = {
300 .name = "osc0",
301 .get_rate = osc_get_rate,
302 .users = 1,
303 .index = 1,
304};
305static struct clk osc1 = {
306 .name = "osc1",
307 .get_rate = osc_get_rate,
308 .index = 2,
309};
310static struct clk pll0 = {
311 .name = "pll0",
312 .get_rate = pll0_get_rate,
313 .parent = &osc0,
314};
315static struct clk pll1 = {
316 .name = "pll1",
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100317 .mode = pll1_mode,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700318 .get_rate = pll1_get_rate,
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100319 .set_rate = pll1_set_rate,
320 .set_parent = pll1_set_parent,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700321 .parent = &osc0,
322};
323
324/*
325 * The main clock can be either osc0 or pll0. The boot loader may
326 * have chosen one for us, so we don't really know which one until we
327 * have a look at the SM.
328 */
329static struct clk *main_clock;
330
331/*
332 * Synchronous clocks are generated from the main clock. The clocks
333 * must satisfy the constraint
334 * fCPU >= fHSB >= fPB
335 * i.e. each clock must not be faster than its parent.
336 */
337static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
338{
339 return main_clock->get_rate(main_clock) >> shift;
340};
341
342static void cpu_clk_mode(struct clk *clk, int enabled)
343{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700344 unsigned long flags;
345 u32 mask;
346
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200347 spin_lock_irqsave(&pm_lock, flags);
348 mask = pm_readl(CPU_MASK);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700349 if (enabled)
350 mask |= 1 << clk->index;
351 else
352 mask &= ~(1 << clk->index);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200353 pm_writel(CPU_MASK, mask);
354 spin_unlock_irqrestore(&pm_lock, flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700355}
356
357static unsigned long cpu_clk_get_rate(struct clk *clk)
358{
359 unsigned long cksel, shift = 0;
360
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200361 cksel = pm_readl(CKSEL);
362 if (cksel & PM_BIT(CPUDIV))
363 shift = PM_BFEXT(CPUSEL, cksel) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700364
365 return bus_clk_get_rate(clk, shift);
366}
367
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +0200368static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
369{
370 u32 control;
371 unsigned long parent_rate, child_div, actual_rate, div;
372
373 parent_rate = clk->parent->get_rate(clk->parent);
374 control = pm_readl(CKSEL);
375
376 if (control & PM_BIT(HSBDIV))
377 child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
378 else
379 child_div = 1;
380
381 if (rate > 3 * (parent_rate / 4) || child_div == 1) {
382 actual_rate = parent_rate;
383 control &= ~PM_BIT(CPUDIV);
384 } else {
385 unsigned int cpusel;
386 div = (parent_rate + rate / 2) / rate;
387 if (div > child_div)
388 div = child_div;
389 cpusel = (div > 1) ? (fls(div) - 2) : 0;
390 control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
391 actual_rate = parent_rate / (1 << (cpusel + 1));
392 }
393
394 pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
395 clk->name, rate, actual_rate);
396
397 if (apply)
398 pm_writel(CKSEL, control);
399
400 return actual_rate;
401}
402
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700403static void hsb_clk_mode(struct clk *clk, int enabled)
404{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700405 unsigned long flags;
406 u32 mask;
407
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200408 spin_lock_irqsave(&pm_lock, flags);
409 mask = pm_readl(HSB_MASK);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700410 if (enabled)
411 mask |= 1 << clk->index;
412 else
413 mask &= ~(1 << clk->index);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200414 pm_writel(HSB_MASK, mask);
415 spin_unlock_irqrestore(&pm_lock, flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700416}
417
418static unsigned long hsb_clk_get_rate(struct clk *clk)
419{
420 unsigned long cksel, shift = 0;
421
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200422 cksel = pm_readl(CKSEL);
423 if (cksel & PM_BIT(HSBDIV))
424 shift = PM_BFEXT(HSBSEL, cksel) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700425
426 return bus_clk_get_rate(clk, shift);
427}
428
Alex Raimondidd5e1332008-12-09 16:17:13 +0100429void pba_clk_mode(struct clk *clk, int enabled)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700430{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700431 unsigned long flags;
432 u32 mask;
433
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200434 spin_lock_irqsave(&pm_lock, flags);
435 mask = pm_readl(PBA_MASK);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700436 if (enabled)
437 mask |= 1 << clk->index;
438 else
439 mask &= ~(1 << clk->index);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200440 pm_writel(PBA_MASK, mask);
441 spin_unlock_irqrestore(&pm_lock, flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700442}
443
Alex Raimondidd5e1332008-12-09 16:17:13 +0100444unsigned long pba_clk_get_rate(struct clk *clk)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700445{
446 unsigned long cksel, shift = 0;
447
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200448 cksel = pm_readl(CKSEL);
449 if (cksel & PM_BIT(PBADIV))
450 shift = PM_BFEXT(PBASEL, cksel) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700451
452 return bus_clk_get_rate(clk, shift);
453}
454
455static void pbb_clk_mode(struct clk *clk, int enabled)
456{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700457 unsigned long flags;
458 u32 mask;
459
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200460 spin_lock_irqsave(&pm_lock, flags);
461 mask = pm_readl(PBB_MASK);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700462 if (enabled)
463 mask |= 1 << clk->index;
464 else
465 mask &= ~(1 << clk->index);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200466 pm_writel(PBB_MASK, mask);
467 spin_unlock_irqrestore(&pm_lock, flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700468}
469
470static unsigned long pbb_clk_get_rate(struct clk *clk)
471{
472 unsigned long cksel, shift = 0;
473
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200474 cksel = pm_readl(CKSEL);
475 if (cksel & PM_BIT(PBBDIV))
476 shift = PM_BFEXT(PBBSEL, cksel) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700477
478 return bus_clk_get_rate(clk, shift);
479}
480
481static struct clk cpu_clk = {
482 .name = "cpu",
483 .get_rate = cpu_clk_get_rate,
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +0200484 .set_rate = cpu_clk_set_rate,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700485 .users = 1,
486};
487static struct clk hsb_clk = {
488 .name = "hsb",
489 .parent = &cpu_clk,
490 .get_rate = hsb_clk_get_rate,
491};
492static struct clk pba_clk = {
493 .name = "pba",
494 .parent = &hsb_clk,
495 .mode = hsb_clk_mode,
496 .get_rate = pba_clk_get_rate,
497 .index = 1,
498};
499static struct clk pbb_clk = {
500 .name = "pbb",
501 .parent = &hsb_clk,
502 .mode = hsb_clk_mode,
503 .get_rate = pbb_clk_get_rate,
504 .users = 1,
505 .index = 2,
506};
507
508/* --------------------------------------------------------------------
509 * Generic Clock operations
510 * -------------------------------------------------------------------- */
511
512static void genclk_mode(struct clk *clk, int enabled)
513{
514 u32 control;
515
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200516 control = pm_readl(GCCTRL(clk->index));
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700517 if (enabled)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200518 control |= PM_BIT(CEN);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700519 else
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200520 control &= ~PM_BIT(CEN);
521 pm_writel(GCCTRL(clk->index), control);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700522}
523
524static unsigned long genclk_get_rate(struct clk *clk)
525{
526 u32 control;
527 unsigned long div = 1;
528
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200529 control = pm_readl(GCCTRL(clk->index));
530 if (control & PM_BIT(DIVEN))
531 div = 2 * (PM_BFEXT(DIV, control) + 1);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700532
533 return clk->parent->get_rate(clk->parent) / div;
534}
535
536static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
537{
538 u32 control;
539 unsigned long parent_rate, actual_rate, div;
540
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700541 parent_rate = clk->parent->get_rate(clk->parent);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200542 control = pm_readl(GCCTRL(clk->index));
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700543
544 if (rate > 3 * parent_rate / 4) {
545 actual_rate = parent_rate;
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200546 control &= ~PM_BIT(DIVEN);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700547 } else {
548 div = (parent_rate + rate) / (2 * rate) - 1;
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200549 control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700550 actual_rate = parent_rate / (2 * (div + 1));
551 }
552
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200553 dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
554 clk->name, rate, actual_rate);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700555
556 if (apply)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200557 pm_writel(GCCTRL(clk->index), control);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700558
559 return actual_rate;
560}
561
562int genclk_set_parent(struct clk *clk, struct clk *parent)
563{
564 u32 control;
565
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200566 dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
567 clk->name, parent->name, clk->parent->name);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700568
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200569 control = pm_readl(GCCTRL(clk->index));
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700570
571 if (parent == &osc1 || parent == &pll1)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200572 control |= PM_BIT(OSCSEL);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700573 else if (parent == &osc0 || parent == &pll0)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200574 control &= ~PM_BIT(OSCSEL);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700575 else
576 return -EINVAL;
577
578 if (parent == &pll0 || parent == &pll1)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200579 control |= PM_BIT(PLLSEL);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700580 else
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200581 control &= ~PM_BIT(PLLSEL);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700582
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200583 pm_writel(GCCTRL(clk->index), control);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700584 clk->parent = parent;
585
586 return 0;
587}
588
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +0100589static void __init genclk_init_parent(struct clk *clk)
590{
591 u32 control;
592 struct clk *parent;
593
594 BUG_ON(clk->index > 7);
595
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200596 control = pm_readl(GCCTRL(clk->index));
597 if (control & PM_BIT(OSCSEL))
598 parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +0100599 else
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200600 parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +0100601
602 clk->parent = parent;
603}
604
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -0700605static struct dw_dma_platform_data dw_dmac0_data = {
606 .nr_channels = 3,
607};
608
609static struct resource dw_dmac0_resource[] = {
610 PBMEM(0xff200000),
611 IRQ(2),
612};
613DEFINE_DEV_DATA(dw_dmac, 0);
614DEV_CLK(hclk, dw_dmac0, hsb, 10);
615
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700616/* --------------------------------------------------------------------
617 * System peripherals
618 * -------------------------------------------------------------------- */
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200619static struct resource at32_pm0_resource[] = {
620 {
621 .start = 0xfff00000,
622 .end = 0xfff0007f,
623 .flags = IORESOURCE_MEM,
624 },
625 IRQ(20),
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700626};
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200627
628static struct resource at32ap700x_rtc0_resource[] = {
629 {
630 .start = 0xfff00080,
631 .end = 0xfff000af,
632 .flags = IORESOURCE_MEM,
633 },
634 IRQ(21),
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700635};
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200636
637static struct resource at32_wdt0_resource[] = {
638 {
639 .start = 0xfff000b0,
Hans-Christian Egtvedt9797bed2007-10-30 14:29:50 +0100640 .end = 0xfff000cf,
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200641 .flags = IORESOURCE_MEM,
642 },
643};
644
645static struct resource at32_eic0_resource[] = {
646 {
647 .start = 0xfff00100,
648 .end = 0xfff0013f,
649 .flags = IORESOURCE_MEM,
650 },
651 IRQ(19),
652};
653
654DEFINE_DEV(at32_pm, 0);
655DEFINE_DEV(at32ap700x_rtc, 0);
656DEFINE_DEV(at32_wdt, 0);
657DEFINE_DEV(at32_eic, 0);
658
659/*
660 * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
661 * is always running.
662 */
663static struct clk at32_pm_pclk = {
Haavard Skinnemoen188ff652007-03-14 13:23:44 +0100664 .name = "pclk",
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200665 .dev = &at32_pm0_device.dev,
Haavard Skinnemoen188ff652007-03-14 13:23:44 +0100666 .parent = &pbb_clk,
667 .mode = pbb_clk_mode,
668 .get_rate = pbb_clk_get_rate,
669 .users = 1,
670 .index = 0,
671};
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700672
673static struct resource intc0_resource[] = {
674 PBMEM(0xfff00400),
675};
676struct platform_device at32_intc0_device = {
677 .name = "intc",
678 .id = 0,
679 .resource = intc0_resource,
680 .num_resources = ARRAY_SIZE(intc0_resource),
681};
682DEV_CLK(pclk, at32_intc0, pbb, 1);
683
684static struct clk ebi_clk = {
685 .name = "ebi",
686 .parent = &hsb_clk,
687 .mode = hsb_clk_mode,
688 .get_rate = hsb_clk_get_rate,
689 .users = 1,
690};
691static struct clk hramc_clk = {
692 .name = "hramc",
693 .parent = &hsb_clk,
694 .mode = hsb_clk_mode,
695 .get_rate = hsb_clk_get_rate,
696 .users = 1,
Haavard Skinnemoen188ff652007-03-14 13:23:44 +0100697 .index = 3,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700698};
Haavard Skinnemoen7951f182008-03-05 15:08:27 +0100699static struct clk sdramc_clk = {
700 .name = "sdramc_clk",
701 .parent = &pbb_clk,
702 .mode = pbb_clk_mode,
703 .get_rate = pbb_clk_get_rate,
704 .users = 1,
705 .index = 14,
706};
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700707
Haavard Skinnemoenbc157b72006-09-25 23:32:16 -0700708static struct resource smc0_resource[] = {
709 PBMEM(0xfff03400),
710};
711DEFINE_DEV(smc, 0);
712DEV_CLK(pclk, smc0, pbb, 13);
713DEV_CLK(mck, smc0, hsb, 0);
714
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700715static struct platform_device pdc_device = {
716 .name = "pdc",
717 .id = 0,
718};
719DEV_CLK(hclk, pdc, hsb, 4);
720DEV_CLK(pclk, pdc, pba, 16);
721
722static struct clk pico_clk = {
723 .name = "pico",
724 .parent = &cpu_clk,
725 .mode = cpu_clk_mode,
726 .get_rate = cpu_clk_get_rate,
727 .users = 1,
728};
729
730/* --------------------------------------------------------------------
Haavard Skinnemoen9c8f8e72007-02-01 16:34:10 +0100731 * HMATRIX
732 * -------------------------------------------------------------------- */
733
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +0200734struct clk at32_hmatrix_clk = {
Haavard Skinnemoen9c8f8e72007-02-01 16:34:10 +0100735 .name = "hmatrix_clk",
736 .parent = &pbb_clk,
737 .mode = pbb_clk_mode,
738 .get_rate = pbb_clk_get_rate,
739 .index = 2,
740 .users = 1,
741};
Haavard Skinnemoen9c8f8e72007-02-01 16:34:10 +0100742
743/*
744 * Set bits in the HMATRIX Special Function Register (SFR) used by the
745 * External Bus Interface (EBI). This can be used to enable special
746 * features like CompactFlash support, NAND Flash support, etc. on
747 * certain chipselects.
748 */
749static inline void set_ebi_sfr_bits(u32 mask)
750{
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +0200751 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, mask);
Haavard Skinnemoen9c8f8e72007-02-01 16:34:10 +0100752}
753
754/* --------------------------------------------------------------------
David Brownelle723ff62008-02-14 11:24:02 -0800755 * Timer/Counter (TC)
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100756 * -------------------------------------------------------------------- */
David Brownelle723ff62008-02-14 11:24:02 -0800757
758static struct resource at32_tcb0_resource[] = {
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100759 PBMEM(0xfff00c00),
760 IRQ(22),
761};
David Brownelle723ff62008-02-14 11:24:02 -0800762static struct platform_device at32_tcb0_device = {
763 .name = "atmel_tcb",
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100764 .id = 0,
David Brownelle723ff62008-02-14 11:24:02 -0800765 .resource = at32_tcb0_resource,
766 .num_resources = ARRAY_SIZE(at32_tcb0_resource),
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100767};
David Brownelle723ff62008-02-14 11:24:02 -0800768DEV_CLK(t0_clk, at32_tcb0, pbb, 3);
769
770static struct resource at32_tcb1_resource[] = {
771 PBMEM(0xfff01000),
772 IRQ(23),
773};
774static struct platform_device at32_tcb1_device = {
775 .name = "atmel_tcb",
776 .id = 1,
777 .resource = at32_tcb1_resource,
778 .num_resources = ARRAY_SIZE(at32_tcb1_resource),
779};
780DEV_CLK(t0_clk, at32_tcb1, pbb, 4);
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100781
782/* --------------------------------------------------------------------
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700783 * PIO
784 * -------------------------------------------------------------------- */
785
786static struct resource pio0_resource[] = {
787 PBMEM(0xffe02800),
788 IRQ(13),
789};
790DEFINE_DEV(pio, 0);
791DEV_CLK(mck, pio0, pba, 10);
792
793static struct resource pio1_resource[] = {
794 PBMEM(0xffe02c00),
795 IRQ(14),
796};
797DEFINE_DEV(pio, 1);
798DEV_CLK(mck, pio1, pba, 11);
799
800static struct resource pio2_resource[] = {
801 PBMEM(0xffe03000),
802 IRQ(15),
803};
804DEFINE_DEV(pio, 2);
805DEV_CLK(mck, pio2, pba, 12);
806
807static struct resource pio3_resource[] = {
808 PBMEM(0xffe03400),
809 IRQ(16),
810};
811DEFINE_DEV(pio, 3);
812DEV_CLK(mck, pio3, pba, 13);
813
Haavard Skinnemoen7f9f4672007-01-30 11:16:16 +0100814static struct resource pio4_resource[] = {
815 PBMEM(0xffe03800),
816 IRQ(17),
817};
818DEFINE_DEV(pio, 4);
819DEV_CLK(mck, pio4, pba, 14);
820
Haavard Skinnemoene82c6102008-10-23 14:42:19 +0200821static int __init system_device_init(void)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700822{
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200823 platform_device_register(&at32_pm0_device);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700824 platform_device_register(&at32_intc0_device);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200825 platform_device_register(&at32ap700x_rtc0_device);
826 platform_device_register(&at32_wdt0_device);
827 platform_device_register(&at32_eic0_device);
Haavard Skinnemoenbc157b72006-09-25 23:32:16 -0700828 platform_device_register(&smc0_device);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700829 platform_device_register(&pdc_device);
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -0700830 platform_device_register(&dw_dmac0_device);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700831
David Brownelle723ff62008-02-14 11:24:02 -0800832 platform_device_register(&at32_tcb0_device);
833 platform_device_register(&at32_tcb1_device);
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100834
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700835 platform_device_register(&pio0_device);
836 platform_device_register(&pio1_device);
837 platform_device_register(&pio2_device);
838 platform_device_register(&pio3_device);
Haavard Skinnemoen7f9f4672007-01-30 11:16:16 +0100839 platform_device_register(&pio4_device);
Haavard Skinnemoene82c6102008-10-23 14:42:19 +0200840
841 return 0;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700842}
Haavard Skinnemoene82c6102008-10-23 14:42:19 +0200843core_initcall(system_device_init);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700844
845/* --------------------------------------------------------------------
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100846 * PSIF
847 * -------------------------------------------------------------------- */
848static struct resource atmel_psif0_resource[] __initdata = {
849 {
850 .start = 0xffe03c00,
851 .end = 0xffe03cff,
852 .flags = IORESOURCE_MEM,
853 },
854 IRQ(18),
855};
856static struct clk atmel_psif0_pclk = {
857 .name = "pclk",
858 .parent = &pba_clk,
859 .mode = pba_clk_mode,
860 .get_rate = pba_clk_get_rate,
861 .index = 15,
862};
863
864static struct resource atmel_psif1_resource[] __initdata = {
865 {
866 .start = 0xffe03d00,
867 .end = 0xffe03dff,
868 .flags = IORESOURCE_MEM,
869 },
870 IRQ(18),
871};
872static struct clk atmel_psif1_pclk = {
873 .name = "pclk",
874 .parent = &pba_clk,
875 .mode = pba_clk_mode,
876 .get_rate = pba_clk_get_rate,
877 .index = 15,
878};
879
880struct platform_device *__init at32_add_device_psif(unsigned int id)
881{
882 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +0200883 u32 pin_mask;
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100884
885 if (!(id == 0 || id == 1))
886 return NULL;
887
888 pdev = platform_device_alloc("atmel_psif", id);
889 if (!pdev)
890 return NULL;
891
892 switch (id) {
893 case 0:
Julien Maycaf18f12008-09-24 10:30:47 +0200894 pin_mask = (1 << 8) | (1 << 9); /* CLOCK & DATA */
895
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100896 if (platform_device_add_resources(pdev, atmel_psif0_resource,
897 ARRAY_SIZE(atmel_psif0_resource)))
898 goto err_add_resources;
899 atmel_psif0_pclk.dev = &pdev->dev;
Julien Maycaf18f12008-09-24 10:30:47 +0200900 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100901 break;
902 case 1:
Julien Maycaf18f12008-09-24 10:30:47 +0200903 pin_mask = (1 << 11) | (1 << 12); /* CLOCK & DATA */
904
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100905 if (platform_device_add_resources(pdev, atmel_psif1_resource,
906 ARRAY_SIZE(atmel_psif1_resource)))
907 goto err_add_resources;
908 atmel_psif1_pclk.dev = &pdev->dev;
Julien Maycaf18f12008-09-24 10:30:47 +0200909 select_peripheral(PIOB, pin_mask, PERIPH_A, 0);
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100910 break;
911 default:
912 return NULL;
913 }
914
915 platform_device_add(pdev);
916 return pdev;
917
918err_add_resources:
919 platform_device_put(pdev);
920 return NULL;
921}
922
923/* --------------------------------------------------------------------
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700924 * USART
925 * -------------------------------------------------------------------- */
926
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200927static struct atmel_uart_data atmel_usart0_data = {
928 .use_dma_tx = 1,
929 .use_dma_rx = 1,
930};
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200931static struct resource atmel_usart0_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700932 PBMEM(0xffe00c00),
David Brownella3d912c2007-01-23 20:14:02 -0800933 IRQ(6),
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700934};
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200935DEFINE_DEV_DATA(atmel_usart, 0);
ben.nizette@iinet.net.au80f76c52007-11-07 16:16:22 +0900936DEV_CLK(usart, atmel_usart0, pba, 3);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700937
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200938static struct atmel_uart_data atmel_usart1_data = {
939 .use_dma_tx = 1,
940 .use_dma_rx = 1,
941};
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200942static struct resource atmel_usart1_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700943 PBMEM(0xffe01000),
944 IRQ(7),
945};
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200946DEFINE_DEV_DATA(atmel_usart, 1);
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200947DEV_CLK(usart, atmel_usart1, pba, 4);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700948
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200949static struct atmel_uart_data atmel_usart2_data = {
950 .use_dma_tx = 1,
951 .use_dma_rx = 1,
952};
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200953static struct resource atmel_usart2_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700954 PBMEM(0xffe01400),
955 IRQ(8),
956};
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200957DEFINE_DEV_DATA(atmel_usart, 2);
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200958DEV_CLK(usart, atmel_usart2, pba, 5);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700959
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200960static struct atmel_uart_data atmel_usart3_data = {
961 .use_dma_tx = 1,
962 .use_dma_rx = 1,
963};
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200964static struct resource atmel_usart3_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700965 PBMEM(0xffe01800),
966 IRQ(9),
967};
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200968DEFINE_DEV_DATA(atmel_usart, 3);
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200969DEV_CLK(usart, atmel_usart3, pba, 6);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700970
Peter Mabf4861c2009-03-31 10:31:02 -0700971static inline void configure_usart0_pins(int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700972{
Julien Maycaf18f12008-09-24 10:30:47 +0200973 u32 pin_mask = (1 << 8) | (1 << 9); /* RXD & TXD */
Peter Mabf4861c2009-03-31 10:31:02 -0700974 if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 6);
975 if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 7);
976 if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 10);
Julien Maycaf18f12008-09-24 10:30:47 +0200977
Anders Blomdell10546262008-10-24 14:54:08 +0200978 select_peripheral(PIOA, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700979}
980
Peter Mabf4861c2009-03-31 10:31:02 -0700981static inline void configure_usart1_pins(int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700982{
Julien Maycaf18f12008-09-24 10:30:47 +0200983 u32 pin_mask = (1 << 17) | (1 << 18); /* RXD & TXD */
Peter Mabf4861c2009-03-31 10:31:02 -0700984 if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 19);
985 if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 20);
986 if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 16);
Julien Maycaf18f12008-09-24 10:30:47 +0200987
Anders Blomdell10546262008-10-24 14:54:08 +0200988 select_peripheral(PIOA, pin_mask, PERIPH_A, AT32_GPIOF_PULLUP);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700989}
990
Peter Mabf4861c2009-03-31 10:31:02 -0700991static inline void configure_usart2_pins(int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700992{
Julien Maycaf18f12008-09-24 10:30:47 +0200993 u32 pin_mask = (1 << 26) | (1 << 27); /* RXD & TXD */
Peter Mabf4861c2009-03-31 10:31:02 -0700994 if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 30);
995 if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 29);
996 if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 28);
Julien Maycaf18f12008-09-24 10:30:47 +0200997
Anders Blomdell10546262008-10-24 14:54:08 +0200998 select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700999}
1000
Peter Mabf4861c2009-03-31 10:31:02 -07001001static inline void configure_usart3_pins(int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001002{
Julien Maycaf18f12008-09-24 10:30:47 +02001003 u32 pin_mask = (1 << 18) | (1 << 17); /* RXD & TXD */
Peter Mabf4861c2009-03-31 10:31:02 -07001004 if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 16);
1005 if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 15);
1006 if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 19);
Julien Maycaf18f12008-09-24 10:30:47 +02001007
Anders Blomdell10546262008-10-24 14:54:08 +02001008 select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001009}
1010
David Brownella3d912c2007-01-23 20:14:02 -08001011static struct platform_device *__initdata at32_usarts[4];
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001012
Peter Mabf4861c2009-03-31 10:31:02 -07001013void __init at32_map_usart(unsigned int hw_id, unsigned int line, int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001014{
1015 struct platform_device *pdev;
1016
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001017 switch (hw_id) {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001018 case 0:
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02001019 pdev = &atmel_usart0_device;
Peter Mabf4861c2009-03-31 10:31:02 -07001020 configure_usart0_pins(flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001021 break;
1022 case 1:
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02001023 pdev = &atmel_usart1_device;
Peter Mabf4861c2009-03-31 10:31:02 -07001024 configure_usart1_pins(flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001025 break;
1026 case 2:
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02001027 pdev = &atmel_usart2_device;
Peter Mabf4861c2009-03-31 10:31:02 -07001028 configure_usart2_pins(flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001029 break;
1030 case 3:
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02001031 pdev = &atmel_usart3_device;
Peter Mabf4861c2009-03-31 10:31:02 -07001032 configure_usart3_pins(flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001033 break;
1034 default:
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001035 return;
Haavard Skinnemoen75d35212006-10-04 16:02:08 +02001036 }
1037
1038 if (PXSEG(pdev->resource[0].start) == P4SEG) {
1039 /* Addresses in the P4 segment are permanently mapped 1:1 */
1040 struct atmel_uart_data *data = pdev->dev.platform_data;
1041 data->regs = (void __iomem *)pdev->resource[0].start;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001042 }
1043
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001044 pdev->id = line;
1045 at32_usarts[line] = pdev;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001046}
1047
1048struct platform_device *__init at32_add_device_usart(unsigned int id)
1049{
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001050 platform_device_register(at32_usarts[id]);
1051 return at32_usarts[id];
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001052}
1053
Haavard Skinnemoen73e27982006-10-04 16:02:04 +02001054struct platform_device *atmel_default_console_device;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001055
1056void __init at32_setup_serial_console(unsigned int usart_id)
1057{
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001058 atmel_default_console_device = at32_usarts[usart_id];
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001059}
1060
1061/* --------------------------------------------------------------------
1062 * Ethernet
1063 * -------------------------------------------------------------------- */
1064
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001065#ifdef CONFIG_CPU_AT32AP7000
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001066static struct eth_platform_data macb0_data;
1067static struct resource macb0_resource[] = {
1068 PBMEM(0xfff01800),
1069 IRQ(25),
1070};
1071DEFINE_DEV_DATA(macb, 0);
1072DEV_CLK(hclk, macb0, hsb, 8);
1073DEV_CLK(pclk, macb0, pbb, 6);
1074
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01001075static struct eth_platform_data macb1_data;
1076static struct resource macb1_resource[] = {
1077 PBMEM(0xfff01c00),
1078 IRQ(26),
1079};
1080DEFINE_DEV_DATA(macb, 1);
1081DEV_CLK(hclk, macb1, hsb, 9);
1082DEV_CLK(pclk, macb1, pbb, 7);
1083
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001084struct platform_device *__init
1085at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
1086{
1087 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001088 u32 pin_mask;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001089
1090 switch (id) {
1091 case 0:
1092 pdev = &macb0_device;
1093
Julien Maycaf18f12008-09-24 10:30:47 +02001094 pin_mask = (1 << 3); /* TXD0 */
1095 pin_mask |= (1 << 4); /* TXD1 */
1096 pin_mask |= (1 << 7); /* TXEN */
1097 pin_mask |= (1 << 8); /* TXCK */
1098 pin_mask |= (1 << 9); /* RXD0 */
1099 pin_mask |= (1 << 10); /* RXD1 */
1100 pin_mask |= (1 << 13); /* RXER */
1101 pin_mask |= (1 << 15); /* RXDV */
1102 pin_mask |= (1 << 16); /* MDC */
1103 pin_mask |= (1 << 17); /* MDIO */
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001104
1105 if (!data->is_rmii) {
Julien Maycaf18f12008-09-24 10:30:47 +02001106 pin_mask |= (1 << 0); /* COL */
1107 pin_mask |= (1 << 1); /* CRS */
1108 pin_mask |= (1 << 2); /* TXER */
1109 pin_mask |= (1 << 5); /* TXD2 */
1110 pin_mask |= (1 << 6); /* TXD3 */
1111 pin_mask |= (1 << 11); /* RXD2 */
1112 pin_mask |= (1 << 12); /* RXD3 */
1113 pin_mask |= (1 << 14); /* RXCK */
Mark Jackson198f2932008-10-13 10:46:27 +00001114#ifndef CONFIG_BOARD_MIMC200
Julien Maycaf18f12008-09-24 10:30:47 +02001115 pin_mask |= (1 << 18); /* SPD */
Mark Jackson198f2932008-10-13 10:46:27 +00001116#endif
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001117 }
Julien Maycaf18f12008-09-24 10:30:47 +02001118
1119 select_peripheral(PIOC, pin_mask, PERIPH_A, 0);
1120
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001121 break;
1122
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01001123 case 1:
1124 pdev = &macb1_device;
1125
Julien Maycaf18f12008-09-24 10:30:47 +02001126 pin_mask = (1 << 13); /* TXD0 */
1127 pin_mask |= (1 << 14); /* TXD1 */
1128 pin_mask |= (1 << 11); /* TXEN */
1129 pin_mask |= (1 << 12); /* TXCK */
1130 pin_mask |= (1 << 10); /* RXD0 */
1131 pin_mask |= (1 << 6); /* RXD1 */
1132 pin_mask |= (1 << 5); /* RXER */
1133 pin_mask |= (1 << 4); /* RXDV */
1134 pin_mask |= (1 << 3); /* MDC */
1135 pin_mask |= (1 << 2); /* MDIO */
1136
Mark Jackson198f2932008-10-13 10:46:27 +00001137#ifndef CONFIG_BOARD_MIMC200
Julien Maycaf18f12008-09-24 10:30:47 +02001138 if (!data->is_rmii)
1139 pin_mask |= (1 << 15); /* SPD */
Mark Jackson198f2932008-10-13 10:46:27 +00001140#endif
Julien Maycaf18f12008-09-24 10:30:47 +02001141
1142 select_peripheral(PIOD, pin_mask, PERIPH_B, 0);
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01001143
1144 if (!data->is_rmii) {
Julien Maycaf18f12008-09-24 10:30:47 +02001145 pin_mask = (1 << 19); /* COL */
1146 pin_mask |= (1 << 23); /* CRS */
1147 pin_mask |= (1 << 26); /* TXER */
1148 pin_mask |= (1 << 27); /* TXD2 */
1149 pin_mask |= (1 << 28); /* TXD3 */
1150 pin_mask |= (1 << 29); /* RXD2 */
1151 pin_mask |= (1 << 30); /* RXD3 */
1152 pin_mask |= (1 << 24); /* RXCK */
1153
1154 select_peripheral(PIOC, pin_mask, PERIPH_B, 0);
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01001155 }
1156 break;
1157
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001158 default:
1159 return NULL;
1160 }
1161
1162 memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
1163 platform_device_register(pdev);
1164
1165 return pdev;
1166}
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001167#endif
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001168
1169/* --------------------------------------------------------------------
1170 * SPI
1171 * -------------------------------------------------------------------- */
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01001172static struct resource atmel_spi0_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001173 PBMEM(0xffe00000),
1174 IRQ(3),
1175};
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01001176DEFINE_DEV(atmel_spi, 0);
1177DEV_CLK(spi_clk, atmel_spi0, pba, 0);
1178
1179static struct resource atmel_spi1_resource[] = {
1180 PBMEM(0xffe00400),
1181 IRQ(4),
1182};
1183DEFINE_DEV(atmel_spi, 1);
1184DEV_CLK(spi_clk, atmel_spi1, pba, 1);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001185
Haavard Skinnemoen9a596a62007-02-19 10:38:04 +01001186static void __init
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +01001187at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
1188 unsigned int n, const u8 *pins)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001189{
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +01001190 unsigned int pin, mode;
1191
1192 for (; n; n--, b++) {
1193 b->bus_num = bus_num;
1194 if (b->chip_select >= 4)
1195 continue;
1196 pin = (unsigned)b->controller_data;
1197 if (!pin) {
1198 pin = pins[b->chip_select];
1199 b->controller_data = (void *)pin;
1200 }
1201 mode = AT32_GPIOF_OUTPUT;
1202 if (!(b->mode & SPI_CS_HIGH))
1203 mode |= AT32_GPIOF_HIGH;
1204 at32_select_gpio(pin, mode);
1205 }
1206}
1207
1208struct platform_device *__init
1209at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
1210{
1211 /*
1212 * Manage the chipselects as GPIOs, normally using the same pins
1213 * the SPI controller expects; but boards can use other pins.
1214 */
1215 static u8 __initdata spi0_pins[] =
1216 { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
1217 GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
1218 static u8 __initdata spi1_pins[] =
1219 { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
1220 GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001221 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001222 u32 pin_mask;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001223
1224 switch (id) {
1225 case 0:
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01001226 pdev = &atmel_spi0_device;
Julien Maycaf18f12008-09-24 10:30:47 +02001227 pin_mask = (1 << 1) | (1 << 2); /* MOSI & SCK */
1228
David Brownell9c2baf72008-06-18 02:31:43 -07001229 /* pullup MISO so a level is always defined */
Julien Maycaf18f12008-09-24 10:30:47 +02001230 select_peripheral(PIOA, (1 << 0), PERIPH_A, AT32_GPIOF_PULLUP);
1231 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1232
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +01001233 at32_spi_setup_slaves(0, b, n, spi0_pins);
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01001234 break;
1235
1236 case 1:
1237 pdev = &atmel_spi1_device;
Julien Maycaf18f12008-09-24 10:30:47 +02001238 pin_mask = (1 << 1) | (1 << 5); /* MOSI */
1239
David Brownell9c2baf72008-06-18 02:31:43 -07001240 /* pullup MISO so a level is always defined */
Julien Maycaf18f12008-09-24 10:30:47 +02001241 select_peripheral(PIOB, (1 << 0), PERIPH_B, AT32_GPIOF_PULLUP);
1242 select_peripheral(PIOB, pin_mask, PERIPH_B, 0);
1243
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +01001244 at32_spi_setup_slaves(1, b, n, spi1_pins);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001245 break;
1246
1247 default:
1248 return NULL;
1249 }
1250
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +01001251 spi_register_board_info(b, n);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001252 platform_device_register(pdev);
1253 return pdev;
1254}
1255
1256/* --------------------------------------------------------------------
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001257 * TWI
1258 * -------------------------------------------------------------------- */
1259static struct resource atmel_twi0_resource[] __initdata = {
1260 PBMEM(0xffe00800),
1261 IRQ(5),
1262};
1263static struct clk atmel_twi0_pclk = {
1264 .name = "twi_pclk",
1265 .parent = &pba_clk,
1266 .mode = pba_clk_mode,
1267 .get_rate = pba_clk_get_rate,
1268 .index = 2,
1269};
1270
Ben Nizette040b28f2008-02-07 15:28:57 +11001271struct platform_device *__init at32_add_device_twi(unsigned int id,
1272 struct i2c_board_info *b,
1273 unsigned int n)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001274{
1275 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001276 u32 pin_mask;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001277
1278 if (id != 0)
1279 return NULL;
1280
1281 pdev = platform_device_alloc("atmel_twi", id);
1282 if (!pdev)
1283 return NULL;
1284
1285 if (platform_device_add_resources(pdev, atmel_twi0_resource,
1286 ARRAY_SIZE(atmel_twi0_resource)))
1287 goto err_add_resources;
1288
Julien Maycaf18f12008-09-24 10:30:47 +02001289 pin_mask = (1 << 6) | (1 << 7); /* SDA & SDL */
1290
1291 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001292
1293 atmel_twi0_pclk.dev = &pdev->dev;
1294
Ben Nizette040b28f2008-02-07 15:28:57 +11001295 if (b)
1296 i2c_register_board_info(id, b, n);
1297
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001298 platform_device_add(pdev);
1299 return pdev;
1300
1301err_add_resources:
1302 platform_device_put(pdev);
1303 return NULL;
1304}
1305
1306/* --------------------------------------------------------------------
1307 * MMC
1308 * -------------------------------------------------------------------- */
1309static struct resource atmel_mci0_resource[] __initdata = {
1310 PBMEM(0xfff02400),
1311 IRQ(28),
1312};
1313static struct clk atmel_mci0_pclk = {
1314 .name = "mci_clk",
1315 .parent = &pbb_clk,
1316 .mode = pbb_clk_mode,
1317 .get_rate = pbb_clk_get_rate,
1318 .index = 9,
1319};
1320
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001321struct platform_device *__init
1322at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001323{
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001324 struct platform_device *pdev;
Nicolas Ferre2635d1b2009-12-14 18:01:30 -08001325 struct mci_dma_slave *slave;
Julien Maycaf18f12008-09-24 10:30:47 +02001326 u32 pioa_mask;
1327 u32 piob_mask;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001328
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001329 if (id != 0 || !data)
1330 return NULL;
1331
1332 /* Must have at least one usable slot */
1333 if (!data->slot[0].bus_width && !data->slot[1].bus_width)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001334 return NULL;
1335
1336 pdev = platform_device_alloc("atmel_mci", id);
1337 if (!pdev)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001338 goto fail;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001339
1340 if (platform_device_add_resources(pdev, atmel_mci0_resource,
1341 ARRAY_SIZE(atmel_mci0_resource)))
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001342 goto fail;
1343
Nicolas Ferre2635d1b2009-12-14 18:01:30 -08001344 slave = kzalloc(sizeof(struct mci_dma_slave), GFP_KERNEL);
1345
1346 slave->sdata.dma_dev = &dw_dmac0_device.dev;
1347 slave->sdata.reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
1348 slave->sdata.cfg_hi = (DWC_CFGH_SRC_PER(0)
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001349 | DWC_CFGH_DST_PER(1));
Nicolas Ferre2635d1b2009-12-14 18:01:30 -08001350 slave->sdata.cfg_lo &= ~(DWC_CFGL_HS_DST_POL
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001351 | DWC_CFGL_HS_SRC_POL);
1352
Nicolas Ferre2635d1b2009-12-14 18:01:30 -08001353 data->dma_slave = slave;
1354
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001355 if (platform_device_add_data(pdev, data,
1356 sizeof(struct mci_platform_data)))
1357 goto fail;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001358
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001359 /* CLK line is common to both slots */
Julien Maycaf18f12008-09-24 10:30:47 +02001360 pioa_mask = 1 << 10;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001361
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001362 switch (data->slot[0].bus_width) {
1363 case 4:
Julien Maycaf18f12008-09-24 10:30:47 +02001364 pioa_mask |= 1 << 13; /* DATA1 */
1365 pioa_mask |= 1 << 14; /* DATA2 */
1366 pioa_mask |= 1 << 15; /* DATA3 */
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001367 /* fall through */
1368 case 1:
Julien Maycaf18f12008-09-24 10:30:47 +02001369 pioa_mask |= 1 << 11; /* CMD */
1370 pioa_mask |= 1 << 12; /* DATA0 */
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001371
1372 if (gpio_is_valid(data->slot[0].detect_pin))
1373 at32_select_gpio(data->slot[0].detect_pin, 0);
1374 if (gpio_is_valid(data->slot[0].wp_pin))
1375 at32_select_gpio(data->slot[0].wp_pin, 0);
1376 break;
1377 case 0:
1378 /* Slot is unused */
1379 break;
1380 default:
1381 goto fail;
1382 }
1383
Julien Maycaf18f12008-09-24 10:30:47 +02001384 select_peripheral(PIOA, pioa_mask, PERIPH_A, 0);
1385 piob_mask = 0;
1386
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001387 switch (data->slot[1].bus_width) {
1388 case 4:
Julien Maycaf18f12008-09-24 10:30:47 +02001389 piob_mask |= 1 << 8; /* DATA1 */
1390 piob_mask |= 1 << 9; /* DATA2 */
1391 piob_mask |= 1 << 10; /* DATA3 */
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001392 /* fall through */
1393 case 1:
Julien Maycaf18f12008-09-24 10:30:47 +02001394 piob_mask |= 1 << 6; /* CMD */
1395 piob_mask |= 1 << 7; /* DATA0 */
1396 select_peripheral(PIOB, piob_mask, PERIPH_B, 0);
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001397
1398 if (gpio_is_valid(data->slot[1].detect_pin))
1399 at32_select_gpio(data->slot[1].detect_pin, 0);
1400 if (gpio_is_valid(data->slot[1].wp_pin))
1401 at32_select_gpio(data->slot[1].wp_pin, 0);
1402 break;
1403 case 0:
1404 /* Slot is unused */
1405 break;
1406 default:
1407 if (!data->slot[0].bus_width)
1408 goto fail;
1409
1410 data->slot[1].bus_width = 0;
1411 break;
1412 }
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001413
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001414 atmel_mci0_pclk.dev = &pdev->dev;
1415
1416 platform_device_add(pdev);
1417 return pdev;
1418
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001419fail:
Nicolas Ferre2635d1b2009-12-14 18:01:30 -08001420 data->dma_slave = NULL;
1421 kfree(slave);
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001422 platform_device_put(pdev);
1423 return NULL;
1424}
1425
1426/* --------------------------------------------------------------------
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001427 * LCDC
1428 * -------------------------------------------------------------------- */
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001429#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001430static struct atmel_lcdfb_info atmel_lcdfb0_data;
1431static struct resource atmel_lcdfb0_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001432 {
1433 .start = 0xff000000,
1434 .end = 0xff000fff,
1435 .flags = IORESOURCE_MEM,
1436 },
1437 IRQ(1),
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001438 {
1439 /* Placeholder for pre-allocated fb memory */
1440 .start = 0x00000000,
1441 .end = 0x00000000,
1442 .flags = 0,
1443 },
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001444};
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001445DEFINE_DEV_DATA(atmel_lcdfb, 0);
1446DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
1447static struct clk atmel_lcdfb0_pixclk = {
1448 .name = "lcdc_clk",
1449 .dev = &atmel_lcdfb0_device.dev,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001450 .mode = genclk_mode,
1451 .get_rate = genclk_get_rate,
1452 .set_rate = genclk_set_rate,
1453 .set_parent = genclk_set_parent,
1454 .index = 7,
1455};
1456
1457struct platform_device *__init
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001458at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
Hans-Christian Egtvedt47882cf2008-02-05 15:27:16 +01001459 unsigned long fbmem_start, unsigned long fbmem_len,
Julien May70664122008-08-04 14:27:38 +02001460 u64 pin_mask)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001461{
1462 struct platform_device *pdev;
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001463 struct atmel_lcdfb_info *info;
1464 struct fb_monspecs *monspecs;
1465 struct fb_videomode *modedb;
1466 unsigned int modedb_size;
Julien Maycaf18f12008-09-24 10:30:47 +02001467 u32 portc_mask, portd_mask, porte_mask;
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001468
1469 /*
1470 * Do a deep copy of the fb data, monspecs and modedb. Make
1471 * sure all allocations are done before setting up the
1472 * portmux.
1473 */
1474 monspecs = kmemdup(data->default_monspecs,
1475 sizeof(struct fb_monspecs), GFP_KERNEL);
1476 if (!monspecs)
1477 return NULL;
1478
1479 modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
1480 modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
1481 if (!modedb)
1482 goto err_dup_modedb;
1483 monspecs->modedb = modedb;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001484
1485 switch (id) {
1486 case 0:
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001487 pdev = &atmel_lcdfb0_device;
Hans-Christian Egtvedt47882cf2008-02-05 15:27:16 +01001488
Julien May70664122008-08-04 14:27:38 +02001489 if (pin_mask == 0ULL)
1490 /* Default to "full" lcdc control signals and 24bit */
1491 pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL;
1492
1493 /* LCDC on port C */
Alex Raimondi60900652008-10-13 16:03:45 +02001494 portc_mask = pin_mask & 0xfff80000;
Julien Maycaf18f12008-09-24 10:30:47 +02001495 select_peripheral(PIOC, portc_mask, PERIPH_A, 0);
Julien May70664122008-08-04 14:27:38 +02001496
1497 /* LCDC on port D */
Julien Maycaf18f12008-09-24 10:30:47 +02001498 portd_mask = pin_mask & 0x0003ffff;
1499 select_peripheral(PIOD, portd_mask, PERIPH_A, 0);
Julien May70664122008-08-04 14:27:38 +02001500
1501 /* LCDC on port E */
Julien Maycaf18f12008-09-24 10:30:47 +02001502 porte_mask = (pin_mask >> 32) & 0x0007ffff;
1503 select_peripheral(PIOE, porte_mask, PERIPH_B, 0);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001504
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001505 clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
1506 clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001507 break;
1508
1509 default:
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001510 goto err_invalid_id;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001511 }
1512
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001513 if (fbmem_len) {
1514 pdev->resource[2].start = fbmem_start;
1515 pdev->resource[2].end = fbmem_start + fbmem_len - 1;
1516 pdev->resource[2].flags = IORESOURCE_MEM;
1517 }
1518
1519 info = pdev->dev.platform_data;
1520 memcpy(info, data, sizeof(struct atmel_lcdfb_info));
1521 info->default_monspecs = monspecs;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001522
1523 platform_device_register(pdev);
1524 return pdev;
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001525
1526err_invalid_id:
1527 kfree(modedb);
1528err_dup_modedb:
1529 kfree(monspecs);
1530 return NULL;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001531}
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001532#endif
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001533
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01001534/* --------------------------------------------------------------------
David Brownell9a1e8eb2008-02-08 04:21:21 -08001535 * PWM
1536 * -------------------------------------------------------------------- */
1537static struct resource atmel_pwm0_resource[] __initdata = {
1538 PBMEM(0xfff01400),
1539 IRQ(24),
1540};
1541static struct clk atmel_pwm0_mck = {
Sedji Gaouaou84059962008-06-25 10:32:50 +02001542 .name = "pwm_clk",
David Brownell9a1e8eb2008-02-08 04:21:21 -08001543 .parent = &pbb_clk,
1544 .mode = pbb_clk_mode,
1545 .get_rate = pbb_clk_get_rate,
1546 .index = 5,
1547};
1548
1549struct platform_device *__init at32_add_device_pwm(u32 mask)
1550{
1551 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001552 u32 pin_mask;
David Brownell9a1e8eb2008-02-08 04:21:21 -08001553
1554 if (!mask)
1555 return NULL;
1556
1557 pdev = platform_device_alloc("atmel_pwm", 0);
1558 if (!pdev)
1559 return NULL;
1560
1561 if (platform_device_add_resources(pdev, atmel_pwm0_resource,
1562 ARRAY_SIZE(atmel_pwm0_resource)))
1563 goto out_free_pdev;
1564
1565 if (platform_device_add_data(pdev, &mask, sizeof(mask)))
1566 goto out_free_pdev;
1567
Julien Maycaf18f12008-09-24 10:30:47 +02001568 pin_mask = 0;
David Brownell9a1e8eb2008-02-08 04:21:21 -08001569 if (mask & (1 << 0))
Julien Maycaf18f12008-09-24 10:30:47 +02001570 pin_mask |= (1 << 28);
David Brownell9a1e8eb2008-02-08 04:21:21 -08001571 if (mask & (1 << 1))
Julien Maycaf18f12008-09-24 10:30:47 +02001572 pin_mask |= (1 << 29);
1573 if (pin_mask > 0)
1574 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1575
1576 pin_mask = 0;
David Brownell9a1e8eb2008-02-08 04:21:21 -08001577 if (mask & (1 << 2))
Julien Maycaf18f12008-09-24 10:30:47 +02001578 pin_mask |= (1 << 21);
David Brownell9a1e8eb2008-02-08 04:21:21 -08001579 if (mask & (1 << 3))
Julien Maycaf18f12008-09-24 10:30:47 +02001580 pin_mask |= (1 << 22);
1581 if (pin_mask > 0)
1582 select_peripheral(PIOA, pin_mask, PERIPH_B, 0);
David Brownell9a1e8eb2008-02-08 04:21:21 -08001583
1584 atmel_pwm0_mck.dev = &pdev->dev;
1585
1586 platform_device_add(pdev);
1587
1588 return pdev;
1589
1590out_free_pdev:
1591 platform_device_put(pdev);
1592 return NULL;
1593}
1594
1595/* --------------------------------------------------------------------
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001596 * SSC
1597 * -------------------------------------------------------------------- */
1598static struct resource ssc0_resource[] = {
1599 PBMEM(0xffe01c00),
1600 IRQ(10),
1601};
1602DEFINE_DEV(ssc, 0);
1603DEV_CLK(pclk, ssc0, pba, 7);
1604
1605static struct resource ssc1_resource[] = {
1606 PBMEM(0xffe02000),
1607 IRQ(11),
1608};
1609DEFINE_DEV(ssc, 1);
1610DEV_CLK(pclk, ssc1, pba, 8);
1611
1612static struct resource ssc2_resource[] = {
1613 PBMEM(0xffe02400),
1614 IRQ(12),
1615};
1616DEFINE_DEV(ssc, 2);
1617DEV_CLK(pclk, ssc2, pba, 9);
1618
1619struct platform_device *__init
1620at32_add_device_ssc(unsigned int id, unsigned int flags)
1621{
1622 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001623 u32 pin_mask = 0;
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001624
1625 switch (id) {
1626 case 0:
1627 pdev = &ssc0_device;
1628 if (flags & ATMEL_SSC_RF)
Julien Maycaf18f12008-09-24 10:30:47 +02001629 pin_mask |= (1 << 21); /* RF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001630 if (flags & ATMEL_SSC_RK)
Julien Maycaf18f12008-09-24 10:30:47 +02001631 pin_mask |= (1 << 22); /* RK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001632 if (flags & ATMEL_SSC_TK)
Julien Maycaf18f12008-09-24 10:30:47 +02001633 pin_mask |= (1 << 23); /* TK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001634 if (flags & ATMEL_SSC_TF)
Julien Maycaf18f12008-09-24 10:30:47 +02001635 pin_mask |= (1 << 24); /* TF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001636 if (flags & ATMEL_SSC_TD)
Julien Maycaf18f12008-09-24 10:30:47 +02001637 pin_mask |= (1 << 25); /* TD */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001638 if (flags & ATMEL_SSC_RD)
Julien Maycaf18f12008-09-24 10:30:47 +02001639 pin_mask |= (1 << 26); /* RD */
1640
1641 if (pin_mask > 0)
1642 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1643
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001644 break;
1645 case 1:
1646 pdev = &ssc1_device;
1647 if (flags & ATMEL_SSC_RF)
Julien Maycaf18f12008-09-24 10:30:47 +02001648 pin_mask |= (1 << 0); /* RF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001649 if (flags & ATMEL_SSC_RK)
Julien Maycaf18f12008-09-24 10:30:47 +02001650 pin_mask |= (1 << 1); /* RK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001651 if (flags & ATMEL_SSC_TK)
Julien Maycaf18f12008-09-24 10:30:47 +02001652 pin_mask |= (1 << 2); /* TK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001653 if (flags & ATMEL_SSC_TF)
Julien Maycaf18f12008-09-24 10:30:47 +02001654 pin_mask |= (1 << 3); /* TF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001655 if (flags & ATMEL_SSC_TD)
Julien Maycaf18f12008-09-24 10:30:47 +02001656 pin_mask |= (1 << 4); /* TD */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001657 if (flags & ATMEL_SSC_RD)
Julien Maycaf18f12008-09-24 10:30:47 +02001658 pin_mask |= (1 << 5); /* RD */
1659
1660 if (pin_mask > 0)
1661 select_peripheral(PIOA, pin_mask, PERIPH_B, 0);
1662
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001663 break;
1664 case 2:
1665 pdev = &ssc2_device;
1666 if (flags & ATMEL_SSC_TD)
Julien Maycaf18f12008-09-24 10:30:47 +02001667 pin_mask |= (1 << 13); /* TD */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001668 if (flags & ATMEL_SSC_RD)
Julien Maycaf18f12008-09-24 10:30:47 +02001669 pin_mask |= (1 << 14); /* RD */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001670 if (flags & ATMEL_SSC_TK)
Julien Maycaf18f12008-09-24 10:30:47 +02001671 pin_mask |= (1 << 15); /* TK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001672 if (flags & ATMEL_SSC_TF)
Julien Maycaf18f12008-09-24 10:30:47 +02001673 pin_mask |= (1 << 16); /* TF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001674 if (flags & ATMEL_SSC_RF)
Julien Maycaf18f12008-09-24 10:30:47 +02001675 pin_mask |= (1 << 17); /* RF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001676 if (flags & ATMEL_SSC_RK)
Julien Maycaf18f12008-09-24 10:30:47 +02001677 pin_mask |= (1 << 18); /* RK */
1678
1679 if (pin_mask > 0)
1680 select_peripheral(PIOB, pin_mask, PERIPH_A, 0);
1681
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001682 break;
1683 default:
1684 return NULL;
1685 }
1686
1687 platform_device_register(pdev);
1688 return pdev;
1689}
1690
1691/* --------------------------------------------------------------------
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001692 * USB Device Controller
1693 * -------------------------------------------------------------------- */
1694static struct resource usba0_resource[] __initdata = {
1695 {
1696 .start = 0xff300000,
1697 .end = 0xff3fffff,
1698 .flags = IORESOURCE_MEM,
1699 }, {
1700 .start = 0xfff03000,
1701 .end = 0xfff033ff,
1702 .flags = IORESOURCE_MEM,
1703 },
1704 IRQ(31),
1705};
1706static struct clk usba0_pclk = {
1707 .name = "pclk",
1708 .parent = &pbb_clk,
1709 .mode = pbb_clk_mode,
1710 .get_rate = pbb_clk_get_rate,
1711 .index = 12,
1712};
1713static struct clk usba0_hclk = {
1714 .name = "hclk",
1715 .parent = &hsb_clk,
1716 .mode = hsb_clk_mode,
1717 .get_rate = hsb_clk_get_rate,
1718 .index = 6,
1719};
1720
Stelian Pop8d855312008-03-05 00:00:00 +01001721#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
1722 [idx] = { \
1723 .name = nam, \
1724 .index = idx, \
1725 .fifo_size = maxpkt, \
1726 .nr_banks = maxbk, \
1727 .can_dma = dma, \
1728 .can_isoc = isoc, \
1729 }
1730
1731static struct usba_ep_data at32_usba_ep[] __initdata = {
1732 EP("ep0", 0, 64, 1, 0, 0),
1733 EP("ep1", 1, 512, 2, 1, 1),
1734 EP("ep2", 2, 512, 2, 1, 1),
1735 EP("ep3-int", 3, 64, 3, 1, 0),
1736 EP("ep4-int", 4, 64, 3, 1, 0),
1737 EP("ep5", 5, 1024, 3, 1, 1),
1738 EP("ep6", 6, 1024, 3, 1, 1),
1739};
1740
1741#undef EP
1742
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001743struct platform_device *__init
1744at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
1745{
Stelian Pop8d855312008-03-05 00:00:00 +01001746 /*
1747 * pdata doesn't have room for any endpoints, so we need to
1748 * append room for the ones we need right after it.
1749 */
1750 struct {
1751 struct usba_platform_data pdata;
1752 struct usba_ep_data ep[7];
1753 } usba_data;
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001754 struct platform_device *pdev;
1755
1756 if (id != 0)
1757 return NULL;
1758
1759 pdev = platform_device_alloc("atmel_usba_udc", 0);
1760 if (!pdev)
1761 return NULL;
1762
1763 if (platform_device_add_resources(pdev, usba0_resource,
1764 ARRAY_SIZE(usba0_resource)))
1765 goto out_free_pdev;
1766
Stelian Pop8d855312008-03-05 00:00:00 +01001767 if (data)
1768 usba_data.pdata.vbus_pin = data->vbus_pin;
1769 else
1770 usba_data.pdata.vbus_pin = -EINVAL;
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001771
Stelian Pop8d855312008-03-05 00:00:00 +01001772 data = &usba_data.pdata;
1773 data->num_ep = ARRAY_SIZE(at32_usba_ep);
1774 memcpy(data->ep, at32_usba_ep, sizeof(at32_usba_ep));
1775
1776 if (platform_device_add_data(pdev, data, sizeof(usba_data)))
1777 goto out_free_pdev;
1778
Hans-Christian Egtvedt9477ab22009-03-24 15:45:21 +01001779 if (gpio_is_valid(data->vbus_pin))
Stelian Pop8d855312008-03-05 00:00:00 +01001780 at32_select_gpio(data->vbus_pin, 0);
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001781
1782 usba0_pclk.dev = &pdev->dev;
1783 usba0_hclk.dev = &pdev->dev;
1784
1785 platform_device_add(pdev);
1786
1787 return pdev;
1788
1789out_free_pdev:
1790 platform_device_put(pdev);
1791 return NULL;
1792}
1793
1794/* --------------------------------------------------------------------
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001795 * IDE / CompactFlash
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001796 * -------------------------------------------------------------------- */
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001797#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001798static struct resource at32_smc_cs4_resource[] __initdata = {
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001799 {
1800 .start = 0x04000000,
1801 .end = 0x07ffffff,
1802 .flags = IORESOURCE_MEM,
1803 },
1804 IRQ(~0UL), /* Magic IRQ will be overridden */
1805};
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001806static struct resource at32_smc_cs5_resource[] __initdata = {
1807 {
1808 .start = 0x20000000,
1809 .end = 0x23ffffff,
1810 .flags = IORESOURCE_MEM,
1811 },
1812 IRQ(~0UL), /* Magic IRQ will be overridden */
1813};
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001814
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001815static int __init at32_init_ide_or_cf(struct platform_device *pdev,
1816 unsigned int cs, unsigned int extint)
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001817{
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001818 static unsigned int extint_pin_map[4] __initdata = {
Julien Maycaf18f12008-09-24 10:30:47 +02001819 (1 << 25),
1820 (1 << 26),
1821 (1 << 27),
1822 (1 << 28),
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001823 };
1824 static bool common_pins_initialized __initdata = false;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001825 unsigned int extint_pin;
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001826 int ret;
Julien Maycaf18f12008-09-24 10:30:47 +02001827 u32 pin_mask;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001828
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001829 if (extint >= ARRAY_SIZE(extint_pin_map))
1830 return -EINVAL;
1831 extint_pin = extint_pin_map[extint];
1832
1833 switch (cs) {
1834 case 4:
1835 ret = platform_device_add_resources(pdev,
1836 at32_smc_cs4_resource,
1837 ARRAY_SIZE(at32_smc_cs4_resource));
1838 if (ret)
1839 return ret;
1840
Julien Maycaf18f12008-09-24 10:30:47 +02001841 /* NCS4 -> OE_N */
1842 select_peripheral(PIOE, (1 << 21), PERIPH_A, 0);
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +02001843 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF0_ENABLE);
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001844 break;
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001845 case 5:
1846 ret = platform_device_add_resources(pdev,
1847 at32_smc_cs5_resource,
1848 ARRAY_SIZE(at32_smc_cs5_resource));
1849 if (ret)
1850 return ret;
1851
Julien Maycaf18f12008-09-24 10:30:47 +02001852 /* NCS5 -> OE_N */
1853 select_peripheral(PIOE, (1 << 22), PERIPH_A, 0);
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +02001854 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF1_ENABLE);
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001855 break;
1856 default:
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001857 return -EINVAL;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001858 }
1859
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001860 if (!common_pins_initialized) {
Julien Maycaf18f12008-09-24 10:30:47 +02001861 pin_mask = (1 << 19); /* CFCE1 -> CS0_N */
1862 pin_mask |= (1 << 20); /* CFCE2 -> CS1_N */
1863 pin_mask |= (1 << 23); /* CFRNW -> DIR */
1864 pin_mask |= (1 << 24); /* NWAIT <- IORDY */
1865
1866 select_peripheral(PIOE, pin_mask, PERIPH_A, 0);
1867
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001868 common_pins_initialized = true;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001869 }
1870
Julien Maycaf18f12008-09-24 10:30:47 +02001871 select_peripheral(PIOB, extint_pin, PERIPH_A, AT32_GPIOF_DEGLITCH);
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001872
1873 pdev->resource[1].start = EIM_IRQ_BASE + extint;
1874 pdev->resource[1].end = pdev->resource[1].start;
1875
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001876 return 0;
1877}
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001878
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001879struct platform_device *__init
1880at32_add_device_ide(unsigned int id, unsigned int extint,
1881 struct ide_platform_data *data)
1882{
1883 struct platform_device *pdev;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001884
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001885 pdev = platform_device_alloc("at32_ide", id);
1886 if (!pdev)
1887 goto fail;
1888
1889 if (platform_device_add_data(pdev, data,
1890 sizeof(struct ide_platform_data)))
1891 goto fail;
1892
1893 if (at32_init_ide_or_cf(pdev, data->cs, extint))
1894 goto fail;
1895
1896 platform_device_add(pdev);
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001897 return pdev;
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001898
1899fail:
1900 platform_device_put(pdev);
1901 return NULL;
1902}
1903
1904struct platform_device *__init
1905at32_add_device_cf(unsigned int id, unsigned int extint,
1906 struct cf_platform_data *data)
1907{
1908 struct platform_device *pdev;
1909
1910 pdev = platform_device_alloc("at32_cf", id);
1911 if (!pdev)
1912 goto fail;
1913
1914 if (platform_device_add_data(pdev, data,
1915 sizeof(struct cf_platform_data)))
1916 goto fail;
1917
1918 if (at32_init_ide_or_cf(pdev, data->cs, extint))
1919 goto fail;
1920
David Brownell3c26e172008-07-27 02:34:45 -07001921 if (gpio_is_valid(data->detect_pin))
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001922 at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
David Brownell3c26e172008-07-27 02:34:45 -07001923 if (gpio_is_valid(data->reset_pin))
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001924 at32_select_gpio(data->reset_pin, 0);
David Brownell3c26e172008-07-27 02:34:45 -07001925 if (gpio_is_valid(data->vcc_pin))
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001926 at32_select_gpio(data->vcc_pin, 0);
1927 /* READY is used as extint, so we can't select it as gpio */
1928
1929 platform_device_add(pdev);
1930 return pdev;
1931
1932fail:
1933 platform_device_put(pdev);
1934 return NULL;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001935}
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001936#endif
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001937
1938/* --------------------------------------------------------------------
HÃ¥vard Skinnemoen62090a02008-06-06 18:04:56 +02001939 * NAND Flash / SmartMedia
1940 * -------------------------------------------------------------------- */
1941static struct resource smc_cs3_resource[] __initdata = {
1942 {
1943 .start = 0x0c000000,
1944 .end = 0x0fffffff,
1945 .flags = IORESOURCE_MEM,
1946 }, {
1947 .start = 0xfff03c00,
1948 .end = 0xfff03fff,
1949 .flags = IORESOURCE_MEM,
1950 },
1951};
1952
1953struct platform_device *__init
1954at32_add_device_nand(unsigned int id, struct atmel_nand_data *data)
1955{
1956 struct platform_device *pdev;
1957
1958 if (id != 0 || !data)
1959 return NULL;
1960
1961 pdev = platform_device_alloc("atmel_nand", id);
1962 if (!pdev)
1963 goto fail;
1964
1965 if (platform_device_add_resources(pdev, smc_cs3_resource,
1966 ARRAY_SIZE(smc_cs3_resource)))
1967 goto fail;
1968
1969 if (platform_device_add_data(pdev, data,
1970 sizeof(struct atmel_nand_data)))
1971 goto fail;
1972
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +02001973 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_NAND_ENABLE);
HÃ¥vard Skinnemoen62090a02008-06-06 18:04:56 +02001974 if (data->enable_pin)
1975 at32_select_gpio(data->enable_pin,
1976 AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
1977 if (data->rdy_pin)
1978 at32_select_gpio(data->rdy_pin, 0);
1979 if (data->det_pin)
1980 at32_select_gpio(data->det_pin, 0);
1981
1982 platform_device_add(pdev);
1983 return pdev;
1984
1985fail:
1986 platform_device_put(pdev);
1987 return NULL;
1988}
1989
1990/* --------------------------------------------------------------------
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001991 * AC97C
1992 * -------------------------------------------------------------------- */
1993static struct resource atmel_ac97c0_resource[] __initdata = {
1994 PBMEM(0xfff02800),
1995 IRQ(29),
1996};
1997static struct clk atmel_ac97c0_pclk = {
1998 .name = "pclk",
1999 .parent = &pbb_clk,
2000 .mode = pbb_clk_mode,
2001 .get_rate = pbb_clk_get_rate,
2002 .index = 10,
2003};
2004
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002005struct platform_device *__init
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002006at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
2007 unsigned int flags)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002008{
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002009 struct platform_device *pdev;
2010 struct dw_dma_slave *rx_dws;
2011 struct dw_dma_slave *tx_dws;
2012 struct ac97c_platform_data _data;
2013 u32 pin_mask;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002014
2015 if (id != 0)
2016 return NULL;
2017
2018 pdev = platform_device_alloc("atmel_ac97c", id);
2019 if (!pdev)
2020 return NULL;
2021
2022 if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
2023 ARRAY_SIZE(atmel_ac97c0_resource)))
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002024 goto out_free_resources;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002025
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002026 if (!data) {
2027 data = &_data;
2028 memset(data, 0, sizeof(struct ac97c_platform_data));
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002029 data->reset_pin = -ENODEV;
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002030 }
2031
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002032 rx_dws = &data->rx_dws;
2033 tx_dws = &data->tx_dws;
2034
2035 /* Check if DMA slave interface for capture should be configured. */
2036 if (flags & AC97C_CAPTURE) {
2037 rx_dws->dma_dev = &dw_dmac0_device.dev;
2038 rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
2039 rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3);
2040 rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2041 }
2042
2043 /* Check if DMA slave interface for playback should be configured. */
2044 if (flags & AC97C_PLAYBACK) {
2045 tx_dws->dma_dev = &dw_dmac0_device.dev;
2046 tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
2047 tx_dws->cfg_hi = DWC_CFGH_DST_PER(4);
2048 tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2049 }
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002050
2051 if (platform_device_add_data(pdev, data,
2052 sizeof(struct ac97c_platform_data)))
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002053 goto out_free_resources;
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002054
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002055 /* SDO | SYNC | SCLK | SDI */
2056 pin_mask = (1 << 20) | (1 << 21) | (1 << 22) | (1 << 23);
Julien Maycaf18f12008-09-24 10:30:47 +02002057
2058 select_peripheral(PIOB, pin_mask, PERIPH_B, 0);
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002059
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002060 if (gpio_is_valid(data->reset_pin))
2061 at32_select_gpio(data->reset_pin, AT32_GPIOF_OUTPUT
2062 | AT32_GPIOF_HIGH);
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002063
2064 atmel_ac97c0_pclk.dev = &pdev->dev;
2065
2066 platform_device_add(pdev);
2067 return pdev;
2068
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002069out_free_resources:
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002070 platform_device_put(pdev);
2071 return NULL;
2072}
2073
2074/* --------------------------------------------------------------------
2075 * ABDAC
2076 * -------------------------------------------------------------------- */
2077static struct resource abdac0_resource[] __initdata = {
2078 PBMEM(0xfff02000),
2079 IRQ(27),
2080};
2081static struct clk abdac0_pclk = {
2082 .name = "pclk",
2083 .parent = &pbb_clk,
2084 .mode = pbb_clk_mode,
2085 .get_rate = pbb_clk_get_rate,
2086 .index = 8,
2087};
2088static struct clk abdac0_sample_clk = {
2089 .name = "sample_clk",
2090 .mode = genclk_mode,
2091 .get_rate = genclk_get_rate,
2092 .set_rate = genclk_set_rate,
2093 .set_parent = genclk_set_parent,
2094 .index = 6,
2095};
2096
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002097struct platform_device *__init
2098at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002099{
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002100 struct platform_device *pdev;
2101 struct dw_dma_slave *dws;
2102 u32 pin_mask;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002103
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002104 if (id != 0 || !data)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002105 return NULL;
2106
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002107 pdev = platform_device_alloc("atmel_abdac", id);
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002108 if (!pdev)
2109 return NULL;
2110
2111 if (platform_device_add_resources(pdev, abdac0_resource,
2112 ARRAY_SIZE(abdac0_resource)))
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002113 goto out_free_resources;
2114
2115 dws = &data->dws;
2116
2117 dws->dma_dev = &dw_dmac0_device.dev;
2118 dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
2119 dws->cfg_hi = DWC_CFGH_DST_PER(2);
2120 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2121
2122 if (platform_device_add_data(pdev, data,
2123 sizeof(struct atmel_abdac_pdata)))
2124 goto out_free_resources;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002125
Julien Maycaf18f12008-09-24 10:30:47 +02002126 pin_mask = (1 << 20) | (1 << 22); /* DATA1 & DATAN1 */
2127 pin_mask |= (1 << 21) | (1 << 23); /* DATA0 & DATAN0 */
2128
2129 select_peripheral(PIOB, pin_mask, PERIPH_A, 0);
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002130
2131 abdac0_pclk.dev = &pdev->dev;
2132 abdac0_sample_clk.dev = &pdev->dev;
2133
2134 platform_device_add(pdev);
2135 return pdev;
2136
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002137out_free_resources:
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002138 platform_device_put(pdev);
2139 return NULL;
2140}
2141
2142/* --------------------------------------------------------------------
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01002143 * GCLK
2144 * -------------------------------------------------------------------- */
2145static struct clk gclk0 = {
2146 .name = "gclk0",
2147 .mode = genclk_mode,
2148 .get_rate = genclk_get_rate,
2149 .set_rate = genclk_set_rate,
2150 .set_parent = genclk_set_parent,
2151 .index = 0,
2152};
2153static struct clk gclk1 = {
2154 .name = "gclk1",
2155 .mode = genclk_mode,
2156 .get_rate = genclk_get_rate,
2157 .set_rate = genclk_set_rate,
2158 .set_parent = genclk_set_parent,
2159 .index = 1,
2160};
2161static struct clk gclk2 = {
2162 .name = "gclk2",
2163 .mode = genclk_mode,
2164 .get_rate = genclk_get_rate,
2165 .set_rate = genclk_set_rate,
2166 .set_parent = genclk_set_parent,
2167 .index = 2,
2168};
2169static struct clk gclk3 = {
2170 .name = "gclk3",
2171 .mode = genclk_mode,
2172 .get_rate = genclk_get_rate,
2173 .set_rate = genclk_set_rate,
2174 .set_parent = genclk_set_parent,
2175 .index = 3,
2176};
2177static struct clk gclk4 = {
2178 .name = "gclk4",
2179 .mode = genclk_mode,
2180 .get_rate = genclk_get_rate,
2181 .set_rate = genclk_set_rate,
2182 .set_parent = genclk_set_parent,
2183 .index = 4,
2184};
2185
Alex Raimondi300bb762008-09-22 21:40:55 +02002186static __initdata struct clk *init_clocks[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002187 &osc32k,
2188 &osc0,
2189 &osc1,
2190 &pll0,
2191 &pll1,
2192 &cpu_clk,
2193 &hsb_clk,
2194 &pba_clk,
2195 &pbb_clk,
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +02002196 &at32_pm_pclk,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002197 &at32_intc0_pclk,
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +02002198 &at32_hmatrix_clk,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002199 &ebi_clk,
2200 &hramc_clk,
Haavard Skinnemoen7951f182008-03-05 15:08:27 +01002201 &sdramc_clk,
Haavard Skinnemoenbc157b72006-09-25 23:32:16 -07002202 &smc0_pclk,
2203 &smc0_mck,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002204 &pdc_hclk,
2205 &pdc_pclk,
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -07002206 &dw_dmac0_hclk,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002207 &pico_clk,
2208 &pio0_mck,
2209 &pio1_mck,
2210 &pio2_mck,
2211 &pio3_mck,
Haavard Skinnemoen7f9f4672007-01-30 11:16:16 +01002212 &pio4_mck,
David Brownelle723ff62008-02-14 11:24:02 -08002213 &at32_tcb0_t0_clk,
2214 &at32_tcb1_t0_clk,
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +01002215 &atmel_psif0_pclk,
2216 &atmel_psif1_pclk,
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02002217 &atmel_usart0_usart,
2218 &atmel_usart1_usart,
2219 &atmel_usart2_usart,
2220 &atmel_usart3_usart,
David Brownell9a1e8eb2008-02-08 04:21:21 -08002221 &atmel_pwm0_mck,
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002222#if defined(CONFIG_CPU_AT32AP7000)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002223 &macb0_hclk,
2224 &macb0_pclk,
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01002225 &macb1_hclk,
2226 &macb1_pclk,
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002227#endif
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01002228 &atmel_spi0_spi_clk,
2229 &atmel_spi1_spi_clk,
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002230 &atmel_twi0_pclk,
2231 &atmel_mci0_pclk,
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002232#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01002233 &atmel_lcdfb0_hck1,
2234 &atmel_lcdfb0_pixclk,
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002235#endif
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02002236 &ssc0_pclk,
2237 &ssc1_pclk,
2238 &ssc2_pclk,
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02002239 &usba0_hclk,
2240 &usba0_pclk,
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002241 &atmel_ac97c0_pclk,
2242 &abdac0_pclk,
2243 &abdac0_sample_clk,
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01002244 &gclk0,
2245 &gclk1,
2246 &gclk2,
2247 &gclk3,
2248 &gclk4,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002249};
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002250
Haavard Skinnemoen65033ed2008-03-04 15:15:00 +01002251void __init setup_platform(void)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002252{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002253 u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
2254 int i;
2255
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +02002256 if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002257 main_clock = &pll0;
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +02002258 cpu_clk.parent = &pll0;
2259 } else {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002260 main_clock = &osc0;
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +02002261 cpu_clk.parent = &osc0;
2262 }
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002263
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +02002264 if (pm_readl(PLL0) & PM_BIT(PLLOSC))
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002265 pll0.parent = &osc1;
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +02002266 if (pm_readl(PLL1) & PM_BIT(PLLOSC))
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002267 pll1.parent = &osc1;
2268
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01002269 genclk_init_parent(&gclk0);
2270 genclk_init_parent(&gclk1);
2271 genclk_init_parent(&gclk2);
2272 genclk_init_parent(&gclk3);
2273 genclk_init_parent(&gclk4);
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002274#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01002275 genclk_init_parent(&atmel_lcdfb0_pixclk);
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002276#endif
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002277 genclk_init_parent(&abdac0_sample_clk);
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01002278
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002279 /*
Alex Raimondi300bb762008-09-22 21:40:55 +02002280 * Build initial dynamic clock list by registering all clocks
2281 * from the array.
2282 * At the same time, turn on all clocks that have at least one
2283 * user already, and turn off everything else. We only do this
2284 * for module clocks, and even though it isn't particularly
2285 * pretty to check the address of the mode function, it should
2286 * do the trick...
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002287 */
Alex Raimondi300bb762008-09-22 21:40:55 +02002288 for (i = 0; i < ARRAY_SIZE(init_clocks); i++) {
2289 struct clk *clk = init_clocks[i];
2290
2291 /* first, register clock */
2292 at32_clk_register(clk);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002293
Haavard Skinnemoen188ff652007-03-14 13:23:44 +01002294 if (clk->users == 0)
2295 continue;
2296
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002297 if (clk->mode == &cpu_clk_mode)
2298 cpu_mask |= 1 << clk->index;
2299 else if (clk->mode == &hsb_clk_mode)
2300 hsb_mask |= 1 << clk->index;
2301 else if (clk->mode == &pba_clk_mode)
2302 pba_mask |= 1 << clk->index;
2303 else if (clk->mode == &pbb_clk_mode)
2304 pbb_mask |= 1 << clk->index;
2305 }
2306
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +02002307 pm_writel(CPU_MASK, cpu_mask);
2308 pm_writel(HSB_MASK, hsb_mask);
2309 pm_writel(PBA_MASK, pba_mask);
2310 pm_writel(PBB_MASK, pbb_mask);
Haavard Skinnemoen65033ed2008-03-04 15:15:00 +01002311
2312 /* Initialize the port muxes */
2313 at32_init_pio(&pio0_device);
2314 at32_init_pio(&pio1_device);
2315 at32_init_pio(&pio2_device);
2316 at32_init_pio(&pio3_device);
2317 at32_init_pio(&pio4_device);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002318}
Haavard Skinnemoenb83d6ee2008-03-05 10:00:28 +01002319
2320struct gen_pool *sram_pool;
2321
2322static int __init sram_init(void)
2323{
2324 struct gen_pool *pool;
2325
2326 /* 1KiB granularity */
2327 pool = gen_pool_create(10, -1);
2328 if (!pool)
2329 goto fail;
2330
2331 if (gen_pool_add(pool, 0x24000000, 0x8000, -1))
2332 goto err_pool_add;
2333
2334 sram_pool = pool;
2335 return 0;
2336
2337err_pool_add:
2338 gen_pool_destroy(pool);
2339fail:
2340 pr_err("Failed to create SRAM pool\n");
2341 return -ENOMEM;
2342}
2343core_initcall(sram_init);