blob: ed700a5b03ae06b32561138b651d22c7ff19879c [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Pierre Ossman70f10482007-07-11 20:04:50 +02002 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
Linus Walleij64de0282010-02-19 01:09:10 +01005 * Copyright (C) 2010 ST-Ericsson AB.
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/init.h>
14#include <linux/ioport.h>
15#include <linux/device.h>
16#include <linux/interrupt.h>
17#include <linux/delay.h>
18#include <linux/err.h>
19#include <linux/highmem.h>
Nicolas Pitre019a5f52007-10-11 01:06:03 -040020#include <linux/log2.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/mmc/host.h>
Russell Kinga62c80e2006-01-07 13:52:45 +000022#include <linux/amba/bus.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000023#include <linux/clk.h>
Jens Axboebd6dee62007-10-24 09:01:09 +020024#include <linux/scatterlist.h>
Russell King89001442009-07-09 15:16:07 +010025#include <linux/gpio.h>
Linus Walleij6ef297f2009-09-22 14:29:36 +010026#include <linux/amba/mmci.h>
Linus Walleij34e84f32009-09-22 14:41:40 +010027#include <linux/regulator/consumer.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
Russell King7b09cda2005-07-01 12:02:59 +010029#include <asm/div64.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <asm/io.h>
Russell Kingc6b8fda2005-10-28 14:05:16 +010031#include <asm/sizes.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
33#include "mmci.h"
34
35#define DRIVER_NAME "mmci-pl18x"
36
Linus Torvalds1da177e2005-04-16 15:20:36 -070037static unsigned int fmax = 515633;
38
Rabin Vincent4956e102010-07-21 12:54:40 +010039/**
40 * struct variant_data - MMCI variant-specific quirks
41 * @clkreg: default value for MCICLOCK register
Rabin Vincent4380c142010-07-21 12:55:18 +010042 * @clkreg_enable: enable value for MMCICLOCK register
Rabin Vincent08458ef2010-07-21 12:55:59 +010043 * @datalength_bits: number of bits in the MMCIDATALENGTH register
Rabin Vincent8301bb62010-08-09 12:57:30 +010044 * @fifosize: number of bytes that can be written when MMCI_TXFIFOEMPTY
45 * is asserted (likewise for RX)
46 * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY
47 * is asserted (likewise for RX)
Rabin Vincent4956e102010-07-21 12:54:40 +010048 */
49struct variant_data {
50 unsigned int clkreg;
Rabin Vincent4380c142010-07-21 12:55:18 +010051 unsigned int clkreg_enable;
Rabin Vincent08458ef2010-07-21 12:55:59 +010052 unsigned int datalength_bits;
Rabin Vincent8301bb62010-08-09 12:57:30 +010053 unsigned int fifosize;
54 unsigned int fifohalfsize;
Rabin Vincent4956e102010-07-21 12:54:40 +010055};
56
57static struct variant_data variant_arm = {
Rabin Vincent8301bb62010-08-09 12:57:30 +010058 .fifosize = 16 * 4,
59 .fifohalfsize = 8 * 4,
Rabin Vincent08458ef2010-07-21 12:55:59 +010060 .datalength_bits = 16,
Rabin Vincent4956e102010-07-21 12:54:40 +010061};
62
63static struct variant_data variant_u300 = {
Rabin Vincent8301bb62010-08-09 12:57:30 +010064 .fifosize = 16 * 4,
65 .fifohalfsize = 8 * 4,
Rabin Vincent4380c142010-07-21 12:55:18 +010066 .clkreg_enable = 1 << 13, /* HWFCEN */
Rabin Vincent08458ef2010-07-21 12:55:59 +010067 .datalength_bits = 16,
Rabin Vincent4956e102010-07-21 12:54:40 +010068};
69
70static struct variant_data variant_ux500 = {
Rabin Vincent8301bb62010-08-09 12:57:30 +010071 .fifosize = 30 * 4,
72 .fifohalfsize = 8 * 4,
Rabin Vincent4956e102010-07-21 12:54:40 +010073 .clkreg = MCI_CLK_ENABLE,
Rabin Vincent4380c142010-07-21 12:55:18 +010074 .clkreg_enable = 1 << 14, /* HWFCEN */
Rabin Vincent08458ef2010-07-21 12:55:59 +010075 .datalength_bits = 24,
Rabin Vincent4956e102010-07-21 12:54:40 +010076};
Linus Walleija6a64642009-09-14 12:56:14 +010077/*
78 * This must be called with host->lock held
79 */
80static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
81{
Rabin Vincent4956e102010-07-21 12:54:40 +010082 struct variant_data *variant = host->variant;
83 u32 clk = variant->clkreg;
Linus Walleija6a64642009-09-14 12:56:14 +010084
85 if (desired) {
86 if (desired >= host->mclk) {
87 clk = MCI_CLK_BYPASS;
88 host->cclk = host->mclk;
89 } else {
90 clk = host->mclk / (2 * desired) - 1;
91 if (clk >= 256)
92 clk = 255;
93 host->cclk = host->mclk / (2 * (clk + 1));
94 }
Rabin Vincent4380c142010-07-21 12:55:18 +010095
96 clk |= variant->clkreg_enable;
Linus Walleija6a64642009-09-14 12:56:14 +010097 clk |= MCI_CLK_ENABLE;
98 /* This hasn't proven to be worthwhile */
99 /* clk |= MCI_CLK_PWRSAVE; */
100 }
101
Linus Walleij9e6c82c2009-09-14 12:57:11 +0100102 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4)
Linus Walleij771dc152010-04-08 07:38:52 +0100103 clk |= MCI_4BIT_BUS;
104 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8)
105 clk |= MCI_ST_8BIT_BUS;
Linus Walleij9e6c82c2009-09-14 12:57:11 +0100106
Linus Walleija6a64642009-09-14 12:56:14 +0100107 writel(clk, host->base + MMCICLOCK);
108}
109
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110static void
111mmci_request_end(struct mmci_host *host, struct mmc_request *mrq)
112{
113 writel(0, host->base + MMCICOMMAND);
114
Russell Kinge47c2222007-01-08 16:42:51 +0000115 BUG_ON(host->data);
116
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 host->mrq = NULL;
118 host->cmd = NULL;
119
120 if (mrq->data)
121 mrq->data->bytes_xfered = host->data_xfered;
122
123 /*
124 * Need to drop the host lock here; mmc_request_done may call
125 * back into the driver...
126 */
127 spin_unlock(&host->lock);
128 mmc_request_done(host->mmc, mrq);
129 spin_lock(&host->lock);
130}
131
Linus Walleij2686b4b2010-10-19 12:39:48 +0100132static void mmci_set_mask1(struct mmci_host *host, unsigned int mask)
133{
134 void __iomem *base = host->base;
135
136 if (host->singleirq) {
137 unsigned int mask0 = readl(base + MMCIMASK0);
138
139 mask0 &= ~MCI_IRQ1MASK;
140 mask0 |= mask;
141
142 writel(mask0, base + MMCIMASK0);
143 }
144
145 writel(mask, base + MMCIMASK1);
146}
147
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148static void mmci_stop_data(struct mmci_host *host)
149{
150 writel(0, host->base + MMCIDATACTRL);
Linus Walleij2686b4b2010-10-19 12:39:48 +0100151 mmci_set_mask1(host, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 host->data = NULL;
153}
154
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100155static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data)
156{
157 unsigned int flags = SG_MITER_ATOMIC;
158
159 if (data->flags & MMC_DATA_READ)
160 flags |= SG_MITER_TO_SG;
161 else
162 flags |= SG_MITER_FROM_SG;
163
164 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
165}
166
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
168{
Rabin Vincent8301bb62010-08-09 12:57:30 +0100169 struct variant_data *variant = host->variant;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170 unsigned int datactrl, timeout, irqmask;
Russell King7b09cda2005-07-01 12:02:59 +0100171 unsigned long long clks;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 void __iomem *base;
Russell King3bc87f22006-08-27 13:51:28 +0100173 int blksz_bits;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174
Linus Walleij64de0282010-02-19 01:09:10 +0100175 dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n",
176 data->blksz, data->blocks, data->flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177
178 host->data = data;
Rabin Vincent528320d2010-07-21 12:49:49 +0100179 host->size = data->blksz * data->blocks;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180 host->data_xfered = 0;
181
182 mmci_init_sg(host, data);
183
Russell King7b09cda2005-07-01 12:02:59 +0100184 clks = (unsigned long long)data->timeout_ns * host->cclk;
185 do_div(clks, 1000000000UL);
186
187 timeout = data->timeout_clks + (unsigned int)clks;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188
189 base = host->base;
190 writel(timeout, base + MMCIDATATIMER);
191 writel(host->size, base + MMCIDATALENGTH);
192
Russell King3bc87f22006-08-27 13:51:28 +0100193 blksz_bits = ffs(data->blksz) - 1;
194 BUG_ON(1 << blksz_bits != data->blksz);
195
196 datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 if (data->flags & MMC_DATA_READ) {
198 datactrl |= MCI_DPSM_DIRECTION;
199 irqmask = MCI_RXFIFOHALFFULLMASK;
Russell King0425a142006-02-16 16:48:31 +0000200
201 /*
202 * If we have less than a FIFOSIZE of bytes to transfer,
203 * trigger a PIO interrupt as soon as any data is available.
204 */
Rabin Vincent8301bb62010-08-09 12:57:30 +0100205 if (host->size < variant->fifosize)
Russell King0425a142006-02-16 16:48:31 +0000206 irqmask |= MCI_RXDATAAVLBLMASK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 } else {
208 /*
209 * We don't actually need to include "FIFO empty" here
210 * since its implicit in "FIFO half empty".
211 */
212 irqmask = MCI_TXFIFOHALFEMPTYMASK;
213 }
214
215 writel(datactrl, base + MMCIDATACTRL);
216 writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
Linus Walleij2686b4b2010-10-19 12:39:48 +0100217 mmci_set_mask1(host, irqmask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218}
219
220static void
221mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
222{
223 void __iomem *base = host->base;
224
Linus Walleij64de0282010-02-19 01:09:10 +0100225 dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226 cmd->opcode, cmd->arg, cmd->flags);
227
228 if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) {
229 writel(0, base + MMCICOMMAND);
230 udelay(1);
231 }
232
233 c |= cmd->opcode | MCI_CPSM_ENABLE;
Russell Kinge9225172006-02-02 12:23:12 +0000234 if (cmd->flags & MMC_RSP_PRESENT) {
235 if (cmd->flags & MMC_RSP_136)
236 c |= MCI_CPSM_LONGRSP;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237 c |= MCI_CPSM_RESPONSE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238 }
239 if (/*interrupt*/0)
240 c |= MCI_CPSM_INTERRUPT;
241
242 host->cmd = cmd;
243
244 writel(cmd->arg, base + MMCIARGUMENT);
245 writel(c, base + MMCICOMMAND);
246}
247
248static void
249mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
250 unsigned int status)
251{
252 if (status & MCI_DATABLOCKEND) {
Russell King3bc87f22006-08-27 13:51:28 +0100253 host->data_xfered += data->blksz;
Linus Walleijf28e8a42010-01-25 07:14:46 +0100254#ifdef CONFIG_ARCH_U300
255 /*
256 * On the U300 some signal or other is
257 * badly routed so that a data write does
258 * not properly terminate with a MCI_DATAEND
259 * status flag. This quirk will make writes
260 * work again.
261 */
262 if (data->flags & MMC_DATA_WRITE)
263 status |= MCI_DATAEND;
264#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265 }
266 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
Linus Walleij64de0282010-02-19 01:09:10 +0100267 dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ (status %08x)\n", status);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268 if (status & MCI_DATACRCFAIL)
Pierre Ossman17b04292007-07-22 22:18:46 +0200269 data->error = -EILSEQ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270 else if (status & MCI_DATATIMEOUT)
Pierre Ossman17b04292007-07-22 22:18:46 +0200271 data->error = -ETIMEDOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272 else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
Pierre Ossman17b04292007-07-22 22:18:46 +0200273 data->error = -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 status |= MCI_DATAEND;
Russell Kinge9c091b2006-01-04 16:24:05 +0000275
276 /*
277 * We hit an error condition. Ensure that any data
278 * partially written to a page is properly coherent.
279 */
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100280 if (data->flags & MMC_DATA_READ) {
281 struct sg_mapping_iter *sg_miter = &host->sg_miter;
282 unsigned long flags;
283
284 local_irq_save(flags);
285 if (sg_miter_next(sg_miter)) {
286 flush_dcache_page(sg_miter->page);
287 sg_miter_stop(sg_miter);
288 }
289 local_irq_restore(flags);
290 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 }
292 if (status & MCI_DATAEND) {
293 mmci_stop_data(host);
294
295 if (!data->stop) {
296 mmci_request_end(host, data->mrq);
297 } else {
298 mmci_start_command(host, data->stop, 0);
299 }
300 }
301}
302
303static void
304mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
305 unsigned int status)
306{
307 void __iomem *base = host->base;
308
309 host->cmd = NULL;
310
311 cmd->resp[0] = readl(base + MMCIRESPONSE0);
312 cmd->resp[1] = readl(base + MMCIRESPONSE1);
313 cmd->resp[2] = readl(base + MMCIRESPONSE2);
314 cmd->resp[3] = readl(base + MMCIRESPONSE3);
315
316 if (status & MCI_CMDTIMEOUT) {
Pierre Ossman17b04292007-07-22 22:18:46 +0200317 cmd->error = -ETIMEDOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318 } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
Pierre Ossman17b04292007-07-22 22:18:46 +0200319 cmd->error = -EILSEQ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 }
321
Pierre Ossman17b04292007-07-22 22:18:46 +0200322 if (!cmd->data || cmd->error) {
Russell Kinge47c2222007-01-08 16:42:51 +0000323 if (host->data)
324 mmci_stop_data(host);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325 mmci_request_end(host, cmd->mrq);
326 } else if (!(cmd->data->flags & MMC_DATA_READ)) {
327 mmci_start_data(host, cmd->data);
328 }
329}
330
331static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain)
332{
333 void __iomem *base = host->base;
334 char *ptr = buffer;
335 u32 status;
Linus Walleij26eed9a2008-04-26 23:39:44 +0100336 int host_remain = host->size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337
338 do {
Linus Walleij26eed9a2008-04-26 23:39:44 +0100339 int count = host_remain - (readl(base + MMCIFIFOCNT) << 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340
341 if (count > remain)
342 count = remain;
343
344 if (count <= 0)
345 break;
346
347 readsl(base + MMCIFIFO, ptr, count >> 2);
348
349 ptr += count;
350 remain -= count;
Linus Walleij26eed9a2008-04-26 23:39:44 +0100351 host_remain -= count;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352
353 if (remain == 0)
354 break;
355
356 status = readl(base + MMCISTATUS);
357 } while (status & MCI_RXDATAAVLBL);
358
359 return ptr - buffer;
360}
361
362static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status)
363{
Rabin Vincent8301bb62010-08-09 12:57:30 +0100364 struct variant_data *variant = host->variant;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365 void __iomem *base = host->base;
366 char *ptr = buffer;
367
368 do {
369 unsigned int count, maxcnt;
370
Rabin Vincent8301bb62010-08-09 12:57:30 +0100371 maxcnt = status & MCI_TXFIFOEMPTY ?
372 variant->fifosize : variant->fifohalfsize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700373 count = min(remain, maxcnt);
374
375 writesl(base + MMCIFIFO, ptr, count >> 2);
376
377 ptr += count;
378 remain -= count;
379
380 if (remain == 0)
381 break;
382
383 status = readl(base + MMCISTATUS);
384 } while (status & MCI_TXFIFOHALFEMPTY);
385
386 return ptr - buffer;
387}
388
389/*
390 * PIO data transfer IRQ handler.
391 */
David Howells7d12e782006-10-05 14:55:46 +0100392static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393{
394 struct mmci_host *host = dev_id;
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100395 struct sg_mapping_iter *sg_miter = &host->sg_miter;
Rabin Vincent8301bb62010-08-09 12:57:30 +0100396 struct variant_data *variant = host->variant;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397 void __iomem *base = host->base;
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100398 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399 u32 status;
400
401 status = readl(base + MMCISTATUS);
402
Linus Walleij64de0282010-02-19 01:09:10 +0100403 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700404
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100405 local_irq_save(flags);
406
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407 do {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408 unsigned int remain, len;
409 char *buffer;
410
411 /*
412 * For write, we only need to test the half-empty flag
413 * here - if the FIFO is completely empty, then by
414 * definition it is more than half empty.
415 *
416 * For read, check for data available.
417 */
418 if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL)))
419 break;
420
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100421 if (!sg_miter_next(sg_miter))
422 break;
423
424 buffer = sg_miter->addr;
425 remain = sg_miter->length;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426
427 len = 0;
428 if (status & MCI_RXACTIVE)
429 len = mmci_pio_read(host, buffer, remain);
430 if (status & MCI_TXACTIVE)
431 len = mmci_pio_write(host, buffer, remain, status);
432
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100433 sg_miter->consumed = len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435 host->size -= len;
436 remain -= len;
437
438 if (remain)
439 break;
440
Russell Kinge9c091b2006-01-04 16:24:05 +0000441 if (status & MCI_RXACTIVE)
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100442 flush_dcache_page(sg_miter->page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443
444 status = readl(base + MMCISTATUS);
445 } while (1);
446
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100447 sg_miter_stop(sg_miter);
448
449 local_irq_restore(flags);
450
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451 /*
452 * If we're nearing the end of the read, switch to
453 * "any data available" mode.
454 */
Rabin Vincent8301bb62010-08-09 12:57:30 +0100455 if (status & MCI_RXACTIVE && host->size < variant->fifosize)
Linus Walleij2686b4b2010-10-19 12:39:48 +0100456 mmci_set_mask1(host, MCI_RXDATAAVLBLMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457
458 /*
459 * If we run out of data, disable the data IRQs; this
460 * prevents a race where the FIFO becomes empty before
461 * the chip itself has disabled the data path, and
462 * stops us racing with our data end IRQ.
463 */
464 if (host->size == 0) {
Linus Walleij2686b4b2010-10-19 12:39:48 +0100465 mmci_set_mask1(host, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466 writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
467 }
468
469 return IRQ_HANDLED;
470}
471
472/*
473 * Handle completion of command and data transfers.
474 */
David Howells7d12e782006-10-05 14:55:46 +0100475static irqreturn_t mmci_irq(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476{
477 struct mmci_host *host = dev_id;
478 u32 status;
479 int ret = 0;
480
481 spin_lock(&host->lock);
482
483 do {
484 struct mmc_command *cmd;
485 struct mmc_data *data;
486
487 status = readl(host->base + MMCISTATUS);
Linus Walleij2686b4b2010-10-19 12:39:48 +0100488
489 if (host->singleirq) {
490 if (status & readl(host->base + MMCIMASK1))
491 mmci_pio_irq(irq, dev_id);
492
493 status &= ~MCI_IRQ1MASK;
494 }
495
Linus Torvalds1da177e2005-04-16 15:20:36 -0700496 status &= readl(host->base + MMCIMASK0);
497 writel(status, host->base + MMCICLEAR);
498
Linus Walleij64de0282010-02-19 01:09:10 +0100499 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700500
501 data = host->data;
502 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|
503 MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data)
504 mmci_data_irq(host, data, status);
505
506 cmd = host->cmd;
507 if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd)
508 mmci_cmd_irq(host, cmd, status);
509
510 ret = 1;
511 } while (status);
512
513 spin_unlock(&host->lock);
514
515 return IRQ_RETVAL(ret);
516}
517
518static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
519{
520 struct mmci_host *host = mmc_priv(mmc);
Linus Walleij9e943022008-10-24 21:17:50 +0100521 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522
523 WARN_ON(host->mrq != NULL);
524
Nicolas Pitre019a5f52007-10-11 01:06:03 -0400525 if (mrq->data && !is_power_of_2(mrq->data->blksz)) {
Linus Walleij64de0282010-02-19 01:09:10 +0100526 dev_err(mmc_dev(mmc), "unsupported block size (%d bytes)\n",
527 mrq->data->blksz);
Pierre Ossman255d01a2007-07-24 20:38:53 +0200528 mrq->cmd->error = -EINVAL;
529 mmc_request_done(mmc, mrq);
530 return;
531 }
532
Linus Walleij9e943022008-10-24 21:17:50 +0100533 spin_lock_irqsave(&host->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700534
535 host->mrq = mrq;
536
537 if (mrq->data && mrq->data->flags & MMC_DATA_READ)
538 mmci_start_data(host, mrq->data);
539
540 mmci_start_command(host, mrq->cmd, 0);
541
Linus Walleij9e943022008-10-24 21:17:50 +0100542 spin_unlock_irqrestore(&host->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543}
544
545static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
546{
547 struct mmci_host *host = mmc_priv(mmc);
Linus Walleija6a64642009-09-14 12:56:14 +0100548 u32 pwr = 0;
549 unsigned long flags;
Linus Walleij99fc5132010-09-29 01:08:27 -0400550 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552 switch (ios->power_mode) {
553 case MMC_POWER_OFF:
Linus Walleij99fc5132010-09-29 01:08:27 -0400554 if (host->vcc)
555 ret = mmc_regulator_set_ocr(mmc, host->vcc, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700556 break;
557 case MMC_POWER_UP:
Linus Walleij99fc5132010-09-29 01:08:27 -0400558 if (host->vcc) {
559 ret = mmc_regulator_set_ocr(mmc, host->vcc, ios->vdd);
560 if (ret) {
561 dev_err(mmc_dev(mmc), "unable to set OCR\n");
562 /*
563 * The .set_ios() function in the mmc_host_ops
564 * struct return void, and failing to set the
565 * power should be rare so we print an error
566 * and return here.
567 */
568 return;
569 }
570 }
Rabin Vincentbb8f5632010-07-21 12:53:57 +0100571 if (host->plat->vdd_handler)
572 pwr |= host->plat->vdd_handler(mmc_dev(mmc), ios->vdd,
573 ios->power_mode);
Linus Walleijcc30d602009-01-04 15:18:54 +0100574 /* The ST version does not have this, fall through to POWER_ON */
Linus Walleijf17a1f02009-08-04 01:01:02 +0100575 if (host->hw_designer != AMBA_VENDOR_ST) {
Linus Walleijcc30d602009-01-04 15:18:54 +0100576 pwr |= MCI_PWR_UP;
577 break;
578 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579 case MMC_POWER_ON:
580 pwr |= MCI_PWR_ON;
581 break;
582 }
583
Linus Walleijcc30d602009-01-04 15:18:54 +0100584 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) {
Linus Walleijf17a1f02009-08-04 01:01:02 +0100585 if (host->hw_designer != AMBA_VENDOR_ST)
Linus Walleijcc30d602009-01-04 15:18:54 +0100586 pwr |= MCI_ROD;
587 else {
588 /*
589 * The ST Micro variant use the ROD bit for something
590 * else and only has OD (Open Drain).
591 */
592 pwr |= MCI_OD;
593 }
594 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595
Linus Walleija6a64642009-09-14 12:56:14 +0100596 spin_lock_irqsave(&host->lock, flags);
597
598 mmci_set_clkreg(host, ios->clock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599
600 if (host->pwr != pwr) {
601 host->pwr = pwr;
602 writel(pwr, host->base + MMCIPOWER);
603 }
Linus Walleija6a64642009-09-14 12:56:14 +0100604
605 spin_unlock_irqrestore(&host->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606}
607
Russell King89001442009-07-09 15:16:07 +0100608static int mmci_get_ro(struct mmc_host *mmc)
609{
610 struct mmci_host *host = mmc_priv(mmc);
611
612 if (host->gpio_wp == -ENOSYS)
613 return -ENOSYS;
614
Linus Walleij18a063012010-09-12 12:56:44 +0100615 return gpio_get_value_cansleep(host->gpio_wp);
Russell King89001442009-07-09 15:16:07 +0100616}
617
618static int mmci_get_cd(struct mmc_host *mmc)
619{
620 struct mmci_host *host = mmc_priv(mmc);
Rabin Vincent29719442010-08-09 12:54:43 +0100621 struct mmci_platform_data *plat = host->plat;
Russell King89001442009-07-09 15:16:07 +0100622 unsigned int status;
623
Rabin Vincent4b8caec2010-08-09 12:56:40 +0100624 if (host->gpio_cd == -ENOSYS) {
625 if (!plat->status)
626 return 1; /* Assume always present */
627
Rabin Vincent29719442010-08-09 12:54:43 +0100628 status = plat->status(mmc_dev(host->mmc));
Rabin Vincent4b8caec2010-08-09 12:56:40 +0100629 } else
Linus Walleij18a063012010-09-12 12:56:44 +0100630 status = !!gpio_get_value_cansleep(host->gpio_cd)
631 ^ plat->cd_invert;
Russell King89001442009-07-09 15:16:07 +0100632
Russell King74bc8092010-07-29 15:58:59 +0100633 /*
634 * Use positive logic throughout - status is zero for no card,
635 * non-zero for card inserted.
636 */
637 return status;
Russell King89001442009-07-09 15:16:07 +0100638}
639
Rabin Vincent148b8b32010-08-09 12:55:48 +0100640static irqreturn_t mmci_cd_irq(int irq, void *dev_id)
641{
642 struct mmci_host *host = dev_id;
643
644 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
645
646 return IRQ_HANDLED;
647}
648
David Brownellab7aefd2006-11-12 17:55:30 -0800649static const struct mmc_host_ops mmci_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650 .request = mmci_request,
651 .set_ios = mmci_set_ios,
Russell King89001442009-07-09 15:16:07 +0100652 .get_ro = mmci_get_ro,
653 .get_cd = mmci_get_cd,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700654};
655
Alessandro Rubini03fbdb12009-05-20 22:39:08 +0100656static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700657{
Linus Walleij6ef297f2009-09-22 14:29:36 +0100658 struct mmci_platform_data *plat = dev->dev.platform_data;
Rabin Vincent4956e102010-07-21 12:54:40 +0100659 struct variant_data *variant = id->data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660 struct mmci_host *host;
661 struct mmc_host *mmc;
Linus Walleij2686b4b2010-10-19 12:39:48 +0100662 unsigned int mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663 int ret;
664
665 /* must have platform data */
666 if (!plat) {
667 ret = -EINVAL;
668 goto out;
669 }
670
671 ret = amba_request_regions(dev, DRIVER_NAME);
672 if (ret)
673 goto out;
674
675 mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev);
676 if (!mmc) {
677 ret = -ENOMEM;
678 goto rel_regions;
679 }
680
681 host = mmc_priv(mmc);
Rabin Vincent4ea580f2009-04-17 08:44:19 +0530682 host->mmc = mmc;
Russell King012b7d32009-07-09 15:13:56 +0100683
Russell King89001442009-07-09 15:16:07 +0100684 host->gpio_wp = -ENOSYS;
685 host->gpio_cd = -ENOSYS;
Rabin Vincent148b8b32010-08-09 12:55:48 +0100686 host->gpio_cd_irq = -1;
Russell King89001442009-07-09 15:16:07 +0100687
Russell King012b7d32009-07-09 15:13:56 +0100688 host->hw_designer = amba_manf(dev);
689 host->hw_revision = amba_rev(dev);
Linus Walleij64de0282010-02-19 01:09:10 +0100690 dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer);
691 dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision);
Russell King012b7d32009-07-09 15:13:56 +0100692
Russell Kingee569c42008-11-30 17:38:14 +0000693 host->clk = clk_get(&dev->dev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700694 if (IS_ERR(host->clk)) {
695 ret = PTR_ERR(host->clk);
696 host->clk = NULL;
697 goto host_free;
698 }
699
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 ret = clk_enable(host->clk);
701 if (ret)
Russell Kinga8d35842006-01-03 18:41:37 +0000702 goto clk_free;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703
704 host->plat = plat;
Rabin Vincent4956e102010-07-21 12:54:40 +0100705 host->variant = variant;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706 host->mclk = clk_get_rate(host->clk);
Linus Walleijc8df9a52008-04-29 09:34:07 +0100707 /*
708 * According to the spec, mclk is max 100 MHz,
709 * so we try to adjust the clock down to this,
710 * (if possible).
711 */
712 if (host->mclk > 100000000) {
713 ret = clk_set_rate(host->clk, 100000000);
714 if (ret < 0)
715 goto clk_disable;
716 host->mclk = clk_get_rate(host->clk);
Linus Walleij64de0282010-02-19 01:09:10 +0100717 dev_dbg(mmc_dev(mmc), "eventual mclk rate: %u Hz\n",
718 host->mclk);
Linus Walleijc8df9a52008-04-29 09:34:07 +0100719 }
Linus Walleijdc890c22009-06-07 23:27:31 +0100720 host->base = ioremap(dev->res.start, resource_size(&dev->res));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700721 if (!host->base) {
722 ret = -ENOMEM;
723 goto clk_disable;
724 }
725
726 mmc->ops = &mmci_ops;
727 mmc->f_min = (host->mclk + 511) / 512;
Linus Walleij808d97c2010-04-08 07:39:38 +0100728 /*
729 * If the platform data supplies a maximum operating
730 * frequency, this takes precedence. Else, we fall back
731 * to using the module parameter, which has a (low)
732 * default value in case it is not specified. Either
733 * value must not exceed the clock rate into the block,
734 * of course.
735 */
736 if (plat->f_max)
737 mmc->f_max = min(host->mclk, plat->f_max);
738 else
739 mmc->f_max = min(host->mclk, fmax);
Linus Walleij64de0282010-02-19 01:09:10 +0100740 dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max);
741
Linus Walleij34e84f32009-09-22 14:41:40 +0100742#ifdef CONFIG_REGULATOR
743 /* If we're using the regulator framework, try to fetch a regulator */
744 host->vcc = regulator_get(&dev->dev, "vmmc");
745 if (IS_ERR(host->vcc))
746 host->vcc = NULL;
747 else {
748 int mask = mmc_regulator_get_ocrmask(host->vcc);
749
750 if (mask < 0)
751 dev_err(&dev->dev, "error getting OCR mask (%d)\n",
752 mask);
753 else {
754 host->mmc->ocr_avail = (u32) mask;
755 if (plat->ocr_mask)
756 dev_warn(&dev->dev,
757 "Provided ocr_mask/setpower will not be used "
758 "(using regulator instead)\n");
759 }
760 }
761#endif
762 /* Fall back to platform data if no regulator is found */
763 if (host->vcc == NULL)
764 mmc->ocr_avail = plat->ocr_mask;
Linus Walleij9e6c82c2009-09-14 12:57:11 +0100765 mmc->caps = plat->capabilities;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700766
767 /*
768 * We can do SGIO
769 */
Martin K. Petersena36274e2010-09-10 01:33:59 -0400770 mmc->max_segs = NR_SG;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700771
772 /*
Rabin Vincent08458ef2010-07-21 12:55:59 +0100773 * Since only a certain number of bits are valid in the data length
774 * register, we must ensure that we don't exceed 2^num-1 bytes in a
775 * single request.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700776 */
Rabin Vincent08458ef2010-07-21 12:55:59 +0100777 mmc->max_req_size = (1 << variant->datalength_bits) - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700778
779 /*
780 * Set the maximum segment size. Since we aren't doing DMA
781 * (yet) we are only limited by the data length register.
782 */
Pierre Ossman55db8902006-11-21 17:55:45 +0100783 mmc->max_seg_size = mmc->max_req_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784
Pierre Ossmanfe4a3c72006-11-21 17:54:23 +0100785 /*
786 * Block size can be up to 2048 bytes, but must be a power of two.
787 */
788 mmc->max_blk_size = 2048;
789
Pierre Ossman55db8902006-11-21 17:55:45 +0100790 /*
791 * No limit on the number of blocks transferred.
792 */
793 mmc->max_blk_count = mmc->max_req_size;
794
Linus Torvalds1da177e2005-04-16 15:20:36 -0700795 spin_lock_init(&host->lock);
796
797 writel(0, host->base + MMCIMASK0);
798 writel(0, host->base + MMCIMASK1);
799 writel(0xfff, host->base + MMCICLEAR);
800
Russell King89001442009-07-09 15:16:07 +0100801 if (gpio_is_valid(plat->gpio_cd)) {
802 ret = gpio_request(plat->gpio_cd, DRIVER_NAME " (cd)");
803 if (ret == 0)
804 ret = gpio_direction_input(plat->gpio_cd);
805 if (ret == 0)
806 host->gpio_cd = plat->gpio_cd;
807 else if (ret != -ENOSYS)
808 goto err_gpio_cd;
Rabin Vincent148b8b32010-08-09 12:55:48 +0100809
810 ret = request_any_context_irq(gpio_to_irq(plat->gpio_cd),
811 mmci_cd_irq, 0,
812 DRIVER_NAME " (cd)", host);
813 if (ret >= 0)
814 host->gpio_cd_irq = gpio_to_irq(plat->gpio_cd);
Russell King89001442009-07-09 15:16:07 +0100815 }
816 if (gpio_is_valid(plat->gpio_wp)) {
817 ret = gpio_request(plat->gpio_wp, DRIVER_NAME " (wp)");
818 if (ret == 0)
819 ret = gpio_direction_input(plat->gpio_wp);
820 if (ret == 0)
821 host->gpio_wp = plat->gpio_wp;
822 else if (ret != -ENOSYS)
823 goto err_gpio_wp;
824 }
825
Rabin Vincent4b8caec2010-08-09 12:56:40 +0100826 if ((host->plat->status || host->gpio_cd != -ENOSYS)
827 && host->gpio_cd_irq < 0)
Rabin Vincent148b8b32010-08-09 12:55:48 +0100828 mmc->caps |= MMC_CAP_NEEDS_POLL;
829
Thomas Gleixnerdace1452006-07-01 19:29:38 -0700830 ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831 if (ret)
832 goto unmap;
833
Linus Walleij2686b4b2010-10-19 12:39:48 +0100834 if (dev->irq[1] == NO_IRQ)
835 host->singleirq = true;
836 else {
837 ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED,
838 DRIVER_NAME " (pio)", host);
839 if (ret)
840 goto irq0_free;
841 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842
Linus Walleij2686b4b2010-10-19 12:39:48 +0100843 mask = MCI_IRQENABLE;
844 writel(mask, host->base + MMCIMASK0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700845
846 amba_set_drvdata(dev, mmc);
847
848 mmc_add_host(mmc);
849
Linus Walleij64de0282010-02-19 01:09:10 +0100850 dev_info(&dev->dev, "%s: MMCI rev %x cfg %02x at 0x%016llx irq %d,%d\n",
Russell Kingd366b642005-08-19 09:40:08 +0100851 mmc_hostname(mmc), amba_rev(dev), amba_config(dev),
Greg Kroah-Hartmane29419f2006-06-12 15:20:16 -0700852 (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700853
Linus Torvalds1da177e2005-04-16 15:20:36 -0700854 return 0;
855
856 irq0_free:
857 free_irq(dev->irq[0], host);
858 unmap:
Russell King89001442009-07-09 15:16:07 +0100859 if (host->gpio_wp != -ENOSYS)
860 gpio_free(host->gpio_wp);
861 err_gpio_wp:
Rabin Vincent148b8b32010-08-09 12:55:48 +0100862 if (host->gpio_cd_irq >= 0)
863 free_irq(host->gpio_cd_irq, host);
Russell King89001442009-07-09 15:16:07 +0100864 if (host->gpio_cd != -ENOSYS)
865 gpio_free(host->gpio_cd);
866 err_gpio_cd:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700867 iounmap(host->base);
868 clk_disable:
869 clk_disable(host->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700870 clk_free:
871 clk_put(host->clk);
872 host_free:
873 mmc_free_host(mmc);
874 rel_regions:
875 amba_release_regions(dev);
876 out:
877 return ret;
878}
879
Linus Walleij6dc4a472009-03-07 00:23:52 +0100880static int __devexit mmci_remove(struct amba_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881{
882 struct mmc_host *mmc = amba_get_drvdata(dev);
883
884 amba_set_drvdata(dev, NULL);
885
886 if (mmc) {
887 struct mmci_host *host = mmc_priv(mmc);
888
Linus Torvalds1da177e2005-04-16 15:20:36 -0700889 mmc_remove_host(mmc);
890
891 writel(0, host->base + MMCIMASK0);
892 writel(0, host->base + MMCIMASK1);
893
894 writel(0, host->base + MMCICOMMAND);
895 writel(0, host->base + MMCIDATACTRL);
896
897 free_irq(dev->irq[0], host);
Linus Walleij2686b4b2010-10-19 12:39:48 +0100898 if (!host->singleirq)
899 free_irq(dev->irq[1], host);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700900
Russell King89001442009-07-09 15:16:07 +0100901 if (host->gpio_wp != -ENOSYS)
902 gpio_free(host->gpio_wp);
Rabin Vincent148b8b32010-08-09 12:55:48 +0100903 if (host->gpio_cd_irq >= 0)
904 free_irq(host->gpio_cd_irq, host);
Russell King89001442009-07-09 15:16:07 +0100905 if (host->gpio_cd != -ENOSYS)
906 gpio_free(host->gpio_cd);
907
Linus Torvalds1da177e2005-04-16 15:20:36 -0700908 iounmap(host->base);
909 clk_disable(host->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700910 clk_put(host->clk);
911
Linus Walleij99fc5132010-09-29 01:08:27 -0400912 if (host->vcc)
913 mmc_regulator_set_ocr(mmc, host->vcc, 0);
Linus Walleij34e84f32009-09-22 14:41:40 +0100914 regulator_put(host->vcc);
915
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916 mmc_free_host(mmc);
917
918 amba_release_regions(dev);
919 }
920
921 return 0;
922}
923
924#ifdef CONFIG_PM
Pavel Macheke5378ca2005-04-16 15:25:29 -0700925static int mmci_suspend(struct amba_device *dev, pm_message_t state)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926{
927 struct mmc_host *mmc = amba_get_drvdata(dev);
928 int ret = 0;
929
930 if (mmc) {
931 struct mmci_host *host = mmc_priv(mmc);
932
Matt Fleming1a13f8f2010-05-26 14:42:08 -0700933 ret = mmc_suspend_host(mmc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934 if (ret == 0)
935 writel(0, host->base + MMCIMASK0);
936 }
937
938 return ret;
939}
940
941static int mmci_resume(struct amba_device *dev)
942{
943 struct mmc_host *mmc = amba_get_drvdata(dev);
944 int ret = 0;
945
946 if (mmc) {
947 struct mmci_host *host = mmc_priv(mmc);
948
949 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
950
951 ret = mmc_resume_host(mmc);
952 }
953
954 return ret;
955}
956#else
957#define mmci_suspend NULL
958#define mmci_resume NULL
959#endif
960
961static struct amba_id mmci_ids[] = {
962 {
963 .id = 0x00041180,
964 .mask = 0x000fffff,
Rabin Vincent4956e102010-07-21 12:54:40 +0100965 .data = &variant_arm,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 },
967 {
968 .id = 0x00041181,
969 .mask = 0x000fffff,
Rabin Vincent4956e102010-07-21 12:54:40 +0100970 .data = &variant_arm,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700971 },
Linus Walleijcc30d602009-01-04 15:18:54 +0100972 /* ST Micro variants */
973 {
974 .id = 0x00180180,
975 .mask = 0x00ffffff,
Rabin Vincent4956e102010-07-21 12:54:40 +0100976 .data = &variant_u300,
Linus Walleijcc30d602009-01-04 15:18:54 +0100977 },
978 {
979 .id = 0x00280180,
980 .mask = 0x00ffffff,
Rabin Vincent4956e102010-07-21 12:54:40 +0100981 .data = &variant_u300,
982 },
983 {
984 .id = 0x00480180,
985 .mask = 0x00ffffff,
986 .data = &variant_ux500,
Linus Walleijcc30d602009-01-04 15:18:54 +0100987 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700988 { 0, 0 },
989};
990
991static struct amba_driver mmci_driver = {
992 .drv = {
993 .name = DRIVER_NAME,
994 },
995 .probe = mmci_probe,
Linus Walleij6dc4a472009-03-07 00:23:52 +0100996 .remove = __devexit_p(mmci_remove),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700997 .suspend = mmci_suspend,
998 .resume = mmci_resume,
999 .id_table = mmci_ids,
1000};
1001
1002static int __init mmci_init(void)
1003{
1004 return amba_driver_register(&mmci_driver);
1005}
1006
1007static void __exit mmci_exit(void)
1008{
1009 amba_driver_unregister(&mmci_driver);
1010}
1011
1012module_init(mmci_init);
1013module_exit(mmci_exit);
1014module_param(fmax, uint, 0444);
1015
1016MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver");
1017MODULE_LICENSE("GPL");