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Ben Dooks431107e2010-01-26 10:11:04 +09001/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
Ben Dooks5718df92008-10-21 14:07:09 +01002 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
Naveen Krishna Ch290d0982010-06-22 07:39:18 +090020#include <linux/input.h>
Ben Dooks5718df92008-10-21 14:07:09 +010021#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23#include <linux/io.h>
Ben Dooks096941e2008-10-31 16:14:59 +000024#include <linux/i2c.h>
Mark Browna7a81d02010-02-17 18:19:31 +000025#include <linux/leds.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000026#include <linux/fb.h>
27#include <linux/gpio.h>
28#include <linux/delay.h>
Mark Brown3056ea02009-01-27 16:18:01 +000029#include <linux/smsc911x.h>
Mark Brown42015c12009-11-03 14:42:06 +000030#include <linux/regulator/fixed.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000031
Mark Brownecc558a2009-02-17 15:59:38 +000032#ifdef CONFIG_SMDK6410_WM1190_EV1
33#include <linux/mfd/wm8350/core.h>
34#include <linux/mfd/wm8350/pmic.h>
35#endif
Ben Dooks438a5d42008-11-19 15:41:34 +000036
Mark Brown60f91012010-02-17 18:19:29 +000037#ifdef CONFIG_SMDK6410_WM1192_EV1
Mark Browna7a81d02010-02-17 18:19:31 +000038#include <linux/mfd/wm831x/core.h>
Mark Brown60f91012010-02-17 18:19:29 +000039#include <linux/mfd/wm831x/pdata.h>
40#endif
41
Ben Dooks438a5d42008-11-19 15:41:34 +000042#include <video/platform_lcd.h>
Ben Dooks5718df92008-10-21 14:07:09 +010043
44#include <asm/mach/arch.h>
45#include <asm/mach/map.h>
46#include <asm/mach/irq.h>
47
48#include <mach/hardware.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000049#include <mach/regs-fb.h>
Ben Dooks5718df92008-10-21 14:07:09 +010050#include <mach/map.h>
51
52#include <asm/irq.h>
53#include <asm/mach-types.h>
54
55#include <plat/regs-serial.h>
Ben Dooks3501c9a2010-01-26 10:45:40 +090056#include <mach/regs-modem.h>
57#include <mach/regs-gpio.h>
58#include <mach/regs-sys.h>
59#include <mach/regs-srom.h>
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +090060#include <plat/ata.h>
Ben Dooksd85fa242008-10-31 16:14:52 +000061#include <plat/iic.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000062#include <plat/fb.h>
Mark Brown3056ea02009-01-27 16:18:01 +000063#include <plat/gpio-cfg.h>
Ben Dooks5718df92008-10-21 14:07:09 +010064
Ben Dooksf7be9ab2010-01-26 13:41:30 +090065#include <mach/s3c6410.h>
Ben Dooks5718df92008-10-21 14:07:09 +010066#include <plat/clock.h>
67#include <plat/devs.h>
68#include <plat/cpu.h>
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +090069#include <plat/adc.h>
70#include <plat/ts.h>
Naveen Krishna Ch290d0982010-06-22 07:39:18 +090071#include <plat/keypad.h>
Ben Dooks5718df92008-10-21 14:07:09 +010072
73#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
74#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
75#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
76
77static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
78 [0] = {
79 .hwport = 0,
80 .flags = 0,
Matt Hsubd258e52009-06-29 19:03:41 +080081 .ucon = UCON,
82 .ulcon = ULCON,
83 .ufcon = UFCON,
Ben Dooks5718df92008-10-21 14:07:09 +010084 },
85 [1] = {
86 .hwport = 1,
87 .flags = 0,
Matt Hsubd258e52009-06-29 19:03:41 +080088 .ucon = UCON,
89 .ulcon = ULCON,
90 .ufcon = UFCON,
91 },
92 [2] = {
93 .hwport = 2,
94 .flags = 0,
95 .ucon = UCON,
96 .ulcon = ULCON,
97 .ufcon = UFCON,
98 },
99 [3] = {
100 .hwport = 3,
101 .flags = 0,
102 .ucon = UCON,
103 .ulcon = ULCON,
104 .ufcon = UFCON,
Ben Dooks5718df92008-10-21 14:07:09 +0100105 },
106};
107
Ben Dooks438a5d42008-11-19 15:41:34 +0000108/* framebuffer and LCD setup. */
109
110/* GPF15 = LCD backlight control
111 * GPF13 => Panel power
112 * GPN5 = LCD nRESET signal
113 * PWM_TOUT1 => backlight brightness
114 */
115
116static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
117 unsigned int power)
118{
119 if (power) {
120 gpio_direction_output(S3C64XX_GPF(13), 1);
121 gpio_direction_output(S3C64XX_GPF(15), 1);
122
123 /* fire nRESET on power up */
124 gpio_direction_output(S3C64XX_GPN(5), 0);
125 msleep(10);
126 gpio_direction_output(S3C64XX_GPN(5), 1);
127 msleep(1);
128 } else {
129 gpio_direction_output(S3C64XX_GPF(15), 0);
130 gpio_direction_output(S3C64XX_GPF(13), 0);
131 }
132}
133
134static struct plat_lcd_data smdk6410_lcd_power_data = {
135 .set_power = smdk6410_lcd_power_set,
136};
137
138static struct platform_device smdk6410_lcd_powerdev = {
139 .name = "platform-lcd",
140 .dev.parent = &s3c_device_fb.dev,
141 .dev.platform_data = &smdk6410_lcd_power_data,
142};
143
144static struct s3c_fb_pd_win smdk6410_fb_win0 = {
145 /* this is to ensure we use win0 */
146 .win_mode = {
147 .pixclock = 41094,
148 .left_margin = 8,
149 .right_margin = 13,
150 .upper_margin = 7,
151 .lower_margin = 5,
152 .hsync_len = 3,
153 .vsync_len = 1,
154 .xres = 800,
155 .yres = 480,
156 },
157 .max_bpp = 32,
158 .default_bpp = 16,
159};
160
161/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
162static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
163 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
164 .win[0] = &smdk6410_fb_win0,
165 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
166 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
167};
168
Andy Greena4e94692009-12-29 14:40:43 +0000169/*
170 * Configuring Ethernet on SMDK6410
171 *
172 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
173 * The constant address below corresponds to nCS1
174 *
175 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
176 * 2) CFG6 needs to be switched to "LAN9115" side
177 */
178
Mark Brown3056ea02009-01-27 16:18:01 +0000179static struct resource smdk6410_smsc911x_resources[] = {
180 [0] = {
Andy Greenf01fdac2009-12-29 14:40:36 +0000181 .start = S3C64XX_PA_XM0CSN1,
182 .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
Mark Brown3056ea02009-01-27 16:18:01 +0000183 .flags = IORESOURCE_MEM,
184 },
185 [1] = {
186 .start = S3C_EINT(10),
187 .end = S3C_EINT(10),
188 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
189 },
190};
191
192static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
193 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
194 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
195 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
196 .phy_interface = PHY_INTERFACE_MODE_MII,
197};
198
199
200static struct platform_device smdk6410_smsc911x = {
201 .name = "smsc911x",
202 .id = -1,
203 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
204 .resource = &smdk6410_smsc911x_resources[0],
205 .dev = {
206 .platform_data = &smdk6410_smsc911x_pdata,
207 },
208};
209
Mark Brown42015c12009-11-03 14:42:06 +0000210#ifdef CONFIG_REGULATOR
211static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
212 {
213 /* WM8580 */
214 .supply = "PVDD",
215 .dev_name = "0-001b",
216 },
217 {
218 /* WM8580 */
219 .supply = "AVDD",
220 .dev_name = "0-001b",
221 },
222};
223
224static struct regulator_init_data smdk6410_b_pwr_5v_data = {
225 .constraints = {
226 .always_on = 1,
227 },
228 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
229 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
230};
231
232static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
233 .supply_name = "B_PWR_5V",
234 .microvolts = 5000000,
235 .init_data = &smdk6410_b_pwr_5v_data,
Mark Brownd3cf4482010-01-13 13:57:04 +0000236 .gpio = -EINVAL,
Mark Brown42015c12009-11-03 14:42:06 +0000237};
238
239static struct platform_device smdk6410_b_pwr_5v = {
240 .name = "reg-fixed-voltage",
241 .id = -1,
242 .dev = {
243 .platform_data = &smdk6410_b_pwr_5v_pdata,
244 },
245};
246#endif
247
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900248static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
249 .setup_gpio = s3c64xx_ide_setup_gpio,
250};
251
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900252static uint32_t smdk6410_keymap[] __initdata = {
253 /* KEY(row, col, keycode) */
254 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
255 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
256 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
257 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
258};
259
260static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
261 .keymap = smdk6410_keymap,
262 .keymap_size = ARRAY_SIZE(smdk6410_keymap),
263};
264
265static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
266 .keymap_data = &smdk6410_keymap_data,
267 .rows = 2,
268 .cols = 8,
269};
270
Mark Brown027191a2009-01-23 16:29:43 +0000271static struct map_desc smdk6410_iodesc[] = {};
Ben Dooks5718df92008-10-21 14:07:09 +0100272
273static struct platform_device *smdk6410_devices[] __initdata = {
Ben Dooksb24636c2008-11-03 20:14:53 +0000274#ifdef CONFIG_SMDK6410_SD_CH0
Ben Dooks39057f22008-10-31 16:14:29 +0000275 &s3c_device_hsmmc0,
Ben Dooksb24636c2008-11-03 20:14:53 +0000276#endif
277#ifdef CONFIG_SMDK6410_SD_CH1
278 &s3c_device_hsmmc1,
279#endif
Ben Dooksd85fa242008-10-31 16:14:52 +0000280 &s3c_device_i2c0,
Ben Dooksd7ea3742008-10-31 16:14:57 +0000281 &s3c_device_i2c1,
Ben Dooks438a5d42008-11-19 15:41:34 +0000282 &s3c_device_fb,
Ben Dooksb8132482009-11-23 00:13:39 +0000283 &s3c_device_ohci,
Ben Dooks06fa1d32009-05-16 22:11:20 +0100284 &s3c_device_usb_hsotg,
Mark Brown1f100862010-02-17 19:03:20 +0000285 &s3c64xx_device_iisv4,
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900286 &samsung_device_keypad,
Mark Brown42015c12009-11-03 14:42:06 +0000287
288#ifdef CONFIG_REGULATOR
289 &smdk6410_b_pwr_5v,
290#endif
Ben Dooks438a5d42008-11-19 15:41:34 +0000291 &smdk6410_lcd_powerdev,
Mark Brown3056ea02009-01-27 16:18:01 +0000292
293 &smdk6410_smsc911x,
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900294 &s3c_device_adc,
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900295 &s3c_device_cfcon,
Atul Dahiya9bbf4a62010-07-20 16:31:32 +0530296 &s3c_device_rtc,
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900297 &s3c_device_ts,
Banajit Goswamib351c4a2010-05-20 16:21:30 +0900298 &s3c_device_wdt,
Ben Dooks5718df92008-10-21 14:07:09 +0100299};
300
Mark Brown60f91012010-02-17 18:19:29 +0000301#ifdef CONFIG_REGULATOR
302/* ARM core */
303static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
304 {
305 .supply = "vddarm",
306 }
307};
308
309/* VDDARM, BUCK1 on J5 */
310static struct regulator_init_data smdk6410_vddarm = {
311 .constraints = {
312 .name = "PVDD_ARM",
313 .min_uV = 1000000,
314 .max_uV = 1300000,
315 .always_on = 1,
316 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
317 },
318 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
319 .consumer_supplies = smdk6410_vddarm_consumers,
320};
321
322/* VDD_INT, BUCK2 on J5 */
323static struct regulator_init_data smdk6410_vddint = {
324 .constraints = {
325 .name = "PVDD_INT",
326 .min_uV = 1000000,
327 .max_uV = 1200000,
328 .always_on = 1,
329 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
330 },
331};
332
333/* VDD_HI, LDO3 on J5 */
334static struct regulator_init_data smdk6410_vddhi = {
335 .constraints = {
336 .name = "PVDD_HI",
337 .always_on = 1,
338 },
339};
340
341/* VDD_PLL, LDO2 on J5 */
342static struct regulator_init_data smdk6410_vddpll = {
343 .constraints = {
344 .name = "PVDD_PLL",
345 .always_on = 1,
346 },
347};
348
349/* VDD_UH_MMC, LDO5 on J5 */
350static struct regulator_init_data smdk6410_vdduh_mmc = {
351 .constraints = {
352 .name = "PVDD_UH/PVDD_MMC",
353 .always_on = 1,
354 },
355};
356
357/* VCCM3BT, LDO8 on J5 */
358static struct regulator_init_data smdk6410_vccmc3bt = {
359 .constraints = {
360 .name = "PVCCM3BT",
361 .always_on = 1,
362 },
363};
364
365/* VCCM2MTV, LDO11 on J5 */
366static struct regulator_init_data smdk6410_vccm2mtv = {
367 .constraints = {
368 .name = "PVCCM2MTV",
369 .always_on = 1,
370 },
371};
372
373/* VDD_LCD, LDO12 on J5 */
374static struct regulator_init_data smdk6410_vddlcd = {
375 .constraints = {
376 .name = "PVDD_LCD",
377 .always_on = 1,
378 },
379};
380
381/* VDD_OTGI, LDO9 on J5 */
382static struct regulator_init_data smdk6410_vddotgi = {
383 .constraints = {
384 .name = "PVDD_OTGI",
385 .always_on = 1,
386 },
387};
388
389/* VDD_OTG, LDO14 on J5 */
390static struct regulator_init_data smdk6410_vddotg = {
391 .constraints = {
392 .name = "PVDD_OTG",
393 .always_on = 1,
394 },
395};
396
397/* VDD_ALIVE, LDO15 on J5 */
398static struct regulator_init_data smdk6410_vddalive = {
399 .constraints = {
400 .name = "PVDD_ALIVE",
401 .always_on = 1,
402 },
403};
404
405/* VDD_AUDIO, VLDO_AUDIO on J5 */
406static struct regulator_init_data smdk6410_vddaudio = {
407 .constraints = {
408 .name = "PVDD_AUDIO",
409 .always_on = 1,
410 },
411};
412#endif
413
Mark Brownecc558a2009-02-17 15:59:38 +0000414#ifdef CONFIG_SMDK6410_WM1190_EV1
415/* S3C64xx internal logic & PLL */
416static struct regulator_init_data wm8350_dcdc1_data = {
417 .constraints = {
418 .name = "PVDD_INT/PVDD_PLL",
419 .min_uV = 1200000,
420 .max_uV = 1200000,
421 .always_on = 1,
422 .apply_uV = 1,
423 },
424};
425
426/* Memory */
427static struct regulator_init_data wm8350_dcdc3_data = {
428 .constraints = {
429 .name = "PVDD_MEM",
430 .min_uV = 1800000,
431 .max_uV = 1800000,
432 .always_on = 1,
433 .state_mem = {
434 .uV = 1800000,
435 .mode = REGULATOR_MODE_NORMAL,
436 .enabled = 1,
Mark Brown60f91012010-02-17 18:19:29 +0000437 },
Mark Brownecc558a2009-02-17 15:59:38 +0000438 .initial_state = PM_SUSPEND_MEM,
439 },
440};
441
442/* USB, EXT, PCM, ADC/DAC, USB, MMC */
Mark Brown42015c12009-11-03 14:42:06 +0000443static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
444 {
445 /* WM8580 */
446 .supply = "DVDD",
447 .dev_name = "0-001b",
448 },
449};
450
Mark Brownecc558a2009-02-17 15:59:38 +0000451static struct regulator_init_data wm8350_dcdc4_data = {
452 .constraints = {
453 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
454 .min_uV = 3000000,
455 .max_uV = 3000000,
456 .always_on = 1,
457 },
Mark Brown42015c12009-11-03 14:42:06 +0000458 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
459 .consumer_supplies = wm8350_dcdc4_consumers,
Mark Brownecc558a2009-02-17 15:59:38 +0000460};
461
Mark Brownecc558a2009-02-17 15:59:38 +0000462/* OTGi/1190-EV1 HPVDD & AVDD */
463static struct regulator_init_data wm8350_ldo4_data = {
464 .constraints = {
465 .name = "PVDD_OTGI/HPVDD/AVDD",
466 .min_uV = 1200000,
467 .max_uV = 1200000,
468 .apply_uV = 1,
Mark Brownf53aee22009-04-09 16:30:40 +0100469 .always_on = 1,
Mark Brownecc558a2009-02-17 15:59:38 +0000470 },
471};
472
473static struct {
474 int regulator;
475 struct regulator_init_data *initdata;
476} wm1190_regulators[] = {
477 { WM8350_DCDC_1, &wm8350_dcdc1_data },
478 { WM8350_DCDC_3, &wm8350_dcdc3_data },
479 { WM8350_DCDC_4, &wm8350_dcdc4_data },
Mark Brown60f91012010-02-17 18:19:29 +0000480 { WM8350_DCDC_6, &smdk6410_vddarm },
481 { WM8350_LDO_1, &smdk6410_vddalive },
482 { WM8350_LDO_2, &smdk6410_vddotg },
483 { WM8350_LDO_3, &smdk6410_vddlcd },
Mark Brownecc558a2009-02-17 15:59:38 +0000484 { WM8350_LDO_4, &wm8350_ldo4_data },
485};
486
487static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
488{
489 int i;
490
Mark Browna3323b72009-11-03 14:42:04 +0000491 /* Configure the IRQ line */
492 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
493
Mark Brownecc558a2009-02-17 15:59:38 +0000494 /* Instantiate the regulators */
495 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
496 wm8350_register_regulator(wm8350,
497 wm1190_regulators[i].regulator,
498 wm1190_regulators[i].initdata);
499
500 return 0;
501}
502
503static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
504 .init = smdk6410_wm8350_init,
Mark Browndb9256f2009-04-09 19:00:19 +0100505 .irq_high = 1,
Mark Brown9fca8782010-01-19 15:26:56 +0000506 .irq_base = IRQ_BOARD_START,
Mark Brownecc558a2009-02-17 15:59:38 +0000507};
508#endif
509
Mark Brown60f91012010-02-17 18:19:29 +0000510#ifdef CONFIG_SMDK6410_WM1192_EV1
Mark Browna7a81d02010-02-17 18:19:31 +0000511static struct gpio_led wm1192_pmic_leds[] = {
512 {
513 .name = "PMIC:red:power",
514 .gpio = GPIO_BOARD_START + 3,
515 .default_state = LEDS_GPIO_DEFSTATE_ON,
516 },
517};
518
519static struct gpio_led_platform_data wm1192_pmic_led = {
520 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
521 .leds = wm1192_pmic_leds,
522};
523
524static struct platform_device wm1192_pmic_led_dev = {
525 .name = "leds-gpio",
526 .id = -1,
527 .dev = {
528 .platform_data = &wm1192_pmic_led,
529 },
530};
531
Mark Brown60f91012010-02-17 18:19:29 +0000532static int wm1192_pre_init(struct wm831x *wm831x)
533{
Mark Browna7a81d02010-02-17 18:19:31 +0000534 int ret;
535
Mark Brown60f91012010-02-17 18:19:29 +0000536 /* Configure the IRQ line */
537 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
538
Mark Browna7a81d02010-02-17 18:19:31 +0000539 ret = platform_device_register(&wm1192_pmic_led_dev);
540 if (ret != 0)
541 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
542
Mark Brown60f91012010-02-17 18:19:29 +0000543 return 0;
544}
545
546static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
547 .isink = 1,
548 .max_uA = 27554,
549};
550
551static struct regulator_init_data wm1192_dcdc3 = {
552 .constraints = {
553 .name = "PVDD_MEM/PVDD_GPS",
554 .always_on = 1,
555 },
556};
557
558static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
559 { .supply = "DVDD", .dev_name = "0-001b", }, /* WM8580 */
560};
561
562static struct regulator_init_data wm1192_ldo1 = {
563 .constraints = {
564 .name = "PVDD_LCD/PVDD_EXT",
565 .always_on = 1,
566 },
567 .consumer_supplies = wm1192_ldo1_consumers,
568 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
569};
570
571static struct wm831x_status_pdata wm1192_led7_pdata = {
572 .name = "LED7:green:",
573};
574
575static struct wm831x_status_pdata wm1192_led8_pdata = {
576 .name = "LED8:green:",
577};
578
579static struct wm831x_pdata smdk6410_wm1192_pdata = {
580 .pre_init = wm1192_pre_init,
581 .irq_base = IRQ_BOARD_START,
582
583 .backlight = &wm1192_backlight_pdata,
584 .dcdc = {
585 &smdk6410_vddarm, /* DCDC1 */
586 &smdk6410_vddint, /* DCDC2 */
587 &wm1192_dcdc3,
588 },
Mark Browna7a81d02010-02-17 18:19:31 +0000589 .gpio_base = GPIO_BOARD_START,
Mark Brown60f91012010-02-17 18:19:29 +0000590 .ldo = {
591 &wm1192_ldo1, /* LDO1 */
592 &smdk6410_vdduh_mmc, /* LDO2 */
593 NULL, /* LDO3 NC */
594 &smdk6410_vddotgi, /* LDO4 */
595 &smdk6410_vddotg, /* LDO5 */
596 &smdk6410_vddhi, /* LDO6 */
597 &smdk6410_vddaudio, /* LDO7 */
598 &smdk6410_vccm2mtv, /* LDO8 */
599 &smdk6410_vddpll, /* LDO9 */
600 &smdk6410_vccmc3bt, /* LDO10 */
601 &smdk6410_vddalive, /* LDO11 */
602 },
603 .status = {
604 &wm1192_led7_pdata,
605 &wm1192_led8_pdata,
606 },
607};
608#endif
609
Ben Dooks096941e2008-10-31 16:14:59 +0000610static struct i2c_board_info i2c_devs0[] __initdata = {
611 { I2C_BOARD_INFO("24c08", 0x50), },
Mark Brown77897472009-01-23 16:29:41 +0000612 { I2C_BOARD_INFO("wm8580", 0x1b), },
Mark Brownecc558a2009-02-17 15:59:38 +0000613
Mark Brown60f91012010-02-17 18:19:29 +0000614#ifdef CONFIG_SMDK6410_WM1192_EV1
615 { I2C_BOARD_INFO("wm8312", 0x34),
616 .platform_data = &smdk6410_wm1192_pdata,
617 .irq = S3C_EINT(12),
618 },
619#endif
620
Mark Brownecc558a2009-02-17 15:59:38 +0000621#ifdef CONFIG_SMDK6410_WM1190_EV1
622 { I2C_BOARD_INFO("wm8350", 0x1a),
623 .platform_data = &smdk6410_wm8350_pdata,
624 .irq = S3C_EINT(12),
625 },
626#endif
Ben Dooks096941e2008-10-31 16:14:59 +0000627};
628
629static struct i2c_board_info i2c_devs1[] __initdata = {
630 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
Ben Dooks5718df92008-10-21 14:07:09 +0100631};
632
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900633static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
634 .delay = 10000,
635 .presc = 49,
636 .oversampling_shift = 2,
637};
638
Ben Dooks5718df92008-10-21 14:07:09 +0100639static void __init smdk6410_map_io(void)
640{
Ben Dooksd6662c32008-12-12 00:24:40 +0000641 u32 tmp;
642
Ben Dooks5718df92008-10-21 14:07:09 +0100643 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
644 s3c24xx_init_clocks(12000000);
645 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
Ben Dooksd6662c32008-12-12 00:24:40 +0000646
647 /* set the LCD type */
648
649 tmp = __raw_readl(S3C64XX_SPCON);
650 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
651 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
652 __raw_writel(tmp, S3C64XX_SPCON);
653
654 /* remove the lcd bypass */
655 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
656 tmp &= ~MIFPCON_LCD_BYPASS;
657 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
Ben Dooks5718df92008-10-21 14:07:09 +0100658}
659
660static void __init smdk6410_machine_init(void)
661{
Andy Greenf01fdac2009-12-29 14:40:36 +0000662 u32 cs1;
663
Ben Dooksd85fa242008-10-31 16:14:52 +0000664 s3c_i2c0_set_platdata(NULL);
Ben Dooksd7ea3742008-10-31 16:14:57 +0000665 s3c_i2c1_set_platdata(NULL);
Ben Dooks438a5d42008-11-19 15:41:34 +0000666 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
Ben Dooks096941e2008-10-31 16:14:59 +0000667
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900668 samsung_keypad_set_platdata(&smdk6410_keypad_data);
669
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900670 s3c24xx_ts_set_platdata(&s3c_ts_platform);
671
Andy Greenf01fdac2009-12-29 14:40:36 +0000672 /* configure nCS1 width to 16 bits */
673
674 cs1 = __raw_readl(S3C64XX_SROM_BW) &
675 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
676 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
677 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
678 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
679 S3C64XX_SROM_BW__NCS1__SHIFT;
680 __raw_writel(cs1, S3C64XX_SROM_BW);
681
682 /* set timing for nCS1 suitable for ethernet chip */
683
684 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
685 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
686 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
687 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
688 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
689 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
690 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
691
Mark Brownb7f9a942009-04-08 16:12:35 +0100692 gpio_request(S3C64XX_GPN(5), "LCD power");
693 gpio_request(S3C64XX_GPF(13), "LCD power");
694 gpio_request(S3C64XX_GPF(15), "LCD power");
695
Ben Dooks096941e2008-10-31 16:14:59 +0000696 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
697 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
698
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900699 s3c_ide_set_platdata(&smdk6410_ide_pdata);
700
Ben Dooks5718df92008-10-21 14:07:09 +0100701 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
702}
703
704MACHINE_START(SMDK6410, "SMDK6410")
Ben Dooksafdd2252010-05-07 09:24:05 +0900705 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
Ben Dooks5718df92008-10-21 14:07:09 +0100706 .phys_io = S3C_PA_UART & 0xfff00000,
707 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
708 .boot_params = S3C64XX_PA_SDRAM + 0x100,
709
710 .init_irq = s3c6410_init_irq,
711 .map_io = smdk6410_map_io,
712 .init_machine = smdk6410_machine_init,
713 .timer = &s3c24xx_timer,
714MACHINE_END