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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Pierre Ossman70f10482007-07-11 20:04:50 +02002 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
Linus Walleij64de0282010-02-19 01:09:10 +01005 * Copyright (C) 2010 ST-Ericsson AB.
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/init.h>
14#include <linux/ioport.h>
15#include <linux/device.h>
16#include <linux/interrupt.h>
17#include <linux/delay.h>
18#include <linux/err.h>
19#include <linux/highmem.h>
Nicolas Pitre019a5f52007-10-11 01:06:03 -040020#include <linux/log2.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/mmc/host.h>
Russell Kinga62c80e2006-01-07 13:52:45 +000022#include <linux/amba/bus.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000023#include <linux/clk.h>
Jens Axboebd6dee62007-10-24 09:01:09 +020024#include <linux/scatterlist.h>
Russell King89001442009-07-09 15:16:07 +010025#include <linux/gpio.h>
Linus Walleij6ef297f2009-09-22 14:29:36 +010026#include <linux/amba/mmci.h>
Linus Walleij34e84f32009-09-22 14:41:40 +010027#include <linux/regulator/consumer.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
Russell King7b09cda2005-07-01 12:02:59 +010029#include <asm/div64.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <asm/io.h>
Russell Kingc6b8fda2005-10-28 14:05:16 +010031#include <asm/sizes.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
33#include "mmci.h"
34
35#define DRIVER_NAME "mmci-pl18x"
36
Linus Torvalds1da177e2005-04-16 15:20:36 -070037static unsigned int fmax = 515633;
38
Rabin Vincent4956e102010-07-21 12:54:40 +010039/**
40 * struct variant_data - MMCI variant-specific quirks
41 * @clkreg: default value for MCICLOCK register
Rabin Vincent4380c142010-07-21 12:55:18 +010042 * @clkreg_enable: enable value for MMCICLOCK register
Rabin Vincent08458ef2010-07-21 12:55:59 +010043 * @datalength_bits: number of bits in the MMCIDATALENGTH register
Rabin Vincent4956e102010-07-21 12:54:40 +010044 */
45struct variant_data {
46 unsigned int clkreg;
Rabin Vincent4380c142010-07-21 12:55:18 +010047 unsigned int clkreg_enable;
Rabin Vincent08458ef2010-07-21 12:55:59 +010048 unsigned int datalength_bits;
Rabin Vincent4956e102010-07-21 12:54:40 +010049};
50
51static struct variant_data variant_arm = {
Rabin Vincent08458ef2010-07-21 12:55:59 +010052 .datalength_bits = 16,
Rabin Vincent4956e102010-07-21 12:54:40 +010053};
54
55static struct variant_data variant_u300 = {
Rabin Vincent4380c142010-07-21 12:55:18 +010056 .clkreg_enable = 1 << 13, /* HWFCEN */
Rabin Vincent08458ef2010-07-21 12:55:59 +010057 .datalength_bits = 16,
Rabin Vincent4956e102010-07-21 12:54:40 +010058};
59
60static struct variant_data variant_ux500 = {
61 .clkreg = MCI_CLK_ENABLE,
Rabin Vincent4380c142010-07-21 12:55:18 +010062 .clkreg_enable = 1 << 14, /* HWFCEN */
Rabin Vincent08458ef2010-07-21 12:55:59 +010063 .datalength_bits = 24,
Rabin Vincent4956e102010-07-21 12:54:40 +010064};
Linus Walleija6a64642009-09-14 12:56:14 +010065/*
66 * This must be called with host->lock held
67 */
68static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
69{
Rabin Vincent4956e102010-07-21 12:54:40 +010070 struct variant_data *variant = host->variant;
71 u32 clk = variant->clkreg;
Linus Walleija6a64642009-09-14 12:56:14 +010072
73 if (desired) {
74 if (desired >= host->mclk) {
75 clk = MCI_CLK_BYPASS;
76 host->cclk = host->mclk;
77 } else {
78 clk = host->mclk / (2 * desired) - 1;
79 if (clk >= 256)
80 clk = 255;
81 host->cclk = host->mclk / (2 * (clk + 1));
82 }
Rabin Vincent4380c142010-07-21 12:55:18 +010083
84 clk |= variant->clkreg_enable;
Linus Walleija6a64642009-09-14 12:56:14 +010085 clk |= MCI_CLK_ENABLE;
86 /* This hasn't proven to be worthwhile */
87 /* clk |= MCI_CLK_PWRSAVE; */
88 }
89
Linus Walleij9e6c82c2009-09-14 12:57:11 +010090 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4)
Linus Walleij771dc152010-04-08 07:38:52 +010091 clk |= MCI_4BIT_BUS;
92 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8)
93 clk |= MCI_ST_8BIT_BUS;
Linus Walleij9e6c82c2009-09-14 12:57:11 +010094
Linus Walleija6a64642009-09-14 12:56:14 +010095 writel(clk, host->base + MMCICLOCK);
96}
97
Linus Torvalds1da177e2005-04-16 15:20:36 -070098static void
99mmci_request_end(struct mmci_host *host, struct mmc_request *mrq)
100{
101 writel(0, host->base + MMCICOMMAND);
102
Russell Kinge47c2222007-01-08 16:42:51 +0000103 BUG_ON(host->data);
104
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105 host->mrq = NULL;
106 host->cmd = NULL;
107
108 if (mrq->data)
109 mrq->data->bytes_xfered = host->data_xfered;
110
111 /*
112 * Need to drop the host lock here; mmc_request_done may call
113 * back into the driver...
114 */
115 spin_unlock(&host->lock);
116 mmc_request_done(host->mmc, mrq);
117 spin_lock(&host->lock);
118}
119
120static void mmci_stop_data(struct mmci_host *host)
121{
122 writel(0, host->base + MMCIDATACTRL);
123 writel(0, host->base + MMCIMASK1);
124 host->data = NULL;
125}
126
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100127static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data)
128{
129 unsigned int flags = SG_MITER_ATOMIC;
130
131 if (data->flags & MMC_DATA_READ)
132 flags |= SG_MITER_TO_SG;
133 else
134 flags |= SG_MITER_FROM_SG;
135
136 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
137}
138
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
140{
141 unsigned int datactrl, timeout, irqmask;
Russell King7b09cda2005-07-01 12:02:59 +0100142 unsigned long long clks;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143 void __iomem *base;
Russell King3bc87f22006-08-27 13:51:28 +0100144 int blksz_bits;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145
Linus Walleij64de0282010-02-19 01:09:10 +0100146 dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n",
147 data->blksz, data->blocks, data->flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148
149 host->data = data;
Rabin Vincent528320d2010-07-21 12:49:49 +0100150 host->size = data->blksz * data->blocks;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 host->data_xfered = 0;
152
153 mmci_init_sg(host, data);
154
Russell King7b09cda2005-07-01 12:02:59 +0100155 clks = (unsigned long long)data->timeout_ns * host->cclk;
156 do_div(clks, 1000000000UL);
157
158 timeout = data->timeout_clks + (unsigned int)clks;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159
160 base = host->base;
161 writel(timeout, base + MMCIDATATIMER);
162 writel(host->size, base + MMCIDATALENGTH);
163
Russell King3bc87f22006-08-27 13:51:28 +0100164 blksz_bits = ffs(data->blksz) - 1;
165 BUG_ON(1 << blksz_bits != data->blksz);
166
167 datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 if (data->flags & MMC_DATA_READ) {
169 datactrl |= MCI_DPSM_DIRECTION;
170 irqmask = MCI_RXFIFOHALFFULLMASK;
Russell King0425a142006-02-16 16:48:31 +0000171
172 /*
173 * If we have less than a FIFOSIZE of bytes to transfer,
174 * trigger a PIO interrupt as soon as any data is available.
175 */
176 if (host->size < MCI_FIFOSIZE)
177 irqmask |= MCI_RXDATAAVLBLMASK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 } else {
179 /*
180 * We don't actually need to include "FIFO empty" here
181 * since its implicit in "FIFO half empty".
182 */
183 irqmask = MCI_TXFIFOHALFEMPTYMASK;
184 }
185
186 writel(datactrl, base + MMCIDATACTRL);
187 writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
188 writel(irqmask, base + MMCIMASK1);
189}
190
191static void
192mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
193{
194 void __iomem *base = host->base;
195
Linus Walleij64de0282010-02-19 01:09:10 +0100196 dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 cmd->opcode, cmd->arg, cmd->flags);
198
199 if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) {
200 writel(0, base + MMCICOMMAND);
201 udelay(1);
202 }
203
204 c |= cmd->opcode | MCI_CPSM_ENABLE;
Russell Kinge9225172006-02-02 12:23:12 +0000205 if (cmd->flags & MMC_RSP_PRESENT) {
206 if (cmd->flags & MMC_RSP_136)
207 c |= MCI_CPSM_LONGRSP;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208 c |= MCI_CPSM_RESPONSE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209 }
210 if (/*interrupt*/0)
211 c |= MCI_CPSM_INTERRUPT;
212
213 host->cmd = cmd;
214
215 writel(cmd->arg, base + MMCIARGUMENT);
216 writel(c, base + MMCICOMMAND);
217}
218
219static void
220mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
221 unsigned int status)
222{
223 if (status & MCI_DATABLOCKEND) {
Russell King3bc87f22006-08-27 13:51:28 +0100224 host->data_xfered += data->blksz;
Linus Walleijf28e8a42010-01-25 07:14:46 +0100225#ifdef CONFIG_ARCH_U300
226 /*
227 * On the U300 some signal or other is
228 * badly routed so that a data write does
229 * not properly terminate with a MCI_DATAEND
230 * status flag. This quirk will make writes
231 * work again.
232 */
233 if (data->flags & MMC_DATA_WRITE)
234 status |= MCI_DATAEND;
235#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 }
237 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) {
Linus Walleij64de0282010-02-19 01:09:10 +0100238 dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ (status %08x)\n", status);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239 if (status & MCI_DATACRCFAIL)
Pierre Ossman17b04292007-07-22 22:18:46 +0200240 data->error = -EILSEQ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 else if (status & MCI_DATATIMEOUT)
Pierre Ossman17b04292007-07-22 22:18:46 +0200242 data->error = -ETIMEDOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243 else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN))
Pierre Ossman17b04292007-07-22 22:18:46 +0200244 data->error = -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 status |= MCI_DATAEND;
Russell Kinge9c091b2006-01-04 16:24:05 +0000246
247 /*
248 * We hit an error condition. Ensure that any data
249 * partially written to a page is properly coherent.
250 */
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100251 if (data->flags & MMC_DATA_READ) {
252 struct sg_mapping_iter *sg_miter = &host->sg_miter;
253 unsigned long flags;
254
255 local_irq_save(flags);
256 if (sg_miter_next(sg_miter)) {
257 flush_dcache_page(sg_miter->page);
258 sg_miter_stop(sg_miter);
259 }
260 local_irq_restore(flags);
261 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262 }
263 if (status & MCI_DATAEND) {
264 mmci_stop_data(host);
265
266 if (!data->stop) {
267 mmci_request_end(host, data->mrq);
268 } else {
269 mmci_start_command(host, data->stop, 0);
270 }
271 }
272}
273
274static void
275mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
276 unsigned int status)
277{
278 void __iomem *base = host->base;
279
280 host->cmd = NULL;
281
282 cmd->resp[0] = readl(base + MMCIRESPONSE0);
283 cmd->resp[1] = readl(base + MMCIRESPONSE1);
284 cmd->resp[2] = readl(base + MMCIRESPONSE2);
285 cmd->resp[3] = readl(base + MMCIRESPONSE3);
286
287 if (status & MCI_CMDTIMEOUT) {
Pierre Ossman17b04292007-07-22 22:18:46 +0200288 cmd->error = -ETIMEDOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289 } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) {
Pierre Ossman17b04292007-07-22 22:18:46 +0200290 cmd->error = -EILSEQ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 }
292
Pierre Ossman17b04292007-07-22 22:18:46 +0200293 if (!cmd->data || cmd->error) {
Russell Kinge47c2222007-01-08 16:42:51 +0000294 if (host->data)
295 mmci_stop_data(host);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296 mmci_request_end(host, cmd->mrq);
297 } else if (!(cmd->data->flags & MMC_DATA_READ)) {
298 mmci_start_data(host, cmd->data);
299 }
300}
301
302static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain)
303{
304 void __iomem *base = host->base;
305 char *ptr = buffer;
306 u32 status;
Linus Walleij26eed9a2008-04-26 23:39:44 +0100307 int host_remain = host->size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308
309 do {
Linus Walleij26eed9a2008-04-26 23:39:44 +0100310 int count = host_remain - (readl(base + MMCIFIFOCNT) << 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311
312 if (count > remain)
313 count = remain;
314
315 if (count <= 0)
316 break;
317
318 readsl(base + MMCIFIFO, ptr, count >> 2);
319
320 ptr += count;
321 remain -= count;
Linus Walleij26eed9a2008-04-26 23:39:44 +0100322 host_remain -= count;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323
324 if (remain == 0)
325 break;
326
327 status = readl(base + MMCISTATUS);
328 } while (status & MCI_RXDATAAVLBL);
329
330 return ptr - buffer;
331}
332
333static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status)
334{
335 void __iomem *base = host->base;
336 char *ptr = buffer;
337
338 do {
339 unsigned int count, maxcnt;
340
341 maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE;
342 count = min(remain, maxcnt);
343
344 writesl(base + MMCIFIFO, ptr, count >> 2);
345
346 ptr += count;
347 remain -= count;
348
349 if (remain == 0)
350 break;
351
352 status = readl(base + MMCISTATUS);
353 } while (status & MCI_TXFIFOHALFEMPTY);
354
355 return ptr - buffer;
356}
357
358/*
359 * PIO data transfer IRQ handler.
360 */
David Howells7d12e782006-10-05 14:55:46 +0100361static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362{
363 struct mmci_host *host = dev_id;
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100364 struct sg_mapping_iter *sg_miter = &host->sg_miter;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365 void __iomem *base = host->base;
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100366 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367 u32 status;
368
369 status = readl(base + MMCISTATUS);
370
Linus Walleij64de0282010-02-19 01:09:10 +0100371 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700372
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100373 local_irq_save(flags);
374
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375 do {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376 unsigned int remain, len;
377 char *buffer;
378
379 /*
380 * For write, we only need to test the half-empty flag
381 * here - if the FIFO is completely empty, then by
382 * definition it is more than half empty.
383 *
384 * For read, check for data available.
385 */
386 if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL)))
387 break;
388
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100389 if (!sg_miter_next(sg_miter))
390 break;
391
392 buffer = sg_miter->addr;
393 remain = sg_miter->length;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394
395 len = 0;
396 if (status & MCI_RXACTIVE)
397 len = mmci_pio_read(host, buffer, remain);
398 if (status & MCI_TXACTIVE)
399 len = mmci_pio_write(host, buffer, remain, status);
400
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100401 sg_miter->consumed = len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 host->size -= len;
404 remain -= len;
405
406 if (remain)
407 break;
408
Russell Kinge9c091b2006-01-04 16:24:05 +0000409 if (status & MCI_RXACTIVE)
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100410 flush_dcache_page(sg_miter->page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411
412 status = readl(base + MMCISTATUS);
413 } while (1);
414
Rabin Vincent4ce1d6c2010-07-21 12:44:58 +0100415 sg_miter_stop(sg_miter);
416
417 local_irq_restore(flags);
418
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419 /*
420 * If we're nearing the end of the read, switch to
421 * "any data available" mode.
422 */
423 if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE)
424 writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1);
425
426 /*
427 * If we run out of data, disable the data IRQs; this
428 * prevents a race where the FIFO becomes empty before
429 * the chip itself has disabled the data path, and
430 * stops us racing with our data end IRQ.
431 */
432 if (host->size == 0) {
433 writel(0, base + MMCIMASK1);
434 writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
435 }
436
437 return IRQ_HANDLED;
438}
439
440/*
441 * Handle completion of command and data transfers.
442 */
David Howells7d12e782006-10-05 14:55:46 +0100443static irqreturn_t mmci_irq(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444{
445 struct mmci_host *host = dev_id;
446 u32 status;
447 int ret = 0;
448
449 spin_lock(&host->lock);
450
451 do {
452 struct mmc_command *cmd;
453 struct mmc_data *data;
454
455 status = readl(host->base + MMCISTATUS);
456 status &= readl(host->base + MMCIMASK0);
457 writel(status, host->base + MMCICLEAR);
458
Linus Walleij64de0282010-02-19 01:09:10 +0100459 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460
461 data = host->data;
462 if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|
463 MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data)
464 mmci_data_irq(host, data, status);
465
466 cmd = host->cmd;
467 if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd)
468 mmci_cmd_irq(host, cmd, status);
469
470 ret = 1;
471 } while (status);
472
473 spin_unlock(&host->lock);
474
475 return IRQ_RETVAL(ret);
476}
477
478static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
479{
480 struct mmci_host *host = mmc_priv(mmc);
Linus Walleij9e943022008-10-24 21:17:50 +0100481 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482
483 WARN_ON(host->mrq != NULL);
484
Nicolas Pitre019a5f52007-10-11 01:06:03 -0400485 if (mrq->data && !is_power_of_2(mrq->data->blksz)) {
Linus Walleij64de0282010-02-19 01:09:10 +0100486 dev_err(mmc_dev(mmc), "unsupported block size (%d bytes)\n",
487 mrq->data->blksz);
Pierre Ossman255d01a2007-07-24 20:38:53 +0200488 mrq->cmd->error = -EINVAL;
489 mmc_request_done(mmc, mrq);
490 return;
491 }
492
Linus Walleij9e943022008-10-24 21:17:50 +0100493 spin_lock_irqsave(&host->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494
495 host->mrq = mrq;
496
497 if (mrq->data && mrq->data->flags & MMC_DATA_READ)
498 mmci_start_data(host, mrq->data);
499
500 mmci_start_command(host, mrq->cmd, 0);
501
Linus Walleij9e943022008-10-24 21:17:50 +0100502 spin_unlock_irqrestore(&host->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503}
504
505static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
506{
507 struct mmci_host *host = mmc_priv(mmc);
Linus Walleija6a64642009-09-14 12:56:14 +0100508 u32 pwr = 0;
509 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511 switch (ios->power_mode) {
512 case MMC_POWER_OFF:
Linus Walleij34e84f32009-09-22 14:41:40 +0100513 if(host->vcc &&
514 regulator_is_enabled(host->vcc))
515 regulator_disable(host->vcc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516 break;
517 case MMC_POWER_UP:
Linus Walleij34e84f32009-09-22 14:41:40 +0100518#ifdef CONFIG_REGULATOR
519 if (host->vcc)
520 /* This implicitly enables the regulator */
521 mmc_regulator_set_ocr(host->vcc, ios->vdd);
522#endif
Rabin Vincentbb8f5632010-07-21 12:53:57 +0100523 if (host->plat->vdd_handler)
524 pwr |= host->plat->vdd_handler(mmc_dev(mmc), ios->vdd,
525 ios->power_mode);
Linus Walleijcc30d602009-01-04 15:18:54 +0100526 /* The ST version does not have this, fall through to POWER_ON */
Linus Walleijf17a1f02009-08-04 01:01:02 +0100527 if (host->hw_designer != AMBA_VENDOR_ST) {
Linus Walleijcc30d602009-01-04 15:18:54 +0100528 pwr |= MCI_PWR_UP;
529 break;
530 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531 case MMC_POWER_ON:
532 pwr |= MCI_PWR_ON;
533 break;
534 }
535
Linus Walleijcc30d602009-01-04 15:18:54 +0100536 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) {
Linus Walleijf17a1f02009-08-04 01:01:02 +0100537 if (host->hw_designer != AMBA_VENDOR_ST)
Linus Walleijcc30d602009-01-04 15:18:54 +0100538 pwr |= MCI_ROD;
539 else {
540 /*
541 * The ST Micro variant use the ROD bit for something
542 * else and only has OD (Open Drain).
543 */
544 pwr |= MCI_OD;
545 }
546 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547
Linus Walleija6a64642009-09-14 12:56:14 +0100548 spin_lock_irqsave(&host->lock, flags);
549
550 mmci_set_clkreg(host, ios->clock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551
552 if (host->pwr != pwr) {
553 host->pwr = pwr;
554 writel(pwr, host->base + MMCIPOWER);
555 }
Linus Walleija6a64642009-09-14 12:56:14 +0100556
557 spin_unlock_irqrestore(&host->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558}
559
Russell King89001442009-07-09 15:16:07 +0100560static int mmci_get_ro(struct mmc_host *mmc)
561{
562 struct mmci_host *host = mmc_priv(mmc);
563
564 if (host->gpio_wp == -ENOSYS)
565 return -ENOSYS;
566
567 return gpio_get_value(host->gpio_wp);
568}
569
570static int mmci_get_cd(struct mmc_host *mmc)
571{
572 struct mmci_host *host = mmc_priv(mmc);
Rabin Vincent29719442010-08-09 12:54:43 +0100573 struct mmci_platform_data *plat = host->plat;
Russell King89001442009-07-09 15:16:07 +0100574 unsigned int status;
575
576 if (host->gpio_cd == -ENOSYS)
Rabin Vincent29719442010-08-09 12:54:43 +0100577 status = plat->status(mmc_dev(host->mmc));
Russell King89001442009-07-09 15:16:07 +0100578 else
Rabin Vincent29719442010-08-09 12:54:43 +0100579 status = !!gpio_get_value(host->gpio_cd) ^ plat->cd_invert;
Russell King89001442009-07-09 15:16:07 +0100580
Russell King74bc8092010-07-29 15:58:59 +0100581 /*
582 * Use positive logic throughout - status is zero for no card,
583 * non-zero for card inserted.
584 */
585 return status;
Russell King89001442009-07-09 15:16:07 +0100586}
587
David Brownellab7aefd2006-11-12 17:55:30 -0800588static const struct mmc_host_ops mmci_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700589 .request = mmci_request,
590 .set_ios = mmci_set_ios,
Russell King89001442009-07-09 15:16:07 +0100591 .get_ro = mmci_get_ro,
592 .get_cd = mmci_get_cd,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593};
594
Alessandro Rubini03fbdb12009-05-20 22:39:08 +0100595static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596{
Linus Walleij6ef297f2009-09-22 14:29:36 +0100597 struct mmci_platform_data *plat = dev->dev.platform_data;
Rabin Vincent4956e102010-07-21 12:54:40 +0100598 struct variant_data *variant = id->data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599 struct mmci_host *host;
600 struct mmc_host *mmc;
601 int ret;
602
603 /* must have platform data */
604 if (!plat) {
605 ret = -EINVAL;
606 goto out;
607 }
608
609 ret = amba_request_regions(dev, DRIVER_NAME);
610 if (ret)
611 goto out;
612
613 mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev);
614 if (!mmc) {
615 ret = -ENOMEM;
616 goto rel_regions;
617 }
618
619 host = mmc_priv(mmc);
Rabin Vincent4ea580f2009-04-17 08:44:19 +0530620 host->mmc = mmc;
Russell King012b7d32009-07-09 15:13:56 +0100621
Russell King89001442009-07-09 15:16:07 +0100622 host->gpio_wp = -ENOSYS;
623 host->gpio_cd = -ENOSYS;
624
Russell King012b7d32009-07-09 15:13:56 +0100625 host->hw_designer = amba_manf(dev);
626 host->hw_revision = amba_rev(dev);
Linus Walleij64de0282010-02-19 01:09:10 +0100627 dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer);
628 dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision);
Russell King012b7d32009-07-09 15:13:56 +0100629
Russell Kingee569c42008-11-30 17:38:14 +0000630 host->clk = clk_get(&dev->dev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700631 if (IS_ERR(host->clk)) {
632 ret = PTR_ERR(host->clk);
633 host->clk = NULL;
634 goto host_free;
635 }
636
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 ret = clk_enable(host->clk);
638 if (ret)
Russell Kinga8d35842006-01-03 18:41:37 +0000639 goto clk_free;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640
641 host->plat = plat;
Rabin Vincent4956e102010-07-21 12:54:40 +0100642 host->variant = variant;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643 host->mclk = clk_get_rate(host->clk);
Linus Walleijc8df9a52008-04-29 09:34:07 +0100644 /*
645 * According to the spec, mclk is max 100 MHz,
646 * so we try to adjust the clock down to this,
647 * (if possible).
648 */
649 if (host->mclk > 100000000) {
650 ret = clk_set_rate(host->clk, 100000000);
651 if (ret < 0)
652 goto clk_disable;
653 host->mclk = clk_get_rate(host->clk);
Linus Walleij64de0282010-02-19 01:09:10 +0100654 dev_dbg(mmc_dev(mmc), "eventual mclk rate: %u Hz\n",
655 host->mclk);
Linus Walleijc8df9a52008-04-29 09:34:07 +0100656 }
Linus Walleijdc890c22009-06-07 23:27:31 +0100657 host->base = ioremap(dev->res.start, resource_size(&dev->res));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658 if (!host->base) {
659 ret = -ENOMEM;
660 goto clk_disable;
661 }
662
663 mmc->ops = &mmci_ops;
664 mmc->f_min = (host->mclk + 511) / 512;
Linus Walleij808d97c2010-04-08 07:39:38 +0100665 /*
666 * If the platform data supplies a maximum operating
667 * frequency, this takes precedence. Else, we fall back
668 * to using the module parameter, which has a (low)
669 * default value in case it is not specified. Either
670 * value must not exceed the clock rate into the block,
671 * of course.
672 */
673 if (plat->f_max)
674 mmc->f_max = min(host->mclk, plat->f_max);
675 else
676 mmc->f_max = min(host->mclk, fmax);
Linus Walleij64de0282010-02-19 01:09:10 +0100677 dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max);
678
Linus Walleij34e84f32009-09-22 14:41:40 +0100679#ifdef CONFIG_REGULATOR
680 /* If we're using the regulator framework, try to fetch a regulator */
681 host->vcc = regulator_get(&dev->dev, "vmmc");
682 if (IS_ERR(host->vcc))
683 host->vcc = NULL;
684 else {
685 int mask = mmc_regulator_get_ocrmask(host->vcc);
686
687 if (mask < 0)
688 dev_err(&dev->dev, "error getting OCR mask (%d)\n",
689 mask);
690 else {
691 host->mmc->ocr_avail = (u32) mask;
692 if (plat->ocr_mask)
693 dev_warn(&dev->dev,
694 "Provided ocr_mask/setpower will not be used "
695 "(using regulator instead)\n");
696 }
697 }
698#endif
699 /* Fall back to platform data if no regulator is found */
700 if (host->vcc == NULL)
701 mmc->ocr_avail = plat->ocr_mask;
Linus Walleij9e6c82c2009-09-14 12:57:11 +0100702 mmc->caps = plat->capabilities;
Rabin Vincentf5e25742010-07-21 12:50:31 +0100703 mmc->caps |= MMC_CAP_NEEDS_POLL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704
705 /*
706 * We can do SGIO
707 */
708 mmc->max_hw_segs = 16;
709 mmc->max_phys_segs = NR_SG;
710
711 /*
Rabin Vincent08458ef2010-07-21 12:55:59 +0100712 * Since only a certain number of bits are valid in the data length
713 * register, we must ensure that we don't exceed 2^num-1 bytes in a
714 * single request.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700715 */
Rabin Vincent08458ef2010-07-21 12:55:59 +0100716 mmc->max_req_size = (1 << variant->datalength_bits) - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700717
718 /*
719 * Set the maximum segment size. Since we aren't doing DMA
720 * (yet) we are only limited by the data length register.
721 */
Pierre Ossman55db8902006-11-21 17:55:45 +0100722 mmc->max_seg_size = mmc->max_req_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700723
Pierre Ossmanfe4a3c72006-11-21 17:54:23 +0100724 /*
725 * Block size can be up to 2048 bytes, but must be a power of two.
726 */
727 mmc->max_blk_size = 2048;
728
Pierre Ossman55db8902006-11-21 17:55:45 +0100729 /*
730 * No limit on the number of blocks transferred.
731 */
732 mmc->max_blk_count = mmc->max_req_size;
733
Linus Torvalds1da177e2005-04-16 15:20:36 -0700734 spin_lock_init(&host->lock);
735
736 writel(0, host->base + MMCIMASK0);
737 writel(0, host->base + MMCIMASK1);
738 writel(0xfff, host->base + MMCICLEAR);
739
Russell King89001442009-07-09 15:16:07 +0100740 if (gpio_is_valid(plat->gpio_cd)) {
741 ret = gpio_request(plat->gpio_cd, DRIVER_NAME " (cd)");
742 if (ret == 0)
743 ret = gpio_direction_input(plat->gpio_cd);
744 if (ret == 0)
745 host->gpio_cd = plat->gpio_cd;
746 else if (ret != -ENOSYS)
747 goto err_gpio_cd;
748 }
749 if (gpio_is_valid(plat->gpio_wp)) {
750 ret = gpio_request(plat->gpio_wp, DRIVER_NAME " (wp)");
751 if (ret == 0)
752 ret = gpio_direction_input(plat->gpio_wp);
753 if (ret == 0)
754 host->gpio_wp = plat->gpio_wp;
755 else if (ret != -ENOSYS)
756 goto err_gpio_wp;
757 }
758
Thomas Gleixnerdace1452006-07-01 19:29:38 -0700759 ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700760 if (ret)
761 goto unmap;
762
Thomas Gleixnerdace1452006-07-01 19:29:38 -0700763 ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, DRIVER_NAME " (pio)", host);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764 if (ret)
765 goto irq0_free;
766
767 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
768
769 amba_set_drvdata(dev, mmc);
770
771 mmc_add_host(mmc);
772
Linus Walleij64de0282010-02-19 01:09:10 +0100773 dev_info(&dev->dev, "%s: MMCI rev %x cfg %02x at 0x%016llx irq %d,%d\n",
Russell Kingd366b642005-08-19 09:40:08 +0100774 mmc_hostname(mmc), amba_rev(dev), amba_config(dev),
Greg Kroah-Hartmane29419f2006-06-12 15:20:16 -0700775 (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700776
Linus Torvalds1da177e2005-04-16 15:20:36 -0700777 return 0;
778
779 irq0_free:
780 free_irq(dev->irq[0], host);
781 unmap:
Russell King89001442009-07-09 15:16:07 +0100782 if (host->gpio_wp != -ENOSYS)
783 gpio_free(host->gpio_wp);
784 err_gpio_wp:
785 if (host->gpio_cd != -ENOSYS)
786 gpio_free(host->gpio_cd);
787 err_gpio_cd:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700788 iounmap(host->base);
789 clk_disable:
790 clk_disable(host->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791 clk_free:
792 clk_put(host->clk);
793 host_free:
794 mmc_free_host(mmc);
795 rel_regions:
796 amba_release_regions(dev);
797 out:
798 return ret;
799}
800
Linus Walleij6dc4a472009-03-07 00:23:52 +0100801static int __devexit mmci_remove(struct amba_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700802{
803 struct mmc_host *mmc = amba_get_drvdata(dev);
804
805 amba_set_drvdata(dev, NULL);
806
807 if (mmc) {
808 struct mmci_host *host = mmc_priv(mmc);
809
Linus Torvalds1da177e2005-04-16 15:20:36 -0700810 mmc_remove_host(mmc);
811
812 writel(0, host->base + MMCIMASK0);
813 writel(0, host->base + MMCIMASK1);
814
815 writel(0, host->base + MMCICOMMAND);
816 writel(0, host->base + MMCIDATACTRL);
817
818 free_irq(dev->irq[0], host);
819 free_irq(dev->irq[1], host);
820
Russell King89001442009-07-09 15:16:07 +0100821 if (host->gpio_wp != -ENOSYS)
822 gpio_free(host->gpio_wp);
823 if (host->gpio_cd != -ENOSYS)
824 gpio_free(host->gpio_cd);
825
Linus Torvalds1da177e2005-04-16 15:20:36 -0700826 iounmap(host->base);
827 clk_disable(host->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700828 clk_put(host->clk);
829
Linus Walleij34e84f32009-09-22 14:41:40 +0100830 if (regulator_is_enabled(host->vcc))
831 regulator_disable(host->vcc);
832 regulator_put(host->vcc);
833
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834 mmc_free_host(mmc);
835
836 amba_release_regions(dev);
837 }
838
839 return 0;
840}
841
842#ifdef CONFIG_PM
Pavel Macheke5378ca2005-04-16 15:25:29 -0700843static int mmci_suspend(struct amba_device *dev, pm_message_t state)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844{
845 struct mmc_host *mmc = amba_get_drvdata(dev);
846 int ret = 0;
847
848 if (mmc) {
849 struct mmci_host *host = mmc_priv(mmc);
850
Matt Fleming1a13f8f2010-05-26 14:42:08 -0700851 ret = mmc_suspend_host(mmc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700852 if (ret == 0)
853 writel(0, host->base + MMCIMASK0);
854 }
855
856 return ret;
857}
858
859static int mmci_resume(struct amba_device *dev)
860{
861 struct mmc_host *mmc = amba_get_drvdata(dev);
862 int ret = 0;
863
864 if (mmc) {
865 struct mmci_host *host = mmc_priv(mmc);
866
867 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
868
869 ret = mmc_resume_host(mmc);
870 }
871
872 return ret;
873}
874#else
875#define mmci_suspend NULL
876#define mmci_resume NULL
877#endif
878
879static struct amba_id mmci_ids[] = {
880 {
881 .id = 0x00041180,
882 .mask = 0x000fffff,
Rabin Vincent4956e102010-07-21 12:54:40 +0100883 .data = &variant_arm,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700884 },
885 {
886 .id = 0x00041181,
887 .mask = 0x000fffff,
Rabin Vincent4956e102010-07-21 12:54:40 +0100888 .data = &variant_arm,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700889 },
Linus Walleijcc30d602009-01-04 15:18:54 +0100890 /* ST Micro variants */
891 {
892 .id = 0x00180180,
893 .mask = 0x00ffffff,
Rabin Vincent4956e102010-07-21 12:54:40 +0100894 .data = &variant_u300,
Linus Walleijcc30d602009-01-04 15:18:54 +0100895 },
896 {
897 .id = 0x00280180,
898 .mask = 0x00ffffff,
Rabin Vincent4956e102010-07-21 12:54:40 +0100899 .data = &variant_u300,
900 },
901 {
902 .id = 0x00480180,
903 .mask = 0x00ffffff,
904 .data = &variant_ux500,
Linus Walleijcc30d602009-01-04 15:18:54 +0100905 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700906 { 0, 0 },
907};
908
909static struct amba_driver mmci_driver = {
910 .drv = {
911 .name = DRIVER_NAME,
912 },
913 .probe = mmci_probe,
Linus Walleij6dc4a472009-03-07 00:23:52 +0100914 .remove = __devexit_p(mmci_remove),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700915 .suspend = mmci_suspend,
916 .resume = mmci_resume,
917 .id_table = mmci_ids,
918};
919
920static int __init mmci_init(void)
921{
922 return amba_driver_register(&mmci_driver);
923}
924
925static void __exit mmci_exit(void)
926{
927 amba_driver_unregister(&mmci_driver);
928}
929
930module_init(mmci_init);
931module_exit(mmci_exit);
932module_param(fmax, uint, 0444);
933
934MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver");
935MODULE_LICENSE("GPL");