| Bellido Nicolas | 038c5b6 | 2005-06-20 18:51:05 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/include/asm-arm/arch-aaec2000/irqs.h |
| 3 | * |
| 4 | * Copyright (c) 2005 Nicolas Bellido Y Ortega |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #ifndef __ASM_ARCH_IRQS_H |
| 12 | #define __ASM_ARCH_IRQS_H |
| 13 | |
| 14 | |
| 15 | #define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */ |
| 16 | #define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */ |
| 17 | #define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */ |
| 18 | #define INT_MV_FIQ 3 /* Media Changed Interrupt */ |
| 19 | #define INT_SC 4 /* Sound Codec Interrupt */ |
| 20 | #define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */ |
| 21 | #define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */ |
| 22 | #define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */ |
| 23 | #define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */ |
| 24 | #define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */ |
| 25 | #define INT_RTC_CM 10 /* RTC Compare Match Interrupt */ |
| 26 | #define INT_TICK 11 /* 64Hz Tick Interrupt */ |
| 27 | #define INT_UART1 12 /* UART1 Interrupt */ |
| 28 | #define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */ |
| 29 | #define INT_LCD 14 /* LCD Interrupt */ |
| 30 | #define INT_SSI 15 /* SSI End of Transfer Interrupt */ |
| 31 | #define INT_UART3 16 /* UART3 Interrupt */ |
| 32 | #define INT_SCI 17 /* SCI Interrupt */ |
| 33 | #define INT_AAC 18 /* Advanced Audio Codec Interrupt */ |
| 34 | #define INT_MMC 19 /* MMC Interrupt */ |
| 35 | #define INT_USB 20 /* USB Interrupt */ |
| 36 | #define INT_DMA 21 /* DMA Interrupt */ |
| 37 | #define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */ |
| 38 | #define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */ |
| 39 | #define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */ |
| 40 | #define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */ |
| 41 | #define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */ |
| 42 | #define INT_BMI 27 /* BMI Interrupt */ |
| 43 | |
| 44 | #define NR_IRQS (INT_BMI + 1) |
| 45 | |
| 46 | #endif /* __ASM_ARCH_IRQS_H */ |