| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* $Id: sun4paddr.h,v 1.3 1998/07/28 16:53:27 jj Exp $ | 
|  | 2 | * sun4paddr.h:  Various physical addresses on sun4 machines | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au) | 
|  | 5 | * Copyright (C) 1998 Chris Davis (cdavis@cois.on.ca) | 
|  | 6 | * | 
|  | 7 | * Now supports more sun4's | 
|  | 8 | */ | 
|  | 9 |  | 
|  | 10 | #ifndef _SPARC_SUN4PADDR_H | 
|  | 11 | #define _SPARC_SUN4PADDR_H | 
|  | 12 |  | 
|  | 13 | #define SUN4_IE_PHYSADDR		0xf5000000 | 
|  | 14 | #define SUN4_UNUSED_PHYSADDR		0 | 
|  | 15 |  | 
|  | 16 | /* these work for me */ | 
|  | 17 | #define SUN4_200_MEMREG_PHYSADDR	0xf4000000 | 
|  | 18 | #define SUN4_200_CLOCK_PHYSADDR		0xf3000000 | 
|  | 19 | #define SUN4_200_BWTWO_PHYSADDR		0xfd000000 | 
|  | 20 | #define SUN4_200_ETH_PHYSADDR		0xf6000000 | 
|  | 21 | #define SUN4_200_SI_PHYSADDR		0xff200000 | 
|  | 22 |  | 
|  | 23 | /* these were here before */ | 
|  | 24 | #define SUN4_300_MEMREG_PHYSADDR	0xf4000000 | 
|  | 25 | #define SUN4_300_CLOCK_PHYSADDR		0xf2000000 | 
|  | 26 | #define SUN4_300_TIMER_PHYSADDR		0xef000000 | 
|  | 27 | #define SUN4_300_ETH_PHYSADDR		0xf9000000 | 
|  | 28 | #define SUN4_300_BWTWO_PHYSADDR		0xfb400000 | 
|  | 29 | #define SUN4_300_DMA_PHYSADDR		0xfa001000 | 
|  | 30 | #define SUN4_300_ESP_PHYSADDR		0xfa000000 | 
|  | 31 |  | 
|  | 32 | /* Are these right? */ | 
|  | 33 | #define SUN4_400_MEMREG_PHYSADDR	0xf4000000 | 
|  | 34 | #define SUN4_400_CLOCK_PHYSADDR		0xf2000000 | 
|  | 35 | #define SUN4_400_TIMER_PHYSADDR		0xef000000 | 
|  | 36 | #define SUN4_400_ETH_PHYSADDR		0xf9000000 | 
|  | 37 | #define SUN4_400_BWTWO_PHYSADDR		0xfb400000 | 
|  | 38 | #define SUN4_400_DMA_PHYSADDR		0xfa001000 | 
|  | 39 | #define SUN4_400_ESP_PHYSADDR		0xfa000000 | 
|  | 40 |  | 
|  | 41 | /* | 
|  | 42 | these are the actual values set and used in the code. Unused items set | 
|  | 43 | to SUN_UNUSED_PHYSADDR | 
|  | 44 | */ | 
|  | 45 |  | 
|  | 46 | extern int sun4_memreg_physaddr; /* memory register (ecc?) */ | 
|  | 47 | extern int sun4_clock_physaddr;  /* system clock */ | 
|  | 48 | extern int sun4_timer_physaddr;  /* timer, where applicable */ | 
|  | 49 | extern int sun4_eth_physaddr;    /* onboard ethernet (ie/le) */ | 
|  | 50 | extern int sun4_si_physaddr;     /* sun3 scsi adapter */ | 
|  | 51 | extern int sun4_bwtwo_physaddr;  /* onboard bw2 */ | 
|  | 52 | extern int sun4_dma_physaddr;    /* scsi dma */ | 
|  | 53 | extern int sun4_esp_physaddr;    /* esp scsi */ | 
|  | 54 | extern int sun4_ie_physaddr;     /* interrupt enable */ | 
|  | 55 |  | 
|  | 56 | #endif /* !(_SPARC_SUN4PADDR_H) */ |