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review.evervolv.com / android_kernel_oneplus_msm8996 / 2a754b51aacb122cec25c849e3cf7f5503cc3ec6 / . / include / asm-sparc64 / ttable.h
blob: bbb9c8f13d61814c2d8115c6f54deb6531993b08 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/* $Id: ttable.h,v 1.18 2002/02/09 19:49:32 davem Exp $ */
2#ifndef _SPARC64_TTABLE_H
3#define _SPARC64_TTABLE_H
4
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]5#include <asm/utrap.h>
6
7#ifdef __ASSEMBLY__
8#include <asm/thread_info.h>
9#endif
10
11#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
12
13/* We need a "cleaned" instruction... */
14#define CLEAN_WINDOW \
15 rdpr %cleanwin, %l0; add %l0, 1, %l0; \
16 wrpr %l0, 0x0, %cleanwin; \
17 clr %o0; clr %o1; clr %o2; clr %o3; \
18 clr %o4; clr %o5; clr %o6; clr %o7; \
19 clr %l0; clr %l1; clr %l2; clr %l3; \
20 clr %l4; clr %l5; clr %l6; clr %l7; \
21 retry; \
22 nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
23
24#define TRAP(routine) \
25 sethi %hi(109f), %g7; \
26 ba,pt %xcc, etrap; \
27109: or %g7, %lo(109b), %g7; \
28 call routine; \
29 add %sp, PTREGS_OFF, %o0; \
30 ba,pt %xcc, rtrap; \
31 clr %l6; \
32 nop;
33
34#define TRAP_7INSNS(routine) \
35 sethi %hi(109f), %g7; \
36 ba,pt %xcc, etrap; \
37109: or %g7, %lo(109b), %g7; \
38 call routine; \
39 add %sp, PTREGS_OFF, %o0; \
40 ba,pt %xcc, rtrap; \
41 clr %l6;
42
43#define TRAP_SAVEFPU(routine) \
44 sethi %hi(109f), %g7; \
45 ba,pt %xcc, do_fptrap; \
46109: or %g7, %lo(109b), %g7; \
47 call routine; \
48 add %sp, PTREGS_OFF, %o0; \
49 ba,pt %xcc, rtrap; \
50 clr %l6; \
51 nop;
52
53#define TRAP_NOSAVE(routine) \
54 ba,pt %xcc, routine; \
55 nop; \
56 nop; nop; nop; nop; nop; nop;
57
58#define TRAP_NOSAVE_7INSNS(routine) \
59 ba,pt %xcc, routine; \
60 nop; \
61 nop; nop; nop; nop; nop;
62
63#define TRAPTL1(routine) \
64 sethi %hi(109f), %g7; \
65 ba,pt %xcc, etraptl1; \
66109: or %g7, %lo(109b), %g7; \
67 call routine; \
68 add %sp, PTREGS_OFF, %o0; \
69 ba,pt %xcc, rtrap; \
70 clr %l6; \
71 nop;
72
73#define TRAP_ARG(routine, arg) \
74 sethi %hi(109f), %g7; \
75 ba,pt %xcc, etrap; \
76109: or %g7, %lo(109b), %g7; \
77 add %sp, PTREGS_OFF, %o0; \
78 call routine; \
79 mov arg, %o1; \
80 ba,pt %xcc, rtrap; \
81 clr %l6;
82
83#define TRAPTL1_ARG(routine, arg) \
84 sethi %hi(109f), %g7; \
85 ba,pt %xcc, etraptl1; \
86109: or %g7, %lo(109b), %g7; \
87 add %sp, PTREGS_OFF, %o0; \
88 call routine; \
89 mov arg, %o1; \
90 ba,pt %xcc, rtrap; \
91 clr %l6;
92
93#define SYSCALL_TRAP(routine, systbl) \
94 sethi %hi(109f), %g7; \
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]95 ba,pt %xcc, etrap; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]96109: or %g7, %lo(109b), %g7; \
97 sethi %hi(systbl), %l7; \
98 ba,pt %xcc, routine; \
99 or %l7, %lo(systbl), %l7; \
100 nop; nop;
101
102#define INDIRECT_SOLARIS_SYSCALL(num) \
103 sethi %hi(109f), %g7; \
104 ba,pt %xcc, etrap; \
105109: or %g7, %lo(109b), %g7; \
106 ba,pt %xcc, tl0_solaris + 0xc; \
107 mov num, %g1; \
108 nop;nop;nop;
109
110#define TRAP_UTRAP(handler,lvl) \
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]111 mov handler, %g3; \
112 ba,pt %xcc, utrap_trap; \
113 mov lvl, %g4; \
114 nop; \
115 nop; \
116 nop; \
117 nop; \
118 nop;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]119
120#ifdef CONFIG_SUNOS_EMUL
121#define SUNOS_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sunos_sys_table)
122#else
123#define SUNOS_SYSCALL_TRAP TRAP(sunos_syscall)
124#endif
125#ifdef CONFIG_COMPAT
126#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
127#else
128#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
129#endif
130#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
131#define GETCC_TRAP TRAP(getcc)
132#define SETCC_TRAP TRAP(setcc)
133#ifdef CONFIG_SOLARIS_EMUL
134#define SOLARIS_SYSCALL_TRAP TRAP(solaris_sparc_syscall)
135#else
136#define SOLARIS_SYSCALL_TRAP TRAP(solaris_syscall)
137#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]138#define BREAKPOINT_TRAP TRAP(breakpoint_trap)
139
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]140#ifdef CONFIG_TRACE_IRQFLAGS
141
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]142#define TRAP_IRQ(routine, level) \
143 rdpr %pil, %g2; \
144 wrpr %g0, 15, %pil; \
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]145 sethi %hi(1f-4), %g7; \
146 ba,pt %xcc, etrap_irq; \
147 or %g7, %lo(1f-4), %g7; \
148 nop; \
149 nop; \
150 nop; \
151 .subsection 2; \
1521: call trace_hardirqs_off; \
153 nop; \
154 mov level, %o0; \
155 call routine; \
156 add %sp, PTREGS_OFF, %o1; \
157 ba,a,pt %xcc, rtrap_irq; \
158 .previous;
159
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]160#else
161
162#define TRAP_IRQ(routine, level) \
163 rdpr %pil, %g2; \
164 wrpr %g0, 15, %pil; \
165 ba,pt %xcc, etrap_irq; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]166 rd %pc, %g7; \
167 mov level, %o0; \
168 call routine; \
169 add %sp, PTREGS_OFF, %o1; \
170 ba,a,pt %xcc, rtrap_irq;
171
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]172#endif
173
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]174#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
175
176#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
177
178#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
179
180#define FLUSH_WINDOW_TRAP \
181 ba,pt %xcc, etrap; \
182 rd %pc, %g7; \
183 flushw; \
184 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
185 add %l1, 4, %l2; \
186 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
187 ba,pt %xcc, rtrap_clr_l6; \
188 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
189
190#ifdef CONFIG_KPROBES
191#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
192#else
193#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
194#endif
195
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]196#define SUN4V_ITSB_MISS \
197 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
198 ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \
199 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]200 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]201 ba,pt %xcc, sun4v_itsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]202 nop; \
203 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]204 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]205
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]206#define SUN4V_DTSB_MISS \
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]207 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
208 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
209 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]210 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]211 ba,pt %xcc, sun4v_dtsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]212 nop; \
213 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]214 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]215
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]216/* Before touching these macros, you owe it to yourself to go and
217 * see how arch/sparc64/kernel/winfixup.S works... -DaveM
218 *
219 * For the user cases we used to use the %asi register, but
220 * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
221 * now we use immediate ASI loads and stores instead. Kudos
222 * to Greg Onufer for pointing out this performance anomaly.
223 *
224 * Further note that we cannot use the g2, g4, g5, and g7 alternate
225 * globals in the spill routines, check out the save instruction in
226 * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
227 * g4/g5 are the globals which are preserved by etrap processing
228 * for the caller of it. The g7 register is the return pc for
229 * etrap. Finally, g6 is the current thread register so we cannot
230 * us it in the spill handlers either. Most of these rules do not
231 * apply to fill processing, only g6 is not usable.
232 */
233
234/* Normal kernel spill */
235#define SPILL_0_NORMAL \
236 stx %l0, [%sp + STACK_BIAS + 0x00]; \
237 stx %l1, [%sp + STACK_BIAS + 0x08]; \
238 stx %l2, [%sp + STACK_BIAS + 0x10]; \
239 stx %l3, [%sp + STACK_BIAS + 0x18]; \
240 stx %l4, [%sp + STACK_BIAS + 0x20]; \
241 stx %l5, [%sp + STACK_BIAS + 0x28]; \
242 stx %l6, [%sp + STACK_BIAS + 0x30]; \
243 stx %l7, [%sp + STACK_BIAS + 0x38]; \
244 stx %i0, [%sp + STACK_BIAS + 0x40]; \
245 stx %i1, [%sp + STACK_BIAS + 0x48]; \
246 stx %i2, [%sp + STACK_BIAS + 0x50]; \
247 stx %i3, [%sp + STACK_BIAS + 0x58]; \
248 stx %i4, [%sp + STACK_BIAS + 0x60]; \
249 stx %i5, [%sp + STACK_BIAS + 0x68]; \
250 stx %i6, [%sp + STACK_BIAS + 0x70]; \
251 stx %i7, [%sp + STACK_BIAS + 0x78]; \
252 saved; retry; nop; nop; nop; nop; nop; nop; \
253 nop; nop; nop; nop; nop; nop; nop; nop;
254
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]255#define SPILL_0_NORMAL_ETRAP \
256etrap_kernel_spill: \
257 stx %l0, [%sp + STACK_BIAS + 0x00]; \
258 stx %l1, [%sp + STACK_BIAS + 0x08]; \
259 stx %l2, [%sp + STACK_BIAS + 0x10]; \
260 stx %l3, [%sp + STACK_BIAS + 0x18]; \
261 stx %l4, [%sp + STACK_BIAS + 0x20]; \
262 stx %l5, [%sp + STACK_BIAS + 0x28]; \
263 stx %l6, [%sp + STACK_BIAS + 0x30]; \
264 stx %l7, [%sp + STACK_BIAS + 0x38]; \
265 stx %i0, [%sp + STACK_BIAS + 0x40]; \
266 stx %i1, [%sp + STACK_BIAS + 0x48]; \
267 stx %i2, [%sp + STACK_BIAS + 0x50]; \
268 stx %i3, [%sp + STACK_BIAS + 0x58]; \
269 stx %i4, [%sp + STACK_BIAS + 0x60]; \
270 stx %i5, [%sp + STACK_BIAS + 0x68]; \
271 stx %i6, [%sp + STACK_BIAS + 0x70]; \
272 stx %i7, [%sp + STACK_BIAS + 0x78]; \
273 saved; \
274 sub %g1, 2, %g1; \
275 ba,pt %xcc, etrap_save; \
276 wrpr %g1, %cwp; \
277 nop; nop; nop; nop; nop; nop; nop; nop; \
278 nop; nop; nop; nop;
279
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]280/* Normal 64bit spill */
281#define SPILL_1_GENERIC(ASI) \
282 add %sp, STACK_BIAS + 0x00, %g1; \
283 stxa %l0, [%g1 + %g0] ASI; \
284 mov 0x08, %g3; \
285 stxa %l1, [%g1 + %g3] ASI; \
286 add %g1, 0x10, %g1; \
287 stxa %l2, [%g1 + %g0] ASI; \
288 stxa %l3, [%g1 + %g3] ASI; \
289 add %g1, 0x10, %g1; \
290 stxa %l4, [%g1 + %g0] ASI; \
291 stxa %l5, [%g1 + %g3] ASI; \
292 add %g1, 0x10, %g1; \
293 stxa %l6, [%g1 + %g0] ASI; \
294 stxa %l7, [%g1 + %g3] ASI; \
295 add %g1, 0x10, %g1; \
296 stxa %i0, [%g1 + %g0] ASI; \
297 stxa %i1, [%g1 + %g3] ASI; \
298 add %g1, 0x10, %g1; \
299 stxa %i2, [%g1 + %g0] ASI; \
300 stxa %i3, [%g1 + %g3] ASI; \
301 add %g1, 0x10, %g1; \
302 stxa %i4, [%g1 + %g0] ASI; \
303 stxa %i5, [%g1 + %g3] ASI; \
304 add %g1, 0x10, %g1; \
305 stxa %i6, [%g1 + %g0] ASI; \
306 stxa %i7, [%g1 + %g3] ASI; \
307 saved; \
308 retry; nop; nop; \
309 b,a,pt %xcc, spill_fixup_dax; \
310 b,a,pt %xcc, spill_fixup_mna; \
311 b,a,pt %xcc, spill_fixup;
312
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]313#define SPILL_1_GENERIC_ETRAP \
314etrap_user_spill_64bit: \
315 stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \
316 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
317 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
318 stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \
319 stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \
320 stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \
321 stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \
322 stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \
323 stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \
324 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
325 stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \
326 stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \
327 stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \
328 stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \
329 stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \
330 stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \
331 saved; \
332 sub %g1, 2, %g1; \
333 ba,pt %xcc, etrap_save; \
334 wrpr %g1, %cwp; \
335 nop; nop; nop; nop; nop; \
336 nop; nop; nop; nop; \
337 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
338 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
339 ba,a,pt %xcc, etrap_spill_fixup_64bit;
340
341#define SPILL_1_GENERIC_ETRAP_FIXUP \
342etrap_spill_fixup_64bit: \
343 ldub [%g6 + TI_WSAVED], %g1; \
344 sll %g1, 3, %g3; \
345 add %g6, %g3, %g3; \
346 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
347 sll %g1, 7, %g3; \
348 add %g6, %g3, %g3; \
349 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
350 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
351 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
352 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \
353 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \
354 stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \
355 stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \
356 stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \
357 stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \
358 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
359 stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \
360 stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \
361 stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \
362 stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \
363 stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \
364 stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \
365 add %g1, 1, %g1; \
366 stb %g1, [%g6 + TI_WSAVED]; \
367 saved; \
368 rdpr %cwp, %g1; \
369 sub %g1, 2, %g1; \
370 ba,pt %xcc, etrap_save; \
371 wrpr %g1, %cwp; \
372 nop; nop; nop
373
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]374/* Normal 32bit spill */
375#define SPILL_2_GENERIC(ASI) \
376 srl %sp, 0, %sp; \
377 stwa %l0, [%sp + %g0] ASI; \
378 mov 0x04, %g3; \
379 stwa %l1, [%sp + %g3] ASI; \
380 add %sp, 0x08, %g1; \
381 stwa %l2, [%g1 + %g0] ASI; \
382 stwa %l3, [%g1 + %g3] ASI; \
383 add %g1, 0x08, %g1; \
384 stwa %l4, [%g1 + %g0] ASI; \
385 stwa %l5, [%g1 + %g3] ASI; \
386 add %g1, 0x08, %g1; \
387 stwa %l6, [%g1 + %g0] ASI; \
388 stwa %l7, [%g1 + %g3] ASI; \
389 add %g1, 0x08, %g1; \
390 stwa %i0, [%g1 + %g0] ASI; \
391 stwa %i1, [%g1 + %g3] ASI; \
392 add %g1, 0x08, %g1; \
393 stwa %i2, [%g1 + %g0] ASI; \
394 stwa %i3, [%g1 + %g3] ASI; \
395 add %g1, 0x08, %g1; \
396 stwa %i4, [%g1 + %g0] ASI; \
397 stwa %i5, [%g1 + %g3] ASI; \
398 add %g1, 0x08, %g1; \
399 stwa %i6, [%g1 + %g0] ASI; \
400 stwa %i7, [%g1 + %g3] ASI; \
401 saved; \
402 retry; nop; nop; \
403 b,a,pt %xcc, spill_fixup_dax; \
404 b,a,pt %xcc, spill_fixup_mna; \
405 b,a,pt %xcc, spill_fixup;
406
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]407#define SPILL_2_GENERIC_ETRAP \
408etrap_user_spill_32bit: \
409 srl %sp, 0, %sp; \
410 stwa %l0, [%sp + 0x00] %asi; \
411 stwa %l1, [%sp + 0x04] %asi; \
412 stwa %l2, [%sp + 0x08] %asi; \
413 stwa %l3, [%sp + 0x0c] %asi; \
414 stwa %l4, [%sp + 0x10] %asi; \
415 stwa %l5, [%sp + 0x14] %asi; \
416 stwa %l6, [%sp + 0x18] %asi; \
417 stwa %l7, [%sp + 0x1c] %asi; \
418 stwa %i0, [%sp + 0x20] %asi; \
419 stwa %i1, [%sp + 0x24] %asi; \
420 stwa %i2, [%sp + 0x28] %asi; \
421 stwa %i3, [%sp + 0x2c] %asi; \
422 stwa %i4, [%sp + 0x30] %asi; \
423 stwa %i5, [%sp + 0x34] %asi; \
424 stwa %i6, [%sp + 0x38] %asi; \
425 stwa %i7, [%sp + 0x3c] %asi; \
426 saved; \
427 sub %g1, 2, %g1; \
428 ba,pt %xcc, etrap_save; \
429 wrpr %g1, %cwp; \
430 nop; nop; nop; nop; \
431 nop; nop; nop; nop; \
432 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
433 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
434 ba,a,pt %xcc, etrap_spill_fixup_32bit;
435
436#define SPILL_2_GENERIC_ETRAP_FIXUP \
437etrap_spill_fixup_32bit: \
438 ldub [%g6 + TI_WSAVED], %g1; \
439 sll %g1, 3, %g3; \
440 add %g6, %g3, %g3; \
441 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
442 sll %g1, 7, %g3; \
443 add %g6, %g3, %g3; \
444 stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
445 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
446 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \
447 stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \
448 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \
449 stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \
450 stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \
451 stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \
452 stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \
453 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
454 stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \
455 stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \
456 stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \
457 stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \
458 stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \
459 stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \
460 add %g1, 1, %g1; \
461 stb %g1, [%g6 + TI_WSAVED]; \
462 saved; \
463 rdpr %cwp, %g1; \
464 sub %g1, 2, %g1; \
465 ba,pt %xcc, etrap_save; \
466 wrpr %g1, %cwp; \
467 nop; nop; nop
468
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]469#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
470#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
471#define SPILL_3_NORMAL SPILL_0_NORMAL
472#define SPILL_4_NORMAL SPILL_0_NORMAL
473#define SPILL_5_NORMAL SPILL_0_NORMAL
474#define SPILL_6_NORMAL SPILL_0_NORMAL
475#define SPILL_7_NORMAL SPILL_0_NORMAL
476
477#define SPILL_0_OTHER SPILL_0_NORMAL
478#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
479#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
480#define SPILL_3_OTHER SPILL_3_NORMAL
481#define SPILL_4_OTHER SPILL_4_NORMAL
482#define SPILL_5_OTHER SPILL_5_NORMAL
483#define SPILL_6_OTHER SPILL_6_NORMAL
484#define SPILL_7_OTHER SPILL_7_NORMAL
485
486/* Normal kernel fill */
487#define FILL_0_NORMAL \
488 ldx [%sp + STACK_BIAS + 0x00], %l0; \
489 ldx [%sp + STACK_BIAS + 0x08], %l1; \
490 ldx [%sp + STACK_BIAS + 0x10], %l2; \
491 ldx [%sp + STACK_BIAS + 0x18], %l3; \
492 ldx [%sp + STACK_BIAS + 0x20], %l4; \
493 ldx [%sp + STACK_BIAS + 0x28], %l5; \
494 ldx [%sp + STACK_BIAS + 0x30], %l6; \
495 ldx [%sp + STACK_BIAS + 0x38], %l7; \
496 ldx [%sp + STACK_BIAS + 0x40], %i0; \
497 ldx [%sp + STACK_BIAS + 0x48], %i1; \
498 ldx [%sp + STACK_BIAS + 0x50], %i2; \
499 ldx [%sp + STACK_BIAS + 0x58], %i3; \
500 ldx [%sp + STACK_BIAS + 0x60], %i4; \
501 ldx [%sp + STACK_BIAS + 0x68], %i5; \
502 ldx [%sp + STACK_BIAS + 0x70], %i6; \
503 ldx [%sp + STACK_BIAS + 0x78], %i7; \
504 restored; retry; nop; nop; nop; nop; nop; nop; \
505 nop; nop; nop; nop; nop; nop; nop; nop;
506
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]507#define FILL_0_NORMAL_RTRAP \
508kern_rtt_fill: \
509 rdpr %cwp, %g1; \
510 sub %g1, 1, %g1; \
511 wrpr %g1, %cwp; \
512 ldx [%sp + STACK_BIAS + 0x00], %l0; \
513 ldx [%sp + STACK_BIAS + 0x08], %l1; \
514 ldx [%sp + STACK_BIAS + 0x10], %l2; \
515 ldx [%sp + STACK_BIAS + 0x18], %l3; \
516 ldx [%sp + STACK_BIAS + 0x20], %l4; \
517 ldx [%sp + STACK_BIAS + 0x28], %l5; \
518 ldx [%sp + STACK_BIAS + 0x30], %l6; \
519 ldx [%sp + STACK_BIAS + 0x38], %l7; \
520 ldx [%sp + STACK_BIAS + 0x40], %i0; \
521 ldx [%sp + STACK_BIAS + 0x48], %i1; \
522 ldx [%sp + STACK_BIAS + 0x50], %i2; \
523 ldx [%sp + STACK_BIAS + 0x58], %i3; \
524 ldx [%sp + STACK_BIAS + 0x60], %i4; \
525 ldx [%sp + STACK_BIAS + 0x68], %i5; \
526 ldx [%sp + STACK_BIAS + 0x70], %i6; \
527 ldx [%sp + STACK_BIAS + 0x78], %i7; \
528 restored; \
529 add %g1, 1, %g1; \
530 ba,pt %xcc, kern_rtt_restore; \
531 wrpr %g1, %cwp; \
532 nop; nop; nop; nop; nop; \
533 nop; nop; nop; nop;
534
535
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]536/* Normal 64bit fill */
537#define FILL_1_GENERIC(ASI) \
538 add %sp, STACK_BIAS + 0x00, %g1; \
539 ldxa [%g1 + %g0] ASI, %l0; \
540 mov 0x08, %g2; \
541 mov 0x10, %g3; \
542 ldxa [%g1 + %g2] ASI, %l1; \
543 mov 0x18, %g5; \
544 ldxa [%g1 + %g3] ASI, %l2; \
545 ldxa [%g1 + %g5] ASI, %l3; \
546 add %g1, 0x20, %g1; \
547 ldxa [%g1 + %g0] ASI, %l4; \
548 ldxa [%g1 + %g2] ASI, %l5; \
549 ldxa [%g1 + %g3] ASI, %l6; \
550 ldxa [%g1 + %g5] ASI, %l7; \
551 add %g1, 0x20, %g1; \
552 ldxa [%g1 + %g0] ASI, %i0; \
553 ldxa [%g1 + %g2] ASI, %i1; \
554 ldxa [%g1 + %g3] ASI, %i2; \
555 ldxa [%g1 + %g5] ASI, %i3; \
556 add %g1, 0x20, %g1; \
557 ldxa [%g1 + %g0] ASI, %i4; \
558 ldxa [%g1 + %g2] ASI, %i5; \
559 ldxa [%g1 + %g3] ASI, %i6; \
560 ldxa [%g1 + %g5] ASI, %i7; \
561 restored; \
562 retry; nop; nop; nop; nop; \
563 b,a,pt %xcc, fill_fixup_dax; \
564 b,a,pt %xcc, fill_fixup_mna; \
565 b,a,pt %xcc, fill_fixup;
566
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]567#define FILL_1_GENERIC_RTRAP \
568user_rtt_fill_64bit: \
569 ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \
570 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
571 ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \
572 ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \
573 ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \
574 ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \
575 ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \
576 ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \
577 ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \
578 ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \
579 ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \
580 ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \
581 ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \
582 ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \
583 ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \
584 ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \
585 ba,pt %xcc, user_rtt_pre_restore; \
586 restored; \
587 nop; nop; nop; nop; nop; nop; \
588 nop; nop; nop; nop; nop; \
589 ba,a,pt %xcc, user_rtt_fill_fixup; \
590 ba,a,pt %xcc, user_rtt_fill_fixup; \
591 ba,a,pt %xcc, user_rtt_fill_fixup;
592
593
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]594/* Normal 32bit fill */
595#define FILL_2_GENERIC(ASI) \
596 srl %sp, 0, %sp; \
597 lduwa [%sp + %g0] ASI, %l0; \
598 mov 0x04, %g2; \
599 mov 0x08, %g3; \
600 lduwa [%sp + %g2] ASI, %l1; \
601 mov 0x0c, %g5; \
602 lduwa [%sp + %g3] ASI, %l2; \
603 lduwa [%sp + %g5] ASI, %l3; \
604 add %sp, 0x10, %g1; \
605 lduwa [%g1 + %g0] ASI, %l4; \
606 lduwa [%g1 + %g2] ASI, %l5; \
607 lduwa [%g1 + %g3] ASI, %l6; \
608 lduwa [%g1 + %g5] ASI, %l7; \
609 add %g1, 0x10, %g1; \
610 lduwa [%g1 + %g0] ASI, %i0; \
611 lduwa [%g1 + %g2] ASI, %i1; \
612 lduwa [%g1 + %g3] ASI, %i2; \
613 lduwa [%g1 + %g5] ASI, %i3; \
614 add %g1, 0x10, %g1; \
615 lduwa [%g1 + %g0] ASI, %i4; \
616 lduwa [%g1 + %g2] ASI, %i5; \
617 lduwa [%g1 + %g3] ASI, %i6; \
618 lduwa [%g1 + %g5] ASI, %i7; \
619 restored; \
620 retry; nop; nop; nop; nop; \
621 b,a,pt %xcc, fill_fixup_dax; \
622 b,a,pt %xcc, fill_fixup_mna; \
623 b,a,pt %xcc, fill_fixup;
624
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]625#define FILL_2_GENERIC_RTRAP \
626user_rtt_fill_32bit: \
627 srl %sp, 0, %sp; \
628 lduwa [%sp + 0x00] %asi, %l0; \
629 lduwa [%sp + 0x04] %asi, %l1; \
630 lduwa [%sp + 0x08] %asi, %l2; \
631 lduwa [%sp + 0x0c] %asi, %l3; \
632 lduwa [%sp + 0x10] %asi, %l4; \
633 lduwa [%sp + 0x14] %asi, %l5; \
634 lduwa [%sp + 0x18] %asi, %l6; \
635 lduwa [%sp + 0x1c] %asi, %l7; \
636 lduwa [%sp + 0x20] %asi, %i0; \
637 lduwa [%sp + 0x24] %asi, %i1; \
638 lduwa [%sp + 0x28] %asi, %i2; \
639 lduwa [%sp + 0x2c] %asi, %i3; \
640 lduwa [%sp + 0x30] %asi, %i4; \
641 lduwa [%sp + 0x34] %asi, %i5; \
642 lduwa [%sp + 0x38] %asi, %i6; \
643 lduwa [%sp + 0x3c] %asi, %i7; \
644 ba,pt %xcc, user_rtt_pre_restore; \
645 restored; \
646 nop; nop; nop; nop; nop; \
647 nop; nop; nop; nop; nop; \
648 ba,a,pt %xcc, user_rtt_fill_fixup; \
649 ba,a,pt %xcc, user_rtt_fill_fixup; \
650 ba,a,pt %xcc, user_rtt_fill_fixup;
651
652
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]653#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
654#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
655#define FILL_3_NORMAL FILL_0_NORMAL
656#define FILL_4_NORMAL FILL_0_NORMAL
657#define FILL_5_NORMAL FILL_0_NORMAL
658#define FILL_6_NORMAL FILL_0_NORMAL
659#define FILL_7_NORMAL FILL_0_NORMAL
660
661#define FILL_0_OTHER FILL_0_NORMAL
662#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
663#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
664#define FILL_3_OTHER FILL_3_NORMAL
665#define FILL_4_OTHER FILL_4_NORMAL
666#define FILL_5_OTHER FILL_5_NORMAL
667#define FILL_6_OTHER FILL_6_NORMAL
668#define FILL_7_OTHER FILL_7_NORMAL
669
670#endif /* !(_SPARC64_TTABLE_H) */