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review.evervolv.com / android_kernel_oneplus_msm8996 / 2b51a9b9eb6bf240d2592e10d2f8823dd1f5ee3e / . / drivers / pinctrl / sh-pfc / pfc-sh7203.c
blob: f63d51dc3f4c84afb0f315fdb6e6cd6dceea8ff3 [file] [log] [blame]
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1/*
2 * SH7203 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/gpio.h>
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]13#include <cpu/sh7203.h>
14
Laurent Pinchartc3323802012-12-15 23:51:55 +0100[diff] [blame]15#include "sh_pfc.h"
16
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]17enum {
18 PINMUX_RESERVED = 0,
19
20 PINMUX_DATA_BEGIN,
21 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
22 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
23 PB12_DATA,
24 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
25 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
26 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
27 PC14_DATA, PC13_DATA, PC12_DATA,
28 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
29 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
30 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
31 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
32 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
33 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
34 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
35 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
36 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
37 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
38 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
39 PF30_DATA, PF29_DATA, PF28_DATA,
40 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
41 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
42 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,
43 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
44 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
45 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
46 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
47 PINMUX_DATA_END,
48
49 PINMUX_INPUT_BEGIN,
50 FORCE_IN,
51 PA7_IN, PA6_IN, PA5_IN, PA4_IN,
52 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
53 PB11_IN, PB10_IN, PB9_IN, PB8_IN,
54 PC14_IN, PC13_IN, PC12_IN,
55 PC11_IN, PC10_IN, PC9_IN, PC8_IN,
56 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
57 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
58 PD15_IN, PD14_IN, PD13_IN, PD12_IN,
59 PD11_IN, PD10_IN, PD9_IN, PD8_IN,
60 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
61 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
62 PE15_IN, PE14_IN, PE13_IN, PE12_IN,
63 PE11_IN, PE10_IN, PE9_IN, PE8_IN,
64 PE7_IN, PE6_IN, PE5_IN, PE4_IN,
65 PE3_IN, PE2_IN, PE1_IN, PE0_IN,
66 PF30_IN, PF29_IN, PF28_IN,
67 PF27_IN, PF26_IN, PF25_IN, PF24_IN,
68 PF23_IN, PF22_IN, PF21_IN, PF20_IN,
69 PF19_IN, PF18_IN, PF17_IN, PF16_IN,
70 PF15_IN, PF14_IN, PF13_IN, PF12_IN,
71 PF11_IN, PF10_IN, PF9_IN, PF8_IN,
72 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
73 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
74 PINMUX_INPUT_END,
75
76 PINMUX_OUTPUT_BEGIN,
77 FORCE_OUT,
78 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
79 PC14_OUT, PC13_OUT, PC12_OUT,
80 PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT,
81 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
82 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
83 PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
84 PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
85 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
86 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
87 PE15_OUT, PE14_OUT, PE13_OUT, PE12_OUT,
88 PE11_OUT, PE10_OUT, PE9_OUT, PE8_OUT,
89 PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
90 PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
91 PF30_OUT, PF29_OUT, PF28_OUT,
92 PF27_OUT, PF26_OUT, PF25_OUT, PF24_OUT,
93 PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,
94 PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,
95 PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,
96 PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
97 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
98 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
99 PINMUX_OUTPUT_END,
100
101 PINMUX_FUNCTION_BEGIN,
102 PB11_IOR_IN, PB11_IOR_OUT,
103 PB10_IOR_IN, PB10_IOR_OUT,
104 PB9_IOR_IN, PB9_IOR_OUT,
105 PB8_IOR_IN, PB8_IOR_OUT,
106 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
107 PB11MD_0, PB11MD_1,
108 PB10MD_0, PB10MD_1,
109 PB9MD_00, PB9MD_01, PB9MD_10,
110 PB8MD_00, PB8MD_01, PB8MD_10,
111 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
112 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
113 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
114 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
115 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
116 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
117 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
118 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
119
120 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10,
121
122 PC14MD_0, PC14MD_1,
123 PC13MD_0, PC13MD_1,
124 PC12MD_0, PC12MD_1,
125 PC11MD_00, PC11MD_01, PC11MD_10,
126 PC10MD_00, PC10MD_01, PC10MD_10,
127 PC9MD_0, PC9MD_1,
128 PC8MD_0, PC8MD_1,
129 PC7MD_0, PC7MD_1,
130 PC6MD_0, PC6MD_1,
131 PC5MD_0, PC5MD_1,
132 PC4MD_0, PC4MD_1,
133 PC3MD_0, PC3MD_1,
134 PC2MD_0, PC2MD_1,
135 PC1MD_0, PC1MD_1,
136 PC0MD_00, PC0MD_01, PC0MD_10,
137
138 PD15MD_000, PD15MD_001, PD15MD_010, PD15MD_100, PD15MD_101,
139 PD14MD_000, PD14MD_001, PD14MD_010, PD14MD_101,
140 PD13MD_000, PD13MD_001, PD13MD_010, PD13MD_100, PD13MD_101,
141 PD12MD_000, PD12MD_001, PD12MD_010, PD12MD_100, PD12MD_101,
142 PD11MD_000, PD11MD_001, PD11MD_010, PD11MD_100, PD11MD_101,
143 PD10MD_000, PD10MD_001, PD10MD_010, PD10MD_100, PD10MD_101,
144 PD9MD_000, PD9MD_001, PD9MD_010, PD9MD_100, PD9MD_101,
145 PD8MD_000, PD8MD_001, PD8MD_010, PD8MD_100, PD8MD_101,
146 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, PD7MD_100, PD7MD_101,
147 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, PD6MD_100, PD6MD_101,
148 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, PD5MD_100, PD5MD_101,
149 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, PD4MD_100, PD4MD_101,
150 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, PD3MD_100, PD3MD_101,
151 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, PD2MD_100, PD2MD_101,
152 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, PD1MD_100, PD1MD_101,
153 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, PD0MD_100, PD0MD_101,
154
155 PE15MD_00, PE15MD_01, PE15MD_11,
156 PE14MD_00, PE14MD_01, PE14MD_11,
157 PE13MD_00, PE13MD_11,
158 PE12MD_00, PE12MD_11,
159 PE11MD_000, PE11MD_001, PE11MD_010, PE11MD_100,
160 PE10MD_000, PE10MD_001, PE10MD_010, PE10MD_100,
161 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
162 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
163 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, PE7MD_100,
164 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, PE6MD_100,
165 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, PE5MD_100,
166 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, PE4MD_100,
167 PE3MD_00, PE3MD_01, PE3MD_11,
168 PE2MD_00, PE2MD_01, PE2MD_11,
169 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
170 PE0MD_000, PE0MD_001, PE0MD_011, PE0MD_100,
171
172 PF30MD_0, PF30MD_1,
173 PF29MD_0, PF29MD_1,
174 PF28MD_0, PF28MD_1,
175 PF27MD_0, PF27MD_1,
176 PF26MD_0, PF26MD_1,
177 PF25MD_0, PF25MD_1,
178 PF24MD_0, PF24MD_1,
179 PF23MD_00, PF23MD_01, PF23MD_10,
180 PF22MD_00, PF22MD_01, PF22MD_10,
181 PF21MD_00, PF21MD_01, PF21MD_10,
182 PF20MD_00, PF20MD_01, PF20MD_10,
183 PF19MD_00, PF19MD_01, PF19MD_10,
184 PF18MD_00, PF18MD_01, PF18MD_10,
185 PF17MD_00, PF17MD_01, PF17MD_10,
186 PF16MD_00, PF16MD_01, PF16MD_10,
187 PF15MD_00, PF15MD_01, PF15MD_10,
188 PF14MD_00, PF14MD_01, PF14MD_10,
189 PF13MD_00, PF13MD_01, PF13MD_10,
190 PF12MD_00, PF12MD_01, PF12MD_10,
191 PF11MD_00, PF11MD_01, PF11MD_10,
192 PF10MD_00, PF10MD_01, PF10MD_10,
193 PF9MD_00, PF9MD_01, PF9MD_10,
194 PF8MD_00, PF8MD_01, PF8MD_10,
195 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
196 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
197 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
198 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
199 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
200 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
201 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
202 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
203 PINMUX_FUNCTION_END,
204
205 PINMUX_MARK_BEGIN,
206 PINT7_PB_MARK, PINT6_PB_MARK, PINT5_PB_MARK, PINT4_PB_MARK,
207 PINT3_PB_MARK, PINT2_PB_MARK, PINT1_PB_MARK, PINT0_PB_MARK,
208 PINT7_PD_MARK, PINT6_PD_MARK, PINT5_PD_MARK, PINT4_PD_MARK,
209 PINT3_PD_MARK, PINT2_PD_MARK, PINT1_PD_MARK, PINT0_PD_MARK,
210 IRQ7_PB_MARK, IRQ6_PB_MARK, IRQ5_PB_MARK, IRQ4_PB_MARK,
211 IRQ3_PB_MARK, IRQ2_PB_MARK, IRQ1_PB_MARK, IRQ0_PB_MARK,
212 IRQ7_PD_MARK, IRQ6_PD_MARK, IRQ5_PD_MARK, IRQ4_PD_MARK,
213 IRQ3_PD_MARK, IRQ2_PD_MARK, IRQ1_PD_MARK, IRQ0_PD_MARK,
214 IRQ7_PE_MARK, IRQ6_PE_MARK, IRQ5_PE_MARK, IRQ4_PE_MARK,
215 IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,
216 WDTOVF_MARK, IRQOUT_MARK, REFOUT_MARK, IRQOUT_REFOUT_MARK,
217 UBCTRG_MARK,
218 CTX1_MARK, CRX1_MARK, CTX0_MARK, CTX0_CTX1_MARK,
219 CRX0_MARK, CRX0_CRX1_MARK,
220 SDA3_MARK, SCL3_MARK,
221 SDA2_MARK, SCL2_MARK,
222 SDA1_MARK, SCL1_MARK,
223 SDA0_MARK, SCL0_MARK,
224 TEND0_PD_MARK, TEND0_PE_MARK, DACK0_PD_MARK, DACK0_PE_MARK,
225 DREQ0_PD_MARK, DREQ0_PE_MARK, TEND1_PD_MARK, TEND1_PE_MARK,
226 DACK1_PD_MARK, DACK1_PE_MARK, DREQ1_PD_MARK, DREQ1_PE_MARK,
227 DACK2_MARK, DREQ2_MARK, DACK3_MARK, DREQ3_MARK,
228 ADTRG_PD_MARK, ADTRG_PE_MARK,
229 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
230 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
231 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
232 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
233 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
234 A21_MARK, CS4_MARK, MRES_MARK, BS_MARK,
235 IOIS16_MARK, CS1_MARK, CS6_CE1B_MARK, CE2B_MARK,
236 CS5_CE1A_MARK, CE2A_MARK, FRAME_MARK, WAIT_MARK,
237 RDWR_MARK, CKE_MARK, CASU_MARK, BREQ_MARK,
238 RASU_MARK, BACK_MARK, CASL_MARK, RASL_MARK,
239 WE3_DQMUU_AH_ICIO_WR_MARK, WE2_DQMUL_ICIORD_MARK,
240 WE1_DQMLU_WE_MARK, WE0_DQMLL_MARK,
241 CS3_MARK, CS2_MARK, A1_MARK, A0_MARK, CS7_MARK,
242 TIOC4D_MARK, TIOC4C_MARK, TIOC4B_MARK, TIOC4A_MARK,
243 TIOC3D_MARK, TIOC3C_MARK, TIOC3B_MARK, TIOC3A_MARK,
244 TIOC2B_MARK, TIOC1B_MARK, TIOC2A_MARK, TIOC1A_MARK,
245 TIOC0D_MARK, TIOC0C_MARK, TIOC0B_MARK, TIOC0A_MARK,
246 TCLKD_PD_MARK, TCLKC_PD_MARK, TCLKB_PD_MARK, TCLKA_PD_MARK,
247 TCLKD_PF_MARK, TCLKC_PF_MARK, TCLKB_PF_MARK, TCLKA_PF_MARK,
248 SCS0_PD_MARK, SSO0_PD_MARK, SSI0_PD_MARK, SSCK0_PD_MARK,
249 SCS0_PF_MARK, SSO0_PF_MARK, SSI0_PF_MARK, SSCK0_PF_MARK,
250 SCS1_PD_MARK, SSO1_PD_MARK, SSI1_PD_MARK, SSCK1_PD_MARK,
251 SCS1_PF_MARK, SSO1_PF_MARK, SSI1_PF_MARK, SSCK1_PF_MARK,
252 TXD0_MARK, RXD0_MARK, SCK0_MARK,
253 TXD1_MARK, RXD1_MARK, SCK1_MARK,
254 TXD2_MARK, RXD2_MARK, SCK2_MARK,
255 RTS3_MARK, CTS3_MARK, TXD3_MARK,
256 RXD3_MARK, SCK3_MARK,
257 AUDIO_CLK_MARK,
258 SSIDATA3_MARK, SSIWS3_MARK, SSISCK3_MARK,
259 SSIDATA2_MARK, SSIWS2_MARK, SSISCK2_MARK,
260 SSIDATA1_MARK, SSIWS1_MARK, SSISCK1_MARK,
261 SSIDATA0_MARK, SSIWS0_MARK, SSISCK0_MARK,
262 FCE_MARK, FRB_MARK,
263 NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
264 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK,
265 FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK,
266 LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK,
267 LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK,
268 LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
269 LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
270 LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
271 LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
272 PINMUX_MARK_END,
273};
274
Laurent Pinchartcd3c1be2013-02-16 18:47:05 +0100[diff] [blame]275static const pinmux_enum_t pinmux_data[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]276
277 /* PA */
278 PINMUX_DATA(PA7_DATA, PA7_IN),
279 PINMUX_DATA(PA6_DATA, PA6_IN),
280 PINMUX_DATA(PA5_DATA, PA5_IN),
281 PINMUX_DATA(PA4_DATA, PA4_IN),
282 PINMUX_DATA(PA3_DATA, PA3_IN),
283 PINMUX_DATA(PA2_DATA, PA2_IN),
284 PINMUX_DATA(PA1_DATA, PA1_IN),
285 PINMUX_DATA(PA0_DATA, PA0_IN),
286
287 /* PB */
288 PINMUX_DATA(PB12_DATA, PB12MD_00, FORCE_OUT),
289 PINMUX_DATA(WDTOVF_MARK, PB12MD_01),
290 PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00),
291 PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01),
292 PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10),
293 PINMUX_DATA(UBCTRG_MARK, PB12MD_11),
294
295 PINMUX_DATA(PB11_DATA, PB11MD_0, PB11_IN, PB11_OUT),
296 PINMUX_DATA(CTX1_MARK, PB11MD_1),
297
298 PINMUX_DATA(PB10_DATA, PB10MD_0, PB10_IN, PB10_OUT),
299 PINMUX_DATA(CRX1_MARK, PB10MD_1),
300
301 PINMUX_DATA(PB9_DATA, PB9MD_00, PB9_IN, PB9_OUT),
302 PINMUX_DATA(CTX0_MARK, PB9MD_01),
303 PINMUX_DATA(CTX0_CTX1_MARK, PB9MD_10),
304
305 PINMUX_DATA(PB8_DATA, PB8MD_00, PB8_IN, PB8_OUT),
306 PINMUX_DATA(CRX0_MARK, PB8MD_01),
307 PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10),
308
309 PINMUX_DATA(PB7_DATA, PB7MD_00, FORCE_IN),
310 PINMUX_DATA(SDA3_MARK, PB7MD_01),
311 PINMUX_DATA(PINT7_PB_MARK, PB7MD_10),
312 PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11),
313
314 PINMUX_DATA(PB6_DATA, PB6MD_00, FORCE_IN),
315 PINMUX_DATA(SCL3_MARK, PB6MD_01),
316 PINMUX_DATA(PINT6_PB_MARK, PB6MD_10),
317 PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11),
318
319 PINMUX_DATA(PB5_DATA, PB5MD_00, FORCE_IN),
320 PINMUX_DATA(SDA2_MARK, PB6MD_01),
321 PINMUX_DATA(PINT5_PB_MARK, PB6MD_10),
322 PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11),
323
324 PINMUX_DATA(PB4_DATA, PB4MD_00, FORCE_IN),
325 PINMUX_DATA(SCL2_MARK, PB4MD_01),
326 PINMUX_DATA(PINT4_PB_MARK, PB4MD_10),
327 PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11),
328
329 PINMUX_DATA(PB3_DATA, PB3MD_00, FORCE_IN),
330 PINMUX_DATA(SDA1_MARK, PB3MD_01),
331 PINMUX_DATA(PINT3_PB_MARK, PB3MD_10),
332 PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11),
333
334 PINMUX_DATA(PB2_DATA, PB2MD_00, FORCE_IN),
335 PINMUX_DATA(SCL1_MARK, PB2MD_01),
336 PINMUX_DATA(PINT2_PB_MARK, PB2MD_10),
337 PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11),
338
339 PINMUX_DATA(PB1_DATA, PB1MD_00, FORCE_IN),
340 PINMUX_DATA(SDA0_MARK, PB1MD_01),
341 PINMUX_DATA(PINT1_PB_MARK, PB1MD_10),
342 PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11),
343
344 PINMUX_DATA(PB0_DATA, PB0MD_00, FORCE_IN),
345 PINMUX_DATA(SCL0_MARK, PB0MD_01),
346 PINMUX_DATA(PINT0_PB_MARK, PB0MD_10),
347 PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11),
348
349 /* PC */
350 PINMUX_DATA(PC14_DATA, PC14MD_0, PC14_IN, PC14_OUT),
351 PINMUX_DATA(WAIT_MARK, PC14MD_1),
352
353 PINMUX_DATA(PC13_DATA, PC13MD_0, PC13_IN, PC13_OUT),
354 PINMUX_DATA(RDWR_MARK, PC13MD_1),
355
356 PINMUX_DATA(PC12_DATA, PC12MD_0, PC12_IN, PC12_OUT),
357 PINMUX_DATA(CKE_MARK, PC12MD_1),
358
359 PINMUX_DATA(PC11_DATA, PC11MD_00, PC11_IN, PC11_OUT),
360 PINMUX_DATA(CASU_MARK, PC11MD_01),
361 PINMUX_DATA(BREQ_MARK, PC11MD_10),
362
363 PINMUX_DATA(PC10_DATA, PC10MD_00, PC10_IN, PC10_OUT),
364 PINMUX_DATA(RASU_MARK, PC10MD_01),
365 PINMUX_DATA(BACK_MARK, PC10MD_10),
366
367 PINMUX_DATA(PC9_DATA, PC9MD_0, PC9_IN, PC9_OUT),
368 PINMUX_DATA(CASL_MARK, PC9MD_1),
369
370 PINMUX_DATA(PC8_DATA, PC8MD_0, PC8_IN, PC8_OUT),
371 PINMUX_DATA(RASL_MARK, PC8MD_1),
372
373 PINMUX_DATA(PC7_DATA, PC7MD_0, PC7_IN, PC7_OUT),
374 PINMUX_DATA(WE3_DQMUU_AH_ICIO_WR_MARK, PC7MD_1),
375
376 PINMUX_DATA(PC6_DATA, PC6MD_0, PC6_IN, PC6_OUT),
377 PINMUX_DATA(WE2_DQMUL_ICIORD_MARK, PC6MD_1),
378
379 PINMUX_DATA(PC5_DATA, PC5MD_0, PC5_IN, PC5_OUT),
380 PINMUX_DATA(WE1_DQMLU_WE_MARK, PC5MD_1),
381
382 PINMUX_DATA(PC4_DATA, PC4MD_0, PC4_IN, PC4_OUT),
383 PINMUX_DATA(WE0_DQMLL_MARK, PC4MD_1),
384
385 PINMUX_DATA(PC3_DATA, PC3MD_0, PC3_IN, PC3_OUT),
386 PINMUX_DATA(CS3_MARK, PC3MD_1),
387
388 PINMUX_DATA(PC2_DATA, PC2MD_0, PC2_IN, PC2_OUT),
389 PINMUX_DATA(CS2_MARK, PC2MD_1),
390
391 PINMUX_DATA(PC1_DATA, PC1MD_0, PC1_IN, PC1_OUT),
392 PINMUX_DATA(A1_MARK, PC1MD_1),
393
394 PINMUX_DATA(PC0_DATA, PC0MD_00, PC0_IN, PC0_OUT),
395 PINMUX_DATA(A0_MARK, PC0MD_01),
396 PINMUX_DATA(CS7_MARK, PC0MD_10),
397
398 /* PD */
399 PINMUX_DATA(PD15_DATA, PD15MD_000, PD15_IN, PD15_OUT),
400 PINMUX_DATA(D31_MARK, PD15MD_001),
401 PINMUX_DATA(PINT7_PD_MARK, PD15MD_010),
402 PINMUX_DATA(ADTRG_PD_MARK, PD15MD_100),
403 PINMUX_DATA(TIOC4D_MARK, PD15MD_101),
404
405 PINMUX_DATA(PD14_DATA, PD14MD_000, PD14_IN, PD14_OUT),
406 PINMUX_DATA(D30_MARK, PD14MD_001),
407 PINMUX_DATA(PINT6_PD_MARK, PD14MD_010),
408 PINMUX_DATA(TIOC4C_MARK, PD14MD_101),
409
410 PINMUX_DATA(PD13_DATA, PD13MD_000, PD13_IN, PD13_OUT),
411 PINMUX_DATA(D29_MARK, PD13MD_001),
412 PINMUX_DATA(PINT5_PD_MARK, PD13MD_010),
413 PINMUX_DATA(TEND1_PD_MARK, PD13MD_100),
414 PINMUX_DATA(TIOC4B_MARK, PD13MD_101),
415
416 PINMUX_DATA(PD12_DATA, PD12MD_000, PD12_IN, PD12_OUT),
417 PINMUX_DATA(D28_MARK, PD12MD_001),
418 PINMUX_DATA(PINT4_PD_MARK, PD12MD_010),
419 PINMUX_DATA(DACK1_PD_MARK, PD12MD_100),
420 PINMUX_DATA(TIOC4A_MARK, PD12MD_101),
421
422 PINMUX_DATA(PD11_DATA, PD11MD_000, PD11_IN, PD11_OUT),
423 PINMUX_DATA(D27_MARK, PD11MD_001),
424 PINMUX_DATA(PINT3_PD_MARK, PD11MD_010),
425 PINMUX_DATA(DREQ1_PD_MARK, PD11MD_100),
426 PINMUX_DATA(TIOC3D_MARK, PD11MD_101),
427
428 PINMUX_DATA(PD10_DATA, PD10MD_000, PD10_IN, PD10_OUT),
429 PINMUX_DATA(D26_MARK, PD10MD_001),
430 PINMUX_DATA(PINT2_PD_MARK, PD10MD_010),
431 PINMUX_DATA(TEND0_PD_MARK, PD10MD_100),
432 PINMUX_DATA(TIOC3C_MARK, PD10MD_101),
433
434 PINMUX_DATA(PD9_DATA, PD9MD_000, PD9_IN, PD9_OUT),
435 PINMUX_DATA(D25_MARK, PD9MD_001),
436 PINMUX_DATA(PINT1_PD_MARK, PD9MD_010),
437 PINMUX_DATA(DACK0_PD_MARK, PD9MD_100),
438 PINMUX_DATA(TIOC3B_MARK, PD9MD_101),
439
440 PINMUX_DATA(PD8_DATA, PD8MD_000, PD8_IN, PD8_OUT),
441 PINMUX_DATA(D24_MARK, PD8MD_001),
442 PINMUX_DATA(PINT0_PD_MARK, PD8MD_010),
443 PINMUX_DATA(DREQ0_PD_MARK, PD8MD_100),
444 PINMUX_DATA(TIOC3A_MARK, PD8MD_101),
445
446 PINMUX_DATA(PD7_DATA, PD7MD_000, PD7_IN, PD7_OUT),
447 PINMUX_DATA(D23_MARK, PD7MD_001),
448 PINMUX_DATA(IRQ7_PD_MARK, PD7MD_010),
449 PINMUX_DATA(SCS1_PD_MARK, PD7MD_011),
450 PINMUX_DATA(TCLKD_PD_MARK, PD7MD_100),
451 PINMUX_DATA(TIOC2B_MARK, PD7MD_101),
452
453 PINMUX_DATA(PD6_DATA, PD6MD_000, PD6_IN, PD6_OUT),
454 PINMUX_DATA(D22_MARK, PD6MD_001),
455 PINMUX_DATA(IRQ6_PD_MARK, PD6MD_010),
456 PINMUX_DATA(SSO1_PD_MARK, PD6MD_011),
457 PINMUX_DATA(TCLKC_PD_MARK, PD6MD_100),
458 PINMUX_DATA(TIOC2A_MARK, PD6MD_101),
459
460 PINMUX_DATA(PD5_DATA, PD5MD_000, PD5_IN, PD5_OUT),
461 PINMUX_DATA(D21_MARK, PD5MD_001),
462 PINMUX_DATA(IRQ5_PD_MARK, PD5MD_010),
463 PINMUX_DATA(SSI1_PD_MARK, PD5MD_011),
464 PINMUX_DATA(TCLKB_PD_MARK, PD5MD_100),
465 PINMUX_DATA(TIOC1B_MARK, PD5MD_101),
466
467 PINMUX_DATA(PD4_DATA, PD4MD_000, PD4_IN, PD4_OUT),
468 PINMUX_DATA(D20_MARK, PD4MD_001),
469 PINMUX_DATA(IRQ4_PD_MARK, PD4MD_010),
470 PINMUX_DATA(SSCK1_PD_MARK, PD4MD_011),
471 PINMUX_DATA(TCLKA_PD_MARK, PD4MD_100),
472 PINMUX_DATA(TIOC1A_MARK, PD4MD_101),
473
474 PINMUX_DATA(PD3_DATA, PD3MD_000, PD3_IN, PD3_OUT),
475 PINMUX_DATA(D19_MARK, PD3MD_001),
476 PINMUX_DATA(IRQ3_PD_MARK, PD3MD_010),
477 PINMUX_DATA(SCS0_PD_MARK, PD3MD_011),
478 PINMUX_DATA(DACK3_MARK, PD3MD_100),
479 PINMUX_DATA(TIOC0D_MARK, PD3MD_101),
480
481 PINMUX_DATA(PD2_DATA, PD2MD_000, PD2_IN, PD2_OUT),
482 PINMUX_DATA(D18_MARK, PD2MD_001),
483 PINMUX_DATA(IRQ2_PD_MARK, PD2MD_010),
484 PINMUX_DATA(SSO0_PD_MARK, PD2MD_011),
485 PINMUX_DATA(DREQ3_MARK, PD2MD_100),
486 PINMUX_DATA(TIOC0C_MARK, PD2MD_101),
487
488 PINMUX_DATA(PD1_DATA, PD1MD_000, PD1_IN, PD1_OUT),
489 PINMUX_DATA(D17_MARK, PD1MD_001),
490 PINMUX_DATA(IRQ1_PD_MARK, PD1MD_010),
491 PINMUX_DATA(SSI0_PD_MARK, PD1MD_011),
492 PINMUX_DATA(DACK2_MARK, PD1MD_100),
493 PINMUX_DATA(TIOC0B_MARK, PD1MD_101),
494
495 PINMUX_DATA(PD0_DATA, PD0MD_000, PD0_IN, PD0_OUT),
496 PINMUX_DATA(D16_MARK, PD0MD_001),
497 PINMUX_DATA(IRQ0_PD_MARK, PD0MD_010),
498 PINMUX_DATA(SSCK0_PD_MARK, PD0MD_011),
499 PINMUX_DATA(DREQ2_MARK, PD0MD_100),
500 PINMUX_DATA(TIOC0A_MARK, PD0MD_101),
501
502 /* PE */
503 PINMUX_DATA(PE15_DATA, PE15MD_00, PE15_IN, PE15_OUT),
504 PINMUX_DATA(IOIS16_MARK, PE15MD_01),
505 PINMUX_DATA(RTS3_MARK, PE15MD_11),
506
507 PINMUX_DATA(PE14_DATA, PE14MD_00, PE14_IN, PE14_OUT),
508 PINMUX_DATA(CS1_MARK, PE14MD_01),
509 PINMUX_DATA(CTS3_MARK, PE14MD_11),
510
511 PINMUX_DATA(PE13_DATA, PE13MD_00, PE13_IN, PE13_OUT),
512 PINMUX_DATA(TXD3_MARK, PE13MD_11),
513
514 PINMUX_DATA(PE12_DATA, PE12MD_00, PE12_IN, PE12_OUT),
515 PINMUX_DATA(RXD3_MARK, PE12MD_11),
516
517 PINMUX_DATA(PE11_DATA, PE11MD_000, PE11_IN, PE11_OUT),
518 PINMUX_DATA(CS6_CE1B_MARK, PE11MD_001),
519 PINMUX_DATA(IRQ7_PE_MARK, PE11MD_010),
520 PINMUX_DATA(TEND1_PE_MARK, PE11MD_100),
521
522 PINMUX_DATA(PE10_DATA, PE10MD_000, PE10_IN, PE10_OUT),
523 PINMUX_DATA(CE2B_MARK, PE10MD_001),
524 PINMUX_DATA(IRQ6_PE_MARK, PE10MD_010),
525 PINMUX_DATA(TEND0_PE_MARK, PE10MD_100),
526
527 PINMUX_DATA(PE9_DATA, PE9MD_00, PE9_IN, PE9_OUT),
528 PINMUX_DATA(CS5_CE1A_MARK, PE9MD_01),
529 PINMUX_DATA(IRQ5_PE_MARK, PE9MD_10),
530 PINMUX_DATA(SCK3_MARK, PE9MD_11),
531
532 PINMUX_DATA(PE8_DATA, PE8MD_00, PE8_IN, PE8_OUT),
533 PINMUX_DATA(CE2A_MARK, PE8MD_01),
534 PINMUX_DATA(IRQ4_PE_MARK, PE8MD_10),
535 PINMUX_DATA(SCK2_MARK, PE8MD_11),
536
537 PINMUX_DATA(PE7_DATA, PE7MD_000, PE7_IN, PE7_OUT),
538 PINMUX_DATA(FRAME_MARK, PE7MD_001),
539 PINMUX_DATA(IRQ3_PE_MARK, PE7MD_010),
540 PINMUX_DATA(TXD2_MARK, PE7MD_011),
541 PINMUX_DATA(DACK1_PE_MARK, PE7MD_100),
542
543 PINMUX_DATA(PE6_DATA, PE6MD_000, PE6_IN, PE6_OUT),
544 PINMUX_DATA(A25_MARK, PE6MD_001),
545 PINMUX_DATA(IRQ2_PE_MARK, PE6MD_010),
546 PINMUX_DATA(RXD2_MARK, PE6MD_011),
547 PINMUX_DATA(DREQ1_PE_MARK, PE6MD_100),
548
549 PINMUX_DATA(PE5_DATA, PE5MD_000, PE5_IN, PE5_OUT),
550 PINMUX_DATA(A24_MARK, PE5MD_001),
551 PINMUX_DATA(IRQ1_PE_MARK, PE5MD_010),
552 PINMUX_DATA(TXD1_MARK, PE5MD_011),
553 PINMUX_DATA(DACK0_PE_MARK, PE5MD_100),
554
555 PINMUX_DATA(PE4_DATA, PE4MD_000, PE4_IN, PE4_OUT),
556 PINMUX_DATA(A23_MARK, PE4MD_001),
557 PINMUX_DATA(IRQ0_PE_MARK, PE4MD_010),
558 PINMUX_DATA(RXD1_MARK, PE4MD_011),
559 PINMUX_DATA(DREQ0_PE_MARK, PE4MD_100),
560
561 PINMUX_DATA(PE3_DATA, PE3MD_00, PE3_IN, PE3_OUT),
562 PINMUX_DATA(A22_MARK, PE3MD_01),
563 PINMUX_DATA(SCK1_MARK, PE3MD_11),
564
565 PINMUX_DATA(PE2_DATA, PE2MD_00, PE2_IN, PE2_OUT),
566 PINMUX_DATA(A21_MARK, PE2MD_01),
567 PINMUX_DATA(SCK0_MARK, PE2MD_11),
568
569 PINMUX_DATA(PE1_DATA, PE1MD_00, PE1_IN, PE1_OUT),
570 PINMUX_DATA(CS4_MARK, PE1MD_01),
571 PINMUX_DATA(MRES_MARK, PE1MD_10),
572 PINMUX_DATA(TXD0_MARK, PE1MD_11),
573
574 PINMUX_DATA(PE0_DATA, PE0MD_000, PE0_IN, PE0_OUT),
575 PINMUX_DATA(BS_MARK, PE0MD_001),
576 PINMUX_DATA(RXD0_MARK, PE0MD_011),
577 PINMUX_DATA(ADTRG_PE_MARK, PE0MD_100),
578
579 /* PF */
580 PINMUX_DATA(PF30_DATA, PF30MD_0, PF30_IN, PF30_OUT),
581 PINMUX_DATA(AUDIO_CLK_MARK, PF30MD_1),
582
583 PINMUX_DATA(PF29_DATA, PF29MD_0, PF29_IN, PF29_OUT),
584 PINMUX_DATA(SSIDATA3_MARK, PF29MD_1),
585
586 PINMUX_DATA(PF28_DATA, PF28MD_0, PF28_IN, PF28_OUT),
587 PINMUX_DATA(SSIWS3_MARK, PF28MD_1),
588
589 PINMUX_DATA(PF27_DATA, PF27MD_0, PF27_IN, PF27_OUT),
590 PINMUX_DATA(SSISCK3_MARK, PF27MD_1),
591
592 PINMUX_DATA(PF26_DATA, PF26MD_0, PF26_IN, PF26_OUT),
593 PINMUX_DATA(SSIDATA2_MARK, PF26MD_1),
594
595 PINMUX_DATA(PF25_DATA, PF25MD_0, PF25_IN, PF25_OUT),
596 PINMUX_DATA(SSIWS2_MARK, PF25MD_1),
597
598 PINMUX_DATA(PF24_DATA, PF24MD_0, PF24_IN, PF24_OUT),
599 PINMUX_DATA(SSISCK2_MARK, PF24MD_1),
600
601 PINMUX_DATA(PF23_DATA, PF23MD_00, PF23_IN, PF23_OUT),
602 PINMUX_DATA(SSIDATA1_MARK, PF23MD_01),
603 PINMUX_DATA(LCD_VEPWC_MARK, PF23MD_10),
604
605 PINMUX_DATA(PF22_DATA, PF22MD_00, PF22_IN, PF22_OUT),
606 PINMUX_DATA(SSIWS1_MARK, PF22MD_01),
607 PINMUX_DATA(LCD_VCPWC_MARK, PF22MD_10),
608
609 PINMUX_DATA(PF21_DATA, PF21MD_00, PF21_IN, PF21_OUT),
610 PINMUX_DATA(SSISCK1_MARK, PF21MD_01),
611 PINMUX_DATA(LCD_CLK_MARK, PF21MD_10),
612
613 PINMUX_DATA(PF20_DATA, PF20MD_00, PF20_IN, PF20_OUT),
614 PINMUX_DATA(SSIDATA0_MARK, PF20MD_01),
615 PINMUX_DATA(LCD_FLM_MARK, PF20MD_10),
616
617 PINMUX_DATA(PF19_DATA, PF19MD_00, PF19_IN, PF19_OUT),
618 PINMUX_DATA(SSIWS0_MARK, PF19MD_01),
619 PINMUX_DATA(LCD_M_DISP_MARK, PF19MD_10),
620
621 PINMUX_DATA(PF18_DATA, PF18MD_00, PF18_IN, PF18_OUT),
622 PINMUX_DATA(SSISCK0_MARK, PF18MD_01),
623 PINMUX_DATA(LCD_CL2_MARK, PF18MD_10),
624
625 PINMUX_DATA(PF17_DATA, PF17MD_00, PF17_IN, PF17_OUT),
626 PINMUX_DATA(FCE_MARK, PF17MD_01),
627 PINMUX_DATA(LCD_CL1_MARK, PF17MD_10),
628
629 PINMUX_DATA(PF16_DATA, PF16MD_00, PF16_IN, PF16_OUT),
630 PINMUX_DATA(FRB_MARK, PF16MD_01),
631 PINMUX_DATA(LCD_DON_MARK, PF16MD_10),
632
633 PINMUX_DATA(PF15_DATA, PF15MD_00, PF15_IN, PF15_OUT),
634 PINMUX_DATA(NAF7_MARK, PF15MD_01),
635 PINMUX_DATA(LCD_DATA15_MARK, PF15MD_10),
636
637 PINMUX_DATA(PF14_DATA, PF14MD_00, PF14_IN, PF14_OUT),
638 PINMUX_DATA(NAF6_MARK, PF14MD_01),
639 PINMUX_DATA(LCD_DATA14_MARK, PF14MD_10),
640
641 PINMUX_DATA(PF13_DATA, PF13MD_00, PF13_IN, PF13_OUT),
642 PINMUX_DATA(NAF5_MARK, PF13MD_01),
643 PINMUX_DATA(LCD_DATA13_MARK, PF13MD_10),
644
645 PINMUX_DATA(PF12_DATA, PF12MD_00, PF12_IN, PF12_OUT),
646 PINMUX_DATA(NAF4_MARK, PF12MD_01),
647 PINMUX_DATA(LCD_DATA12_MARK, PF12MD_10),
648
649 PINMUX_DATA(PF11_DATA, PF11MD_00, PF11_IN, PF11_OUT),
650 PINMUX_DATA(NAF3_MARK, PF11MD_01),
651 PINMUX_DATA(LCD_DATA11_MARK, PF11MD_10),
652
653 PINMUX_DATA(PF10_DATA, PF10MD_00, PF10_IN, PF10_OUT),
654 PINMUX_DATA(NAF2_MARK, PF10MD_01),
655 PINMUX_DATA(LCD_DATA10_MARK, PF10MD_10),
656
657 PINMUX_DATA(PF9_DATA, PF9MD_00, PF9_IN, PF9_OUT),
658 PINMUX_DATA(NAF1_MARK, PF9MD_01),
659 PINMUX_DATA(LCD_DATA9_MARK, PF9MD_10),
660
661 PINMUX_DATA(PF8_DATA, PF8MD_00, PF8_IN, PF8_OUT),
662 PINMUX_DATA(NAF0_MARK, PF8MD_01),
663 PINMUX_DATA(LCD_DATA8_MARK, PF8MD_10),
664
665 PINMUX_DATA(PF7_DATA, PF7MD_00, PF7_IN, PF7_OUT),
666 PINMUX_DATA(FSC_MARK, PF7MD_01),
667 PINMUX_DATA(LCD_DATA7_MARK, PF7MD_10),
668 PINMUX_DATA(SCS1_PF_MARK, PF7MD_11),
669
670 PINMUX_DATA(PF6_DATA, PF6MD_00, PF6_IN, PF6_OUT),
671 PINMUX_DATA(FOE_MARK, PF6MD_01),
672 PINMUX_DATA(LCD_DATA6_MARK, PF6MD_10),
673 PINMUX_DATA(SSO1_PF_MARK, PF6MD_11),
674
675 PINMUX_DATA(PF5_DATA, PF5MD_00, PF5_IN, PF5_OUT),
676 PINMUX_DATA(FCDE_MARK, PF5MD_01),
677 PINMUX_DATA(LCD_DATA5_MARK, PF5MD_10),
678 PINMUX_DATA(SSI1_PF_MARK, PF5MD_11),
679
680 PINMUX_DATA(PF4_DATA, PF4MD_00, PF4_IN, PF4_OUT),
681 PINMUX_DATA(FWE_MARK, PF4MD_01),
682 PINMUX_DATA(LCD_DATA4_MARK, PF4MD_10),
683 PINMUX_DATA(SSCK1_PF_MARK, PF4MD_11),
684
685 PINMUX_DATA(PF3_DATA, PF3MD_00, PF3_IN, PF3_OUT),
686 PINMUX_DATA(TCLKD_PF_MARK, PF3MD_01),
687 PINMUX_DATA(LCD_DATA3_MARK, PF3MD_10),
688 PINMUX_DATA(SCS0_PF_MARK, PF3MD_11),
689
690 PINMUX_DATA(PF2_DATA, PF2MD_00, PF2_IN, PF2_OUT),
691 PINMUX_DATA(TCLKC_PF_MARK, PF2MD_01),
692 PINMUX_DATA(LCD_DATA2_MARK, PF2MD_10),
693 PINMUX_DATA(SSO0_PF_MARK, PF2MD_11),
694
695 PINMUX_DATA(PF1_DATA, PF1MD_00, PF1_IN, PF1_OUT),
696 PINMUX_DATA(TCLKB_PF_MARK, PF1MD_01),
697 PINMUX_DATA(LCD_DATA1_MARK, PF1MD_10),
698 PINMUX_DATA(SSI0_PF_MARK, PF1MD_11),
699
700 PINMUX_DATA(PF0_DATA, PF0MD_00, PF0_IN, PF0_OUT),
701 PINMUX_DATA(TCLKA_PF_MARK, PF0MD_01),
702 PINMUX_DATA(LCD_DATA0_MARK, PF0MD_10),
703 PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11),
704};
705
Laurent Pincharta3db40a2013-01-02 14:53:37 +0100[diff] [blame]706static struct sh_pfc_pin pinmux_pins[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]707
708 /* PA */
709 PINMUX_GPIO(GPIO_PA7, PA7_DATA),
710 PINMUX_GPIO(GPIO_PA6, PA6_DATA),
711 PINMUX_GPIO(GPIO_PA5, PA5_DATA),
712 PINMUX_GPIO(GPIO_PA4, PA4_DATA),
713 PINMUX_GPIO(GPIO_PA3, PA3_DATA),
714 PINMUX_GPIO(GPIO_PA2, PA2_DATA),
715 PINMUX_GPIO(GPIO_PA1, PA1_DATA),
716 PINMUX_GPIO(GPIO_PA0, PA0_DATA),
717
718 /* PB */
719 PINMUX_GPIO(GPIO_PB12, PB12_DATA),
720 PINMUX_GPIO(GPIO_PB11, PB11_DATA),
721 PINMUX_GPIO(GPIO_PB10, PB10_DATA),
722 PINMUX_GPIO(GPIO_PB9, PB9_DATA),
723 PINMUX_GPIO(GPIO_PB8, PB8_DATA),
724 PINMUX_GPIO(GPIO_PB7, PB7_DATA),
725 PINMUX_GPIO(GPIO_PB6, PB6_DATA),
726 PINMUX_GPIO(GPIO_PB5, PB5_DATA),
727 PINMUX_GPIO(GPIO_PB4, PB4_DATA),
728 PINMUX_GPIO(GPIO_PB3, PB3_DATA),
729 PINMUX_GPIO(GPIO_PB2, PB2_DATA),
730 PINMUX_GPIO(GPIO_PB1, PB1_DATA),
731 PINMUX_GPIO(GPIO_PB0, PB0_DATA),
732
733 /* PC */
734 PINMUX_GPIO(GPIO_PC14, PC14_DATA),
735 PINMUX_GPIO(GPIO_PC13, PC13_DATA),
736 PINMUX_GPIO(GPIO_PC12, PC12_DATA),
737 PINMUX_GPIO(GPIO_PC11, PC11_DATA),
738 PINMUX_GPIO(GPIO_PC10, PC10_DATA),
739 PINMUX_GPIO(GPIO_PC9, PC9_DATA),
740 PINMUX_GPIO(GPIO_PC8, PC8_DATA),
741 PINMUX_GPIO(GPIO_PC7, PC7_DATA),
742 PINMUX_GPIO(GPIO_PC6, PC6_DATA),
743 PINMUX_GPIO(GPIO_PC5, PC5_DATA),
744 PINMUX_GPIO(GPIO_PC4, PC4_DATA),
745 PINMUX_GPIO(GPIO_PC3, PC3_DATA),
746 PINMUX_GPIO(GPIO_PC2, PC2_DATA),
747 PINMUX_GPIO(GPIO_PC1, PC1_DATA),
748 PINMUX_GPIO(GPIO_PC0, PC0_DATA),
749
750 /* PD */
751 PINMUX_GPIO(GPIO_PD15, PD15_DATA),
752 PINMUX_GPIO(GPIO_PD14, PD14_DATA),
753 PINMUX_GPIO(GPIO_PD13, PD13_DATA),
754 PINMUX_GPIO(GPIO_PD12, PD12_DATA),
755 PINMUX_GPIO(GPIO_PD11, PD11_DATA),
756 PINMUX_GPIO(GPIO_PD10, PD10_DATA),
757 PINMUX_GPIO(GPIO_PD9, PD9_DATA),
758 PINMUX_GPIO(GPIO_PD8, PD8_DATA),
759 PINMUX_GPIO(GPIO_PD7, PD7_DATA),
760 PINMUX_GPIO(GPIO_PD6, PD6_DATA),
761 PINMUX_GPIO(GPIO_PD5, PD5_DATA),
762 PINMUX_GPIO(GPIO_PD4, PD4_DATA),
763 PINMUX_GPIO(GPIO_PD3, PD3_DATA),
764 PINMUX_GPIO(GPIO_PD2, PD2_DATA),
765 PINMUX_GPIO(GPIO_PD1, PD1_DATA),
766 PINMUX_GPIO(GPIO_PD0, PD0_DATA),
767
768 /* PE */
769 PINMUX_GPIO(GPIO_PE15, PE15_DATA),
770 PINMUX_GPIO(GPIO_PE14, PE14_DATA),
771 PINMUX_GPIO(GPIO_PE13, PE13_DATA),
772 PINMUX_GPIO(GPIO_PE12, PE12_DATA),
773 PINMUX_GPIO(GPIO_PE11, PE11_DATA),
774 PINMUX_GPIO(GPIO_PE10, PE10_DATA),
775 PINMUX_GPIO(GPIO_PE9, PE9_DATA),
776 PINMUX_GPIO(GPIO_PE8, PE8_DATA),
777 PINMUX_GPIO(GPIO_PE7, PE7_DATA),
778 PINMUX_GPIO(GPIO_PE6, PE6_DATA),
779 PINMUX_GPIO(GPIO_PE5, PE5_DATA),
780 PINMUX_GPIO(GPIO_PE4, PE4_DATA),
781 PINMUX_GPIO(GPIO_PE3, PE3_DATA),
782 PINMUX_GPIO(GPIO_PE2, PE2_DATA),
783 PINMUX_GPIO(GPIO_PE1, PE1_DATA),
784 PINMUX_GPIO(GPIO_PE0, PE0_DATA),
785
786 /* PF */
787 PINMUX_GPIO(GPIO_PF30, PF30_DATA),
788 PINMUX_GPIO(GPIO_PF29, PF29_DATA),
789 PINMUX_GPIO(GPIO_PF28, PF28_DATA),
790 PINMUX_GPIO(GPIO_PF27, PF27_DATA),
791 PINMUX_GPIO(GPIO_PF26, PF26_DATA),
792 PINMUX_GPIO(GPIO_PF25, PF25_DATA),
793 PINMUX_GPIO(GPIO_PF24, PF24_DATA),
794 PINMUX_GPIO(GPIO_PF23, PF23_DATA),
795 PINMUX_GPIO(GPIO_PF22, PF22_DATA),
796 PINMUX_GPIO(GPIO_PF21, PF21_DATA),
797 PINMUX_GPIO(GPIO_PF20, PF20_DATA),
798 PINMUX_GPIO(GPIO_PF19, PF19_DATA),
799 PINMUX_GPIO(GPIO_PF18, PF18_DATA),
800 PINMUX_GPIO(GPIO_PF17, PF17_DATA),
801 PINMUX_GPIO(GPIO_PF16, PF16_DATA),
802 PINMUX_GPIO(GPIO_PF15, PF15_DATA),
803 PINMUX_GPIO(GPIO_PF14, PF14_DATA),
804 PINMUX_GPIO(GPIO_PF13, PF13_DATA),
805 PINMUX_GPIO(GPIO_PF12, PF12_DATA),
806 PINMUX_GPIO(GPIO_PF11, PF11_DATA),
807 PINMUX_GPIO(GPIO_PF10, PF10_DATA),
808 PINMUX_GPIO(GPIO_PF9, PF9_DATA),
809 PINMUX_GPIO(GPIO_PF8, PF8_DATA),
810 PINMUX_GPIO(GPIO_PF7, PF7_DATA),
811 PINMUX_GPIO(GPIO_PF6, PF6_DATA),
812 PINMUX_GPIO(GPIO_PF5, PF5_DATA),
813 PINMUX_GPIO(GPIO_PF4, PF4_DATA),
814 PINMUX_GPIO(GPIO_PF3, PF3_DATA),
815 PINMUX_GPIO(GPIO_PF2, PF2_DATA),
816 PINMUX_GPIO(GPIO_PF1, PF1_DATA),
817 PINMUX_GPIO(GPIO_PF0, PF0_DATA),
Laurent Pincharta373ed02012-11-29 13:24:07 +0100[diff] [blame]818};
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]819
Laurent Pincharta373ed02012-11-29 13:24:07 +0100[diff] [blame]820#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
821
Laurent Pinchartcd3c1be2013-02-16 18:47:05 +0100[diff] [blame]822static const struct pinmux_func pinmux_func_gpios[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]823 /* INTC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]824 GPIO_FN(PINT7_PB),
825 GPIO_FN(PINT6_PB),
826 GPIO_FN(PINT5_PB),
827 GPIO_FN(PINT4_PB),
828 GPIO_FN(PINT3_PB),
829 GPIO_FN(PINT2_PB),
830 GPIO_FN(PINT1_PB),
831 GPIO_FN(PINT0_PB),
832 GPIO_FN(PINT7_PD),
833 GPIO_FN(PINT6_PD),
834 GPIO_FN(PINT5_PD),
835 GPIO_FN(PINT4_PD),
836 GPIO_FN(PINT3_PD),
837 GPIO_FN(PINT2_PD),
838 GPIO_FN(PINT1_PD),
839 GPIO_FN(PINT0_PD),
840 GPIO_FN(IRQ7_PB),
841 GPIO_FN(IRQ6_PB),
842 GPIO_FN(IRQ5_PB),
843 GPIO_FN(IRQ4_PB),
844 GPIO_FN(IRQ3_PB),
845 GPIO_FN(IRQ2_PB),
846 GPIO_FN(IRQ1_PB),
847 GPIO_FN(IRQ0_PB),
848 GPIO_FN(IRQ7_PD),
849 GPIO_FN(IRQ6_PD),
850 GPIO_FN(IRQ5_PD),
851 GPIO_FN(IRQ4_PD),
852 GPIO_FN(IRQ3_PD),
853 GPIO_FN(IRQ2_PD),
854 GPIO_FN(IRQ1_PD),
855 GPIO_FN(IRQ0_PD),
856 GPIO_FN(IRQ7_PE),
857 GPIO_FN(IRQ6_PE),
858 GPIO_FN(IRQ5_PE),
859 GPIO_FN(IRQ4_PE),
860 GPIO_FN(IRQ3_PE),
861 GPIO_FN(IRQ2_PE),
862 GPIO_FN(IRQ1_PE),
863 GPIO_FN(IRQ0_PE),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]864
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]865 GPIO_FN(WDTOVF),
866 GPIO_FN(IRQOUT),
867 GPIO_FN(REFOUT),
868 GPIO_FN(IRQOUT_REFOUT),
869 GPIO_FN(UBCTRG),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]870
871 /* CAN */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]872 GPIO_FN(CTX1),
873 GPIO_FN(CRX1),
874 GPIO_FN(CTX0),
875 GPIO_FN(CTX0_CTX1),
876 GPIO_FN(CRX0),
877 GPIO_FN(CRX0_CRX1),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]878
879 /* IIC3 */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]880 GPIO_FN(SDA3),
881 GPIO_FN(SCL3),
882 GPIO_FN(SDA2),
883 GPIO_FN(SCL2),
884 GPIO_FN(SDA1),
885 GPIO_FN(SCL1),
886 GPIO_FN(SDA0),
887 GPIO_FN(SCL0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]888
889 /* DMAC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]890 GPIO_FN(TEND0_PD),
891 GPIO_FN(TEND0_PE),
892 GPIO_FN(DACK0_PD),
893 GPIO_FN(DACK0_PE),
894 GPIO_FN(DREQ0_PD),
895 GPIO_FN(DREQ0_PE),
896 GPIO_FN(TEND1_PD),
897 GPIO_FN(TEND1_PE),
898 GPIO_FN(DACK1_PD),
899 GPIO_FN(DACK1_PE),
900 GPIO_FN(DREQ1_PD),
901 GPIO_FN(DREQ1_PE),
902 GPIO_FN(DACK2),
903 GPIO_FN(DREQ2),
904 GPIO_FN(DACK3),
905 GPIO_FN(DREQ3),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]906
907 /* ADC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]908 GPIO_FN(ADTRG_PD),
909 GPIO_FN(ADTRG_PE),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]910
911 /* BSC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]912 GPIO_FN(D31),
913 GPIO_FN(D30),
914 GPIO_FN(D29),
915 GPIO_FN(D28),
916 GPIO_FN(D27),
917 GPIO_FN(D26),
918 GPIO_FN(D25),
919 GPIO_FN(D24),
920 GPIO_FN(D23),
921 GPIO_FN(D22),
922 GPIO_FN(D21),
923 GPIO_FN(D20),
924 GPIO_FN(D19),
925 GPIO_FN(D18),
926 GPIO_FN(D17),
927 GPIO_FN(D16),
928 GPIO_FN(A25),
929 GPIO_FN(A24),
930 GPIO_FN(A23),
931 GPIO_FN(A22),
932 GPIO_FN(A21),
933 GPIO_FN(CS4),
934 GPIO_FN(MRES),
935 GPIO_FN(BS),
936 GPIO_FN(IOIS16),
937 GPIO_FN(CS1),
938 GPIO_FN(CS6_CE1B),
939 GPIO_FN(CE2B),
940 GPIO_FN(CS5_CE1A),
941 GPIO_FN(CE2A),
942 GPIO_FN(FRAME),
943 GPIO_FN(WAIT),
944 GPIO_FN(RDWR),
945 GPIO_FN(CKE),
946 GPIO_FN(CASU),
947 GPIO_FN(BREQ),
948 GPIO_FN(RASU),
949 GPIO_FN(BACK),
950 GPIO_FN(CASL),
951 GPIO_FN(RASL),
952 GPIO_FN(WE3_DQMUU_AH_ICIO_WR),
953 GPIO_FN(WE2_DQMUL_ICIORD),
954 GPIO_FN(WE1_DQMLU_WE),
955 GPIO_FN(WE0_DQMLL),
956 GPIO_FN(CS3),
957 GPIO_FN(CS2),
958 GPIO_FN(A1),
959 GPIO_FN(A0),
960 GPIO_FN(CS7),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]961
962 /* TMU */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]963 GPIO_FN(TIOC4D),
964 GPIO_FN(TIOC4C),
965 GPIO_FN(TIOC4B),
966 GPIO_FN(TIOC4A),
967 GPIO_FN(TIOC3D),
968 GPIO_FN(TIOC3C),
969 GPIO_FN(TIOC3B),
970 GPIO_FN(TIOC3A),
971 GPIO_FN(TIOC2B),
972 GPIO_FN(TIOC1B),
973 GPIO_FN(TIOC2A),
974 GPIO_FN(TIOC1A),
975 GPIO_FN(TIOC0D),
976 GPIO_FN(TIOC0C),
977 GPIO_FN(TIOC0B),
978 GPIO_FN(TIOC0A),
979 GPIO_FN(TCLKD_PD),
980 GPIO_FN(TCLKC_PD),
981 GPIO_FN(TCLKB_PD),
982 GPIO_FN(TCLKA_PD),
983 GPIO_FN(TCLKD_PF),
984 GPIO_FN(TCLKC_PF),
985 GPIO_FN(TCLKB_PF),
986 GPIO_FN(TCLKA_PF),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]987
988 /* SSU */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]989 GPIO_FN(SCS0_PD),
990 GPIO_FN(SSO0_PD),
991 GPIO_FN(SSI0_PD),
992 GPIO_FN(SSCK0_PD),
993 GPIO_FN(SCS0_PF),
994 GPIO_FN(SSO0_PF),
995 GPIO_FN(SSI0_PF),
996 GPIO_FN(SSCK0_PF),
997 GPIO_FN(SCS1_PD),
998 GPIO_FN(SSO1_PD),
999 GPIO_FN(SSI1_PD),
1000 GPIO_FN(SSCK1_PD),
1001 GPIO_FN(SCS1_PF),
1002 GPIO_FN(SSO1_PF),
1003 GPIO_FN(SSI1_PF),
1004 GPIO_FN(SSCK1_PF),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1005
1006 /* SCIF */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]1007 GPIO_FN(TXD0),
1008 GPIO_FN(RXD0),
1009 GPIO_FN(SCK0),
1010 GPIO_FN(TXD1),
1011 GPIO_FN(RXD1),
1012 GPIO_FN(SCK1),
1013 GPIO_FN(TXD2),
1014 GPIO_FN(RXD2),
1015 GPIO_FN(SCK2),
1016 GPIO_FN(RTS3),
1017 GPIO_FN(CTS3),
1018 GPIO_FN(TXD3),
1019 GPIO_FN(RXD3),
1020 GPIO_FN(SCK3),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1021
1022 /* SSI */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]1023 GPIO_FN(AUDIO_CLK),
1024 GPIO_FN(SSIDATA3),
1025 GPIO_FN(SSIWS3),
1026 GPIO_FN(SSISCK3),
1027 GPIO_FN(SSIDATA2),
1028 GPIO_FN(SSIWS2),
1029 GPIO_FN(SSISCK2),
1030 GPIO_FN(SSIDATA1),
1031 GPIO_FN(SSIWS1),
1032 GPIO_FN(SSISCK1),
1033 GPIO_FN(SSIDATA0),
1034 GPIO_FN(SSIWS0),
1035 GPIO_FN(SSISCK0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1036
1037 /* FLCTL */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]1038 GPIO_FN(FCE),
1039 GPIO_FN(FRB),
1040 GPIO_FN(NAF7),
1041 GPIO_FN(NAF6),
1042 GPIO_FN(NAF5),
1043 GPIO_FN(NAF4),
1044 GPIO_FN(NAF3),
1045 GPIO_FN(NAF2),
1046 GPIO_FN(NAF1),
1047 GPIO_FN(NAF0),
1048 GPIO_FN(FSC),
1049 GPIO_FN(FOE),
1050 GPIO_FN(FCDE),
1051 GPIO_FN(FWE),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1052
1053 /* LCDC */
Laurent Pinchart35ad4272012-11-28 22:05:49 +0100[diff] [blame]1054 GPIO_FN(LCD_VEPWC),
1055 GPIO_FN(LCD_VCPWC),
1056 GPIO_FN(LCD_CLK),
1057 GPIO_FN(LCD_FLM),
1058 GPIO_FN(LCD_M_DISP),
1059 GPIO_FN(LCD_CL2),
1060 GPIO_FN(LCD_CL1),
1061 GPIO_FN(LCD_DON),
1062 GPIO_FN(LCD_DATA15),
1063 GPIO_FN(LCD_DATA14),
1064 GPIO_FN(LCD_DATA13),
1065 GPIO_FN(LCD_DATA12),
1066 GPIO_FN(LCD_DATA11),
1067 GPIO_FN(LCD_DATA10),
1068 GPIO_FN(LCD_DATA9),
1069 GPIO_FN(LCD_DATA8),
1070 GPIO_FN(LCD_DATA7),
1071 GPIO_FN(LCD_DATA6),
1072 GPIO_FN(LCD_DATA5),
1073 GPIO_FN(LCD_DATA4),
1074 GPIO_FN(LCD_DATA3),
1075 GPIO_FN(LCD_DATA2),
1076 GPIO_FN(LCD_DATA1),
1077 GPIO_FN(LCD_DATA0),
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1078};
1079
Laurent Pinchartcd3c1be2013-02-16 18:47:05 +0100[diff] [blame]1080static const struct pinmux_cfg_reg pinmux_config_regs[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1081 { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1) {
1082 0, 0,
1083 0, 0,
1084 0, 0,
1085 0, 0,
1086 PB11_IN, PB11_OUT,
1087 PB10_IN, PB10_OUT,
1088 PB9_IN, PB9_OUT,
1089 PB8_IN, PB8_OUT,
1090 0, 0,
1091 0, 0,
1092 0, 0,
1093 0, 0,
1094 0, 0,
1095 0, 0,
1096 0, 0,
1097 0, 0 }
1098 },
1099 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4) {
1100 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1101
1102 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1103
1104 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1105
1106 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
1107 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1108 },
1109 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4) {
1110 PB11MD_0, PB11MD_1,
1111 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1112
1113 PB10MD_0, PB10MD_1,
1114 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1115
1116 PB9MD_00, PB9MD_01, PB9MD_10, 0,
1117 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1118
1119 PB8MD_00, PB8MD_01, PB8MD_10, 0,
1120 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1121 },
1122 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4) {
1123 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
1124 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1125
1126 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
1127 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1128
1129 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
1130 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1131
1132 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
1133 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1134 },
1135 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4) {
1136 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
1137 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1138
1139 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
1140 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1141
1142 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
1143 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1144
1145 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
1146 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1147 },
1148 { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4) {
1149 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1150
1151 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1152
1153 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1154
1155 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 0,
1156 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1157 },
1158 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1) {
1159 0, 0,
1160 PC14_IN, PC14_OUT,
1161 PC13_IN, PC13_OUT,
1162 PC12_IN, PC12_OUT,
1163 PC11_IN, PC11_OUT,
1164 PC10_IN, PC10_OUT,
1165 PC9_IN, PC9_OUT,
1166 PC8_IN, PC8_OUT,
1167 PC7_IN, PC7_OUT,
1168 PC6_IN, PC6_OUT,
1169 PC5_IN, PC5_OUT,
1170 PC4_IN, PC4_OUT,
1171 PC3_IN, PC3_OUT,
1172 PC2_IN, PC2_OUT,
1173 PC1_IN, PC1_OUT,
1174 PC0_IN, PC0_OUT }
1175 },
1176 { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4) {
1177 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1178
1179 PC14MD_0, PC14MD_1,
1180 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1181
1182 PC13MD_0, PC13MD_1,
1183 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1184
1185 PC12MD_0, PC12MD_1,
1186 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1187 },
1188 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4) {
1189 PC11MD_00, PC11MD_01, PC11MD_10, 0,
1190 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1191
1192 PC10MD_00, PC10MD_01, PC10MD_10, 0,
1193 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1194
1195 PC9MD_0, PC9MD_1,
1196 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1197
1198 PC8MD_0, PC8MD_1,
1199 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1200 },
1201 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4) {
1202 PC7MD_0, PC7MD_1,
1203 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1204
1205 PC6MD_0, PC6MD_1,
1206 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1207
1208 PC5MD_0, PC5MD_1,
1209 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1210
1211 PC4MD_0, PC4MD_1,
1212 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1213 },
1214 { PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4) {
1215 PC3MD_0, PC3MD_1,
1216 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1217
1218 PC2MD_0, PC2MD_1,
1219 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1220
1221 PC1MD_0, PC1MD_1,
1222 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1223
1224 PC0MD_00, PC0MD_01, PC0MD_10, 0,
1225 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1226 },
1227 { PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1) {
1228 PD15_IN, PD15_OUT,
1229 PD14_IN, PD14_OUT,
1230 PD13_IN, PD13_OUT,
1231 PD12_IN, PD12_OUT,
1232 PD11_IN, PD11_OUT,
1233 PD10_IN, PD10_OUT,
1234 PD9_IN, PD9_OUT,
1235 PD8_IN, PD8_OUT,
1236 PD7_IN, PD7_OUT,
1237 PD6_IN, PD6_OUT,
1238 PD5_IN, PD5_OUT,
1239 PD4_IN, PD4_OUT,
1240 PD3_IN, PD3_OUT,
1241 PD2_IN, PD2_OUT,
1242 PD1_IN, PD1_OUT,
1243 PD0_IN, PD0_OUT }
1244 },
1245 { PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4) {
1246 PD15MD_000, PD15MD_001, PD15MD_010, 0,
1247 PD15MD_100, PD15MD_101, 0, 0,
1248 0, 0, 0, 0, 0, 0, 0, 0,
1249
1250 PD14MD_000, PD14MD_001, PD14MD_010, 0,
1251 0, PD14MD_101, 0, 0,
1252 0, 0, 0, 0, 0, 0, 0, 0,
1253
1254 PD13MD_000, PD13MD_001, PD13MD_010, 0,
1255 PD13MD_100, PD13MD_101, 0, 0,
1256 0, 0, 0, 0, 0, 0, 0, 0,
1257
1258 PD12MD_000, PD12MD_001, PD12MD_010, 0,
1259 PD12MD_100, PD12MD_101, 0, 0,
1260 0, 0, 0, 0, 0, 0, 0, 0 }
1261 },
1262 { PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4) {
1263 PD11MD_000, PD11MD_001, PD11MD_010, 0,
1264 PD11MD_100, PD11MD_101, 0, 0,
1265 0, 0, 0, 0, 0, 0, 0, 0,
1266
1267 PD10MD_000, PD10MD_001, PD10MD_010, 0,
1268 PD10MD_100, PD10MD_101, 0, 0,
1269 0, 0, 0, 0, 0, 0, 0, 0,
1270
1271 PD9MD_000, PD9MD_001, PD9MD_010, 0,
1272 PD9MD_100, PD9MD_101, 0, 0,
1273 0, 0, 0, 0, 0, 0, 0, 0,
1274
1275 PD8MD_000, PD8MD_001, PD8MD_010, 0,
1276 PD8MD_100, PD8MD_101, 0, 0,
1277 0, 0, 0, 0, 0, 0, 0, 0 }
1278 },
1279 { PINMUX_CFG_REG("PDCRL2", 0xfffe3994, 16, 4) {
1280 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011,
1281 PD7MD_100, PD7MD_101, 0, 0,
1282 0, 0, 0, 0, 0, 0, 0, 0,
1283
1284 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011,
1285 PD6MD_100, PD6MD_101, 0, 0,
1286 0, 0, 0, 0, 0, 0, 0, 0,
1287
1288 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011,
1289 PD5MD_100, PD5MD_101, 0, 0,
1290 0, 0, 0, 0, 0, 0, 0, 0,
1291
1292 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011,
1293 PD4MD_100, PD4MD_101, 0, 0,
1294 0, 0, 0, 0, 0, 0, 0, 0 }
1295 },
1296 { PINMUX_CFG_REG("PDCRL1", 0xfffe3996, 16, 4) {
1297 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011,
1298 PD3MD_100, PD3MD_101, 0, 0,
1299 0, 0, 0, 0, 0, 0, 0, 0,
1300
1301 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011,
1302 PD2MD_100, PD2MD_101, 0, 0,
1303 0, 0, 0, 0, 0, 0, 0, 0,
1304
1305 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011,
1306 PD1MD_100, PD1MD_101, 0, 0,
1307 0, 0, 0, 0, 0, 0, 0, 0,
1308
1309 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011,
1310 PD0MD_100, PD0MD_101, 0, 0,
1311 0, 0, 0, 0, 0, 0, 0, 0 }
1312 },
1313 { PINMUX_CFG_REG("PEIORL", 0xfffe3a06, 16, 1) {
1314 PE15_IN, PE15_OUT,
1315 PE14_IN, PE14_OUT,
1316 PE13_IN, PE13_OUT,
1317 PE12_IN, PE12_OUT,
1318 PE11_IN, PE11_OUT,
1319 PE10_IN, PE10_OUT,
1320 PE9_IN, PE9_OUT,
1321 PE8_IN, PE8_OUT,
1322 PE7_IN, PE7_OUT,
1323 PE6_IN, PE6_OUT,
1324 PE5_IN, PE5_OUT,
1325 PE4_IN, PE4_OUT,
1326 PE3_IN, PE3_OUT,
1327 PE2_IN, PE2_OUT,
1328 PE1_IN, PE1_OUT,
1329 PE0_IN, PE0_OUT }
1330 },
1331 { PINMUX_CFG_REG("PECRL4", 0xfffe3a10, 16, 4) {
1332 PE15MD_00, PE15MD_01, 0, PE15MD_11,
1333 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1334
1335 PE14MD_00, PE14MD_01, 0, PE14MD_11,
1336 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1337
1338 PE13MD_00, 0, 0, PE13MD_11,
1339 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1340
1341 PE12MD_00, 0, 0, PE12MD_11,
1342 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1343 },
1344 { PINMUX_CFG_REG("PECRL3", 0xfffe3a12, 16, 4) {
1345 PE11MD_000, PE11MD_001, PE11MD_010, 0,
1346 PE11MD_100, 0, 0, 0,
1347 0, 0, 0, 0, 0, 0, 0, 0,
1348
1349 PE10MD_000, PE10MD_001, PE10MD_010, 0,
1350 PE10MD_100, 0, 0, 0,
1351 0, 0, 0, 0, 0, 0, 0, 0,
1352
1353 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
1354 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1355
1356 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
1357 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1358 },
1359 { PINMUX_CFG_REG("PECRL2", 0xfffe3a14, 16, 4) {
1360 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011,
1361 PE7MD_100, 0, 0, 0,
1362 0, 0, 0, 0, 0, 0, 0, 0,
1363
1364 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011,
1365 PE6MD_100, 0, 0, 0,
1366 0, 0, 0, 0, 0, 0, 0, 0,
1367
1368 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011,
1369 PE5MD_100, 0, 0, 0,
1370 0, 0, 0, 0, 0, 0, 0, 0,
1371
1372 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011,
1373 PE4MD_100, 0, 0, 0,
1374 0, 0, 0, 0, 0, 0, 0, 0 }
1375 },
1376 { PINMUX_CFG_REG("PECRL1", 0xfffe3a16, 16, 4) {
1377 PE3MD_00, PE3MD_01, 0, PE3MD_11,
1378 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1379
1380 PE2MD_00, PE2MD_01, 0, PE2MD_11,
1381 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1382
1383 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
1384 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1385
1386 PE0MD_000, PE0MD_001, 0, PE0MD_011,
1387 PE0MD_100, 0, 0, 0,
1388 0, 0, 0, 0, 0, 0, 0, 0 }
1389 },
1390 { PINMUX_CFG_REG("PFIORH", 0xfffe3a84, 16, 1) {
1391 0, 0,
1392 PF30_IN, PF30_OUT,
1393 PF29_IN, PF29_OUT,
1394 PF28_IN, PF28_OUT,
1395 PF27_IN, PF27_OUT,
1396 PF26_IN, PF26_OUT,
1397 PF25_IN, PF25_OUT,
1398 PF24_IN, PF24_OUT,
1399 PF23_IN, PF23_OUT,
1400 PF22_IN, PF22_OUT,
1401 PF21_IN, PF21_OUT,
1402 PF20_IN, PF20_OUT,
1403 PF19_IN, PF19_OUT,
1404 PF18_IN, PF18_OUT,
1405 PF17_IN, PF17_OUT,
1406 PF16_IN, PF16_OUT }
1407 },
1408 { PINMUX_CFG_REG("PFIORL", 0xfffe3a86, 16, 1) {
1409 PF15_IN, PF15_OUT,
1410 PF14_IN, PF14_OUT,
1411 PF13_IN, PF13_OUT,
1412 PF12_IN, PF12_OUT,
1413 PF11_IN, PF11_OUT,
1414 PF10_IN, PF10_OUT,
1415 PF9_IN, PF9_OUT,
1416 PF8_IN, PF8_OUT,
1417 PF7_IN, PF7_OUT,
1418 PF6_IN, PF6_OUT,
1419 PF5_IN, PF5_OUT,
1420 PF4_IN, PF4_OUT,
1421 PF3_IN, PF3_OUT,
1422 PF2_IN, PF2_OUT,
1423 PF1_IN, PF1_OUT,
1424 PF0_IN, PF0_OUT }
1425 },
1426 { PINMUX_CFG_REG("PFCRH4", 0xfffe3a88, 16, 4) {
1427 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1428
1429 PF30MD_0, PF30MD_1,
1430 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1431
1432 PF29MD_0, PF29MD_1,
1433 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1434
1435 PF28MD_0, PF28MD_1,
1436 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1437 },
1438 { PINMUX_CFG_REG("PFCRH3", 0xfffe3a8a, 16, 4) {
1439 PF27MD_0, PF27MD_1,
1440 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1441
1442 PF26MD_0, PF26MD_1,
1443 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1444
1445 PF25MD_0, PF25MD_1,
1446 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1447
1448 PF24MD_0, PF24MD_1,
1449 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1450 },
1451 { PINMUX_CFG_REG("PFCRH2", 0xfffe3a8c, 16, 4) {
1452 PF23MD_00, PF23MD_01, PF23MD_10, 0,
1453 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1454
1455 PF22MD_00, PF22MD_01, PF22MD_10, 0,
1456 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1457
1458 PF21MD_00, PF21MD_01, PF21MD_10, 0,
1459 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1460
1461 PF20MD_00, PF20MD_01, PF20MD_10, 0,
1462 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1463 },
1464 { PINMUX_CFG_REG("PFCRH1", 0xfffe3a8e, 16, 4) {
1465 PF19MD_00, PF19MD_01, PF19MD_10, 0,
1466 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1467
1468 PF18MD_00, PF18MD_01, PF18MD_10, 0,
1469 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1470
1471 PF17MD_00, PF17MD_01, PF17MD_10, 0,
1472 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1473
1474 PF16MD_00, PF16MD_01, PF16MD_10, 0,
1475 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1476 },
1477 { PINMUX_CFG_REG("PFCRL4", 0xfffe3a90, 16, 4) {
1478 PF15MD_00, PF15MD_01, PF15MD_10, 0,
1479 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1480
1481 PF14MD_00, PF14MD_01, PF14MD_10, 0,
1482 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1483
1484 PF13MD_00, PF13MD_01, PF13MD_10, 0,
1485 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1486
1487 PF12MD_00, PF12MD_01, PF12MD_10, 0,
1488 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1489 },
1490 { PINMUX_CFG_REG("PFCRL3", 0xfffe3a92, 16, 4) {
1491 PF11MD_00, PF11MD_01, PF11MD_10, 0,
1492 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1493
1494 PF10MD_00, PF10MD_01, PF10MD_10, 0,
1495 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1496
1497 PF9MD_00, PF9MD_01, PF9MD_10, 0,
1498 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1499
1500 PF8MD_00, PF8MD_01, PF8MD_10, 0,
1501 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1502 },
1503 { PINMUX_CFG_REG("PFCRL2", 0xfffe3a94, 16, 4) {
1504 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
1505 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1506
1507 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
1508 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1509
1510 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
1511 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1512
1513 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
1514 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1515 },
1516 { PINMUX_CFG_REG("PFCRL1", 0xfffe3a96, 16, 4) {
1517 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
1518 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1519
1520 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
1521 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1522
1523 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
1524 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1525
1526 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
1527 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1528 },
1529 {}
1530};
1531
Laurent Pinchartcd3c1be2013-02-16 18:47:05 +0100[diff] [blame]1532static const struct pinmux_data_reg pinmux_data_regs[] = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1533 { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) {
1534 0, 0, 0, 0,
1535 0, 0, 0, 0,
1536 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1537 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
1538 },
1539 { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16) {
1540 0, 0, 0, PB12_DATA,
1541 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
1542 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1543 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
1544 },
1545 { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16) {
1546 0, PC14_DATA, PC13_DATA, PC12_DATA,
1547 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
1548 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1549 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
1550 },
1551 { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16) {
1552 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
1553 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
1554 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1555 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
1556 },
1557 { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16) {
1558 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
1559 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
1560 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
1561 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
1562 },
1563 { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16) {
1564 0, PF30_DATA, PF29_DATA, PF28_DATA,
1565 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
1566 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
1567 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }
1568 },
1569 { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16) {
1570 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
1571 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
1572 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1573 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
1574 },
1575 { },
1576};
1577
Laurent Pinchartcd3c1be2013-02-16 18:47:05 +0100[diff] [blame]1578const struct sh_pfc_soc_info sh7203_pinmux_info = {
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1579 .name = "sh7203_pfc",
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1580 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
1581 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1582 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1583
Laurent Pincharta373ed02012-11-29 13:24:07 +0100[diff] [blame]1584 .pins = pinmux_pins,
1585 .nr_pins = ARRAY_SIZE(pinmux_pins),
1586 .func_gpios = pinmux_func_gpios,
1587 .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
Laurent Pinchartd7a7ca52012-11-28 17:51:00 +0100[diff] [blame]1588
Laurent Pinchartccda5522012-12-15 23:51:29 +0100[diff] [blame]1589 .cfg_regs = pinmux_config_regs,
1590 .data_regs = pinmux_data_regs,
1591
1592 .gpio_data = pinmux_data,
1593 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1594};