blob: 063ba2ec1ebd788ff326c584226902505029ce73 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -07003 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/version.h>
30#include <linux/init.h>
31#include <linux/pci.h>
32#include <linux/dma-mapping.h>
33#include <linux/delay.h>
34#include <linux/skbuff.h>
35#include <linux/netdevice.h>
36#include <linux/wireless.h>
37#include <net/mac80211.h>
Zhu Yib481de92007-09-25 17:54:57 -070038#include <linux/etherdevice.h>
Zhu Yi12342c42007-12-20 11:27:32 +080039#include <asm/unaligned.h>
Zhu Yib481de92007-09-25 17:54:57 -070040
Assaf Krauss6bc913b2008-03-11 16:17:18 -070041#include "iwl-eeprom.h"
Tomas Winkler3e0d4cb2008-04-24 11:55:38 -070042#include "iwl-dev.h"
Tomas Winklerfee12472008-04-03 16:05:21 -070043#include "iwl-core.h"
Tomas Winkler3395f6e2008-03-25 16:33:37 -070044#include "iwl-io.h"
Zhu Yib481de92007-09-25 17:54:57 -070045#include "iwl-helpers.h"
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -070046#include "iwl-calib.h"
Zhu Yib481de92007-09-25 17:54:57 -070047
Assaf Krauss1ea87392008-03-18 14:57:50 -070048/* module parameters */
49static struct iwl_mod_params iwl4965_mod_params = {
Emmanuel Grumbach038669e2008-04-23 17:15:04 -070050 .num_of_queues = IWL49_NUM_QUEUES,
Assaf Krauss1ea87392008-03-18 14:57:50 -070051 .enable_qos = 1,
52 .amsdu_size_8K = 1,
Ester Kummer3a1081e2008-05-06 11:05:14 +080053 .restart_fw = 1,
Assaf Krauss1ea87392008-03-18 14:57:50 -070054 /* the rest are 0 by default */
55};
56
Ron Rindjunskyfe01b472008-01-28 14:07:24 +020057#ifdef CONFIG_IWL4965_HT
58
59static const u16 default_tid_to_tx_fifo[] = {
60 IWL_TX_FIFO_AC1,
61 IWL_TX_FIFO_AC0,
62 IWL_TX_FIFO_AC0,
63 IWL_TX_FIFO_AC1,
64 IWL_TX_FIFO_AC2,
65 IWL_TX_FIFO_AC2,
66 IWL_TX_FIFO_AC3,
67 IWL_TX_FIFO_AC3,
68 IWL_TX_FIFO_NONE,
69 IWL_TX_FIFO_NONE,
70 IWL_TX_FIFO_NONE,
71 IWL_TX_FIFO_NONE,
72 IWL_TX_FIFO_NONE,
73 IWL_TX_FIFO_NONE,
74 IWL_TX_FIFO_NONE,
75 IWL_TX_FIFO_NONE,
76 IWL_TX_FIFO_AC3
77};
78
79#endif /*CONFIG_IWL4965_HT */
80
Tomas Winkler57aab752008-04-14 21:16:03 -070081/* check contents of special bootstrap uCode SRAM */
82static int iwl4965_verify_bsm(struct iwl_priv *priv)
83{
84 __le32 *image = priv->ucode_boot.v_addr;
85 u32 len = priv->ucode_boot.len;
86 u32 reg;
87 u32 val;
88
89 IWL_DEBUG_INFO("Begin verify bsm\n");
90
91 /* verify BSM SRAM contents */
92 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
93 for (reg = BSM_SRAM_LOWER_BOUND;
94 reg < BSM_SRAM_LOWER_BOUND + len;
95 reg += sizeof(u32), image++) {
96 val = iwl_read_prph(priv, reg);
97 if (val != le32_to_cpu(*image)) {
98 IWL_ERROR("BSM uCode verification failed at "
99 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
100 BSM_SRAM_LOWER_BOUND,
101 reg - BSM_SRAM_LOWER_BOUND, len,
102 val, le32_to_cpu(*image));
103 return -EIO;
104 }
105 }
106
107 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
108
109 return 0;
110}
111
112/**
113 * iwl4965_load_bsm - Load bootstrap instructions
114 *
115 * BSM operation:
116 *
117 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
118 * in special SRAM that does not power down during RFKILL. When powering back
119 * up after power-saving sleeps (or during initial uCode load), the BSM loads
120 * the bootstrap program into the on-board processor, and starts it.
121 *
122 * The bootstrap program loads (via DMA) instructions and data for a new
123 * program from host DRAM locations indicated by the host driver in the
124 * BSM_DRAM_* registers. Once the new program is loaded, it starts
125 * automatically.
126 *
127 * When initializing the NIC, the host driver points the BSM to the
128 * "initialize" uCode image. This uCode sets up some internal data, then
129 * notifies host via "initialize alive" that it is complete.
130 *
131 * The host then replaces the BSM_DRAM_* pointer values to point to the
132 * normal runtime uCode instructions and a backup uCode data cache buffer
133 * (filled initially with starting data values for the on-board processor),
134 * then triggers the "initialize" uCode to load and launch the runtime uCode,
135 * which begins normal operation.
136 *
137 * When doing a power-save shutdown, runtime uCode saves data SRAM into
138 * the backup data cache in DRAM before SRAM is powered down.
139 *
140 * When powering back up, the BSM loads the bootstrap program. This reloads
141 * the runtime uCode instructions and the backup data cache into SRAM,
142 * and re-launches the runtime uCode from where it left off.
143 */
144static int iwl4965_load_bsm(struct iwl_priv *priv)
145{
146 __le32 *image = priv->ucode_boot.v_addr;
147 u32 len = priv->ucode_boot.len;
148 dma_addr_t pinst;
149 dma_addr_t pdata;
150 u32 inst_len;
151 u32 data_len;
152 int i;
153 u32 done;
154 u32 reg_offset;
155 int ret;
156
157 IWL_DEBUG_INFO("Begin load bsm\n");
158
159 /* make sure bootstrap program is no larger than BSM's SRAM size */
160 if (len > IWL_MAX_BSM_SIZE)
161 return -EINVAL;
162
163 /* Tell bootstrap uCode where to find the "Initialize" uCode
164 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
Tomas Winkler2d878892008-05-29 16:34:51 +0800165 * NOTE: iwl_init_alive_start() will replace these values,
Tomas Winkler57aab752008-04-14 21:16:03 -0700166 * after the "initialize" uCode has run, to point to
Tomas Winkler2d878892008-05-29 16:34:51 +0800167 * runtime/protocol instructions and backup data cache.
168 */
Tomas Winkler57aab752008-04-14 21:16:03 -0700169 pinst = priv->ucode_init.p_addr >> 4;
170 pdata = priv->ucode_init_data.p_addr >> 4;
171 inst_len = priv->ucode_init.len;
172 data_len = priv->ucode_init_data.len;
173
174 ret = iwl_grab_nic_access(priv);
175 if (ret)
176 return ret;
177
178 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
179 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
180 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
181 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
182
183 /* Fill BSM memory with bootstrap instructions */
184 for (reg_offset = BSM_SRAM_LOWER_BOUND;
185 reg_offset < BSM_SRAM_LOWER_BOUND + len;
186 reg_offset += sizeof(u32), image++)
187 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
188
189 ret = iwl4965_verify_bsm(priv);
190 if (ret) {
191 iwl_release_nic_access(priv);
192 return ret;
193 }
194
195 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
196 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
197 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
198 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
199
200 /* Load bootstrap code into instruction SRAM now,
201 * to prepare to load "initialize" uCode */
202 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
203
204 /* Wait for load of bootstrap uCode to finish */
205 for (i = 0; i < 100; i++) {
206 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
207 if (!(done & BSM_WR_CTRL_REG_BIT_START))
208 break;
209 udelay(10);
210 }
211 if (i < 100)
212 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
213 else {
214 IWL_ERROR("BSM write did not complete!\n");
215 return -EIO;
216 }
217
218 /* Enable future boot loads whenever power management unit triggers it
219 * (e.g. when powering back up after power-save shutdown) */
220 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
221
222 iwl_release_nic_access(priv);
223
Tomas Winkler2d878892008-05-29 16:34:51 +0800224 priv->ucode_type = UCODE_INIT;
225
Tomas Winkler57aab752008-04-14 21:16:03 -0700226 return 0;
227}
228
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800229/**
230 * iwl4965_set_ucode_ptrs - Set uCode address location
231 *
232 * Tell initialization uCode where to find runtime uCode.
233 *
234 * BSM registers initially contain pointers to initialization uCode.
235 * We need to replace them to load runtime uCode inst and data,
236 * and to save runtime data when powering down.
237 */
238static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
239{
240 dma_addr_t pinst;
241 dma_addr_t pdata;
242 unsigned long flags;
243 int ret = 0;
244
245 /* bits 35:4 for 4965 */
246 pinst = priv->ucode_code.p_addr >> 4;
247 pdata = priv->ucode_data_backup.p_addr >> 4;
248
249 spin_lock_irqsave(&priv->lock, flags);
250 ret = iwl_grab_nic_access(priv);
251 if (ret) {
252 spin_unlock_irqrestore(&priv->lock, flags);
253 return ret;
254 }
255
256 /* Tell bootstrap uCode where to find image to load */
257 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
258 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
259 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
260 priv->ucode_data.len);
261
262 /* Inst bytecount must be last to set up, bit 31 signals uCode
263 * that all new ptr/size info is in place */
264 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
265 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
266 iwl_release_nic_access(priv);
267
268 spin_unlock_irqrestore(&priv->lock, flags);
269
270 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
271
Tomas Winkler2d878892008-05-29 16:34:51 +0800272 priv->ucode_type = UCODE_RT;
273
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800274 return ret;
275}
276
277/**
278 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
279 *
280 * Called after REPLY_ALIVE notification received from "initialize" uCode.
281 *
282 * The 4965 "initialize" ALIVE reply contains calibration data for:
283 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
284 * (3945 does not contain this data).
285 *
286 * Tell "initialize" uCode to go ahead and load the runtime uCode.
287*/
288static void iwl4965_init_alive_start(struct iwl_priv *priv)
289{
290 /* Check alive response for "valid" sign from uCode */
291 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
292 /* We had an error bringing up the hardware, so take it
293 * all the way back down so we can try again */
294 IWL_DEBUG_INFO("Initialize Alive failed.\n");
295 goto restart;
296 }
297
298 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
299 * This is a paranoid check, because we would not have gotten the
300 * "initialize" alive if code weren't properly loaded. */
301 if (iwl_verify_ucode(priv)) {
302 /* Runtime instruction load was bad;
303 * take it all the way back down so we can try again */
304 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
305 goto restart;
306 }
307
308 /* Calculate temperature */
309 priv->temperature = iwl4965_get_temperature(priv);
310
311 /* Send pointers to protocol/runtime uCode image ... init code will
312 * load and launch runtime uCode, which will send us another "Alive"
313 * notification. */
314 IWL_DEBUG_INFO("Initialization Alive received.\n");
315 if (iwl4965_set_ucode_ptrs(priv)) {
316 /* Runtime instruction load won't happen;
317 * take it all the way back down so we can try again */
318 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
319 goto restart;
320 }
321 return;
322
323restart:
324 queue_work(priv->workqueue, &priv->restart);
325}
326
Zhu Yib481de92007-09-25 17:54:57 -0700327static int is_fat_channel(__le32 rxon_flags)
328{
329 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
330 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
331}
332
Tomas Winkler17744ff2008-03-02 01:52:00 +0200333int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
334{
335 int idx = 0;
336
337 /* 4965 HT rate format */
338 if (rate_n_flags & RATE_MCS_HT_MSK) {
339 idx = (rate_n_flags & 0xff);
340
Guy Cohenfde0db32008-04-21 15:42:01 -0700341 if (idx >= IWL_RATE_MIMO2_6M_PLCP)
342 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
Tomas Winkler17744ff2008-03-02 01:52:00 +0200343
344 idx += IWL_FIRST_OFDM_RATE;
345 /* skip 9M not supported in ht*/
346 if (idx >= IWL_RATE_9M_INDEX)
347 idx += 1;
348 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
349 return idx;
350
351 /* 4965 legacy rate format, search for match in table */
352 } else {
Tomas Winkler1826dcc2008-05-15 13:54:02 +0800353 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
354 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
Tomas Winkler17744ff2008-03-02 01:52:00 +0200355 return idx;
356 }
357
358 return -1;
359}
360
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800361/**
362 * translate ucode response to mac80211 tx status control values
363 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700364void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
Johannes Berge039fa42008-05-15 12:55:29 +0200365 struct ieee80211_tx_info *control)
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800366{
367 int rate_index;
368
369 control->antenna_sel_tx =
Guy Cohenfde0db32008-04-21 15:42:01 -0700370 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800371 if (rate_n_flags & RATE_MCS_HT_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200372 control->flags |= IEEE80211_TX_CTL_OFDM_HT;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800373 if (rate_n_flags & RATE_MCS_GF_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200374 control->flags |= IEEE80211_TX_CTL_GREEN_FIELD;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800375 if (rate_n_flags & RATE_MCS_FAT_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200376 control->flags |= IEEE80211_TX_CTL_40_MHZ_WIDTH;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800377 if (rate_n_flags & RATE_MCS_DUP_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200378 control->flags |= IEEE80211_TX_CTL_DUP_DATA;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800379 if (rate_n_flags & RATE_MCS_SGI_MSK)
Johannes Berge039fa42008-05-15 12:55:29 +0200380 control->flags |= IEEE80211_TX_CTL_SHORT_GI;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800381 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
Johannes Berg2e92e6f2008-05-15 12:55:27 +0200382 if (control->band == IEEE80211_BAND_5GHZ)
383 rate_index -= IWL_FIRST_OFDM_RATE;
384 control->tx_rate_idx = rate_index;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800385}
Tomas Winkler17744ff2008-03-02 01:52:00 +0200386
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700387int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700388{
389 int rc;
390 unsigned long flags;
391
392 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700393 rc = iwl_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700394 if (rc) {
395 spin_unlock_irqrestore(&priv->lock, flags);
396 return rc;
397 }
398
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800399 /* stop Rx DMA */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700400 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
401 rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
Zhu Yib481de92007-09-25 17:54:57 -0700402 (1 << 24), 1000);
403 if (rc < 0)
404 IWL_ERROR("Can't stop Rx DMA.\n");
405
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700406 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700407 spin_unlock_irqrestore(&priv->lock, flags);
408
409 return 0;
410}
411
Tomas Winkler8614f362008-04-23 17:14:55 -0700412/*
413 * EEPROM handlers
414 */
415
416static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
417{
418 u16 eeprom_ver;
419 u16 calib_ver;
420
421 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
422
423 calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
424
425 if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
426 calib_ver < EEPROM_4965_TX_POWER_VERSION)
427 goto err;
428
429 return 0;
430err:
431 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
432 eeprom_ver, EEPROM_4965_EEPROM_VERSION,
433 calib_ver, EEPROM_4965_TX_POWER_VERSION);
434 return -EINVAL;
435
436}
Tomas Winkler079a2532008-04-17 16:03:39 -0700437int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
Zhu Yib481de92007-09-25 17:54:57 -0700438{
Tomas Winklerd8609652007-10-25 17:15:35 +0800439 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700440 unsigned long flags;
441
442 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700443 ret = iwl_grab_nic_access(priv);
Tomas Winklerd8609652007-10-25 17:15:35 +0800444 if (ret) {
Zhu Yib481de92007-09-25 17:54:57 -0700445 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winklerd8609652007-10-25 17:15:35 +0800446 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700447 }
448
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700449 if (src == IWL_PWR_SRC_VAUX) {
Zhu Yib481de92007-09-25 17:54:57 -0700450 u32 val;
Tomas Winklerd8609652007-10-25 17:15:35 +0800451 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700452 &val);
Zhu Yib481de92007-09-25 17:54:57 -0700453
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700454 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700455 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700456 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
457 ~APMG_PS_CTRL_MSK_PWR_SRC);
458 }
459 } else {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700460 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700461 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
462 ~APMG_PS_CTRL_MSK_PWR_SRC);
463 }
Zhu Yib481de92007-09-25 17:54:57 -0700464
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700465 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700466 spin_unlock_irqrestore(&priv->lock, flags);
467
Tomas Winklerd8609652007-10-25 17:15:35 +0800468 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700469}
470
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800471static int iwl4965_disable_tx_fifo(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700472{
Zhu Yib481de92007-09-25 17:54:57 -0700473 unsigned long flags;
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800474 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700475
476 spin_lock_irqsave(&priv->lock, flags);
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800477
Tomas Winkler059ff822008-04-14 21:16:14 -0700478 ret = iwl_grab_nic_access(priv);
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800479 if (unlikely(ret)) {
480 IWL_ERROR("Tx fifo reset failed");
Zhu Yib481de92007-09-25 17:54:57 -0700481 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winkler059ff822008-04-14 21:16:14 -0700482 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700483 }
484
Tomas Winkler12a81f62008-04-03 16:05:20 -0700485 iwl_write_prph(priv, IWL49_SCD_TXFACT, 0);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700486 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700487 spin_unlock_irqrestore(&priv->lock, flags);
488
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800489 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700490}
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800491
Tomas Winkler91238712008-04-23 17:14:53 -0700492static int iwl4965_apm_init(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700493{
Tomas Winkler91238712008-04-23 17:14:53 -0700494 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700495
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700496 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
Tomas Winkler91238712008-04-23 17:14:53 -0700497 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
Zhu Yib481de92007-09-25 17:54:57 -0700498
Tomas Winkler91238712008-04-23 17:14:53 -0700499 /* set "initialization complete" bit to move adapter
500 * D0U* --> D0A* state */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700501 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winkler91238712008-04-23 17:14:53 -0700502
503 /* wait for clock stabilization */
504 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
505 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
506 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
507 if (ret < 0) {
Zhu Yib481de92007-09-25 17:54:57 -0700508 IWL_DEBUG_INFO("Failed to init the card\n");
Tomas Winkler91238712008-04-23 17:14:53 -0700509 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700510 }
511
Tomas Winkler91238712008-04-23 17:14:53 -0700512 ret = iwl_grab_nic_access(priv);
513 if (ret)
514 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700515
Tomas Winkler91238712008-04-23 17:14:53 -0700516 /* enable DMA */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700517 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
518 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700519
520 udelay(20);
521
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700522 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
Tomas Winkler91238712008-04-23 17:14:53 -0700523 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700524
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700525 iwl_release_nic_access(priv);
Tomas Winkler91238712008-04-23 17:14:53 -0700526out:
Tomas Winkler91238712008-04-23 17:14:53 -0700527 return ret;
528}
529
Tomas Winkler694cc562008-04-24 11:55:22 -0700530
531static void iwl4965_nic_config(struct iwl_priv *priv)
532{
533 unsigned long flags;
534 u32 val;
535 u16 radio_cfg;
536 u8 val_link;
537
538 spin_lock_irqsave(&priv->lock, flags);
539
540 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
541 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
542 /* Enable No Snoop field */
543 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
544 val & ~(1 << 11));
545 }
546
547 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
548
549 /* disable L1 entry -- workaround for pre-B1 */
550 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
551
552 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
553
554 /* write radio config values to register */
555 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
556 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
557 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
558 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
559 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
560
561 /* set CSR_HW_CONFIG_REG for uCode use */
562 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
563 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
564 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
565
566 priv->calib_info = (struct iwl_eeprom_calib_info *)
567 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
568
569 spin_unlock_irqrestore(&priv->lock, flags);
570}
571
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700572int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700573{
574 int rc = 0;
575 u32 reg_val;
576 unsigned long flags;
577
578 spin_lock_irqsave(&priv->lock, flags);
579
580 /* set stop master bit */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700581 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
Zhu Yib481de92007-09-25 17:54:57 -0700582
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700583 reg_val = iwl_read32(priv, CSR_GP_CNTRL);
Zhu Yib481de92007-09-25 17:54:57 -0700584
585 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
586 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
587 IWL_DEBUG_INFO("Card in power save, master is already "
588 "stopped\n");
589 else {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700590 rc = iwl_poll_bit(priv, CSR_RESET,
Zhu Yib481de92007-09-25 17:54:57 -0700591 CSR_RESET_REG_FLAG_MASTER_DISABLED,
592 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
593 if (rc < 0) {
594 spin_unlock_irqrestore(&priv->lock, flags);
595 return rc;
596 }
597 }
598
599 spin_unlock_irqrestore(&priv->lock, flags);
600 IWL_DEBUG_INFO("stop master\n");
601
602 return rc;
603}
604
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800605/**
606 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
607 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700608void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700609{
610
611 int txq_id;
612 unsigned long flags;
613
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800614 /* Stop each Tx DMA channel, and wait for it to be idle */
Tomas Winkler5425e492008-04-15 16:01:38 -0700615 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
Zhu Yib481de92007-09-25 17:54:57 -0700616 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700617 if (iwl_grab_nic_access(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -0700618 spin_unlock_irqrestore(&priv->lock, flags);
619 continue;
620 }
621
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700622 iwl_write_direct32(priv,
Emmanuel Grumbach4b52c392008-04-23 17:15:07 -0700623 FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
624 iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
625 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700626 (txq_id), 200);
627 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700628 spin_unlock_irqrestore(&priv->lock, flags);
629 }
630
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800631 /* Deallocate memory for all Tx queues */
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800632 iwl_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700633}
634
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700635int iwl4965_hw_nic_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700636{
637 int rc = 0;
638 unsigned long flags;
639
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800640 iwl4965_hw_nic_stop_master(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700641
642 spin_lock_irqsave(&priv->lock, flags);
643
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700644 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
Zhu Yib481de92007-09-25 17:54:57 -0700645
646 udelay(10);
647
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700648 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
649 rc = iwl_poll_bit(priv, CSR_RESET,
Zhu Yib481de92007-09-25 17:54:57 -0700650 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
651 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
652
653 udelay(10);
654
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700655 rc = iwl_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700656 if (!rc) {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700657 iwl_write_prph(priv, APMG_CLK_EN_REG,
658 APMG_CLK_VAL_DMA_CLK_RQT |
659 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700660
661 udelay(10);
662
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700663 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
664 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700665
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700666 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700667 }
668
669 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
670 wake_up_interruptible(&priv->wait_command_queue);
671
672 spin_unlock_irqrestore(&priv->lock, flags);
673
674 return rc;
675
676}
677
678#define REG_RECALIB_PERIOD (60)
679
680/**
681 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
682 *
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700683 * This callback is provided in order to send a statistics request.
Zhu Yib481de92007-09-25 17:54:57 -0700684 *
685 * This timer function is continually reset to execute within
686 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
687 * was received. We need to ensure we receive the statistics in order
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700688 * to update the temperature used for calibrating the TXPOWER.
Zhu Yib481de92007-09-25 17:54:57 -0700689 */
690static void iwl4965_bg_statistics_periodic(unsigned long data)
691{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700692 struct iwl_priv *priv = (struct iwl_priv *)data;
Zhu Yib481de92007-09-25 17:54:57 -0700693
Zhu Yib481de92007-09-25 17:54:57 -0700694 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
695 return;
696
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700697 iwl_send_statistics_request(priv, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -0700698}
699
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700700void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700701{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800702 struct iwl4965_ct_kill_config cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700703 unsigned long flags;
Tomas Winkler857485c2008-03-21 13:53:44 -0700704 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700705
706 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700707 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -0700708 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
709 spin_unlock_irqrestore(&priv->lock, flags);
710
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700711 cmd.critical_temperature_R =
Emmanuel Grumbachb73cdf22008-04-21 15:41:58 -0700712 cpu_to_le32(priv->hw_params.ct_kill_threshold);
713
Tomas Winkler857485c2008-03-21 13:53:44 -0700714 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
715 sizeof(cmd), &cmd);
716 if (ret)
Zhu Yib481de92007-09-25 17:54:57 -0700717 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
718 else
Emmanuel Grumbachb73cdf22008-04-21 15:41:58 -0700719 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
720 "critical temperature is %d\n",
721 cmd.critical_temperature_R);
Zhu Yib481de92007-09-25 17:54:57 -0700722}
723
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700724#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Zhu Yib481de92007-09-25 17:54:57 -0700725
726/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
727 * Called after every association, but this runs only once!
728 * ... once chain noise is calibrated the first time, it's good forever. */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700729static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700730{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700731 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
Zhu Yib481de92007-09-25 17:54:57 -0700732
Tomas Winkler3109ece2008-03-28 16:33:35 -0700733 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800734 struct iwl4965_calibration_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700735
736 memset(&cmd, 0, sizeof(cmd));
737 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
738 cmd.diff_gain_a = 0;
739 cmd.diff_gain_b = 0;
740 cmd.diff_gain_c = 0;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700741 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
742 sizeof(cmd), &cmd))
743 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
Zhu Yib481de92007-09-25 17:54:57 -0700744 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
745 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
746 }
Zhu Yib481de92007-09-25 17:54:57 -0700747}
748
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700749static void iwl4965_gain_computation(struct iwl_priv *priv,
750 u32 *average_noise,
751 u16 min_average_noise_antenna_i,
752 u32 min_average_noise)
Zhu Yib481de92007-09-25 17:54:57 -0700753{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700754 int i, ret;
755 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
Zhu Yib481de92007-09-25 17:54:57 -0700756
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700757 data->delta_gain_code[min_average_noise_antenna_i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700758
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700759 for (i = 0; i < NUM_RX_CHAINS; i++) {
760 s32 delta_g = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700761
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700762 if (!(data->disconn_array[i]) &&
763 (data->delta_gain_code[i] ==
Zhu Yib481de92007-09-25 17:54:57 -0700764 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700765 delta_g = average_noise[i] - min_average_noise;
766 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
767 data->delta_gain_code[i] =
768 min(data->delta_gain_code[i],
769 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
Zhu Yib481de92007-09-25 17:54:57 -0700770
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700771 data->delta_gain_code[i] =
772 (data->delta_gain_code[i] | (1 << 2));
773 } else {
774 data->delta_gain_code[i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700775 }
Zhu Yib481de92007-09-25 17:54:57 -0700776 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700777 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
778 data->delta_gain_code[0],
779 data->delta_gain_code[1],
780 data->delta_gain_code[2]);
Zhu Yib481de92007-09-25 17:54:57 -0700781
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700782 /* Differential gain gets sent to uCode only once */
783 if (!data->radio_write) {
784 struct iwl4965_calibration_cmd cmd;
785 data->radio_write = 1;
Zhu Yib481de92007-09-25 17:54:57 -0700786
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700787 memset(&cmd, 0, sizeof(cmd));
788 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
789 cmd.diff_gain_a = data->delta_gain_code[0];
790 cmd.diff_gain_b = data->delta_gain_code[1];
791 cmd.diff_gain_c = data->delta_gain_code[2];
792 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
793 sizeof(cmd), &cmd);
794 if (ret)
795 IWL_DEBUG_CALIB("fail sending cmd "
796 "REPLY_PHY_CALIBRATION_CMD \n");
Zhu Yib481de92007-09-25 17:54:57 -0700797
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700798 /* TODO we might want recalculate
799 * rx_chain in rxon cmd */
800
801 /* Mark so we run this algo only once! */
802 data->state = IWL_CHAIN_NOISE_CALIBRATED;
Zhu Yib481de92007-09-25 17:54:57 -0700803 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700804 data->chain_noise_a = 0;
805 data->chain_noise_b = 0;
806 data->chain_noise_c = 0;
807 data->chain_signal_a = 0;
808 data->chain_signal_b = 0;
809 data->chain_signal_c = 0;
810 data->beacon_count = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700811}
812
813static void iwl4965_bg_sensitivity_work(struct work_struct *work)
814{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700815 struct iwl_priv *priv = container_of(work, struct iwl_priv,
Zhu Yib481de92007-09-25 17:54:57 -0700816 sensitivity_work);
817
818 mutex_lock(&priv->mutex);
819
820 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
821 test_bit(STATUS_SCANNING, &priv->status)) {
822 mutex_unlock(&priv->mutex);
823 return;
824 }
825
826 if (priv->start_calib) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700827 iwl_chain_noise_calibration(priv, &priv->statistics);
Zhu Yib481de92007-09-25 17:54:57 -0700828
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700829 iwl_sensitivity_calibration(priv, &priv->statistics);
Zhu Yib481de92007-09-25 17:54:57 -0700830 }
831
832 mutex_unlock(&priv->mutex);
833 return;
834}
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700835#endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
Zhu Yib481de92007-09-25 17:54:57 -0700836
837static void iwl4965_bg_txpower_work(struct work_struct *work)
838{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700839 struct iwl_priv *priv = container_of(work, struct iwl_priv,
Zhu Yib481de92007-09-25 17:54:57 -0700840 txpower_work);
841
842 /* If a scan happened to start before we got here
843 * then just return; the statistics notification will
844 * kick off another scheduled work to compensate for
845 * any temperature delta we missed here. */
846 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
847 test_bit(STATUS_SCANNING, &priv->status))
848 return;
849
850 mutex_lock(&priv->mutex);
851
852 /* Regardless of if we are assocaited, we must reconfigure the
853 * TX power since frames can be sent on non-radar channels while
854 * not associated */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800855 iwl4965_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700856
857 /* Update last_temperature to keep is_calib_needed from running
858 * when it isn't needed... */
859 priv->last_temperature = priv->temperature;
860
861 mutex_unlock(&priv->mutex);
862}
863
864/*
865 * Acquire priv->lock before calling this function !
866 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700867static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
Zhu Yib481de92007-09-25 17:54:57 -0700868{
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700869 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
Zhu Yib481de92007-09-25 17:54:57 -0700870 (index & 0xff) | (txq_id << 8));
Tomas Winkler12a81f62008-04-03 16:05:20 -0700871 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
Zhu Yib481de92007-09-25 17:54:57 -0700872}
873
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800874/**
875 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
876 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
877 * @scd_retry: (1) Indicates queue will be used in aggregation mode
878 *
879 * NOTE: Acquire priv->lock before calling this function !
Zhu Yib481de92007-09-25 17:54:57 -0700880 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700881static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +0800882 struct iwl_tx_queue *txq,
Zhu Yib481de92007-09-25 17:54:57 -0700883 int tx_fifo_id, int scd_retry)
884{
885 int txq_id = txq->q.id;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800886
887 /* Find out whether to activate Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -0700888 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
889
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800890 /* Set up and activate */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700891 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700892 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
893 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
894 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
895 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
896 IWL49_SCD_QUEUE_STTS_REG_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700897
898 txq->sched_retry = scd_retry;
899
900 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800901 active ? "Activate" : "Deactivate",
Zhu Yib481de92007-09-25 17:54:57 -0700902 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
903}
904
905static const u16 default_queue_to_tx_fifo[] = {
906 IWL_TX_FIFO_AC3,
907 IWL_TX_FIFO_AC2,
908 IWL_TX_FIFO_AC1,
909 IWL_TX_FIFO_AC0,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700910 IWL49_CMD_FIFO_NUM,
Zhu Yib481de92007-09-25 17:54:57 -0700911 IWL_TX_FIFO_HCCA_1,
912 IWL_TX_FIFO_HCCA_2
913};
914
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700915int iwl4965_alive_notify(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700916{
917 u32 a;
918 int i = 0;
919 unsigned long flags;
Tomas Winkler857485c2008-03-21 13:53:44 -0700920 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700921
922 spin_lock_irqsave(&priv->lock, flags);
923
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700924#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Zhu Yib481de92007-09-25 17:54:57 -0700925 memset(&(priv->sensitivity_data), 0,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700926 sizeof(struct iwl_sensitivity_data));
Zhu Yib481de92007-09-25 17:54:57 -0700927 memset(&(priv->chain_noise_data), 0,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700928 sizeof(struct iwl_chain_noise_data));
Zhu Yib481de92007-09-25 17:54:57 -0700929 for (i = 0; i < NUM_RX_CHAINS; i++)
930 priv->chain_noise_data.delta_gain_code[i] =
931 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700932#endif /* CONFIG_IWL4965_RUN_TIME_CALIB*/
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700933 ret = iwl_grab_nic_access(priv);
Tomas Winkler857485c2008-03-21 13:53:44 -0700934 if (ret) {
Zhu Yib481de92007-09-25 17:54:57 -0700935 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winkler857485c2008-03-21 13:53:44 -0700936 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700937 }
938
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800939 /* Clear 4965's internal Tx Scheduler data base */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700940 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700941 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
942 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700943 iwl_write_targ_mem(priv, a, 0);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700944 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700945 iwl_write_targ_mem(priv, a, 0);
Tomas Winkler5425e492008-04-15 16:01:38 -0700946 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700947 iwl_write_targ_mem(priv, a, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700948
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800949 /* Tel 4965 where to find Tx byte count tables */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700950 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
Tomas Winkler059ff822008-04-14 21:16:14 -0700951 (priv->shared_phys +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800952 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800953
954 /* Disable chain mode for all queues */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700955 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700956
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800957 /* Initialize each Tx queue (including the command queue) */
Tomas Winkler5425e492008-04-15 16:01:38 -0700958 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800959
960 /* TFD circular buffer read/write indexes */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700961 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700962 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800963
964 /* Max Tx Window size for Scheduler-ACK mode */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700965 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700966 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
967 (SCD_WIN_SIZE <<
968 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
969 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800970
971 /* Frame limit */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700972 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700973 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
974 sizeof(u32),
975 (SCD_FRAME_LIMIT <<
976 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
977 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700978
979 }
Tomas Winkler12a81f62008-04-03 16:05:20 -0700980 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
Tomas Winkler5425e492008-04-15 16:01:38 -0700981 (1 << priv->hw_params.max_txq_num) - 1);
Zhu Yib481de92007-09-25 17:54:57 -0700982
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800983 /* Activate all Tx DMA/FIFO channels */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700984 iwl_write_prph(priv, IWL49_SCD_TXFACT,
Zhu Yib481de92007-09-25 17:54:57 -0700985 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
986
987 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800988
989 /* Map each Tx/cmd queue to its corresponding fifo */
Zhu Yib481de92007-09-25 17:54:57 -0700990 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
991 int ac = default_queue_to_tx_fifo[i];
Ron Rindjunsky36470742008-05-15 13:54:10 +0800992 iwl_txq_ctx_activate(priv, i);
Zhu Yib481de92007-09-25 17:54:57 -0700993 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
994 }
995
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700996 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700997 spin_unlock_irqrestore(&priv->lock, flags);
998
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700999 /* Ask for statistics now, the uCode will send statistics notification
1000 * periodically after association */
1001 iwl_send_statistics_request(priv, CMD_ASYNC);
Tomas Winkler857485c2008-03-21 13:53:44 -07001002 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07001003}
1004
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07001005#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1006static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
1007 .min_nrg_cck = 97,
1008 .max_nrg_cck = 0,
1009
1010 .auto_corr_min_ofdm = 85,
1011 .auto_corr_min_ofdm_mrc = 170,
1012 .auto_corr_min_ofdm_x1 = 105,
1013 .auto_corr_min_ofdm_mrc_x1 = 220,
1014
1015 .auto_corr_max_ofdm = 120,
1016 .auto_corr_max_ofdm_mrc = 210,
1017 .auto_corr_max_ofdm_x1 = 140,
1018 .auto_corr_max_ofdm_mrc_x1 = 270,
1019
1020 .auto_corr_min_cck = 125,
1021 .auto_corr_max_cck = 200,
1022 .auto_corr_min_cck_mrc = 200,
1023 .auto_corr_max_cck_mrc = 400,
1024
1025 .nrg_th_cck = 100,
1026 .nrg_th_ofdm = 100,
1027};
1028#endif
1029
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001030/**
Tomas Winkler5425e492008-04-15 16:01:38 -07001031 * iwl4965_hw_set_hw_params
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001032 *
1033 * Called when initializing driver
1034 */
Tomas Winkler5425e492008-04-15 16:01:38 -07001035int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001036{
Assaf Krauss316c30d2008-03-14 10:38:46 -07001037
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001038 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
Assaf Krauss1ea87392008-03-18 14:57:50 -07001039 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
Assaf Krauss316c30d2008-03-14 10:38:46 -07001040 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001041 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
Tomas Winkler059ff822008-04-14 21:16:14 -07001042 return -EINVAL;
Assaf Krauss316c30d2008-03-14 10:38:46 -07001043 }
1044
Tomas Winkler5425e492008-04-15 16:01:38 -07001045 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -07001046 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
Tomas Winkler5425e492008-04-15 16:01:38 -07001047 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1048 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
Assaf Krauss1ea87392008-03-18 14:57:50 -07001049 if (priv->cfg->mod_params->amsdu_size_8K)
Tomas Winkler5425e492008-04-15 16:01:38 -07001050 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +02001051 else
Tomas Winkler5425e492008-04-15 16:01:38 -07001052 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1053 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1054 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
1055 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
Tomas Winkler3e82a822008-02-13 11:32:31 -08001056
Ron Rindjunsky099b40b2008-04-21 15:41:53 -07001057 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
1058 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
1059 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
1060 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
1061
Tomas Winklerec35cf22008-04-15 16:01:39 -07001062 priv->hw_params.tx_chains_num = 2;
1063 priv->hw_params.rx_chains_num = 2;
Guy Cohenfde0db32008-04-21 15:42:01 -07001064 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
1065 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -07001066 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
1067
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07001068#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1069 priv->hw_params.sens = &iwl4965_sensitivity;
1070#endif
Tomas Winkler3e82a822008-02-13 11:32:31 -08001071
Tomas Winkler059ff822008-04-14 21:16:14 -07001072 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07001073}
1074
Mohamed Abbas5da4b552008-04-21 15:41:51 -07001075/* set card power command */
1076static int iwl4965_set_power(struct iwl_priv *priv,
1077 void *cmd)
1078{
1079 int ret = 0;
1080
1081 ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
1082 sizeof(struct iwl4965_powertable_cmd),
1083 cmd, NULL);
1084 return ret;
1085}
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001086int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
Zhu Yib481de92007-09-25 17:54:57 -07001087{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001088 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
Zhu Yib481de92007-09-25 17:54:57 -07001089 return -EINVAL;
1090}
1091
1092static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1093{
1094 s32 sign = 1;
1095
1096 if (num < 0) {
1097 sign = -sign;
1098 num = -num;
1099 }
1100 if (denom < 0) {
1101 sign = -sign;
1102 denom = -denom;
1103 }
1104 *res = 1;
1105 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1106
1107 return 1;
1108}
1109
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001110/**
1111 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1112 *
1113 * Determines power supply voltage compensation for txpower calculations.
1114 * Returns number of 1/2-dB steps to subtract from gain table index,
1115 * to compensate for difference between power supply voltage during
1116 * factory measurements, vs. current power supply voltage.
1117 *
1118 * Voltage indication is higher for lower voltage.
1119 * Lower voltage requires more gain (lower gain table index).
1120 */
Zhu Yib481de92007-09-25 17:54:57 -07001121static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1122 s32 current_voltage)
1123{
1124 s32 comp = 0;
1125
1126 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1127 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1128 return 0;
1129
1130 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1131 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1132
1133 if (current_voltage > eeprom_voltage)
1134 comp *= 2;
1135 if ((comp < -2) || (comp > 2))
1136 comp = 0;
1137
1138 return comp;
1139}
1140
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001141static const struct iwl_channel_info *
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001142iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
Johannes Berg8318d782008-01-24 19:38:38 +01001143 enum ieee80211_band band, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001144{
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001145 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001146
Assaf Krauss8622e702008-03-21 13:53:43 -07001147 ch_info = iwl_get_channel_info(priv, band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001148
1149 if (!is_channel_valid(ch_info))
1150 return NULL;
1151
1152 return ch_info;
1153}
1154
1155static s32 iwl4965_get_tx_atten_grp(u16 channel)
1156{
1157 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1158 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1159 return CALIB_CH_GROUP_5;
1160
1161 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1162 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1163 return CALIB_CH_GROUP_1;
1164
1165 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1166 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1167 return CALIB_CH_GROUP_2;
1168
1169 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1170 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1171 return CALIB_CH_GROUP_3;
1172
1173 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1174 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1175 return CALIB_CH_GROUP_4;
1176
1177 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1178 return -1;
1179}
1180
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001181static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001182{
1183 s32 b = -1;
1184
1185 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -07001186 if (priv->calib_info->band_info[b].ch_from == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001187 continue;
1188
Tomas Winkler073d3f52008-04-21 15:41:52 -07001189 if ((channel >= priv->calib_info->band_info[b].ch_from)
1190 && (channel <= priv->calib_info->band_info[b].ch_to))
Zhu Yib481de92007-09-25 17:54:57 -07001191 break;
1192 }
1193
1194 return b;
1195}
1196
1197static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1198{
1199 s32 val;
1200
1201 if (x2 == x1)
1202 return y1;
1203 else {
1204 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1205 return val + y2;
1206 }
1207}
1208
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001209/**
1210 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1211 *
1212 * Interpolates factory measurements from the two sample channels within a
1213 * sub-band, to apply to channel of interest. Interpolation is proportional to
1214 * differences in channel frequencies, which is proportional to differences
1215 * in channel number.
1216 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001217static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
Tomas Winkler073d3f52008-04-21 15:41:52 -07001218 struct iwl_eeprom_calib_ch_info *chan_info)
Zhu Yib481de92007-09-25 17:54:57 -07001219{
1220 s32 s = -1;
1221 u32 c;
1222 u32 m;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001223 const struct iwl_eeprom_calib_measure *m1;
1224 const struct iwl_eeprom_calib_measure *m2;
1225 struct iwl_eeprom_calib_measure *omeas;
Zhu Yib481de92007-09-25 17:54:57 -07001226 u32 ch_i1;
1227 u32 ch_i2;
1228
1229 s = iwl4965_get_sub_band(priv, channel);
1230 if (s >= EEPROM_TX_POWER_BANDS) {
1231 IWL_ERROR("Tx Power can not find channel %d ", channel);
1232 return -1;
1233 }
1234
Tomas Winkler073d3f52008-04-21 15:41:52 -07001235 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1236 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
Zhu Yib481de92007-09-25 17:54:57 -07001237 chan_info->ch_num = (u8) channel;
1238
1239 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1240 channel, s, ch_i1, ch_i2);
1241
1242 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1243 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -07001244 m1 = &(priv->calib_info->band_info[s].ch1.
Zhu Yib481de92007-09-25 17:54:57 -07001245 measurements[c][m]);
Tomas Winkler073d3f52008-04-21 15:41:52 -07001246 m2 = &(priv->calib_info->band_info[s].ch2.
Zhu Yib481de92007-09-25 17:54:57 -07001247 measurements[c][m]);
1248 omeas = &(chan_info->measurements[c][m]);
1249
1250 omeas->actual_pow =
1251 (u8) iwl4965_interpolate_value(channel, ch_i1,
1252 m1->actual_pow,
1253 ch_i2,
1254 m2->actual_pow);
1255 omeas->gain_idx =
1256 (u8) iwl4965_interpolate_value(channel, ch_i1,
1257 m1->gain_idx, ch_i2,
1258 m2->gain_idx);
1259 omeas->temperature =
1260 (u8) iwl4965_interpolate_value(channel, ch_i1,
1261 m1->temperature,
1262 ch_i2,
1263 m2->temperature);
1264 omeas->pa_det =
1265 (s8) iwl4965_interpolate_value(channel, ch_i1,
1266 m1->pa_det, ch_i2,
1267 m2->pa_det);
1268
1269 IWL_DEBUG_TXPOWER
1270 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1271 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1272 IWL_DEBUG_TXPOWER
1273 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1274 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1275 IWL_DEBUG_TXPOWER
1276 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1277 m1->pa_det, m2->pa_det, omeas->pa_det);
1278 IWL_DEBUG_TXPOWER
1279 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1280 m1->temperature, m2->temperature,
1281 omeas->temperature);
1282 }
1283 }
1284
1285 return 0;
1286}
1287
1288/* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1289 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1290static s32 back_off_table[] = {
1291 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1292 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1293 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1294 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1295 10 /* CCK */
1296};
1297
1298/* Thermal compensation values for txpower for various frequency ranges ...
1299 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001300static struct iwl4965_txpower_comp_entry {
Zhu Yib481de92007-09-25 17:54:57 -07001301 s32 degrees_per_05db_a;
1302 s32 degrees_per_05db_a_denom;
1303} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1304 {9, 2}, /* group 0 5.2, ch 34-43 */
1305 {4, 1}, /* group 1 5.2, ch 44-70 */
1306 {4, 1}, /* group 2 5.2, ch 71-124 */
1307 {4, 1}, /* group 3 5.2, ch 125-200 */
1308 {3, 1} /* group 4 2.4, ch all */
1309};
1310
1311static s32 get_min_power_index(s32 rate_power_index, u32 band)
1312{
1313 if (!band) {
1314 if ((rate_power_index & 7) <= 4)
1315 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1316 }
1317 return MIN_TX_GAIN_INDEX;
1318}
1319
1320struct gain_entry {
1321 u8 dsp;
1322 u8 radio;
1323};
1324
1325static const struct gain_entry gain_table[2][108] = {
1326 /* 5.2GHz power gain index table */
1327 {
1328 {123, 0x3F}, /* highest txpower */
1329 {117, 0x3F},
1330 {110, 0x3F},
1331 {104, 0x3F},
1332 {98, 0x3F},
1333 {110, 0x3E},
1334 {104, 0x3E},
1335 {98, 0x3E},
1336 {110, 0x3D},
1337 {104, 0x3D},
1338 {98, 0x3D},
1339 {110, 0x3C},
1340 {104, 0x3C},
1341 {98, 0x3C},
1342 {110, 0x3B},
1343 {104, 0x3B},
1344 {98, 0x3B},
1345 {110, 0x3A},
1346 {104, 0x3A},
1347 {98, 0x3A},
1348 {110, 0x39},
1349 {104, 0x39},
1350 {98, 0x39},
1351 {110, 0x38},
1352 {104, 0x38},
1353 {98, 0x38},
1354 {110, 0x37},
1355 {104, 0x37},
1356 {98, 0x37},
1357 {110, 0x36},
1358 {104, 0x36},
1359 {98, 0x36},
1360 {110, 0x35},
1361 {104, 0x35},
1362 {98, 0x35},
1363 {110, 0x34},
1364 {104, 0x34},
1365 {98, 0x34},
1366 {110, 0x33},
1367 {104, 0x33},
1368 {98, 0x33},
1369 {110, 0x32},
1370 {104, 0x32},
1371 {98, 0x32},
1372 {110, 0x31},
1373 {104, 0x31},
1374 {98, 0x31},
1375 {110, 0x30},
1376 {104, 0x30},
1377 {98, 0x30},
1378 {110, 0x25},
1379 {104, 0x25},
1380 {98, 0x25},
1381 {110, 0x24},
1382 {104, 0x24},
1383 {98, 0x24},
1384 {110, 0x23},
1385 {104, 0x23},
1386 {98, 0x23},
1387 {110, 0x22},
1388 {104, 0x18},
1389 {98, 0x18},
1390 {110, 0x17},
1391 {104, 0x17},
1392 {98, 0x17},
1393 {110, 0x16},
1394 {104, 0x16},
1395 {98, 0x16},
1396 {110, 0x15},
1397 {104, 0x15},
1398 {98, 0x15},
1399 {110, 0x14},
1400 {104, 0x14},
1401 {98, 0x14},
1402 {110, 0x13},
1403 {104, 0x13},
1404 {98, 0x13},
1405 {110, 0x12},
1406 {104, 0x08},
1407 {98, 0x08},
1408 {110, 0x07},
1409 {104, 0x07},
1410 {98, 0x07},
1411 {110, 0x06},
1412 {104, 0x06},
1413 {98, 0x06},
1414 {110, 0x05},
1415 {104, 0x05},
1416 {98, 0x05},
1417 {110, 0x04},
1418 {104, 0x04},
1419 {98, 0x04},
1420 {110, 0x03},
1421 {104, 0x03},
1422 {98, 0x03},
1423 {110, 0x02},
1424 {104, 0x02},
1425 {98, 0x02},
1426 {110, 0x01},
1427 {104, 0x01},
1428 {98, 0x01},
1429 {110, 0x00},
1430 {104, 0x00},
1431 {98, 0x00},
1432 {93, 0x00},
1433 {88, 0x00},
1434 {83, 0x00},
1435 {78, 0x00},
1436 },
1437 /* 2.4GHz power gain index table */
1438 {
1439 {110, 0x3f}, /* highest txpower */
1440 {104, 0x3f},
1441 {98, 0x3f},
1442 {110, 0x3e},
1443 {104, 0x3e},
1444 {98, 0x3e},
1445 {110, 0x3d},
1446 {104, 0x3d},
1447 {98, 0x3d},
1448 {110, 0x3c},
1449 {104, 0x3c},
1450 {98, 0x3c},
1451 {110, 0x3b},
1452 {104, 0x3b},
1453 {98, 0x3b},
1454 {110, 0x3a},
1455 {104, 0x3a},
1456 {98, 0x3a},
1457 {110, 0x39},
1458 {104, 0x39},
1459 {98, 0x39},
1460 {110, 0x38},
1461 {104, 0x38},
1462 {98, 0x38},
1463 {110, 0x37},
1464 {104, 0x37},
1465 {98, 0x37},
1466 {110, 0x36},
1467 {104, 0x36},
1468 {98, 0x36},
1469 {110, 0x35},
1470 {104, 0x35},
1471 {98, 0x35},
1472 {110, 0x34},
1473 {104, 0x34},
1474 {98, 0x34},
1475 {110, 0x33},
1476 {104, 0x33},
1477 {98, 0x33},
1478 {110, 0x32},
1479 {104, 0x32},
1480 {98, 0x32},
1481 {110, 0x31},
1482 {104, 0x31},
1483 {98, 0x31},
1484 {110, 0x30},
1485 {104, 0x30},
1486 {98, 0x30},
1487 {110, 0x6},
1488 {104, 0x6},
1489 {98, 0x6},
1490 {110, 0x5},
1491 {104, 0x5},
1492 {98, 0x5},
1493 {110, 0x4},
1494 {104, 0x4},
1495 {98, 0x4},
1496 {110, 0x3},
1497 {104, 0x3},
1498 {98, 0x3},
1499 {110, 0x2},
1500 {104, 0x2},
1501 {98, 0x2},
1502 {110, 0x1},
1503 {104, 0x1},
1504 {98, 0x1},
1505 {110, 0x0},
1506 {104, 0x0},
1507 {98, 0x0},
1508 {97, 0},
1509 {96, 0},
1510 {95, 0},
1511 {94, 0},
1512 {93, 0},
1513 {92, 0},
1514 {91, 0},
1515 {90, 0},
1516 {89, 0},
1517 {88, 0},
1518 {87, 0},
1519 {86, 0},
1520 {85, 0},
1521 {84, 0},
1522 {83, 0},
1523 {82, 0},
1524 {81, 0},
1525 {80, 0},
1526 {79, 0},
1527 {78, 0},
1528 {77, 0},
1529 {76, 0},
1530 {75, 0},
1531 {74, 0},
1532 {73, 0},
1533 {72, 0},
1534 {71, 0},
1535 {70, 0},
1536 {69, 0},
1537 {68, 0},
1538 {67, 0},
1539 {66, 0},
1540 {65, 0},
1541 {64, 0},
1542 {63, 0},
1543 {62, 0},
1544 {61, 0},
1545 {60, 0},
1546 {59, 0},
1547 }
1548};
1549
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001550static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
Zhu Yib481de92007-09-25 17:54:57 -07001551 u8 is_fat, u8 ctrl_chan_high,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001552 struct iwl4965_tx_power_db *tx_power_tbl)
Zhu Yib481de92007-09-25 17:54:57 -07001553{
1554 u8 saturation_power;
1555 s32 target_power;
1556 s32 user_target_power;
1557 s32 power_limit;
1558 s32 current_temp;
1559 s32 reg_limit;
1560 s32 current_regulatory;
1561 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1562 int i;
1563 int c;
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001564 const struct iwl_channel_info *ch_info = NULL;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001565 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1566 const struct iwl_eeprom_calib_measure *measurement;
Zhu Yib481de92007-09-25 17:54:57 -07001567 s16 voltage;
1568 s32 init_voltage;
1569 s32 voltage_compensation;
1570 s32 degrees_per_05db_num;
1571 s32 degrees_per_05db_denom;
1572 s32 factory_temp;
1573 s32 temperature_comp[2];
1574 s32 factory_gain_index[2];
1575 s32 factory_actual_pwr[2];
1576 s32 power_index;
1577
1578 /* Sanity check requested level (dBm) */
1579 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
1580 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
1581 priv->user_txpower_limit);
1582 return -EINVAL;
1583 }
1584 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
1585 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
1586 priv->user_txpower_limit);
1587 return -EINVAL;
1588 }
1589
1590 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1591 * are used for indexing into txpower table) */
1592 user_target_power = 2 * priv->user_txpower_limit;
1593
1594 /* Get current (RXON) channel, band, width */
1595 ch_info =
Johannes Berg8318d782008-01-24 19:38:38 +01001596 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001597
1598 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1599 is_fat);
1600
1601 if (!ch_info)
1602 return -EINVAL;
1603
1604 /* get txatten group, used to select 1) thermal txpower adjustment
1605 * and 2) mimo txpower balance between Tx chains. */
1606 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1607 if (txatten_grp < 0)
1608 return -EINVAL;
1609
1610 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1611 channel, txatten_grp);
1612
1613 if (is_fat) {
1614 if (ctrl_chan_high)
1615 channel -= 2;
1616 else
1617 channel += 2;
1618 }
1619
1620 /* hardware txpower limits ...
1621 * saturation (clipping distortion) txpowers are in half-dBm */
1622 if (band)
Tomas Winkler073d3f52008-04-21 15:41:52 -07001623 saturation_power = priv->calib_info->saturation_power24;
Zhu Yib481de92007-09-25 17:54:57 -07001624 else
Tomas Winkler073d3f52008-04-21 15:41:52 -07001625 saturation_power = priv->calib_info->saturation_power52;
Zhu Yib481de92007-09-25 17:54:57 -07001626
1627 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1628 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1629 if (band)
1630 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1631 else
1632 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1633 }
1634
1635 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1636 * max_power_avg values are in dBm, convert * 2 */
1637 if (is_fat)
1638 reg_limit = ch_info->fat_max_power_avg * 2;
1639 else
1640 reg_limit = ch_info->max_power_avg * 2;
1641
1642 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1643 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1644 if (band)
1645 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1646 else
1647 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1648 }
1649
1650 /* Interpolate txpower calibration values for this channel,
1651 * based on factory calibration tests on spaced channels. */
1652 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1653
1654 /* calculate tx gain adjustment based on power supply voltage */
Tomas Winkler073d3f52008-04-21 15:41:52 -07001655 voltage = priv->calib_info->voltage;
Zhu Yib481de92007-09-25 17:54:57 -07001656 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1657 voltage_compensation =
1658 iwl4965_get_voltage_compensation(voltage, init_voltage);
1659
1660 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1661 init_voltage,
1662 voltage, voltage_compensation);
1663
1664 /* get current temperature (Celsius) */
1665 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1666 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1667 current_temp = KELVIN_TO_CELSIUS(current_temp);
1668
1669 /* select thermal txpower adjustment params, based on channel group
1670 * (same frequency group used for mimo txatten adjustment) */
1671 degrees_per_05db_num =
1672 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1673 degrees_per_05db_denom =
1674 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1675
1676 /* get per-chain txpower values from factory measurements */
1677 for (c = 0; c < 2; c++) {
1678 measurement = &ch_eeprom_info.measurements[c][1];
1679
1680 /* txgain adjustment (in half-dB steps) based on difference
1681 * between factory and current temperature */
1682 factory_temp = measurement->temperature;
1683 iwl4965_math_div_round((current_temp - factory_temp) *
1684 degrees_per_05db_denom,
1685 degrees_per_05db_num,
1686 &temperature_comp[c]);
1687
1688 factory_gain_index[c] = measurement->gain_idx;
1689 factory_actual_pwr[c] = measurement->actual_pow;
1690
1691 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1692 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1693 "curr tmp %d, comp %d steps\n",
1694 factory_temp, current_temp,
1695 temperature_comp[c]);
1696
1697 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1698 factory_gain_index[c],
1699 factory_actual_pwr[c]);
1700 }
1701
1702 /* for each of 33 bit-rates (including 1 for CCK) */
1703 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1704 u8 is_mimo_rate;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001705 union iwl4965_tx_power_dual_stream tx_power;
Zhu Yib481de92007-09-25 17:54:57 -07001706
1707 /* for mimo, reduce each chain's txpower by half
1708 * (3dB, 6 steps), so total output power is regulatory
1709 * compliant. */
1710 if (i & 0x8) {
1711 current_regulatory = reg_limit -
1712 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1713 is_mimo_rate = 1;
1714 } else {
1715 current_regulatory = reg_limit;
1716 is_mimo_rate = 0;
1717 }
1718
1719 /* find txpower limit, either hardware or regulatory */
1720 power_limit = saturation_power - back_off_table[i];
1721 if (power_limit > current_regulatory)
1722 power_limit = current_regulatory;
1723
1724 /* reduce user's txpower request if necessary
1725 * for this rate on this channel */
1726 target_power = user_target_power;
1727 if (target_power > power_limit)
1728 target_power = power_limit;
1729
1730 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1731 i, saturation_power - back_off_table[i],
1732 current_regulatory, user_target_power,
1733 target_power);
1734
1735 /* for each of 2 Tx chains (radio transmitters) */
1736 for (c = 0; c < 2; c++) {
1737 s32 atten_value;
1738
1739 if (is_mimo_rate)
1740 atten_value =
1741 (s32)le32_to_cpu(priv->card_alive_init.
1742 tx_atten[txatten_grp][c]);
1743 else
1744 atten_value = 0;
1745
1746 /* calculate index; higher index means lower txpower */
1747 power_index = (u8) (factory_gain_index[c] -
1748 (target_power -
1749 factory_actual_pwr[c]) -
1750 temperature_comp[c] -
1751 voltage_compensation +
1752 atten_value);
1753
1754/* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1755 power_index); */
1756
1757 if (power_index < get_min_power_index(i, band))
1758 power_index = get_min_power_index(i, band);
1759
1760 /* adjust 5 GHz index to support negative indexes */
1761 if (!band)
1762 power_index += 9;
1763
1764 /* CCK, rate 32, reduce txpower for CCK */
1765 if (i == POWER_TABLE_CCK_ENTRY)
1766 power_index +=
1767 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1768
1769 /* stay within the table! */
1770 if (power_index > 107) {
1771 IWL_WARNING("txpower index %d > 107\n",
1772 power_index);
1773 power_index = 107;
1774 }
1775 if (power_index < 0) {
1776 IWL_WARNING("txpower index %d < 0\n",
1777 power_index);
1778 power_index = 0;
1779 }
1780
1781 /* fill txpower command for this rate/chain */
1782 tx_power.s.radio_tx_gain[c] =
1783 gain_table[band][power_index].radio;
1784 tx_power.s.dsp_predis_atten[c] =
1785 gain_table[band][power_index].dsp;
1786
1787 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1788 "gain 0x%02x dsp %d\n",
1789 c, atten_value, power_index,
1790 tx_power.s.radio_tx_gain[c],
1791 tx_power.s.dsp_predis_atten[c]);
1792 }/* for each chain */
1793
1794 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1795
1796 }/* for each rate */
1797
1798 return 0;
1799}
1800
1801/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001802 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
Zhu Yib481de92007-09-25 17:54:57 -07001803 *
1804 * Uses the active RXON for channel, band, and characteristics (fat, high)
1805 * The power limit is taken from priv->user_txpower_limit.
1806 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001807int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001808{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001809 struct iwl4965_txpowertable_cmd cmd = { 0 };
Tomas Winkler857485c2008-03-21 13:53:44 -07001810 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07001811 u8 band = 0;
1812 u8 is_fat = 0;
1813 u8 ctrl_chan_high = 0;
1814
1815 if (test_bit(STATUS_SCANNING, &priv->status)) {
1816 /* If this gets hit a lot, switch it to a BUG() and catch
1817 * the stack trace to find out who is calling this during
1818 * a scan. */
1819 IWL_WARNING("TX Power requested while scanning!\n");
1820 return -EAGAIN;
1821 }
1822
Johannes Berg8318d782008-01-24 19:38:38 +01001823 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001824
1825 is_fat = is_fat_channel(priv->active_rxon.flags);
1826
1827 if (is_fat &&
1828 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1829 ctrl_chan_high = 1;
1830
1831 cmd.band = band;
1832 cmd.channel = priv->active_rxon.channel;
1833
Tomas Winkler857485c2008-03-21 13:53:44 -07001834 ret = iwl4965_fill_txpower_tbl(priv, band,
Zhu Yib481de92007-09-25 17:54:57 -07001835 le16_to_cpu(priv->active_rxon.channel),
1836 is_fat, ctrl_chan_high, &cmd.tx_power);
Tomas Winkler857485c2008-03-21 13:53:44 -07001837 if (ret)
1838 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07001839
Tomas Winkler857485c2008-03-21 13:53:44 -07001840 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1841
1842out:
1843 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07001844}
1845
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001846static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1847{
1848 int ret = 0;
1849 struct iwl4965_rxon_assoc_cmd rxon_assoc;
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001850 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1851 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001852
1853 if ((rxon1->flags == rxon2->flags) &&
1854 (rxon1->filter_flags == rxon2->filter_flags) &&
1855 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1856 (rxon1->ofdm_ht_single_stream_basic_rates ==
1857 rxon2->ofdm_ht_single_stream_basic_rates) &&
1858 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1859 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1860 (rxon1->rx_chain == rxon2->rx_chain) &&
1861 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1862 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1863 return 0;
1864 }
1865
1866 rxon_assoc.flags = priv->staging_rxon.flags;
1867 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1868 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1869 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1870 rxon_assoc.reserved = 0;
1871 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1872 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1873 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1874 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1875 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1876
1877 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1878 sizeof(rxon_assoc), &rxon_assoc, NULL);
1879 if (ret)
1880 return ret;
1881
1882 return ret;
1883}
1884
1885
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001886int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001887{
1888 int rc;
1889 u8 band = 0;
1890 u8 is_fat = 0;
1891 u8 ctrl_chan_high = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001892 struct iwl4965_channel_switch_cmd cmd = { 0 };
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001893 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001894
Johannes Berg8318d782008-01-24 19:38:38 +01001895 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001896
Assaf Krauss8622e702008-03-21 13:53:43 -07001897 ch_info = iwl_get_channel_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001898
1899 is_fat = is_fat_channel(priv->staging_rxon.flags);
1900
1901 if (is_fat &&
1902 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1903 ctrl_chan_high = 1;
1904
1905 cmd.band = band;
1906 cmd.expect_beacon = 0;
1907 cmd.channel = cpu_to_le16(channel);
1908 cmd.rxon_flags = priv->active_rxon.flags;
1909 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1910 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1911 if (ch_info)
1912 cmd.expect_beacon = is_channel_radar(ch_info);
1913 else
1914 cmd.expect_beacon = 1;
1915
1916 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1917 ctrl_chan_high, &cmd.tx_power);
1918 if (rc) {
1919 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1920 return rc;
1921 }
1922
Tomas Winkler857485c2008-03-21 13:53:44 -07001923 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001924 return rc;
1925}
1926
Ron Rindjunskyd67f5482008-05-05 10:22:49 +08001927static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001928{
Tomas Winkler059ff822008-04-14 21:16:14 -07001929 struct iwl4965_shared *s = priv->shared_virt;
1930 return le32_to_cpu(s->rb_closed) & 0xFFF;
Zhu Yib481de92007-09-25 17:54:57 -07001931}
1932
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001933int iwl4965_hw_get_temperature(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001934{
1935 return priv->temperature;
1936}
1937
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001938unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
Tomas Winklerfcab4232008-05-15 13:54:01 +08001939 struct iwl_frame *frame, u8 rate)
Zhu Yib481de92007-09-25 17:54:57 -07001940{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001941 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
Zhu Yib481de92007-09-25 17:54:57 -07001942 unsigned int frame_size;
1943
1944 tx_beacon_cmd = &frame->u.beacon;
1945 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1946
Tomas Winkler5425e492008-04-15 16:01:38 -07001947 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
Zhu Yib481de92007-09-25 17:54:57 -07001948 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1949
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001950 frame_size = iwl4965_fill_beacon_frame(priv,
Zhu Yib481de92007-09-25 17:54:57 -07001951 tx_beacon_cmd->frame,
Tomas Winkler57bd1be2008-05-15 13:54:03 +08001952 iwl_bcast_addr,
Zhu Yib481de92007-09-25 17:54:57 -07001953 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1954
1955 BUG_ON(frame_size > MAX_MPDU_SIZE);
1956 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1957
1958 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1959 tx_beacon_cmd->tx.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001960 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001961 else
1962 tx_beacon_cmd->tx.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001963 iwl4965_hw_set_rate_n_flags(rate, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001964
1965 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1966 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1967 return (sizeof(*tx_beacon_cmd) + frame_size);
1968}
1969
Ron Rindjunsky399f4902008-04-23 17:14:56 -07001970static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1971{
1972 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1973 sizeof(struct iwl4965_shared),
1974 &priv->shared_phys);
1975 if (!priv->shared_virt)
1976 return -ENOMEM;
1977
1978 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1979
Ron Rindjunskyd67f5482008-05-05 10:22:49 +08001980 priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1981
Ron Rindjunsky399f4902008-04-23 17:14:56 -07001982 return 0;
1983}
1984
1985static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1986{
1987 if (priv->shared_virt)
1988 pci_free_consistent(priv->pci_dev,
1989 sizeof(struct iwl4965_shared),
1990 priv->shared_virt,
1991 priv->shared_phys);
1992}
1993
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001994/**
Tomas Winklere2a722e2008-04-14 21:16:10 -07001995 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001996 */
Tomas Winklere2a722e2008-04-14 21:16:10 -07001997static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +08001998 struct iwl_tx_queue *txq,
Tomas Winklere2a722e2008-04-14 21:16:10 -07001999 u16 byte_cnt)
Zhu Yib481de92007-09-25 17:54:57 -07002000{
2001 int len;
2002 int txq_id = txq->q.id;
Tomas Winkler059ff822008-04-14 21:16:14 -07002003 struct iwl4965_shared *shared_data = priv->shared_virt;
Zhu Yib481de92007-09-25 17:54:57 -07002004
Zhu Yib481de92007-09-25 17:54:57 -07002005 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2006
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002007 /* Set up byte count within first 256 entries */
Zhu Yib481de92007-09-25 17:54:57 -07002008 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002009 tfd_offset[txq->q.write_ptr], byte_cnt, len);
Zhu Yib481de92007-09-25 17:54:57 -07002010
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002011 /* If within first 64 entries, duplicate at end */
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07002012 if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
Zhu Yib481de92007-09-25 17:54:57 -07002013 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07002014 tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
Zhu Yib481de92007-09-25 17:54:57 -07002015 byte_cnt, len);
Zhu Yib481de92007-09-25 17:54:57 -07002016}
2017
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002018/**
Zhu Yib481de92007-09-25 17:54:57 -07002019 * sign_extend - Sign extend a value using specified bit as sign-bit
2020 *
2021 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
2022 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
2023 *
2024 * @param oper value to sign extend
2025 * @param index 0 based bit index (0<=index<32) to sign bit
2026 */
2027static s32 sign_extend(u32 oper, int index)
2028{
2029 u8 shift = 31 - index;
2030
2031 return (s32)(oper << shift) >> shift;
2032}
2033
2034/**
2035 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
2036 * @statistics: Provides the temperature reading from the uCode
2037 *
2038 * A return of <0 indicates bogus data in the statistics
2039 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002040int iwl4965_get_temperature(const struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002041{
2042 s32 temperature;
2043 s32 vt;
2044 s32 R1, R2, R3;
2045 u32 R4;
2046
2047 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
2048 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
2049 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
2050 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
2051 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
2052 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
2053 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
2054 } else {
2055 IWL_DEBUG_TEMP("Running temperature calibration\n");
2056 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
2057 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
2058 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
2059 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
2060 }
2061
2062 /*
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002063 * Temperature is only 23 bits, so sign extend out to 32.
Zhu Yib481de92007-09-25 17:54:57 -07002064 *
2065 * NOTE If we haven't received a statistics notification yet
2066 * with an updated temperature, use R4 provided to us in the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002067 * "initialize" ALIVE response.
2068 */
Zhu Yib481de92007-09-25 17:54:57 -07002069 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
2070 vt = sign_extend(R4, 23);
2071 else
2072 vt = sign_extend(
2073 le32_to_cpu(priv->statistics.general.temperature), 23);
2074
2075 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
2076 R1, R2, R3, vt);
2077
2078 if (R3 == R1) {
2079 IWL_ERROR("Calibration conflict R1 == R3\n");
2080 return -1;
2081 }
2082
2083 /* Calculate temperature in degrees Kelvin, adjust by 97%.
2084 * Add offset to center the adjustment around 0 degrees Centigrade. */
2085 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
2086 temperature /= (R3 - R1);
2087 temperature = (temperature * 97) / 100 +
2088 TEMPERATURE_CALIB_KELVIN_OFFSET;
2089
2090 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
2091 KELVIN_TO_CELSIUS(temperature));
2092
2093 return temperature;
2094}
2095
2096/* Adjust Txpower only if temperature variance is greater than threshold. */
2097#define IWL_TEMPERATURE_THRESHOLD 3
2098
2099/**
2100 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
2101 *
2102 * If the temperature changed has changed sufficiently, then a recalibration
2103 * is needed.
2104 *
2105 * Assumes caller will replace priv->last_temperature once calibration
2106 * executed.
2107 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002108static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002109{
2110 int temp_diff;
2111
2112 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
2113 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
2114 return 0;
2115 }
2116
2117 temp_diff = priv->temperature - priv->last_temperature;
2118
2119 /* get absolute value */
2120 if (temp_diff < 0) {
2121 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
2122 temp_diff = -temp_diff;
2123 } else if (temp_diff == 0)
2124 IWL_DEBUG_POWER("Same temp, \n");
2125 else
2126 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
2127
2128 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
2129 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
2130 return 0;
2131 }
2132
2133 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
2134
2135 return 1;
2136}
2137
2138/* Calculate noise level, based on measurements during network silence just
2139 * before arriving beacon. This measurement can be done only if we know
2140 * exactly when to expect beacons, therefore only when we're associated. */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002141static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002142{
2143 struct statistics_rx_non_phy *rx_info
2144 = &(priv->statistics.rx.general);
2145 int num_active_rx = 0;
2146 int total_silence = 0;
2147 int bcn_silence_a =
2148 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
2149 int bcn_silence_b =
2150 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
2151 int bcn_silence_c =
2152 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
2153
2154 if (bcn_silence_a) {
2155 total_silence += bcn_silence_a;
2156 num_active_rx++;
2157 }
2158 if (bcn_silence_b) {
2159 total_silence += bcn_silence_b;
2160 num_active_rx++;
2161 }
2162 if (bcn_silence_c) {
2163 total_silence += bcn_silence_c;
2164 num_active_rx++;
2165 }
2166
2167 /* Average among active antennas */
2168 if (num_active_rx)
2169 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
2170 else
2171 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2172
2173 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
2174 bcn_silence_a, bcn_silence_b, bcn_silence_c,
2175 priv->last_rx_noise);
2176}
2177
Tomas Winklera55360e2008-05-05 10:22:28 +08002178void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
2179 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002180{
Tomas Winklerdb11d632008-05-05 10:22:33 +08002181 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002182 int change;
2183 s32 temp;
2184
2185 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
2186 (int)sizeof(priv->statistics), pkt->len);
2187
2188 change = ((priv->statistics.general.temperature !=
2189 pkt->u.stats.general.temperature) ||
2190 ((priv->statistics.flag &
2191 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
2192 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
2193
2194 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
2195
2196 set_bit(STATUS_STATISTICS, &priv->status);
2197
2198 /* Reschedule the statistics timer to occur in
2199 * REG_RECALIB_PERIOD seconds to ensure we get a
2200 * thermal update even if the uCode doesn't give
2201 * us one */
2202 mod_timer(&priv->statistics_periodic, jiffies +
2203 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
2204
2205 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2206 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
2207 iwl4965_rx_calc_noise(priv);
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002208#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Zhu Yib481de92007-09-25 17:54:57 -07002209 queue_work(priv->workqueue, &priv->sensitivity_work);
2210#endif
2211 }
2212
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07002213 iwl_leds_background(priv);
2214
Zhu Yib481de92007-09-25 17:54:57 -07002215 /* If the hardware hasn't reported a change in
2216 * temperature then don't bother computing a
2217 * calibrated temperature value */
2218 if (!change)
2219 return;
2220
2221 temp = iwl4965_get_temperature(priv);
2222 if (temp < 0)
2223 return;
2224
2225 if (priv->temperature != temp) {
2226 if (priv->temperature)
2227 IWL_DEBUG_TEMP("Temperature changed "
2228 "from %dC to %dC\n",
2229 KELVIN_TO_CELSIUS(priv->temperature),
2230 KELVIN_TO_CELSIUS(temp));
2231 else
2232 IWL_DEBUG_TEMP("Temperature "
2233 "initialized to %dC\n",
2234 KELVIN_TO_CELSIUS(temp));
2235 }
2236
2237 priv->temperature = temp;
2238 set_bit(STATUS_TEMPERATURE, &priv->status);
2239
2240 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2241 iwl4965_is_temp_calib_needed(priv))
2242 queue_work(priv->workqueue, &priv->txpower_work);
2243}
2244
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002245static void iwl4965_add_radiotap(struct iwl_priv *priv,
Zhu Yi12342c42007-12-20 11:27:32 +08002246 struct sk_buff *skb,
2247 struct iwl4965_rx_phy_res *rx_start,
2248 struct ieee80211_rx_status *stats,
2249 u32 ampdu_status)
2250{
Bruno Randolf566bfe52008-05-08 19:15:40 +02002251 s8 signal = stats->signal;
Zhu Yi12342c42007-12-20 11:27:32 +08002252 s8 noise = 0;
Johannes Berg8318d782008-01-24 19:38:38 +01002253 int rate = stats->rate_idx;
Zhu Yi12342c42007-12-20 11:27:32 +08002254 u64 tsf = stats->mactime;
Johannes Berga0b484f2008-04-01 17:51:47 +02002255 __le16 antenna;
Zhu Yi12342c42007-12-20 11:27:32 +08002256 __le16 phy_flags_hw = rx_start->phy_flags;
2257 struct iwl4965_rt_rx_hdr {
2258 struct ieee80211_radiotap_header rt_hdr;
2259 __le64 rt_tsf; /* TSF */
2260 u8 rt_flags; /* radiotap packet flags */
2261 u8 rt_rate; /* rate in 500kb/s */
2262 __le16 rt_channelMHz; /* channel in MHz */
2263 __le16 rt_chbitmask; /* channel bitfield */
2264 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2265 s8 rt_dbmnoise;
2266 u8 rt_antenna; /* antenna number */
2267 } __attribute__ ((packed)) *iwl4965_rt;
2268
2269 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2270 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2271 if (net_ratelimit())
2272 printk(KERN_ERR "not enough headroom [%d] for "
Miguel Botón01c20982008-01-04 23:34:35 +01002273 "radiotap head [%zd]\n",
Zhu Yi12342c42007-12-20 11:27:32 +08002274 skb_headroom(skb), sizeof(*iwl4965_rt));
2275 return;
2276 }
2277
2278 /* put radiotap header in front of 802.11 header and data */
2279 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2280
2281 /* initialise radiotap header */
2282 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2283 iwl4965_rt->rt_hdr.it_pad = 0;
2284
2285 /* total header + data */
2286 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2287 &iwl4965_rt->rt_hdr.it_len);
2288
2289 /* Indicate all the fields we add to the radiotap header */
2290 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2291 (1 << IEEE80211_RADIOTAP_FLAGS) |
2292 (1 << IEEE80211_RADIOTAP_RATE) |
2293 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2294 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2295 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2296 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2297 &iwl4965_rt->rt_hdr.it_present);
2298
2299 /* Zero the flags, we'll add to them as we go */
2300 iwl4965_rt->rt_flags = 0;
2301
2302 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2303
2304 iwl4965_rt->rt_dbmsignal = signal;
2305 iwl4965_rt->rt_dbmnoise = noise;
2306
2307 /* Convert the channel frequency and set the flags */
2308 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2309 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2310 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2311 IEEE80211_CHAN_5GHZ),
2312 &iwl4965_rt->rt_chbitmask);
2313 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2314 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2315 IEEE80211_CHAN_2GHZ),
2316 &iwl4965_rt->rt_chbitmask);
2317 else /* 802.11g */
2318 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2319 IEEE80211_CHAN_2GHZ),
2320 &iwl4965_rt->rt_chbitmask);
2321
Zhu Yi12342c42007-12-20 11:27:32 +08002322 if (rate == -1)
2323 iwl4965_rt->rt_rate = 0;
2324 else
Tomas Winkler1826dcc2008-05-15 13:54:02 +08002325 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
Zhu Yi12342c42007-12-20 11:27:32 +08002326
2327 /*
2328 * "antenna number"
2329 *
2330 * It seems that the antenna field in the phy flags value
2331 * is actually a bitfield. This is undefined by radiotap,
2332 * it wants an actual antenna number but I always get "7"
2333 * for most legacy frames I receive indicating that the
2334 * same frame was received on all three RX chains.
2335 *
2336 * I think this field should be removed in favour of a
2337 * new 802.11n radiotap field "RX chains" that is defined
2338 * as a bitmask.
2339 */
Johannes Berga0b484f2008-04-01 17:51:47 +02002340 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2341 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
Zhu Yi12342c42007-12-20 11:27:32 +08002342
2343 /* set the preamble flag if appropriate */
2344 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2345 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2346
2347 stats->flag |= RX_FLAG_RADIOTAP;
2348}
2349
Tomas Winkler19758be2008-03-12 16:58:51 -07002350static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2351{
2352 /* 0 - mgmt, 1 - cnt, 2 - data */
2353 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2354 priv->rx_stats[idx].cnt++;
2355 priv->rx_stats[idx].bytes += len;
2356}
2357
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002358/*
2359 * returns non-zero if packet should be dropped
2360 */
2361static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2362 struct ieee80211_hdr *hdr,
2363 u32 decrypt_res,
2364 struct ieee80211_rx_status *stats)
2365{
2366 u16 fc = le16_to_cpu(hdr->frame_control);
2367
2368 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2369 return 0;
2370
2371 if (!(fc & IEEE80211_FCTL_PROTECTED))
2372 return 0;
2373
2374 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2375 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2376 case RX_RES_STATUS_SEC_TYPE_TKIP:
2377 /* The uCode has got a bad phase 1 Key, pushes the packet.
2378 * Decryption will be done in SW. */
2379 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2380 RX_RES_STATUS_BAD_KEY_TTAK)
2381 break;
2382
Emmanuel Grumbachccc038a2008-05-15 13:54:09 +08002383 case RX_RES_STATUS_SEC_TYPE_WEP:
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002384 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2385 RX_RES_STATUS_BAD_ICV_MIC) {
2386 /* bad ICV, the packet is destroyed since the
2387 * decryption is inplace, drop it */
2388 IWL_DEBUG_RX("Packet destroyed\n");
2389 return -1;
2390 }
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002391 case RX_RES_STATUS_SEC_TYPE_CCMP:
2392 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2393 RX_RES_STATUS_DECRYPT_OK) {
2394 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2395 stats->flag |= RX_FLAG_DECRYPTED;
2396 }
2397 break;
2398
2399 default:
2400 break;
2401 }
2402 return 0;
2403}
2404
Ester Kummerbf403db2008-05-05 10:22:40 +08002405static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002406{
2407 u32 decrypt_out = 0;
2408
2409 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2410 RX_RES_STATUS_STATION_FOUND)
2411 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2412 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2413
2414 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2415
2416 /* packet was not encrypted */
2417 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2418 RX_RES_STATUS_SEC_TYPE_NONE)
2419 return decrypt_out;
2420
2421 /* packet was encrypted with unknown alg */
2422 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2423 RX_RES_STATUS_SEC_TYPE_ERR)
2424 return decrypt_out;
2425
2426 /* decryption was not done in HW */
2427 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2428 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2429 return decrypt_out;
2430
2431 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2432
2433 case RX_RES_STATUS_SEC_TYPE_CCMP:
2434 /* alg is CCM: check MIC only */
2435 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2436 /* Bad MIC */
2437 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2438 else
2439 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2440
2441 break;
2442
2443 case RX_RES_STATUS_SEC_TYPE_TKIP:
2444 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2445 /* Bad TTAK */
2446 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2447 break;
2448 }
2449 /* fall through if TTAK OK */
2450 default:
2451 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2452 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2453 else
2454 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2455 break;
2456 };
2457
2458 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2459 decrypt_in, decrypt_out);
2460
2461 return decrypt_out;
2462}
2463
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002464static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
Zhu Yib481de92007-09-25 17:54:57 -07002465 int include_phy,
Tomas Winklera55360e2008-05-05 10:22:28 +08002466 struct iwl_rx_mem_buffer *rxb,
Zhu Yib481de92007-09-25 17:54:57 -07002467 struct ieee80211_rx_status *stats)
2468{
Tomas Winklerdb11d632008-05-05 10:22:33 +08002469 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002470 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2471 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2472 struct ieee80211_hdr *hdr;
2473 u16 len;
2474 __le32 *rx_end;
2475 unsigned int skblen;
2476 u32 ampdu_status;
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002477 u32 ampdu_status_legacy;
Zhu Yib481de92007-09-25 17:54:57 -07002478
2479 if (!include_phy && priv->last_phy_res[0])
2480 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2481
2482 if (!rx_start) {
2483 IWL_ERROR("MPDU frame without a PHY data\n");
2484 return;
2485 }
2486 if (include_phy) {
2487 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2488 rx_start->cfg_phy_cnt);
2489
2490 len = le16_to_cpu(rx_start->byte_count);
2491
2492 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2493 sizeof(struct iwl4965_rx_phy_res) +
2494 rx_start->cfg_phy_cnt + len);
2495
2496 } else {
2497 struct iwl4965_rx_mpdu_res_start *amsdu =
2498 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2499
2500 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2501 sizeof(struct iwl4965_rx_mpdu_res_start));
2502 len = le16_to_cpu(amsdu->byte_count);
2503 rx_start->byte_count = amsdu->byte_count;
2504 rx_end = (__le32 *) (((u8 *) hdr) + len);
2505 }
Abhijeet Kolekar4419e392008-05-05 10:22:47 +08002506 /* In monitor mode allow 802.11 ACk frames (10 bytes) */
2507 if (len > priv->hw_params.max_pkt_size ||
2508 len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
Zhu Yi12342c42007-12-20 11:27:32 +08002509 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07002510 return;
2511 }
2512
2513 ampdu_status = le32_to_cpu(*rx_end);
2514 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2515
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002516 if (!include_phy) {
2517 /* New status scheme, need to translate */
2518 ampdu_status_legacy = ampdu_status;
Ester Kummerbf403db2008-05-05 10:22:40 +08002519 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002520 }
2521
Zhu Yib481de92007-09-25 17:54:57 -07002522 /* start from MAC */
2523 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2524 skb_put(rxb->skb, len); /* end where data ends */
2525
2526 /* We only process data packets if the interface is open */
2527 if (unlikely(!priv->is_open)) {
2528 IWL_DEBUG_DROP_LIMIT
2529 ("Dropping packet while interface is not open.\n");
2530 return;
2531 }
2532
Zhu Yib481de92007-09-25 17:54:57 -07002533 stats->flag = 0;
2534 hdr = (struct ieee80211_hdr *)rxb->skb->data;
2535
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002536 /* in case of HW accelerated crypto and bad decryption, drop */
Ron Rindjunsky099b40b2008-04-21 15:41:53 -07002537 if (!priv->hw_params.sw_crypto &&
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002538 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2539 return;
Zhu Yib481de92007-09-25 17:54:57 -07002540
Zhu Yi12342c42007-12-20 11:27:32 +08002541 if (priv->add_radiotap)
2542 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2543
Tomas Winkler19758be2008-03-12 16:58:51 -07002544 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
Zhu Yib481de92007-09-25 17:54:57 -07002545 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2546 priv->alloc_rxb_skb--;
2547 rxb->skb = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002548}
2549
2550/* Calc max signal level (dBm) among 3 possible receivers */
Ester Kummerbf403db2008-05-05 10:22:40 +08002551static int iwl4965_calc_rssi(struct iwl_priv *priv,
2552 struct iwl4965_rx_phy_res *rx_resp)
Zhu Yib481de92007-09-25 17:54:57 -07002553{
2554 /* data from PHY/DSP regarding signal strength, etc.,
2555 * contents are always there, not configurable by host. */
2556 struct iwl4965_rx_non_cfg_phy *ncphy =
2557 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2558 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2559 >> IWL_AGC_DB_POS;
2560
2561 u32 valid_antennae =
2562 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2563 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2564 u8 max_rssi = 0;
2565 u32 i;
2566
2567 /* Find max rssi among 3 possible receivers.
2568 * These values are measured by the digital signal processor (DSP).
2569 * They should stay fairly constant even as the signal strength varies,
2570 * if the radio's automatic gain control (AGC) is working right.
2571 * AGC value (see below) will provide the "interesting" info. */
2572 for (i = 0; i < 3; i++)
2573 if (valid_antennae & (1 << i))
2574 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2575
2576 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2577 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2578 max_rssi, agc);
2579
2580 /* dBm = max_rssi dB - agc dB - constant.
2581 * Higher AGC (higher radio gain) means lower signal. */
2582 return (max_rssi - agc - IWL_RSSI_OFFSET);
2583}
2584
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002585static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07002586{
2587 unsigned long flags;
2588
2589 spin_lock_irqsave(&priv->sta_lock, flags);
2590 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2591 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2592 priv->stations[sta_id].sta.sta.modify_mask = 0;
2593 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2594 spin_unlock_irqrestore(&priv->sta_lock, flags);
2595
Tomas Winkler133636d2008-05-05 10:22:34 +08002596 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002597}
2598
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002599static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
Zhu Yib481de92007-09-25 17:54:57 -07002600{
2601 /* FIXME: need locking over ps_status ??? */
Tomas Winkler947b13a2008-04-16 16:34:48 -07002602 u8 sta_id = iwl_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07002603
2604 if (sta_id != IWL_INVALID_STATION) {
2605 u8 sta_awake = priv->stations[sta_id].
2606 ps_status == STA_PS_STATUS_WAKE;
2607
2608 if (sta_awake && ps_bit)
2609 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2610 else if (!sta_awake && !ps_bit) {
2611 iwl4965_sta_modify_ps_wake(priv, sta_id);
2612 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2613 }
2614 }
2615}
Tomas Winkler0a6857e2008-03-12 16:58:49 -07002616#ifdef CONFIG_IWLWIFI_DEBUG
Tomas Winkler17744ff2008-03-02 01:52:00 +02002617
2618/**
2619 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2620 *
2621 * You may hack this function to show different aspects of received frames,
2622 * including selective frame dumps.
2623 * group100 parameter selects whether to show 1 out of 100 good frames.
2624 *
2625 * TODO: This was originally written for 3945, need to audit for
2626 * proper operation with 4965.
2627 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002628static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
Tomas Winklerdb11d632008-05-05 10:22:33 +08002629 struct iwl_rx_packet *pkt,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002630 struct ieee80211_hdr *header, int group100)
2631{
2632 u32 to_us;
2633 u32 print_summary = 0;
2634 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
2635 u32 hundred = 0;
2636 u32 dataframe = 0;
2637 u16 fc;
2638 u16 seq_ctl;
2639 u16 channel;
2640 u16 phy_flags;
2641 int rate_sym;
2642 u16 length;
2643 u16 status;
2644 u16 bcn_tmr;
2645 u32 tsf_low;
2646 u64 tsf;
2647 u8 rssi;
2648 u8 agc;
2649 u16 sig_avg;
2650 u16 noise_diff;
2651 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2652 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2653 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2654 u8 *data = IWL_RX_DATA(pkt);
2655
Ester Kummerbf403db2008-05-05 10:22:40 +08002656 if (likely(!(priv->debug_level & IWL_DL_RX)))
Tomas Winkler17744ff2008-03-02 01:52:00 +02002657 return;
2658
2659 /* MAC header */
2660 fc = le16_to_cpu(header->frame_control);
2661 seq_ctl = le16_to_cpu(header->seq_ctrl);
2662
2663 /* metadata */
2664 channel = le16_to_cpu(rx_hdr->channel);
2665 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2666 rate_sym = rx_hdr->rate;
2667 length = le16_to_cpu(rx_hdr->len);
2668
2669 /* end-of-frame status and timestamp */
2670 status = le32_to_cpu(rx_end->status);
2671 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2672 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2673 tsf = le64_to_cpu(rx_end->timestamp);
2674
2675 /* signal statistics */
2676 rssi = rx_stats->rssi;
2677 agc = rx_stats->agc;
2678 sig_avg = le16_to_cpu(rx_stats->sig_avg);
2679 noise_diff = le16_to_cpu(rx_stats->noise_diff);
2680
2681 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2682
2683 /* if data frame is to us and all is good,
2684 * (optionally) print summary for only 1 out of every 100 */
2685 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
2686 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2687 dataframe = 1;
2688 if (!group100)
2689 print_summary = 1; /* print each frame */
2690 else if (priv->framecnt_to_us < 100) {
2691 priv->framecnt_to_us++;
2692 print_summary = 0;
2693 } else {
2694 priv->framecnt_to_us = 0;
2695 print_summary = 1;
2696 hundred = 1;
2697 }
2698 } else {
2699 /* print summary for all other frames */
2700 print_summary = 1;
2701 }
2702
2703 if (print_summary) {
2704 char *title;
2705 int rate_idx;
2706 u32 bitrate;
2707
2708 if (hundred)
2709 title = "100Frames";
2710 else if (fc & IEEE80211_FCTL_RETRY)
2711 title = "Retry";
2712 else if (ieee80211_is_assoc_response(fc))
2713 title = "AscRsp";
2714 else if (ieee80211_is_reassoc_response(fc))
2715 title = "RasRsp";
2716 else if (ieee80211_is_probe_response(fc)) {
2717 title = "PrbRsp";
2718 print_dump = 1; /* dump frame contents */
2719 } else if (ieee80211_is_beacon(fc)) {
2720 title = "Beacon";
2721 print_dump = 1; /* dump frame contents */
2722 } else if (ieee80211_is_atim(fc))
2723 title = "ATIM";
2724 else if (ieee80211_is_auth(fc))
2725 title = "Auth";
2726 else if (ieee80211_is_deauth(fc))
2727 title = "DeAuth";
2728 else if (ieee80211_is_disassoc(fc))
2729 title = "DisAssoc";
2730 else
2731 title = "Frame";
2732
2733 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
2734 if (unlikely(rate_idx == -1))
2735 bitrate = 0;
2736 else
Tomas Winkler1826dcc2008-05-15 13:54:02 +08002737 bitrate = iwl_rates[rate_idx].ieee / 2;
Tomas Winkler17744ff2008-03-02 01:52:00 +02002738
2739 /* print frame summary.
2740 * MAC addresses show just the last byte (for brevity),
2741 * but you can hack it to show more, if you'd like to. */
2742 if (dataframe)
2743 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2744 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2745 title, fc, header->addr1[5],
2746 length, rssi, channel, bitrate);
2747 else {
2748 /* src/dst addresses assume managed mode */
2749 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2750 "src=0x%02x, rssi=%u, tim=%lu usec, "
2751 "phy=0x%02x, chnl=%d\n",
2752 title, fc, header->addr1[5],
2753 header->addr3[5], rssi,
2754 tsf_low - priv->scan_start_tsf,
2755 phy_flags, channel);
2756 }
2757 }
2758 if (print_dump)
Ester Kummerbf403db2008-05-05 10:22:40 +08002759 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
Tomas Winkler17744ff2008-03-02 01:52:00 +02002760}
2761#else
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002762static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
Tomas Winklerdb11d632008-05-05 10:22:33 +08002763 struct iwl_rx_packet *pkt,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002764 struct ieee80211_hdr *header,
2765 int group100)
2766{
2767}
2768#endif
2769
Zhu Yib481de92007-09-25 17:54:57 -07002770
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002771
Tomas Winkler857485c2008-03-21 13:53:44 -07002772/* Called for REPLY_RX (legacy ABG frames), or
Zhu Yib481de92007-09-25 17:54:57 -07002773 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002774static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08002775 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002776{
Tomas Winkler17744ff2008-03-02 01:52:00 +02002777 struct ieee80211_hdr *header;
2778 struct ieee80211_rx_status rx_status;
Tomas Winklerdb11d632008-05-05 10:22:33 +08002779 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002780 /* Use phy data (Rx signal strength, etc.) contained within
2781 * this rx packet for legacy frames,
2782 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
Tomas Winkler857485c2008-03-21 13:53:44 -07002783 int include_phy = (pkt->hdr.cmd == REPLY_RX);
Zhu Yib481de92007-09-25 17:54:57 -07002784 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2785 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2786 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2787 __le32 *rx_end;
2788 unsigned int len = 0;
Zhu Yib481de92007-09-25 17:54:57 -07002789 u16 fc;
Zhu Yib481de92007-09-25 17:54:57 -07002790 u8 network_packet;
2791
Tomas Winkler17744ff2008-03-02 01:52:00 +02002792 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
Tomas Winklerdc92e492008-04-03 16:05:22 -07002793 rx_status.freq =
Emmanuel Grumbachc0186072008-05-08 11:34:05 +08002794 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
Tomas Winkler17744ff2008-03-02 01:52:00 +02002795 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2796 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
Tomas Winklerdc92e492008-04-03 16:05:22 -07002797 rx_status.rate_idx =
2798 iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
Tomas Winkler17744ff2008-03-02 01:52:00 +02002799 if (rx_status.band == IEEE80211_BAND_5GHZ)
2800 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2801
2802 rx_status.antenna = 0;
2803 rx_status.flag = 0;
2804
Zhu Yib481de92007-09-25 17:54:57 -07002805 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
Tomas Winklerdc92e492008-04-03 16:05:22 -07002806 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2807 rx_start->cfg_phy_cnt);
Zhu Yib481de92007-09-25 17:54:57 -07002808 return;
2809 }
Tomas Winkler17744ff2008-03-02 01:52:00 +02002810
Zhu Yib481de92007-09-25 17:54:57 -07002811 if (!include_phy) {
2812 if (priv->last_phy_res[0])
2813 rx_start = (struct iwl4965_rx_phy_res *)
2814 &priv->last_phy_res[1];
2815 else
2816 rx_start = NULL;
2817 }
2818
2819 if (!rx_start) {
2820 IWL_ERROR("MPDU frame without a PHY data\n");
2821 return;
2822 }
2823
2824 if (include_phy) {
2825 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2826 + rx_start->cfg_phy_cnt);
2827
2828 len = le16_to_cpu(rx_start->byte_count);
Tomas Winkler17744ff2008-03-02 01:52:00 +02002829 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
Zhu Yib481de92007-09-25 17:54:57 -07002830 sizeof(struct iwl4965_rx_phy_res) + len);
2831 } else {
2832 struct iwl4965_rx_mpdu_res_start *amsdu =
2833 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2834
2835 header = (void *)(pkt->u.raw +
2836 sizeof(struct iwl4965_rx_mpdu_res_start));
2837 len = le16_to_cpu(amsdu->byte_count);
2838 rx_end = (__le32 *) (pkt->u.raw +
2839 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2840 }
2841
2842 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2843 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2844 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2845 le32_to_cpu(*rx_end));
2846 return;
2847 }
2848
2849 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2850
Zhu Yib481de92007-09-25 17:54:57 -07002851 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
Bruno Randolf566bfe52008-05-08 19:15:40 +02002852 rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
Zhu Yib481de92007-09-25 17:54:57 -07002853
2854 /* Meaningful noise values are available only from beacon statistics,
2855 * which are gathered only when associated, and indicate noise
2856 * only for the associated network channel ...
2857 * Ignore these noise values while scanning (other channels) */
Tomas Winkler3109ece2008-03-28 16:33:35 -07002858 if (iwl_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07002859 !test_bit(STATUS_SCANNING, &priv->status)) {
Tomas Winkler17744ff2008-03-02 01:52:00 +02002860 rx_status.noise = priv->last_rx_noise;
Bruno Randolf566bfe52008-05-08 19:15:40 +02002861 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002862 rx_status.noise);
Zhu Yib481de92007-09-25 17:54:57 -07002863 } else {
Tomas Winkler17744ff2008-03-02 01:52:00 +02002864 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
Bruno Randolf566bfe52008-05-08 19:15:40 +02002865 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002866 }
2867
2868 /* Reset beacon noise level if not associated. */
Tomas Winkler3109ece2008-03-28 16:33:35 -07002869 if (!iwl_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07002870 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2871
Tomas Winkler17744ff2008-03-02 01:52:00 +02002872 /* Set "1" to report good data frames in groups of 100 */
2873 /* FIXME: need to optimze the call: */
2874 iwl4965_dbg_report_frame(priv, pkt, header, 1);
Zhu Yib481de92007-09-25 17:54:57 -07002875
Tomas Winkler17744ff2008-03-02 01:52:00 +02002876 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
Bruno Randolf566bfe52008-05-08 19:15:40 +02002877 rx_status.signal, rx_status.noise, rx_status.signal,
John W. Linville06501d22008-04-01 17:38:47 -04002878 (unsigned long long)rx_status.mactime);
Zhu Yib481de92007-09-25 17:54:57 -07002879
Abhijeet Kolekar4419e392008-05-05 10:22:47 +08002880
2881 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2882 iwl4965_handle_data_packet(priv, 1, include_phy,
2883 rxb, &rx_status);
2884 return;
2885 }
2886
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002887 network_packet = iwl4965_is_network_packet(priv, header);
Zhu Yib481de92007-09-25 17:54:57 -07002888 if (network_packet) {
Bruno Randolf566bfe52008-05-08 19:15:40 +02002889 priv->last_rx_rssi = rx_status.signal;
Zhu Yib481de92007-09-25 17:54:57 -07002890 priv->last_beacon_time = priv->ucode_beacon_time;
2891 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
2892 }
2893
2894 fc = le16_to_cpu(header->frame_control);
2895 switch (fc & IEEE80211_FCTL_FTYPE) {
2896 case IEEE80211_FTYPE_MGMT:
Zhu Yib481de92007-09-25 17:54:57 -07002897 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2898 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2899 header->addr2);
Tomas Winkler17744ff2008-03-02 01:52:00 +02002900 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
Zhu Yib481de92007-09-25 17:54:57 -07002901 break;
2902
2903 case IEEE80211_FTYPE_CTL:
Ron Rindjunsky9ab46172007-12-25 17:00:38 +02002904#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -07002905 switch (fc & IEEE80211_FCTL_STYPE) {
2906 case IEEE80211_STYPE_BACK_REQ:
2907 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
2908 iwl4965_handle_data_packet(priv, 0, include_phy,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002909 rxb, &rx_status);
Zhu Yib481de92007-09-25 17:54:57 -07002910 break;
2911 default:
2912 break;
2913 }
2914#endif
Zhu Yib481de92007-09-25 17:54:57 -07002915 break;
2916
Joe Perches0795af52007-10-03 17:59:30 -07002917 case IEEE80211_FTYPE_DATA: {
2918 DECLARE_MAC_BUF(mac1);
2919 DECLARE_MAC_BUF(mac2);
2920 DECLARE_MAC_BUF(mac3);
2921
Zhu Yib481de92007-09-25 17:54:57 -07002922 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2923 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2924 header->addr2);
2925
2926 if (unlikely(!network_packet))
2927 IWL_DEBUG_DROP("Dropping (non network): "
Joe Perches0795af52007-10-03 17:59:30 -07002928 "%s, %s, %s\n",
2929 print_mac(mac1, header->addr1),
2930 print_mac(mac2, header->addr2),
2931 print_mac(mac3, header->addr3));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002932 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
Joe Perches0795af52007-10-03 17:59:30 -07002933 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
2934 print_mac(mac1, header->addr1),
2935 print_mac(mac2, header->addr2),
2936 print_mac(mac3, header->addr3));
Zhu Yib481de92007-09-25 17:54:57 -07002937 else
2938 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002939 &rx_status);
Zhu Yib481de92007-09-25 17:54:57 -07002940 break;
Joe Perches0795af52007-10-03 17:59:30 -07002941 }
Zhu Yib481de92007-09-25 17:54:57 -07002942 default:
2943 break;
2944
2945 }
2946}
2947
2948/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
2949 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002950static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08002951 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002952{
Tomas Winklerdb11d632008-05-05 10:22:33 +08002953 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002954 priv->last_phy_res[0] = 1;
2955 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
2956 sizeof(struct iwl4965_rx_phy_res));
2957}
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002958static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08002959 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002960
2961{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002962#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Tomas Winklerdb11d632008-05-05 10:22:33 +08002963 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002964 struct iwl4965_missed_beacon_notif *missed_beacon;
Zhu Yib481de92007-09-25 17:54:57 -07002965
2966 missed_beacon = &pkt->u.missed_beacon;
2967 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
2968 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
2969 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
2970 le32_to_cpu(missed_beacon->total_missed_becons),
2971 le32_to_cpu(missed_beacon->num_recvd_beacons),
2972 le32_to_cpu(missed_beacon->num_expected_beacons));
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002973 if (!test_bit(STATUS_SCANNING, &priv->status))
2974 iwl_init_sensitivity(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002975 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002976#endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
Zhu Yib481de92007-09-25 17:54:57 -07002977}
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002978#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -07002979
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002980/**
2981 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
2982 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002983static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002984 int sta_id, int tid)
2985{
2986 unsigned long flags;
2987
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002988 /* Remove "disable" flag, to enable Tx for this TID */
Zhu Yib481de92007-09-25 17:54:57 -07002989 spin_lock_irqsave(&priv->sta_lock, flags);
2990 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
2991 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
2992 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2993 spin_unlock_irqrestore(&priv->sta_lock, flags);
2994
Tomas Winkler133636d2008-05-05 10:22:34 +08002995 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002996}
2997
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002998/**
2999 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
3000 *
3001 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
3002 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
3003 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003004static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
Tomas Winkler6def9762008-05-05 10:22:31 +08003005 struct iwl_ht_agg *agg,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003006 struct iwl4965_compressed_ba_resp*
Zhu Yib481de92007-09-25 17:54:57 -07003007 ba_resp)
3008
3009{
3010 int i, sh, ack;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003011 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
3012 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3013 u64 bitmap;
3014 int successes = 0;
Johannes Berge039fa42008-05-15 12:55:29 +02003015 struct ieee80211_tx_info *info;
Zhu Yib481de92007-09-25 17:54:57 -07003016
3017 if (unlikely(!agg->wait_for_ba)) {
3018 IWL_ERROR("Received BA when not expected\n");
3019 return -EINVAL;
3020 }
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003021
3022 /* Mark that the expected block-ack response arrived */
Zhu Yib481de92007-09-25 17:54:57 -07003023 agg->wait_for_ba = 0;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003024 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003025
3026 /* Calculate shift to align block-ack bits with our Tx window bits */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003027 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
Ian Schram01ebd062007-10-25 17:15:22 +08003028 if (sh < 0) /* tbw something is wrong with indices */
Zhu Yib481de92007-09-25 17:54:57 -07003029 sh += 0x100;
3030
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003031 /* don't use 64-bit values for now */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003032 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
Zhu Yib481de92007-09-25 17:54:57 -07003033
3034 if (agg->frame_count > (64 - sh)) {
3035 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
3036 return -1;
3037 }
3038
3039 /* check for success or failure according to the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003040 * transmitted bitmap and block-ack bitmap */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003041 bitmap &= agg->bitmap;
Zhu Yib481de92007-09-25 17:54:57 -07003042
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003043 /* For each frame attempted in aggregation,
3044 * update driver's record of tx frame's status. */
Zhu Yib481de92007-09-25 17:54:57 -07003045 for (i = 0; i < agg->frame_count ; i++) {
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003046 ack = bitmap & (1 << i);
3047 successes += !!ack;
Zhu Yib481de92007-09-25 17:54:57 -07003048 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003049 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
3050 agg->start_idx + i);
Zhu Yib481de92007-09-25 17:54:57 -07003051 }
3052
Johannes Berge039fa42008-05-15 12:55:29 +02003053 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
3054 memset(&info->status, 0, sizeof(info->status));
3055 info->flags = IEEE80211_TX_STAT_ACK;
3056 info->flags |= IEEE80211_TX_STAT_AMPDU;
3057 info->status.ampdu_ack_map = successes;
3058 info->status.ampdu_ack_len = agg->frame_count;
3059 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
Zhu Yib481de92007-09-25 17:54:57 -07003060
John W. Linvillef868f4e2008-03-07 16:38:43 -05003061 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003062
3063 return 0;
3064}
3065
3066/**
3067 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
3068 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003069static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003070 u16 txq_id)
3071{
3072 /* Simply stop the queue, but don't change any configuration;
3073 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003074 iwl_write_prph(priv,
Tomas Winkler12a81f62008-04-03 16:05:20 -07003075 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003076 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
3077 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003078}
3079
3080/**
3081 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003082 * priv->lock must be held by the caller
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003083 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003084static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003085 u16 ssn_idx, u8 tx_fifo)
3086{
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003087 int ret = 0;
3088
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003089 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
3090 IWL_WARNING("queue number too small: %d, must be > %d\n",
3091 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3092 return -EINVAL;
3093 }
3094
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003095 ret = iwl_grab_nic_access(priv);
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003096 if (ret)
3097 return ret;
3098
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003099 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3100
Tomas Winkler12a81f62008-04-03 16:05:20 -07003101 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003102
3103 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3104 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3105 /* supposes that ssn_idx is valid (!= 0xFFF) */
3106 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3107
Tomas Winkler12a81f62008-04-03 16:05:20 -07003108 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Ron Rindjunsky36470742008-05-15 13:54:10 +08003109 iwl_txq_ctx_deactivate(priv, txq_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003110 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
3111
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003112 iwl_release_nic_access(priv);
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003113
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003114 return 0;
3115}
3116
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003117int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003118 u8 tid, int txq_id)
3119{
Tomas Winkler443cfd42008-05-15 13:53:57 +08003120 struct iwl_queue *q = &priv->txq[txq_id].q;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003121 u8 *addr = priv->stations[sta_id].sta.sta.addr;
Tomas Winkler6def9762008-05-05 10:22:31 +08003122 struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003123
3124 switch (priv->stations[sta_id].tid[tid].agg.state) {
3125 case IWL_EMPTYING_HW_QUEUE_DELBA:
3126 /* We are reclaiming the last packet of the */
3127 /* aggregated HW queue */
3128 if (txq_id == tid_data->agg.txq_id &&
3129 q->read_ptr == q->write_ptr) {
3130 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
3131 int tx_fifo = default_tid_to_tx_fifo[tid];
3132 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
3133 iwl4965_tx_queue_agg_disable(priv, txq_id,
3134 ssn, tx_fifo);
3135 tid_data->agg.state = IWL_AGG_OFF;
3136 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3137 }
3138 break;
3139 case IWL_EMPTYING_HW_QUEUE_ADDBA:
3140 /* We are reclaiming the last packet of the queue */
3141 if (tid_data->tfds_in_queue == 0) {
3142 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
3143 tid_data->agg.state = IWL_AGG_ON;
3144 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3145 }
3146 break;
3147 }
Zhu Yib481de92007-09-25 17:54:57 -07003148 return 0;
3149}
3150
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003151/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003152 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
3153 *
3154 * Handles block-acknowledge notification from device, which reports success
3155 * of frames sent via aggregation.
3156 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003157static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08003158 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003159{
Tomas Winklerdb11d632008-05-05 10:22:33 +08003160 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003161 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
Zhu Yib481de92007-09-25 17:54:57 -07003162 int index;
Ron Rindjunsky16466902008-05-05 10:22:50 +08003163 struct iwl_tx_queue *txq = NULL;
Tomas Winkler6def9762008-05-05 10:22:31 +08003164 struct iwl_ht_agg *agg;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003165 DECLARE_MAC_BUF(mac);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003166
3167 /* "flow" corresponds to Tx queue */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003168 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003169
3170 /* "ssn" is start of block-ack Tx window, corresponds to index
3171 * (in Tx queue's circular buffer) of first TFD/frame in window */
Zhu Yib481de92007-09-25 17:54:57 -07003172 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
3173
Ron Rindjunskydfe7d452008-04-15 16:01:45 -07003174 if (scd_flow >= priv->hw_params.max_txq_num) {
Zhu Yib481de92007-09-25 17:54:57 -07003175 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
3176 return;
3177 }
3178
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003179 txq = &priv->txq[scd_flow];
Zhu Yib481de92007-09-25 17:54:57 -07003180 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003181
3182 /* Find index just before block-ack window */
Tomas Winkler443cfd42008-05-15 13:53:57 +08003183 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
Zhu Yib481de92007-09-25 17:54:57 -07003184
Ian Schram01ebd062007-10-25 17:15:22 +08003185 /* TODO: Need to get this copy more safely - now good for debug */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003186
Joe Perches0795af52007-10-03 17:59:30 -07003187 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
3188 "sta_id = %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07003189 agg->wait_for_ba,
Joe Perches0795af52007-10-03 17:59:30 -07003190 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
Zhu Yib481de92007-09-25 17:54:57 -07003191 ba_resp->sta_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003192 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
Zhu Yib481de92007-09-25 17:54:57 -07003193 "%d, scd_ssn = %d\n",
3194 ba_resp->tid,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003195 ba_resp->seq_ctl,
Tomas Winkler0310ae72008-03-11 16:17:19 -07003196 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
Zhu Yib481de92007-09-25 17:54:57 -07003197 ba_resp->scd_flow,
3198 ba_resp->scd_ssn);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003199 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
Zhu Yib481de92007-09-25 17:54:57 -07003200 agg->start_idx,
John W. Linvillef868f4e2008-03-07 16:38:43 -05003201 (unsigned long long)agg->bitmap);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003202
3203 /* Update driver's record of ACK vs. not for each frame in window */
Zhu Yib481de92007-09-25 17:54:57 -07003204 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003205
3206 /* Release all TFDs before the SSN, i.e. all TFDs in front of
3207 * block-ack window (we assume that they've been successfully
3208 * transmitted ... if not, it's too late anyway). */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003209 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
Ron Rindjunsky0d0b2c12008-05-04 14:48:18 +03003210 /* calculate mac80211 ampdu sw queue to wake */
3211 int ampdu_q =
3212 scd_flow - IWL_BACK_QUEUE_FIRST_ID + priv->hw->queues;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003213 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
3214 priv->stations[ba_resp->sta_id].
3215 tid[ba_resp->tid].tfds_in_queue -= freed;
Tomas Winkler443cfd42008-05-15 13:53:57 +08003216 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003217 priv->mac80211_registered &&
3218 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
Ron Rindjunsky0d0b2c12008-05-04 14:48:18 +03003219 ieee80211_wake_queue(priv->hw, ampdu_q);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003220 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
3221 ba_resp->tid, scd_flow);
3222 }
Zhu Yib481de92007-09-25 17:54:57 -07003223}
3224
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003225/**
3226 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
3227 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003228static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
Zhu Yib481de92007-09-25 17:54:57 -07003229 u16 txq_id)
3230{
3231 u32 tbl_dw_addr;
3232 u32 tbl_dw;
3233 u16 scd_q2ratid;
3234
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003235 scd_q2ratid = ra_tid & IWL49_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
Zhu Yib481de92007-09-25 17:54:57 -07003236
3237 tbl_dw_addr = priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003238 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
Zhu Yib481de92007-09-25 17:54:57 -07003239
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003240 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
Zhu Yib481de92007-09-25 17:54:57 -07003241
3242 if (txq_id & 0x1)
3243 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
3244 else
3245 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
3246
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003247 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
Zhu Yib481de92007-09-25 17:54:57 -07003248
3249 return 0;
3250}
3251
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003252
Zhu Yib481de92007-09-25 17:54:57 -07003253/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003254 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
3255 *
3256 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
3257 * i.e. it must be one of the higher queues used for aggregation
Zhu Yib481de92007-09-25 17:54:57 -07003258 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003259static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
Zhu Yib481de92007-09-25 17:54:57 -07003260 int tx_fifo, int sta_id, int tid,
3261 u16 ssn_idx)
3262{
3263 unsigned long flags;
3264 int rc;
3265 u16 ra_tid;
3266
3267 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
3268 IWL_WARNING("queue number too small: %d, must be > %d\n",
3269 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3270
3271 ra_tid = BUILD_RAxTID(sta_id, tid);
3272
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003273 /* Modify device's station table to Tx this TID */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003274 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
Zhu Yib481de92007-09-25 17:54:57 -07003275
3276 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003277 rc = iwl_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003278 if (rc) {
3279 spin_unlock_irqrestore(&priv->lock, flags);
3280 return rc;
3281 }
3282
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003283 /* Stop this Tx queue before configuring it */
Zhu Yib481de92007-09-25 17:54:57 -07003284 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3285
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003286 /* Map receiver-address / traffic-ID to this queue */
Zhu Yib481de92007-09-25 17:54:57 -07003287 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
3288
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003289 /* Set this queue as a chain-building queue */
Tomas Winkler12a81f62008-04-03 16:05:20 -07003290 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07003291
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003292 /* Place first TFD at index corresponding to start sequence number.
3293 * Assumes that ssn_idx is valid (!= 0xFFF) */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003294 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3295 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
Zhu Yib481de92007-09-25 17:54:57 -07003296 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3297
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003298 /* Set up Tx window size and frame limit for this queue */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003299 iwl_write_targ_mem(priv,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003300 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
3301 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
3302 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07003303
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003304 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003305 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
3306 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
3307 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07003308
Tomas Winkler12a81f62008-04-03 16:05:20 -07003309 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07003310
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003311 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
Zhu Yib481de92007-09-25 17:54:57 -07003312 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
3313
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003314 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003315 spin_unlock_irqrestore(&priv->lock, flags);
3316
3317 return 0;
3318}
3319
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003320#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07003321
Zhu Yib481de92007-09-25 17:54:57 -07003322
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003323#ifdef CONFIG_IWL4965_HT
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003324static int iwl4965_rx_agg_start(struct iwl_priv *priv,
3325 const u8 *addr, int tid, u16 ssn)
Zhu Yib481de92007-09-25 17:54:57 -07003326{
3327 unsigned long flags;
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003328 int sta_id;
3329
3330 sta_id = iwl_find_station(priv, addr);
3331 if (sta_id == IWL_INVALID_STATION)
3332 return -ENXIO;
Zhu Yib481de92007-09-25 17:54:57 -07003333
3334 spin_lock_irqsave(&priv->sta_lock, flags);
3335 priv->stations[sta_id].sta.station_flags_msk = 0;
3336 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3337 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
3338 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3339 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3340 spin_unlock_irqrestore(&priv->sta_lock, flags);
3341
Tomas Winkler133636d2008-05-05 10:22:34 +08003342 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003343 CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07003344}
3345
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003346static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
3347 const u8 *addr, int tid)
Zhu Yib481de92007-09-25 17:54:57 -07003348{
3349 unsigned long flags;
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003350 int sta_id;
3351
3352 sta_id = iwl_find_station(priv, addr);
3353 if (sta_id == IWL_INVALID_STATION)
3354 return -ENXIO;
Zhu Yib481de92007-09-25 17:54:57 -07003355
3356 spin_lock_irqsave(&priv->sta_lock, flags);
3357 priv->stations[sta_id].sta.station_flags_msk = 0;
3358 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3359 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
3360 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3361 spin_unlock_irqrestore(&priv->sta_lock, flags);
3362
Tomas Winkler133636d2008-05-05 10:22:34 +08003363 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003364 CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07003365}
3366
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003367/*
3368 * Find first available (lowest unused) Tx Queue, mark it "active".
3369 * Called only when finding queue for aggregation.
3370 * Should never return anything < 7, because they should already
3371 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
3372 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003373static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003374{
3375 int txq_id;
3376
Tomas Winkler5425e492008-04-15 16:01:38 -07003377 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
Zhu Yib481de92007-09-25 17:54:57 -07003378 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
3379 return txq_id;
3380 return -1;
3381}
3382
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003383static int iwl4965_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra,
3384 u16 tid, u16 *start_seq_num)
Zhu Yib481de92007-09-25 17:54:57 -07003385{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003386 struct iwl_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07003387 int sta_id;
3388 int tx_fifo;
3389 int txq_id;
3390 int ssn = -1;
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003391 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003392 unsigned long flags;
Tomas Winkler6def9762008-05-05 10:22:31 +08003393 struct iwl_tid_data *tid_data;
Joe Perches0795af52007-10-03 17:59:30 -07003394 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07003395
3396 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3397 tx_fifo = default_tid_to_tx_fifo[tid];
3398 else
3399 return -EINVAL;
3400
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003401 IWL_WARNING("%s on ra = %s tid = %d\n",
3402 __func__, print_mac(mac, ra), tid);
Zhu Yib481de92007-09-25 17:54:57 -07003403
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003404 sta_id = iwl_find_station(priv, ra);
Zhu Yib481de92007-09-25 17:54:57 -07003405 if (sta_id == IWL_INVALID_STATION)
3406 return -ENXIO;
3407
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003408 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
3409 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
3410 return -ENXIO;
3411 }
3412
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003413 txq_id = iwl4965_txq_ctx_activate_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003414 if (txq_id == -1)
3415 return -ENXIO;
3416
3417 spin_lock_irqsave(&priv->sta_lock, flags);
3418 tid_data = &priv->stations[sta_id].tid[tid];
3419 ssn = SEQ_TO_SN(tid_data->seq_number);
3420 tid_data->agg.txq_id = txq_id;
3421 spin_unlock_irqrestore(&priv->sta_lock, flags);
3422
3423 *start_seq_num = ssn;
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003424 ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
3425 sta_id, tid, ssn);
3426 if (ret)
3427 return ret;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003428
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003429 ret = 0;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003430 if (tid_data->tfds_in_queue == 0) {
3431 printk(KERN_ERR "HW queue is empty\n");
3432 tid_data->agg.state = IWL_AGG_ON;
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003433 ieee80211_start_tx_ba_cb_irqsafe(hw, ra, tid);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003434 } else {
3435 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
3436 tid_data->tfds_in_queue);
3437 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
3438 }
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003439 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07003440}
3441
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003442static int iwl4965_tx_agg_stop(struct ieee80211_hw *hw, const u8 *ra, u16 tid)
Zhu Yib481de92007-09-25 17:54:57 -07003443{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003444 struct iwl_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07003445 int tx_fifo_id, txq_id, sta_id, ssn = -1;
Tomas Winkler6def9762008-05-05 10:22:31 +08003446 struct iwl_tid_data *tid_data;
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003447 int ret, write_ptr, read_ptr;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003448 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07003449 DECLARE_MAC_BUF(mac);
3450
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003451 if (!ra) {
3452 IWL_ERROR("ra = NULL\n");
Zhu Yib481de92007-09-25 17:54:57 -07003453 return -EINVAL;
3454 }
3455
3456 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3457 tx_fifo_id = default_tid_to_tx_fifo[tid];
3458 else
3459 return -EINVAL;
3460
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003461 sta_id = iwl_find_station(priv, ra);
Zhu Yib481de92007-09-25 17:54:57 -07003462
3463 if (sta_id == IWL_INVALID_STATION)
3464 return -ENXIO;
3465
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003466 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
3467 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
3468
Zhu Yib481de92007-09-25 17:54:57 -07003469 tid_data = &priv->stations[sta_id].tid[tid];
3470 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
3471 txq_id = tid_data->agg.txq_id;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003472 write_ptr = priv->txq[txq_id].q.write_ptr;
3473 read_ptr = priv->txq[txq_id].q.read_ptr;
Zhu Yib481de92007-09-25 17:54:57 -07003474
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003475 /* The queue is not empty */
3476 if (write_ptr != read_ptr) {
3477 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
3478 priv->stations[sta_id].tid[tid].agg.state =
3479 IWL_EMPTYING_HW_QUEUE_DELBA;
3480 return 0;
3481 }
3482
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003483 IWL_DEBUG_HT("HW queue is empty\n");
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003484 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
3485
3486 spin_lock_irqsave(&priv->lock, flags);
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003487 ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003488 spin_unlock_irqrestore(&priv->lock, flags);
3489
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003490 if (ret)
3491 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07003492
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003493 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
Zhu Yib481de92007-09-25 17:54:57 -07003494
3495 return 0;
3496}
3497
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003498int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3499 enum ieee80211_ampdu_mlme_action action,
3500 const u8 *addr, u16 tid, u16 *ssn)
3501{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003502 struct iwl_priv *priv = hw->priv;
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003503 DECLARE_MAC_BUF(mac);
3504
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003505 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3506 print_mac(mac, addr), tid);
3507
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003508 switch (action) {
3509 case IEEE80211_AMPDU_RX_START:
3510 IWL_DEBUG_HT("start Rx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003511 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003512 case IEEE80211_AMPDU_RX_STOP:
3513 IWL_DEBUG_HT("stop Rx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003514 return iwl4965_rx_agg_stop(priv, addr, tid);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003515 case IEEE80211_AMPDU_TX_START:
3516 IWL_DEBUG_HT("start Tx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003517 return iwl4965_tx_agg_start(hw, addr, tid, ssn);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003518 case IEEE80211_AMPDU_TX_STOP:
3519 IWL_DEBUG_HT("stop Tx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003520 return iwl4965_tx_agg_stop(hw, addr, tid);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003521 default:
3522 IWL_DEBUG_HT("unknown\n");
3523 return -EINVAL;
3524 break;
3525 }
3526 return 0;
3527}
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003528#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07003529
Tomas Winkler133636d2008-05-05 10:22:34 +08003530
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08003531static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
3532{
3533 switch (cmd_id) {
3534 case REPLY_RXON:
3535 return (u16) sizeof(struct iwl4965_rxon_cmd);
3536 default:
3537 return len;
3538 }
3539}
3540
Tomas Winkler133636d2008-05-05 10:22:34 +08003541static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3542{
3543 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3544 addsta->mode = cmd->mode;
3545 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3546 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3547 addsta->station_flags = cmd->station_flags;
3548 addsta->station_flags_msk = cmd->station_flags_msk;
3549 addsta->tid_disable_tx = cmd->tid_disable_tx;
3550 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3551 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3552 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3553 addsta->reserved1 = __constant_cpu_to_le16(0);
3554 addsta->reserved2 = __constant_cpu_to_le32(0);
3555
3556 return (u16)sizeof(struct iwl4965_addsta_cmd);
3557}
Zhu Yib481de92007-09-25 17:54:57 -07003558/* Set up 4965-specific Rx frame reply handlers */
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07003559static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003560{
3561 /* Legacy Rx frames */
Tomas Winkler857485c2008-03-21 13:53:44 -07003562 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
Zhu Yib481de92007-09-25 17:54:57 -07003563
3564 /* High-throughput (HT) Rx frames */
3565 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
3566 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
3567
3568 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
3569 iwl4965_rx_missed_beacon_notif;
3570
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003571#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -07003572 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003573#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07003574}
3575
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003576void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003577{
3578 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07003579#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Zhu Yib481de92007-09-25 17:54:57 -07003580 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
3581#endif
Zhu Yib481de92007-09-25 17:54:57 -07003582 init_timer(&priv->statistics_periodic);
3583 priv->statistics_periodic.data = (unsigned long)priv;
3584 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
3585}
3586
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003587void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003588{
3589 del_timer_sync(&priv->statistics_periodic);
3590
3591 cancel_delayed_work(&priv->init_alive_start);
3592}
3593
Tomas Winkler3c424c22008-04-15 16:01:42 -07003594
3595static struct iwl_hcmd_ops iwl4965_hcmd = {
Tomas Winkler7e8c5192008-04-15 16:01:43 -07003596 .rxon_assoc = iwl4965_send_rxon_assoc,
Tomas Winkler3c424c22008-04-15 16:01:42 -07003597};
3598
Tomas Winkler857485c2008-03-21 13:53:44 -07003599static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08003600 .get_hcmd_size = iwl4965_get_hcmd_size,
Tomas Winkler133636d2008-05-05 10:22:34 +08003601 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07003602#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3603 .chain_noise_reset = iwl4965_chain_noise_reset,
3604 .gain_computation = iwl4965_gain_computation,
3605#endif
Tomas Winkler857485c2008-03-21 13:53:44 -07003606};
3607
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003608static struct iwl_lib_ops iwl4965_lib = {
Tomas Winkler5425e492008-04-15 16:01:38 -07003609 .set_hw_params = iwl4965_hw_set_hw_params,
Ron Rindjunsky399f4902008-04-23 17:14:56 -07003610 .alloc_shared_mem = iwl4965_alloc_shared_mem,
3611 .free_shared_mem = iwl4965_free_shared_mem,
Ron Rindjunskyd67f5482008-05-05 10:22:49 +08003612 .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
Tomas Winklere2a722e2008-04-14 21:16:10 -07003613 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +08003614 .disable_tx_fifo = iwl4965_disable_tx_fifo,
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07003615 .rx_handler_setup = iwl4965_rx_handler_setup,
Tomas Winkler57aab752008-04-14 21:16:03 -07003616 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3617 .alive_notify = iwl4965_alive_notify,
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +08003618 .init_alive_start = iwl4965_init_alive_start,
Tomas Winkler57aab752008-04-14 21:16:03 -07003619 .load_ucode = iwl4965_load_bsm,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07003620 .apm_ops = {
Tomas Winkler91238712008-04-23 17:14:53 -07003621 .init = iwl4965_apm_init,
Tomas Winkler694cc562008-04-24 11:55:22 -07003622 .config = iwl4965_nic_config,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07003623 .set_pwr_src = iwl4965_set_pwr_src,
3624 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003625 .eeprom_ops = {
Tomas Winkler073d3f52008-04-21 15:41:52 -07003626 .regulatory_bands = {
3627 EEPROM_REGULATORY_BAND_1_CHANNELS,
3628 EEPROM_REGULATORY_BAND_2_CHANNELS,
3629 EEPROM_REGULATORY_BAND_3_CHANNELS,
3630 EEPROM_REGULATORY_BAND_4_CHANNELS,
3631 EEPROM_REGULATORY_BAND_5_CHANNELS,
3632 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3633 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3634 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003635 .verify_signature = iwlcore_eeprom_verify_signature,
3636 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3637 .release_semaphore = iwlcore_eeprom_release_semaphore,
Tomas Winkler8614f362008-04-23 17:14:55 -07003638 .check_version = iwl4965_eeprom_check_version,
Tomas Winkler073d3f52008-04-21 15:41:52 -07003639 .query_addr = iwlcore_eeprom_query_addr,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003640 },
Mohamed Abbasad97edd2008-03-28 16:21:06 -07003641 .radio_kill_sw = iwl4965_radio_kill_sw,
Mohamed Abbas5da4b552008-04-21 15:41:51 -07003642 .set_power = iwl4965_set_power,
3643 .update_chain_flags = iwl4965_update_chain_flags,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003644};
3645
3646static struct iwl_ops iwl4965_ops = {
3647 .lib = &iwl4965_lib,
Tomas Winkler3c424c22008-04-15 16:01:42 -07003648 .hcmd = &iwl4965_hcmd,
Tomas Winkler857485c2008-03-21 13:53:44 -07003649 .utils = &iwl4965_hcmd_utils,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003650};
3651
Ron Rindjunskyfed90172008-04-15 16:01:41 -07003652struct iwl_cfg iwl4965_agn_cfg = {
Tomas Winkler82b9a122008-03-04 18:09:30 -08003653 .name = "4965AGN",
Tomas Winkler4bf775c2008-03-04 18:09:31 -08003654 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
Tomas Winkler82b9a122008-03-04 18:09:30 -08003655 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
Tomas Winkler073d3f52008-04-21 15:41:52 -07003656 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003657 .ops = &iwl4965_ops,
Assaf Krauss1ea87392008-03-18 14:57:50 -07003658 .mod_params = &iwl4965_mod_params,
Tomas Winkler82b9a122008-03-04 18:09:30 -08003659};
3660
Assaf Krauss1ea87392008-03-18 14:57:50 -07003661module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3662MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3663module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3664MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Emmanuel Grumbachfcc76c62008-04-15 16:01:47 -07003665module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3666MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
Assaf Krauss1ea87392008-03-18 14:57:50 -07003667module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3668MODULE_PARM_DESC(debug, "debug output mask");
3669module_param_named(
3670 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3671MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3672
3673module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3674MODULE_PARM_DESC(queues_num, "number of hw queues.");
3675
3676/* QoS */
3677module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3678MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3679module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3680MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
Ester Kummer3a1081e2008-05-06 11:05:14 +08003681module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
3682MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");