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Alexander Grafc8621252009-10-30 05:47:09 +00001/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20#include <asm/ppc_asm.h>
21#include <asm/kvm_asm.h>
22#include <asm/reg.h>
23#include <asm/page.h>
24#include <asm/asm-offsets.h>
Alexander Graf8c3a4e02010-04-16 00:11:46 +020025
26#ifdef CONFIG_PPC_BOOK3S_64
Alexander Grafc8621252009-10-30 05:47:09 +000027#include <asm/exception-64s.h>
Alexander Graf8c3a4e02010-04-16 00:11:46 +020028#endif
Alexander Grafc8621252009-10-30 05:47:09 +000029
30/*****************************************************************************
31 * *
32 * Real Mode handlers that need to be in low physical memory *
33 * *
34 ****************************************************************************/
35
Alexander Graf8c3a4e02010-04-16 00:11:46 +020036#if defined(CONFIG_PPC_BOOK3S_64)
37
Benjamin Herrenschmidt2dd60d72011-01-20 17:50:21 +110038#define LOAD_SHADOW_VCPU(reg) GET_PACA(reg)
Alexander Graf8c3a4e02010-04-16 00:11:46 +020039#define SHADOW_VCPU_OFF PACA_KVM_SVCPU
40#define MSR_NOIRQ MSR_KERNEL & ~(MSR_IR | MSR_DR)
41#define FUNC(name) GLUE(.,name)
42
43#elif defined(CONFIG_PPC_BOOK3S_32)
44
45#define LOAD_SHADOW_VCPU(reg) \
46 mfspr reg, SPRN_SPRG_THREAD; \
47 lwz reg, THREAD_KVM_SVCPU(reg); \
48 /* PPC32 can have a NULL pointer - let's check for that */ \
49 mtspr SPRN_SPRG_SCRATCH1, r12; /* Save r12 */ \
50 mfcr r12; \
51 cmpwi reg, 0; \
52 bne 1f; \
53 mfspr reg, SPRN_SPRG_SCRATCH0; \
54 mtcr r12; \
55 mfspr r12, SPRN_SPRG_SCRATCH1; \
56 b kvmppc_resume_\intno; \
571:; \
58 mtcr r12; \
59 mfspr r12, SPRN_SPRG_SCRATCH1; \
60 tophys(reg, reg)
61
62#define SHADOW_VCPU_OFF 0
63#define MSR_NOIRQ MSR_KERNEL
64#define FUNC(name) name
65
66#endif
Alexander Grafc8621252009-10-30 05:47:09 +000067
68.macro INTERRUPT_TRAMPOLINE intno
69
70.global kvmppc_trampoline_\intno
71kvmppc_trampoline_\intno:
72
73 mtspr SPRN_SPRG_SCRATCH0, r13 /* Save r13 */
74
75 /*
76 * First thing to do is to find out if we're coming
77 * from a KVM guest or a Linux process.
78 *
Alexander Graf8c3a4e02010-04-16 00:11:46 +020079 * To distinguish, we check a magic byte in the PACA/current
Alexander Grafc8621252009-10-30 05:47:09 +000080 */
Alexander Graf8c3a4e02010-04-16 00:11:46 +020081 LOAD_SHADOW_VCPU(r13)
82 PPC_STL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
Alexander Grafc8621252009-10-30 05:47:09 +000083 mfcr r12
Alexander Graf8c3a4e02010-04-16 00:11:46 +020084 stw r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
85 lbz r12, (SHADOW_VCPU_OFF + SVCPU_IN_GUEST)(r13)
Alexander Grafb4433a72010-01-08 02:58:04 +010086 cmpwi r12, KVM_GUEST_MODE_NONE
Alexander Grafc8621252009-10-30 05:47:09 +000087 bne ..kvmppc_handler_hasmagic_\intno
88 /* No KVM guest? Then jump back to the Linux handler! */
Alexander Graf8c3a4e02010-04-16 00:11:46 +020089 lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
Alexander Grafc8621252009-10-30 05:47:09 +000090 mtcr r12
Alexander Graf8c3a4e02010-04-16 00:11:46 +020091 PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
Alexander Grafc8621252009-10-30 05:47:09 +000092 mfspr r13, SPRN_SPRG_SCRATCH0 /* r13 = original r13 */
93 b kvmppc_resume_\intno /* Get back original handler */
94
95 /* Now we know we're handling a KVM guest */
96..kvmppc_handler_hasmagic_\intno:
Alexander Grafb4433a72010-01-08 02:58:04 +010097
98 /* Should we just skip the faulting instruction? */
99 cmpwi r12, KVM_GUEST_MODE_SKIP
100 beq kvmppc_handler_skip_ins
101
Alexander Grafc8621252009-10-30 05:47:09 +0000102 /* Let's store which interrupt we're handling */
103 li r12, \intno
104
105 /* Jump into the SLB exit code that goes to the highmem handler */
106 b kvmppc_handler_trampoline_exit
107
108.endm
109
110INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSTEM_RESET
111INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_MACHINE_CHECK
112INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_STORAGE
Alexander Grafc8621252009-10-30 05:47:09 +0000113INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_STORAGE
Alexander Grafc8621252009-10-30 05:47:09 +0000114INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_EXTERNAL
115INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALIGNMENT
116INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PROGRAM
117INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_FP_UNAVAIL
118INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DECREMENTER
119INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_SYSCALL
120INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_TRACE
121INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_PERFMON
122INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALTIVEC
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200123
124/* Those are only available on 64 bit machines */
125
126#ifdef CONFIG_PPC_BOOK3S_64
127INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_DATA_SEGMENT
128INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_INST_SEGMENT
Alexander Grafc8621252009-10-30 05:47:09 +0000129INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_VSX
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200130#endif
Alexander Grafc8621252009-10-30 05:47:09 +0000131
132/*
Alexander Grafb4433a72010-01-08 02:58:04 +0100133 * Bring us back to the faulting code, but skip the
134 * faulting instruction.
135 *
136 * This is a generic exit path from the interrupt
137 * trampolines above.
138 *
139 * Input Registers:
140 *
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200141 * R12 = free
142 * R13 = Shadow VCPU (PACA)
143 * SVCPU.SCRATCH0 = guest R12
144 * SVCPU.SCRATCH1 = guest CR
145 * SPRG_SCRATCH0 = guest R13
Alexander Grafb4433a72010-01-08 02:58:04 +0100146 *
147 */
148kvmppc_handler_skip_ins:
149
150 /* Patch the IP to the next instruction */
151 mfsrr0 r12
152 addi r12, r12, 4
153 mtsrr0 r12
154
155 /* Clean up all state */
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200156 lwz r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
Alexander Grafb4433a72010-01-08 02:58:04 +0100157 mtcr r12
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200158 PPC_LL r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
Alexander Grafb4433a72010-01-08 02:58:04 +0100159 mfspr r13, SPRN_SPRG_SCRATCH0
160
161 /* And get back into the code */
162 RFI
163
164/*
Alexander Grafc8621252009-10-30 05:47:09 +0000165 * This trampoline brings us back to a real mode handler
166 *
167 * Input Registers:
168 *
Alexander Graf7e57cba2010-01-08 02:58:03 +0100169 * R5 = SRR0
170 * R6 = SRR1
Alexander Grafc8621252009-10-30 05:47:09 +0000171 * LR = real-mode IP
172 *
173 */
174.global kvmppc_handler_lowmem_trampoline
175kvmppc_handler_lowmem_trampoline:
176
Alexander Graf7e57cba2010-01-08 02:58:03 +0100177 mtsrr0 r5
178 mtsrr1 r6
Alexander Grafc8621252009-10-30 05:47:09 +0000179 blr
180kvmppc_handler_lowmem_trampoline_end:
181
Alexander Graf021ec9c2010-01-08 02:58:06 +0100182/*
183 * Call a function in real mode
184 *
185 * Input Registers:
186 *
187 * R3 = function
188 * R4 = MSR
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200189 * R5 = scratch register
Alexander Graf021ec9c2010-01-08 02:58:06 +0100190 *
191 */
192_GLOBAL(kvmppc_rmcall)
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200193 LOAD_REG_IMMEDIATE(r5, MSR_NOIRQ)
194 mtmsr r5 /* Disable relocation and interrupts, so mtsrr
Alexander Graf021ec9c2010-01-08 02:58:06 +0100195 doesn't get interrupted */
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200196 sync
Alexander Graf021ec9c2010-01-08 02:58:06 +0100197 mtsrr0 r3
198 mtsrr1 r4
199 RFI
200
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200201#if defined(CONFIG_PPC_BOOK3S_32)
202#define STACK_LR INT_FRAME_SIZE+4
Alexander Graf0e677902010-07-29 15:04:20 +0200203
204/* load_up_xxx have to run with MSR_DR=0 on Book3S_32 */
205#define MSR_EXT_START \
206 PPC_STL r20, _NIP(r1); \
207 mfmsr r20; \
208 LOAD_REG_IMMEDIATE(r3, MSR_DR|MSR_EE); \
209 andc r3,r20,r3; /* Disable DR,EE */ \
210 mtmsr r3; \
211 sync
212
213#define MSR_EXT_END \
214 mtmsr r20; /* Enable DR,EE */ \
215 sync; \
216 PPC_LL r20, _NIP(r1)
217
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200218#elif defined(CONFIG_PPC_BOOK3S_64)
219#define STACK_LR _LINK
Alexander Graf0e677902010-07-29 15:04:20 +0200220#define MSR_EXT_START
221#define MSR_EXT_END
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200222#endif
223
Alexander Grafd5e52812010-01-15 14:49:10 +0100224/*
225 * Activate current's external feature (FPU/Altivec/VSX)
226 */
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200227#define define_load_up(what) \
228 \
229_GLOBAL(kvmppc_load_up_ ## what); \
230 PPC_STLU r1, -INT_FRAME_SIZE(r1); \
231 mflr r3; \
232 PPC_STL r3, STACK_LR(r1); \
Alexander Graf0e677902010-07-29 15:04:20 +0200233 MSR_EXT_START; \
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200234 \
235 bl FUNC(load_up_ ## what); \
236 \
Alexander Graf0e677902010-07-29 15:04:20 +0200237 MSR_EXT_END; \
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200238 PPC_LL r3, STACK_LR(r1); \
Alexander Graf8c3a4e02010-04-16 00:11:46 +0200239 mtlr r3; \
240 addi r1, r1, INT_FRAME_SIZE; \
Alexander Grafd5e52812010-01-15 14:49:10 +0100241 blr
242
243define_load_up(fpu)
244#ifdef CONFIG_ALTIVEC
245define_load_up(altivec)
246#endif
247#ifdef CONFIG_VSX
248define_load_up(vsx)
249#endif
250
Alexander Grafc8621252009-10-30 05:47:09 +0000251.global kvmppc_trampoline_lowmem
252kvmppc_trampoline_lowmem:
Alexander Graf2b05d712010-07-29 15:04:21 +0200253 PPC_LONG kvmppc_handler_lowmem_trampoline - CONFIG_KERNEL_START
Alexander Grafc8621252009-10-30 05:47:09 +0000254
255.global kvmppc_trampoline_enter
256kvmppc_trampoline_enter:
Alexander Graf2b05d712010-07-29 15:04:21 +0200257 PPC_LONG kvmppc_handler_trampoline_enter - CONFIG_KERNEL_START
Alexander Grafc8621252009-10-30 05:47:09 +0000258
Alexander Graf53e5b8b2010-04-16 00:11:48 +0200259#include "book3s_segment.S"