| Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1 | /* |
| Uwe Zeisberger | f30c226 | 2006-10-03 23:01:26 +0200 | [diff] [blame] | 2 | * linux/arch/arm/plat-omap/sram-fn.S |
| Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 3 | * |
| 4 | * Functions that need to be run in internal SRAM |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 11 | #include <linux/linkage.h> |
| Tony Lindgren | 2e3ee9f | 2012-02-24 10:34:34 -0800 | [diff] [blame^] | 12 | |
| Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 13 | #include <asm/assembler.h> |
| Tony Lindgren | 2e3ee9f | 2012-02-24 10:34:34 -0800 | [diff] [blame^] | 14 | |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 15 | #include <mach/io.h> |
| 16 | #include <mach/hardware.h> |
| Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 17 | |
| Tony Lindgren | 2e3ee9f | 2012-02-24 10:34:34 -0800 | [diff] [blame^] | 18 | #include "iomap.h" |
| 19 | |
| Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 20 | .text |
| 21 | |
| 22 | /* |
| 23 | * Reprograms ULPD and CKCTL. |
| 24 | */ |
| Jean Pihet | b6338bd | 2011-02-02 16:38:06 +0100 | [diff] [blame] | 25 | .align 3 |
| Tony Lindgren | c2d43e3 | 2008-07-03 12:24:38 +0300 | [diff] [blame] | 26 | ENTRY(omap1_sram_reprogram_clock) |
| Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 27 | stmfd sp!, {r0 - r12, lr} @ save registers on stack |
| 28 | |
| Tony Lindgren | 9411326 | 2009-08-28 10:50:33 -0700 | [diff] [blame] | 29 | mov r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000 |
| 30 | orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000 |
| 31 | orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00 |
| Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 32 | |
| Tony Lindgren | 9411326 | 2009-08-28 10:50:33 -0700 | [diff] [blame] | 33 | mov r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000 |
| 34 | orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 |
| 35 | orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 |
| Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 36 | |
| 37 | tst r0, #1 << 4 @ want lock mode? |
| 38 | beq newck @ nope |
| 39 | bic r0, r0, #1 << 4 @ else clear lock bit |
| 40 | strh r0, [r2] @ set dpll into bypass mode |
| 41 | orr r0, r0, #1 << 4 @ set lock bit again |
| 42 | |
| 43 | newck: |
| 44 | strh r1, [r3] @ write new ckctl value |
| 45 | strh r0, [r2] @ write new dpll value |
| 46 | |
| 47 | mov r4, #0x0700 @ let the clocks settle |
| 48 | orr r4, r4, #0x00ff |
| 49 | delay: sub r4, r4, #1 |
| 50 | cmp r4, #0 |
| 51 | bne delay |
| 52 | |
| 53 | lock: ldrh r4, [r2], #0 @ read back dpll value |
| 54 | tst r0, #1 << 4 @ want lock mode? |
| 55 | beq out @ nope |
| 56 | tst r4, #1 << 0 @ dpll rate locked? |
| 57 | beq lock @ try again |
| 58 | |
| 59 | out: |
| 60 | ldmfd sp!, {r0 - r12, pc} @ restore regs and return |
| Tony Lindgren | c2d43e3 | 2008-07-03 12:24:38 +0300 | [diff] [blame] | 61 | ENTRY(omap1_sram_reprogram_clock_sz) |
| 62 | .word . - omap1_sram_reprogram_clock |