| Russell King | 420c34e | 2011-01-18 20:08:06 +0000 | [diff] [blame] | 1 | if PLAT_VERSATILE |
| 2 | |
| 3 | config PLAT_VERSATILE_CLCD |
| 4 | bool |
| 5 | |
| Russell King | c41b16f | 2011-01-19 15:32:15 +0000 | [diff] [blame] | 6 | config PLAT_VERSATILE_FPGA_IRQ |
| 7 | bool |
| Linus Walleij | 3108e6a | 2012-04-28 14:33:47 +0100 | [diff] [blame^] | 8 | select IRQ_DOMAIN |
| 9 | |
| 10 | config PLAT_VERSATILE_FPGA_IRQ_NR |
| 11 | int |
| 12 | default 4 |
| 13 | depends on PLAT_VERSATILE_FPGA_IRQ |
| Russell King | c41b16f | 2011-01-19 15:32:15 +0000 | [diff] [blame] | 14 | |
| Russell King | dc37c31 | 2011-01-18 20:26:08 +0000 | [diff] [blame] | 15 | config PLAT_VERSATILE_LEDS |
| 16 | def_bool y if LEDS_CLASS |
| 17 | depends on ARCH_REALVIEW || ARCH_VERSATILE |
| 18 | |
| 19 | config PLAT_VERSATILE_SCHED_CLOCK |
| Linus Walleij | a9d6d15 | 2012-01-31 23:38:23 +0100 | [diff] [blame] | 20 | def_bool y |
| Russell King | dc37c31 | 2011-01-18 20:26:08 +0000 | [diff] [blame] | 21 | |
| Russell King | 420c34e | 2011-01-18 20:08:06 +0000 | [diff] [blame] | 22 | endif |