blob: 64f7d5dfc106ac7b39e37842c5eca9a898dbbb06 [file] [log] [blame]
Ian Molton4a489982008-07-15 16:02:21 +01001/* Definitons for use with the tmio_mmc.c
2 *
3 * (c) 2004 Ian Molton <spyro@f2s.com>
4 * (c) 2007 Ian Molton <spyro@f2s.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
Alexander Beregalov4cb32902009-03-14 12:37:47 +030011
12#include <linux/highmem.h>
Guennadi Liakhovetski311f3ac2010-05-19 18:34:22 +000013#include <linux/interrupt.h>
14#include <linux/dmaengine.h>
Alexander Beregalov4cb32902009-03-14 12:37:47 +030015
Ian Molton4a489982008-07-15 16:02:21 +010016#define CTL_SD_CMD 0x00
17#define CTL_ARG_REG 0x04
18#define CTL_STOP_INTERNAL_ACTION 0x08
19#define CTL_XFER_BLK_COUNT 0xa
20#define CTL_RESPONSE 0x0c
21#define CTL_STATUS 0x1c
22#define CTL_IRQ_MASK 0x20
23#define CTL_SD_CARD_CLK_CTL 0x24
24#define CTL_SD_XFER_LEN 0x26
25#define CTL_SD_MEM_CARD_OPT 0x28
26#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
27#define CTL_SD_DATA_PORT 0x30
28#define CTL_TRANSACTION_CTL 0x34
29#define CTL_RESET_SD 0xe0
30#define CTL_SDIO_REGS 0x100
31#define CTL_CLK_AND_WAIT_CTL 0x138
32#define CTL_RESET_SDIO 0x1e0
33
34/* Definitions for values the CTRL_STATUS register can take. */
35#define TMIO_STAT_CMDRESPEND 0x00000001
36#define TMIO_STAT_DATAEND 0x00000004
37#define TMIO_STAT_CARD_REMOVE 0x00000008
38#define TMIO_STAT_CARD_INSERT 0x00000010
39#define TMIO_STAT_SIGSTATE 0x00000020
40#define TMIO_STAT_WRPROTECT 0x00000080
41#define TMIO_STAT_CARD_REMOVE_A 0x00000100
42#define TMIO_STAT_CARD_INSERT_A 0x00000200
43#define TMIO_STAT_SIGSTATE_A 0x00000400
44#define TMIO_STAT_CMD_IDX_ERR 0x00010000
45#define TMIO_STAT_CRCFAIL 0x00020000
46#define TMIO_STAT_STOPBIT_ERR 0x00040000
47#define TMIO_STAT_DATATIMEOUT 0x00080000
48#define TMIO_STAT_RXOVERFLOW 0x00100000
49#define TMIO_STAT_TXUNDERRUN 0x00200000
50#define TMIO_STAT_CMDTIMEOUT 0x00400000
51#define TMIO_STAT_RXRDY 0x01000000
52#define TMIO_STAT_TXRQ 0x02000000
53#define TMIO_STAT_ILL_FUNC 0x20000000
54#define TMIO_STAT_CMD_BUSY 0x40000000
55#define TMIO_STAT_ILL_ACCESS 0x80000000
56
57/* Define some IRQ masks */
58/* This is the mask used at reset by the chip */
59#define TMIO_MASK_ALL 0x837f031d
Guennadi Liakhovetskia8c39d82010-02-17 16:37:45 +090060#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
61#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
Ian Molton4a489982008-07-15 16:02:21 +010062#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
63 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
64#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
65
Philipp Zabel5e746722009-06-04 20:12:32 +020066
67#define enable_mmc_irqs(host, i) \
Ian Molton4a489982008-07-15 16:02:21 +010068 do { \
69 u32 mask;\
Philipp Zabel5e746722009-06-04 20:12:32 +020070 mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
Ian Molton4a489982008-07-15 16:02:21 +010071 mask &= ~((i) & TMIO_MASK_IRQ); \
Philipp Zabel5e746722009-06-04 20:12:32 +020072 sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
Ian Molton4a489982008-07-15 16:02:21 +010073 } while (0)
74
Philipp Zabel5e746722009-06-04 20:12:32 +020075#define disable_mmc_irqs(host, i) \
Ian Molton4a489982008-07-15 16:02:21 +010076 do { \
77 u32 mask;\
Philipp Zabel5e746722009-06-04 20:12:32 +020078 mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \
Ian Molton4a489982008-07-15 16:02:21 +010079 mask |= ((i) & TMIO_MASK_IRQ); \
Philipp Zabel5e746722009-06-04 20:12:32 +020080 sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \
Ian Molton4a489982008-07-15 16:02:21 +010081 } while (0)
82
Philipp Zabel5e746722009-06-04 20:12:32 +020083#define ack_mmc_irqs(host, i) \
Ian Molton4a489982008-07-15 16:02:21 +010084 do { \
85 u32 mask;\
Philipp Zabel5e746722009-06-04 20:12:32 +020086 mask = sd_ctrl_read32((host), CTL_STATUS); \
Ian Molton4a489982008-07-15 16:02:21 +010087 mask &= ~((i) & TMIO_MASK_IRQ); \
Philipp Zabel5e746722009-06-04 20:12:32 +020088 sd_ctrl_write32((host), CTL_STATUS, mask); \
Ian Molton4a489982008-07-15 16:02:21 +010089 } while (0)
90
91
92struct tmio_mmc_host {
Ian Molton4a489982008-07-15 16:02:21 +010093 void __iomem *ctl;
Philipp Zabel5e746722009-06-04 20:12:32 +020094 unsigned long bus_shift;
Ian Molton4a489982008-07-15 16:02:21 +010095 struct mmc_command *cmd;
96 struct mmc_request *mrq;
97 struct mmc_data *data;
98 struct mmc_host *mmc;
99 int irq;
100
Ian Molton64e88672010-01-06 13:51:48 +0100101 /* Callbacks for clock / power control */
102 void (*set_pwr)(struct platform_device *host, int state);
103 void (*set_clk_div)(struct platform_device *host, int state);
104
Ian Molton4a489982008-07-15 16:02:21 +0100105 /* pio related stuff */
106 struct scatterlist *sg_ptr;
107 unsigned int sg_len;
108 unsigned int sg_off;
Ian Molton64e88672010-01-06 13:51:48 +0100109
110 struct platform_device *pdev;
Guennadi Liakhovetski311f3ac2010-05-19 18:34:22 +0000111
112 /* DMA support */
113 struct dma_chan *chan_rx;
114 struct dma_chan *chan_tx;
115 struct tasklet_struct dma_complete;
116 struct tasklet_struct dma_issue;
117#ifdef CONFIG_TMIO_MMC_DMA
118 struct dma_async_tx_descriptor *desc;
119 unsigned int dma_sglen;
120 dma_cookie_t cookie;
121#endif
Ian Molton4a489982008-07-15 16:02:21 +0100122};
123
Philipp Zabel5e746722009-06-04 20:12:32 +0200124#include <linux/io.h>
125
126static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
127{
128 return readw(host->ctl + (addr << host->bus_shift));
129}
130
131static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
132 u16 *buf, int count)
133{
134 readsw(host->ctl + (addr << host->bus_shift), buf, count);
135}
136
137static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr)
138{
139 return readw(host->ctl + (addr << host->bus_shift)) |
140 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
141}
142
143static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
144 u16 val)
145{
146 writew(val, host->ctl + (addr << host->bus_shift));
147}
148
149static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
150 u16 *buf, int count)
151{
152 writesw(host->ctl + (addr << host->bus_shift), buf, count);
153}
154
155static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr,
156 u32 val)
157{
158 writew(val, host->ctl + (addr << host->bus_shift));
159 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
160}
161
Ian Molton4a489982008-07-15 16:02:21 +0100162#include <linux/scatterlist.h>
163#include <linux/blkdev.h>
164
165static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host,
166 struct mmc_data *data)
167{
168 host->sg_len = data->sg_len;
169 host->sg_ptr = data->sg;
170 host->sg_off = 0;
171}
172
173static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host)
174{
175 host->sg_ptr = sg_next(host->sg_ptr);
176 host->sg_off = 0;
177 return --host->sg_len;
178}
179
180static inline char *tmio_mmc_kmap_atomic(struct tmio_mmc_host *host,
181 unsigned long *flags)
182{
183 struct scatterlist *sg = host->sg_ptr;
184
185 local_irq_save(*flags);
186 return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
187}
188
189static inline void tmio_mmc_kunmap_atomic(struct tmio_mmc_host *host,
190 unsigned long *flags)
191{
192 kunmap_atomic(sg_page(host->sg_ptr), KM_BIO_SRC_IRQ);
193 local_irq_restore(*flags);
194}
195
196#ifdef CONFIG_MMC_DEBUG
197
198#define STATUS_TO_TEXT(a) \
199 do { \
200 if (status & TMIO_STAT_##a) \
Dmitry Baryshkovfe246eb2008-09-03 19:33:30 +0400201 printk(#a); \
Ian Molton4a489982008-07-15 16:02:21 +0100202 } while (0)
203
Dmitry Baryshkovfe246eb2008-09-03 19:33:30 +0400204void pr_debug_status(u32 status)
Ian Molton4a489982008-07-15 16:02:21 +0100205{
206 printk(KERN_DEBUG "status: %08x = ", status);
207 STATUS_TO_TEXT(CARD_REMOVE);
208 STATUS_TO_TEXT(CARD_INSERT);
209 STATUS_TO_TEXT(SIGSTATE);
210 STATUS_TO_TEXT(WRPROTECT);
211 STATUS_TO_TEXT(CARD_REMOVE_A);
212 STATUS_TO_TEXT(CARD_INSERT_A);
213 STATUS_TO_TEXT(SIGSTATE_A);
214 STATUS_TO_TEXT(CMD_IDX_ERR);
215 STATUS_TO_TEXT(STOPBIT_ERR);
216 STATUS_TO_TEXT(ILL_FUNC);
217 STATUS_TO_TEXT(CMD_BUSY);
218 STATUS_TO_TEXT(CMDRESPEND);
219 STATUS_TO_TEXT(DATAEND);
220 STATUS_TO_TEXT(CRCFAIL);
221 STATUS_TO_TEXT(DATATIMEOUT);
222 STATUS_TO_TEXT(CMDTIMEOUT);
223 STATUS_TO_TEXT(RXOVERFLOW);
224 STATUS_TO_TEXT(TXUNDERRUN);
225 STATUS_TO_TEXT(RXRDY);
226 STATUS_TO_TEXT(TXRQ);
227 STATUS_TO_TEXT(ILL_ACCESS);
228 printk("\n");
229}
230
231#else
232#define pr_debug_status(s) do { } while (0)
233#endif