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review.evervolv.com / android_kernel_oneplus_msm8996 / 314ef6859750b6539eac48d78059bb7986f29cb1 / . / include / asm-sparc64 / ttable.h
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Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/* $Id: ttable.h,v 1.18 2002/02/09 19:49:32 davem Exp $ */
2#ifndef _SPARC64_TTABLE_H
3#define _SPARC64_TTABLE_H
4
5#include <linux/config.h>
6#include <asm/utrap.h>
7
8#ifdef __ASSEMBLY__
9#include <asm/thread_info.h>
10#endif
11
12#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
13
14/* We need a "cleaned" instruction... */
15#define CLEAN_WINDOW \
16 rdpr %cleanwin, %l0; add %l0, 1, %l0; \
17 wrpr %l0, 0x0, %cleanwin; \
18 clr %o0; clr %o1; clr %o2; clr %o3; \
19 clr %o4; clr %o5; clr %o6; clr %o7; \
20 clr %l0; clr %l1; clr %l2; clr %l3; \
21 clr %l4; clr %l5; clr %l6; clr %l7; \
22 retry; \
23 nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
24
25#define TRAP(routine) \
26 sethi %hi(109f), %g7; \
27 ba,pt %xcc, etrap; \
28109: or %g7, %lo(109b), %g7; \
29 call routine; \
30 add %sp, PTREGS_OFF, %o0; \
31 ba,pt %xcc, rtrap; \
32 clr %l6; \
33 nop;
34
35#define TRAP_7INSNS(routine) \
36 sethi %hi(109f), %g7; \
37 ba,pt %xcc, etrap; \
38109: or %g7, %lo(109b), %g7; \
39 call routine; \
40 add %sp, PTREGS_OFF, %o0; \
41 ba,pt %xcc, rtrap; \
42 clr %l6;
43
44#define TRAP_SAVEFPU(routine) \
45 sethi %hi(109f), %g7; \
46 ba,pt %xcc, do_fptrap; \
47109: or %g7, %lo(109b), %g7; \
48 call routine; \
49 add %sp, PTREGS_OFF, %o0; \
50 ba,pt %xcc, rtrap; \
51 clr %l6; \
52 nop;
53
54#define TRAP_NOSAVE(routine) \
55 ba,pt %xcc, routine; \
56 nop; \
57 nop; nop; nop; nop; nop; nop;
58
59#define TRAP_NOSAVE_7INSNS(routine) \
60 ba,pt %xcc, routine; \
61 nop; \
62 nop; nop; nop; nop; nop;
63
64#define TRAPTL1(routine) \
65 sethi %hi(109f), %g7; \
66 ba,pt %xcc, etraptl1; \
67109: or %g7, %lo(109b), %g7; \
68 call routine; \
69 add %sp, PTREGS_OFF, %o0; \
70 ba,pt %xcc, rtrap; \
71 clr %l6; \
72 nop;
73
74#define TRAP_ARG(routine, arg) \
75 sethi %hi(109f), %g7; \
76 ba,pt %xcc, etrap; \
77109: or %g7, %lo(109b), %g7; \
78 add %sp, PTREGS_OFF, %o0; \
79 call routine; \
80 mov arg, %o1; \
81 ba,pt %xcc, rtrap; \
82 clr %l6;
83
84#define TRAPTL1_ARG(routine, arg) \
85 sethi %hi(109f), %g7; \
86 ba,pt %xcc, etraptl1; \
87109: or %g7, %lo(109b), %g7; \
88 add %sp, PTREGS_OFF, %o0; \
89 call routine; \
90 mov arg, %o1; \
91 ba,pt %xcc, rtrap; \
92 clr %l6;
93
94#define SYSCALL_TRAP(routine, systbl) \
95 sethi %hi(109f), %g7; \
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame^]96 ba,pt %xcc, etrap; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]97109: or %g7, %lo(109b), %g7; \
98 sethi %hi(systbl), %l7; \
99 ba,pt %xcc, routine; \
100 or %l7, %lo(systbl), %l7; \
101 nop; nop;
102
103#define INDIRECT_SOLARIS_SYSCALL(num) \
104 sethi %hi(109f), %g7; \
105 ba,pt %xcc, etrap; \
106109: or %g7, %lo(109b), %g7; \
107 ba,pt %xcc, tl0_solaris + 0xc; \
108 mov num, %g1; \
109 nop;nop;nop;
110
111#define TRAP_UTRAP(handler,lvl) \
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]112 mov handler, %g3; \
113 ba,pt %xcc, utrap_trap; \
114 mov lvl, %g4; \
115 nop; \
116 nop; \
117 nop; \
118 nop; \
119 nop;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]120
121#ifdef CONFIG_SUNOS_EMUL
122#define SUNOS_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sunos_sys_table)
123#else
124#define SUNOS_SYSCALL_TRAP TRAP(sunos_syscall)
125#endif
126#ifdef CONFIG_COMPAT
127#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
128#else
129#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
130#endif
131#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
132#define GETCC_TRAP TRAP(getcc)
133#define SETCC_TRAP TRAP(setcc)
134#ifdef CONFIG_SOLARIS_EMUL
135#define SOLARIS_SYSCALL_TRAP TRAP(solaris_sparc_syscall)
136#else
137#define SOLARIS_SYSCALL_TRAP TRAP(solaris_syscall)
138#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]139#define BREAKPOINT_TRAP TRAP(breakpoint_trap)
140
141#define TRAP_IRQ(routine, level) \
142 rdpr %pil, %g2; \
143 wrpr %g0, 15, %pil; \
144 b,pt %xcc, etrap_irq; \
145 rd %pc, %g7; \
146 mov level, %o0; \
147 call routine; \
148 add %sp, PTREGS_OFF, %o1; \
149 ba,a,pt %xcc, rtrap_irq;
150
151#define TICK_SMP_IRQ \
152 rdpr %pil, %g2; \
153 wrpr %g0, 15, %pil; \
154 sethi %hi(109f), %g7; \
155 b,pt %xcc, etrap_irq; \
156109: or %g7, %lo(109b), %g7; \
157 call smp_percpu_timer_interrupt; \
158 add %sp, PTREGS_OFF, %o0; \
159 ba,a,pt %xcc, rtrap_irq;
160
161#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
162
163#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
164
165#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
166
167#define FLUSH_WINDOW_TRAP \
168 ba,pt %xcc, etrap; \
169 rd %pc, %g7; \
170 flushw; \
171 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
172 add %l1, 4, %l2; \
173 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
174 ba,pt %xcc, rtrap_clr_l6; \
175 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
176
177#ifdef CONFIG_KPROBES
178#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
179#else
180#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
181#endif
182
183/* Before touching these macros, you owe it to yourself to go and
184 * see how arch/sparc64/kernel/winfixup.S works... -DaveM
185 *
186 * For the user cases we used to use the %asi register, but
187 * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
188 * now we use immediate ASI loads and stores instead. Kudos
189 * to Greg Onufer for pointing out this performance anomaly.
190 *
191 * Further note that we cannot use the g2, g4, g5, and g7 alternate
192 * globals in the spill routines, check out the save instruction in
193 * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
194 * g4/g5 are the globals which are preserved by etrap processing
195 * for the caller of it. The g7 register is the return pc for
196 * etrap. Finally, g6 is the current thread register so we cannot
197 * us it in the spill handlers either. Most of these rules do not
198 * apply to fill processing, only g6 is not usable.
199 */
200
201/* Normal kernel spill */
202#define SPILL_0_NORMAL \
203 stx %l0, [%sp + STACK_BIAS + 0x00]; \
204 stx %l1, [%sp + STACK_BIAS + 0x08]; \
205 stx %l2, [%sp + STACK_BIAS + 0x10]; \
206 stx %l3, [%sp + STACK_BIAS + 0x18]; \
207 stx %l4, [%sp + STACK_BIAS + 0x20]; \
208 stx %l5, [%sp + STACK_BIAS + 0x28]; \
209 stx %l6, [%sp + STACK_BIAS + 0x30]; \
210 stx %l7, [%sp + STACK_BIAS + 0x38]; \
211 stx %i0, [%sp + STACK_BIAS + 0x40]; \
212 stx %i1, [%sp + STACK_BIAS + 0x48]; \
213 stx %i2, [%sp + STACK_BIAS + 0x50]; \
214 stx %i3, [%sp + STACK_BIAS + 0x58]; \
215 stx %i4, [%sp + STACK_BIAS + 0x60]; \
216 stx %i5, [%sp + STACK_BIAS + 0x68]; \
217 stx %i6, [%sp + STACK_BIAS + 0x70]; \
218 stx %i7, [%sp + STACK_BIAS + 0x78]; \
219 saved; retry; nop; nop; nop; nop; nop; nop; \
220 nop; nop; nop; nop; nop; nop; nop; nop;
221
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame^]222#define SPILL_0_NORMAL_ETRAP \
223etrap_kernel_spill: \
224 stx %l0, [%sp + STACK_BIAS + 0x00]; \
225 stx %l1, [%sp + STACK_BIAS + 0x08]; \
226 stx %l2, [%sp + STACK_BIAS + 0x10]; \
227 stx %l3, [%sp + STACK_BIAS + 0x18]; \
228 stx %l4, [%sp + STACK_BIAS + 0x20]; \
229 stx %l5, [%sp + STACK_BIAS + 0x28]; \
230 stx %l6, [%sp + STACK_BIAS + 0x30]; \
231 stx %l7, [%sp + STACK_BIAS + 0x38]; \
232 stx %i0, [%sp + STACK_BIAS + 0x40]; \
233 stx %i1, [%sp + STACK_BIAS + 0x48]; \
234 stx %i2, [%sp + STACK_BIAS + 0x50]; \
235 stx %i3, [%sp + STACK_BIAS + 0x58]; \
236 stx %i4, [%sp + STACK_BIAS + 0x60]; \
237 stx %i5, [%sp + STACK_BIAS + 0x68]; \
238 stx %i6, [%sp + STACK_BIAS + 0x70]; \
239 stx %i7, [%sp + STACK_BIAS + 0x78]; \
240 saved; \
241 sub %g1, 2, %g1; \
242 ba,pt %xcc, etrap_save; \
243 wrpr %g1, %cwp; \
244 nop; nop; nop; nop; nop; nop; nop; nop; \
245 nop; nop; nop; nop;
246
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]247/* Normal 64bit spill */
248#define SPILL_1_GENERIC(ASI) \
249 add %sp, STACK_BIAS + 0x00, %g1; \
250 stxa %l0, [%g1 + %g0] ASI; \
251 mov 0x08, %g3; \
252 stxa %l1, [%g1 + %g3] ASI; \
253 add %g1, 0x10, %g1; \
254 stxa %l2, [%g1 + %g0] ASI; \
255 stxa %l3, [%g1 + %g3] ASI; \
256 add %g1, 0x10, %g1; \
257 stxa %l4, [%g1 + %g0] ASI; \
258 stxa %l5, [%g1 + %g3] ASI; \
259 add %g1, 0x10, %g1; \
260 stxa %l6, [%g1 + %g0] ASI; \
261 stxa %l7, [%g1 + %g3] ASI; \
262 add %g1, 0x10, %g1; \
263 stxa %i0, [%g1 + %g0] ASI; \
264 stxa %i1, [%g1 + %g3] ASI; \
265 add %g1, 0x10, %g1; \
266 stxa %i2, [%g1 + %g0] ASI; \
267 stxa %i3, [%g1 + %g3] ASI; \
268 add %g1, 0x10, %g1; \
269 stxa %i4, [%g1 + %g0] ASI; \
270 stxa %i5, [%g1 + %g3] ASI; \
271 add %g1, 0x10, %g1; \
272 stxa %i6, [%g1 + %g0] ASI; \
273 stxa %i7, [%g1 + %g3] ASI; \
274 saved; \
275 retry; nop; nop; \
276 b,a,pt %xcc, spill_fixup_dax; \
277 b,a,pt %xcc, spill_fixup_mna; \
278 b,a,pt %xcc, spill_fixup;
279
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame^]280#define SPILL_1_GENERIC_ETRAP \
281etrap_user_spill_64bit: \
282 stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \
283 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
284 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
285 stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \
286 stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \
287 stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \
288 stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \
289 stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \
290 stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \
291 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
292 stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \
293 stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \
294 stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \
295 stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \
296 stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \
297 stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \
298 saved; \
299 sub %g1, 2, %g1; \
300 ba,pt %xcc, etrap_save; \
301 wrpr %g1, %cwp; \
302 nop; nop; nop; nop; nop; \
303 nop; nop; nop; nop; \
304 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
305 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
306 ba,a,pt %xcc, etrap_spill_fixup_64bit;
307
308#define SPILL_1_GENERIC_ETRAP_FIXUP \
309etrap_spill_fixup_64bit: \
310 ldub [%g6 + TI_WSAVED], %g1; \
311 sll %g1, 3, %g3; \
312 add %g6, %g3, %g3; \
313 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
314 sll %g1, 7, %g3; \
315 add %g6, %g3, %g3; \
316 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
317 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
318 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
319 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \
320 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \
321 stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \
322 stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \
323 stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \
324 stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \
325 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
326 stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \
327 stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \
328 stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \
329 stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \
330 stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \
331 stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \
332 add %g1, 1, %g1; \
333 stb %g1, [%g6 + TI_WSAVED]; \
334 saved; \
335 rdpr %cwp, %g1; \
336 sub %g1, 2, %g1; \
337 ba,pt %xcc, etrap_save; \
338 wrpr %g1, %cwp; \
339 nop; nop; nop
340
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]341/* Normal 32bit spill */
342#define SPILL_2_GENERIC(ASI) \
343 srl %sp, 0, %sp; \
344 stwa %l0, [%sp + %g0] ASI; \
345 mov 0x04, %g3; \
346 stwa %l1, [%sp + %g3] ASI; \
347 add %sp, 0x08, %g1; \
348 stwa %l2, [%g1 + %g0] ASI; \
349 stwa %l3, [%g1 + %g3] ASI; \
350 add %g1, 0x08, %g1; \
351 stwa %l4, [%g1 + %g0] ASI; \
352 stwa %l5, [%g1 + %g3] ASI; \
353 add %g1, 0x08, %g1; \
354 stwa %l6, [%g1 + %g0] ASI; \
355 stwa %l7, [%g1 + %g3] ASI; \
356 add %g1, 0x08, %g1; \
357 stwa %i0, [%g1 + %g0] ASI; \
358 stwa %i1, [%g1 + %g3] ASI; \
359 add %g1, 0x08, %g1; \
360 stwa %i2, [%g1 + %g0] ASI; \
361 stwa %i3, [%g1 + %g3] ASI; \
362 add %g1, 0x08, %g1; \
363 stwa %i4, [%g1 + %g0] ASI; \
364 stwa %i5, [%g1 + %g3] ASI; \
365 add %g1, 0x08, %g1; \
366 stwa %i6, [%g1 + %g0] ASI; \
367 stwa %i7, [%g1 + %g3] ASI; \
368 saved; \
369 retry; nop; nop; \
370 b,a,pt %xcc, spill_fixup_dax; \
371 b,a,pt %xcc, spill_fixup_mna; \
372 b,a,pt %xcc, spill_fixup;
373
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame^]374#define SPILL_2_GENERIC_ETRAP \
375etrap_user_spill_32bit: \
376 srl %sp, 0, %sp; \
377 stwa %l0, [%sp + 0x00] %asi; \
378 stwa %l1, [%sp + 0x04] %asi; \
379 stwa %l2, [%sp + 0x08] %asi; \
380 stwa %l3, [%sp + 0x0c] %asi; \
381 stwa %l4, [%sp + 0x10] %asi; \
382 stwa %l5, [%sp + 0x14] %asi; \
383 stwa %l6, [%sp + 0x18] %asi; \
384 stwa %l7, [%sp + 0x1c] %asi; \
385 stwa %i0, [%sp + 0x20] %asi; \
386 stwa %i1, [%sp + 0x24] %asi; \
387 stwa %i2, [%sp + 0x28] %asi; \
388 stwa %i3, [%sp + 0x2c] %asi; \
389 stwa %i4, [%sp + 0x30] %asi; \
390 stwa %i5, [%sp + 0x34] %asi; \
391 stwa %i6, [%sp + 0x38] %asi; \
392 stwa %i7, [%sp + 0x3c] %asi; \
393 saved; \
394 sub %g1, 2, %g1; \
395 ba,pt %xcc, etrap_save; \
396 wrpr %g1, %cwp; \
397 nop; nop; nop; nop; \
398 nop; nop; nop; nop; \
399 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
400 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
401 ba,a,pt %xcc, etrap_spill_fixup_32bit;
402
403#define SPILL_2_GENERIC_ETRAP_FIXUP \
404etrap_spill_fixup_32bit: \
405 ldub [%g6 + TI_WSAVED], %g1; \
406 sll %g1, 3, %g3; \
407 add %g6, %g3, %g3; \
408 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
409 sll %g1, 7, %g3; \
410 add %g6, %g3, %g3; \
411 stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
412 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
413 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \
414 stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \
415 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \
416 stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \
417 stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \
418 stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \
419 stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \
420 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
421 stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \
422 stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \
423 stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \
424 stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \
425 stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \
426 stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \
427 add %g1, 1, %g1; \
428 stb %g1, [%g6 + TI_WSAVED]; \
429 saved; \
430 rdpr %cwp, %g1; \
431 sub %g1, 2, %g1; \
432 ba,pt %xcc, etrap_save; \
433 wrpr %g1, %cwp; \
434 nop; nop; nop
435
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]436#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
437#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
438#define SPILL_3_NORMAL SPILL_0_NORMAL
439#define SPILL_4_NORMAL SPILL_0_NORMAL
440#define SPILL_5_NORMAL SPILL_0_NORMAL
441#define SPILL_6_NORMAL SPILL_0_NORMAL
442#define SPILL_7_NORMAL SPILL_0_NORMAL
443
444#define SPILL_0_OTHER SPILL_0_NORMAL
445#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
446#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
447#define SPILL_3_OTHER SPILL_3_NORMAL
448#define SPILL_4_OTHER SPILL_4_NORMAL
449#define SPILL_5_OTHER SPILL_5_NORMAL
450#define SPILL_6_OTHER SPILL_6_NORMAL
451#define SPILL_7_OTHER SPILL_7_NORMAL
452
453/* Normal kernel fill */
454#define FILL_0_NORMAL \
455 ldx [%sp + STACK_BIAS + 0x00], %l0; \
456 ldx [%sp + STACK_BIAS + 0x08], %l1; \
457 ldx [%sp + STACK_BIAS + 0x10], %l2; \
458 ldx [%sp + STACK_BIAS + 0x18], %l3; \
459 ldx [%sp + STACK_BIAS + 0x20], %l4; \
460 ldx [%sp + STACK_BIAS + 0x28], %l5; \
461 ldx [%sp + STACK_BIAS + 0x30], %l6; \
462 ldx [%sp + STACK_BIAS + 0x38], %l7; \
463 ldx [%sp + STACK_BIAS + 0x40], %i0; \
464 ldx [%sp + STACK_BIAS + 0x48], %i1; \
465 ldx [%sp + STACK_BIAS + 0x50], %i2; \
466 ldx [%sp + STACK_BIAS + 0x58], %i3; \
467 ldx [%sp + STACK_BIAS + 0x60], %i4; \
468 ldx [%sp + STACK_BIAS + 0x68], %i5; \
469 ldx [%sp + STACK_BIAS + 0x70], %i6; \
470 ldx [%sp + STACK_BIAS + 0x78], %i7; \
471 restored; retry; nop; nop; nop; nop; nop; nop; \
472 nop; nop; nop; nop; nop; nop; nop; nop;
473
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame^]474#define FILL_0_NORMAL_RTRAP \
475kern_rtt_fill: \
476 rdpr %cwp, %g1; \
477 sub %g1, 1, %g1; \
478 wrpr %g1, %cwp; \
479 ldx [%sp + STACK_BIAS + 0x00], %l0; \
480 ldx [%sp + STACK_BIAS + 0x08], %l1; \
481 ldx [%sp + STACK_BIAS + 0x10], %l2; \
482 ldx [%sp + STACK_BIAS + 0x18], %l3; \
483 ldx [%sp + STACK_BIAS + 0x20], %l4; \
484 ldx [%sp + STACK_BIAS + 0x28], %l5; \
485 ldx [%sp + STACK_BIAS + 0x30], %l6; \
486 ldx [%sp + STACK_BIAS + 0x38], %l7; \
487 ldx [%sp + STACK_BIAS + 0x40], %i0; \
488 ldx [%sp + STACK_BIAS + 0x48], %i1; \
489 ldx [%sp + STACK_BIAS + 0x50], %i2; \
490 ldx [%sp + STACK_BIAS + 0x58], %i3; \
491 ldx [%sp + STACK_BIAS + 0x60], %i4; \
492 ldx [%sp + STACK_BIAS + 0x68], %i5; \
493 ldx [%sp + STACK_BIAS + 0x70], %i6; \
494 ldx [%sp + STACK_BIAS + 0x78], %i7; \
495 restored; \
496 add %g1, 1, %g1; \
497 ba,pt %xcc, kern_rtt_restore; \
498 wrpr %g1, %cwp; \
499 nop; nop; nop; nop; nop; \
500 nop; nop; nop; nop;
501
502
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]503/* Normal 64bit fill */
504#define FILL_1_GENERIC(ASI) \
505 add %sp, STACK_BIAS + 0x00, %g1; \
506 ldxa [%g1 + %g0] ASI, %l0; \
507 mov 0x08, %g2; \
508 mov 0x10, %g3; \
509 ldxa [%g1 + %g2] ASI, %l1; \
510 mov 0x18, %g5; \
511 ldxa [%g1 + %g3] ASI, %l2; \
512 ldxa [%g1 + %g5] ASI, %l3; \
513 add %g1, 0x20, %g1; \
514 ldxa [%g1 + %g0] ASI, %l4; \
515 ldxa [%g1 + %g2] ASI, %l5; \
516 ldxa [%g1 + %g3] ASI, %l6; \
517 ldxa [%g1 + %g5] ASI, %l7; \
518 add %g1, 0x20, %g1; \
519 ldxa [%g1 + %g0] ASI, %i0; \
520 ldxa [%g1 + %g2] ASI, %i1; \
521 ldxa [%g1 + %g3] ASI, %i2; \
522 ldxa [%g1 + %g5] ASI, %i3; \
523 add %g1, 0x20, %g1; \
524 ldxa [%g1 + %g0] ASI, %i4; \
525 ldxa [%g1 + %g2] ASI, %i5; \
526 ldxa [%g1 + %g3] ASI, %i6; \
527 ldxa [%g1 + %g5] ASI, %i7; \
528 restored; \
529 retry; nop; nop; nop; nop; \
530 b,a,pt %xcc, fill_fixup_dax; \
531 b,a,pt %xcc, fill_fixup_mna; \
532 b,a,pt %xcc, fill_fixup;
533
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame^]534#define FILL_1_GENERIC_RTRAP \
535user_rtt_fill_64bit: \
536 ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \
537 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
538 ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \
539 ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \
540 ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \
541 ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \
542 ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \
543 ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \
544 ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \
545 ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \
546 ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \
547 ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \
548 ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \
549 ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \
550 ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \
551 ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \
552 ba,pt %xcc, user_rtt_pre_restore; \
553 restored; \
554 nop; nop; nop; nop; nop; nop; \
555 nop; nop; nop; nop; nop; \
556 ba,a,pt %xcc, user_rtt_fill_fixup; \
557 ba,a,pt %xcc, user_rtt_fill_fixup; \
558 ba,a,pt %xcc, user_rtt_fill_fixup;
559
560
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]561/* Normal 32bit fill */
562#define FILL_2_GENERIC(ASI) \
563 srl %sp, 0, %sp; \
564 lduwa [%sp + %g0] ASI, %l0; \
565 mov 0x04, %g2; \
566 mov 0x08, %g3; \
567 lduwa [%sp + %g2] ASI, %l1; \
568 mov 0x0c, %g5; \
569 lduwa [%sp + %g3] ASI, %l2; \
570 lduwa [%sp + %g5] ASI, %l3; \
571 add %sp, 0x10, %g1; \
572 lduwa [%g1 + %g0] ASI, %l4; \
573 lduwa [%g1 + %g2] ASI, %l5; \
574 lduwa [%g1 + %g3] ASI, %l6; \
575 lduwa [%g1 + %g5] ASI, %l7; \
576 add %g1, 0x10, %g1; \
577 lduwa [%g1 + %g0] ASI, %i0; \
578 lduwa [%g1 + %g2] ASI, %i1; \
579 lduwa [%g1 + %g3] ASI, %i2; \
580 lduwa [%g1 + %g5] ASI, %i3; \
581 add %g1, 0x10, %g1; \
582 lduwa [%g1 + %g0] ASI, %i4; \
583 lduwa [%g1 + %g2] ASI, %i5; \
584 lduwa [%g1 + %g3] ASI, %i6; \
585 lduwa [%g1 + %g5] ASI, %i7; \
586 restored; \
587 retry; nop; nop; nop; nop; \
588 b,a,pt %xcc, fill_fixup_dax; \
589 b,a,pt %xcc, fill_fixup_mna; \
590 b,a,pt %xcc, fill_fixup;
591
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame^]592#define FILL_2_GENERIC_RTRAP \
593user_rtt_fill_32bit: \
594 srl %sp, 0, %sp; \
595 lduwa [%sp + 0x00] %asi, %l0; \
596 lduwa [%sp + 0x04] %asi, %l1; \
597 lduwa [%sp + 0x08] %asi, %l2; \
598 lduwa [%sp + 0x0c] %asi, %l3; \
599 lduwa [%sp + 0x10] %asi, %l4; \
600 lduwa [%sp + 0x14] %asi, %l5; \
601 lduwa [%sp + 0x18] %asi, %l6; \
602 lduwa [%sp + 0x1c] %asi, %l7; \
603 lduwa [%sp + 0x20] %asi, %i0; \
604 lduwa [%sp + 0x24] %asi, %i1; \
605 lduwa [%sp + 0x28] %asi, %i2; \
606 lduwa [%sp + 0x2c] %asi, %i3; \
607 lduwa [%sp + 0x30] %asi, %i4; \
608 lduwa [%sp + 0x34] %asi, %i5; \
609 lduwa [%sp + 0x38] %asi, %i6; \
610 lduwa [%sp + 0x3c] %asi, %i7; \
611 ba,pt %xcc, user_rtt_pre_restore; \
612 restored; \
613 nop; nop; nop; nop; nop; \
614 nop; nop; nop; nop; nop; \
615 ba,a,pt %xcc, user_rtt_fill_fixup; \
616 ba,a,pt %xcc, user_rtt_fill_fixup; \
617 ba,a,pt %xcc, user_rtt_fill_fixup;
618
619
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]620#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
621#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
622#define FILL_3_NORMAL FILL_0_NORMAL
623#define FILL_4_NORMAL FILL_0_NORMAL
624#define FILL_5_NORMAL FILL_0_NORMAL
625#define FILL_6_NORMAL FILL_0_NORMAL
626#define FILL_7_NORMAL FILL_0_NORMAL
627
628#define FILL_0_OTHER FILL_0_NORMAL
629#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
630#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
631#define FILL_3_OTHER FILL_3_NORMAL
632#define FILL_4_OTHER FILL_4_NORMAL
633#define FILL_5_OTHER FILL_5_NORMAL
634#define FILL_6_OTHER FILL_6_NORMAL
635#define FILL_7_OTHER FILL_7_NORMAL
636
637#endif /* !(_SPARC64_TTABLE_H) */