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review.evervolv.com / android_kernel_oneplus_msm8996 / 33bc8f46a8ee3fc1836def9713933435b7ff0b90 / . / include / linux / regulator / ab8500.h
blob: dd7944f735d812f1b6c3e3d6a8dc69207a9e1602 [file] [log] [blame]
Sundar R Iyer549931f2010-07-13 11:51:28 +0530[diff] [blame]1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
Sundar R Iyer549931f2010-07-13 11:51:28 +0530[diff] [blame]8 */
9
10#ifndef __LINUX_MFD_AB8500_REGULATOR_H
11#define __LINUX_MFD_AB8500_REGULATOR_H
12
13/* AB8500 regulators */
Bengt Jonssoncb189b02010-12-10 11:08:40 +0100[diff] [blame]14enum ab8500_regulator_id {
15 AB8500_LDO_AUX1,
16 AB8500_LDO_AUX2,
17 AB8500_LDO_AUX3,
18 AB8500_LDO_INTCORE,
19 AB8500_LDO_TVOUT,
Bengt Jonssonea05ef32011-03-10 14:43:31 +0100[diff] [blame]20 AB8500_LDO_USB,
Bengt Jonssoncb189b02010-12-10 11:08:40 +0100[diff] [blame]21 AB8500_LDO_AUDIO,
22 AB8500_LDO_ANAMIC1,
23 AB8500_LDO_ANAMIC2,
24 AB8500_LDO_DMIC,
25 AB8500_LDO_ANA,
26 AB8500_NUM_REGULATORS,
27};
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]28
Linus Walleijd6255522012-02-20 21:42:24 +0100[diff] [blame]29/* AB9450 regulators */
30enum ab9540_regulator_id {
31 AB9540_LDO_AUX1,
32 AB9540_LDO_AUX2,
33 AB9540_LDO_AUX3,
34 AB9540_LDO_AUX4,
35 AB9540_LDO_INTCORE,
36 AB9540_LDO_TVOUT,
37 AB9540_LDO_USB,
38 AB9540_LDO_AUDIO,
39 AB9540_LDO_ANAMIC1,
40 AB9540_LDO_ANAMIC2,
41 AB9540_LDO_DMIC,
42 AB9540_LDO_ANA,
43 AB9540_SYSCLKREQ_2,
44 AB9540_SYSCLKREQ_4,
45 AB9540_NUM_REGULATORS,
46};
47
48/* AB8500 and AB9540 register initialization */
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]49struct ab8500_regulator_reg_init {
50 int id;
Lee Jones3c1b8432013-03-21 15:59:01 +0000[diff] [blame]51 u8 mask;
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]52 u8 value;
53};
54
Lee Jones3c1b8432013-03-21 15:59:01 +0000[diff] [blame]55#define INIT_REGULATOR_REGISTER(_id, _mask, _value) \
56 { \
57 .id = _id, \
58 .mask = _mask, \
59 .value = _value, \
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]60 }
61
62/* AB8500 registers */
63enum ab8500_regulator_reg {
Lee Jones33bc8f42013-03-21 15:59:02 +0000[diff] [blame^]64 AB8500_REGUREQUESTCTRL1,
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]65 AB8500_REGUREQUESTCTRL2,
66 AB8500_REGUREQUESTCTRL3,
67 AB8500_REGUREQUESTCTRL4,
68 AB8500_REGUSYSCLKREQ1HPVALID1,
69 AB8500_REGUSYSCLKREQ1HPVALID2,
70 AB8500_REGUHWHPREQ1VALID1,
71 AB8500_REGUHWHPREQ1VALID2,
72 AB8500_REGUHWHPREQ2VALID1,
73 AB8500_REGUHWHPREQ2VALID2,
74 AB8500_REGUSWHPREQVALID1,
75 AB8500_REGUSWHPREQVALID2,
76 AB8500_REGUSYSCLKREQVALID1,
77 AB8500_REGUSYSCLKREQVALID2,
78 AB8500_REGUMISC1,
79 AB8500_VAUDIOSUPPLY,
80 AB8500_REGUCTRL1VAMIC,
Lee Jones33bc8f42013-03-21 15:59:02 +0000[diff] [blame^]81 AB8500_VSMPS1REGU,
82 AB8500_VSMPS2REGU,
83 AB8500_VSMPS3REGU, /* NOTE! PRCMU register */
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]84 AB8500_VPLLVANAREGU,
85 AB8500_VREFDDR,
86 AB8500_EXTSUPPLYREGU,
87 AB8500_VAUX12REGU,
88 AB8500_VRF1VAUX3REGU,
Lee Jones33bc8f42013-03-21 15:59:02 +0000[diff] [blame^]89 AB8500_VSMPS1SEL1,
90 AB8500_VSMPS1SEL2,
91 AB8500_VSMPS1SEL3,
92 AB8500_VSMPS2SEL1,
93 AB8500_VSMPS2SEL2,
94 AB8500_VSMPS2SEL3,
95 AB8500_VSMPS3SEL1, /* NOTE! PRCMU register */
96 AB8500_VSMPS3SEL2, /* NOTE! PRCMU register */
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]97 AB8500_VAUX1SEL,
98 AB8500_VAUX2SEL,
99 AB8500_VRF1VAUX3SEL,
100 AB8500_REGUCTRL2SPARE,
101 AB8500_REGUCTRLDISCH,
102 AB8500_REGUCTRLDISCH2,
Bengt Jonsson79568b92011-03-11 11:54:46 +0100[diff] [blame]103 AB8500_NUM_REGULATOR_REGISTERS,
104};
105
Linus Walleijd6255522012-02-20 21:42:24 +0100[diff] [blame]106
107/* AB9540 registers */
108enum ab9540_regulator_reg {
109 AB9540_REGUREQUESTCTRL1,
110 AB9540_REGUREQUESTCTRL2,
111 AB9540_REGUREQUESTCTRL3,
112 AB9540_REGUREQUESTCTRL4,
113 AB9540_REGUSYSCLKREQ1HPVALID1,
114 AB9540_REGUSYSCLKREQ1HPVALID2,
115 AB9540_REGUHWHPREQ1VALID1,
116 AB9540_REGUHWHPREQ1VALID2,
117 AB9540_REGUHWHPREQ2VALID1,
118 AB9540_REGUHWHPREQ2VALID2,
119 AB9540_REGUSWHPREQVALID1,
120 AB9540_REGUSWHPREQVALID2,
121 AB9540_REGUSYSCLKREQVALID1,
122 AB9540_REGUSYSCLKREQVALID2,
123 AB9540_REGUVAUX4REQVALID,
124 AB9540_REGUMISC1,
125 AB9540_VAUDIOSUPPLY,
126 AB9540_REGUCTRL1VAMIC,
127 AB9540_VSMPS1REGU,
128 AB9540_VSMPS2REGU,
129 AB9540_VSMPS3REGU, /* NOTE! PRCMU register */
130 AB9540_VPLLVANAREGU,
131 AB9540_EXTSUPPLYREGU,
132 AB9540_VAUX12REGU,
133 AB9540_VRF1VAUX3REGU,
134 AB9540_VSMPS1SEL1,
135 AB9540_VSMPS1SEL2,
136 AB9540_VSMPS1SEL3,
137 AB9540_VSMPS2SEL1,
138 AB9540_VSMPS2SEL2,
139 AB9540_VSMPS2SEL3,
140 AB9540_VSMPS3SEL1, /* NOTE! PRCMU register */
141 AB9540_VSMPS3SEL2, /* NOTE! PRCMU register */
142 AB9540_VAUX1SEL,
143 AB9540_VAUX2SEL,
144 AB9540_VRF1VAUX3SEL,
145 AB9540_REGUCTRL2SPARE,
146 AB9540_VAUX4REQCTRL,
147 AB9540_VAUX4REGU,
148 AB9540_VAUX4SEL,
149 AB9540_REGUCTRLDISCH,
150 AB9540_REGUCTRLDISCH2,
151 AB9540_REGUCTRLDISCH3,
152 AB9540_NUM_REGULATOR_REGISTERS,
153};
154
Sundar R Iyer549931f2010-07-13 11:51:28 +0530[diff] [blame]155#endif