blob: ab22cc224f3eb8259a7d42dd2c841687703ffab7 [file] [log] [blame]
Tomi Valkeinen58f255482011-11-04 09:48:54 +02001/*
2 * Copyright (C) 2011 Texas Instruments
3 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#define DSS_SUBSYS_NAME "APPLY"
19
20#include <linux/kernel.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
23#include <linux/jiffies.h>
24
25#include <video/omapdss.h>
26
27#include "dss.h"
28#include "dss_features.h"
29
30/*
31 * We have 4 levels of cache for the dispc settings. First two are in SW and
32 * the latter two in HW.
33 *
Tomi Valkeinen0b53f172011-11-16 14:31:58 +020034 * set_info()
35 * v
Tomi Valkeinen58f255482011-11-04 09:48:54 +020036 * +--------------------+
Tomi Valkeinen0b53f172011-11-16 14:31:58 +020037 * | user_info |
Tomi Valkeinen58f255482011-11-04 09:48:54 +020038 * +--------------------+
39 * v
40 * apply()
41 * v
42 * +--------------------+
Tomi Valkeinend09c7aa2011-11-15 12:04:43 +020043 * | info |
Tomi Valkeinen58f255482011-11-04 09:48:54 +020044 * +--------------------+
45 * v
Tomi Valkeinenf6a5e082011-11-15 11:47:39 +020046 * write_regs()
Tomi Valkeinen58f255482011-11-04 09:48:54 +020047 * v
48 * +--------------------+
49 * | shadow registers |
50 * +--------------------+
51 * v
52 * VFP or lcd/digit_enable
53 * v
54 * +--------------------+
55 * | registers |
56 * +--------------------+
57 */
58
Tomi Valkeinenc10c6f02011-11-15 11:56:57 +020059struct ovl_priv_data {
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +020060
61 bool user_info_dirty;
62 struct omap_overlay_info user_info;
63
Tomi Valkeinen0b53f172011-11-16 14:31:58 +020064 bool info_dirty;
Tomi Valkeinen58f255482011-11-04 09:48:54 +020065 struct omap_overlay_info info;
66
Tomi Valkeinen0b53f172011-11-16 14:31:58 +020067 bool shadow_info_dirty;
68
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +020069 bool extra_info_dirty;
70 bool shadow_extra_info_dirty;
71
72 bool enabled;
Tomi Valkeinen5d5a97a2011-11-16 14:17:54 +020073 enum omap_channel channel;
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +020074 u32 fifo_low, fifo_high;
Tomi Valkeinen82153ed2011-11-26 14:26:46 +020075
76 /*
77 * True if overlay is to be enabled. Used to check and calculate configs
78 * for the overlay before it is enabled in the HW.
79 */
80 bool enabling;
Tomi Valkeinen58f255482011-11-04 09:48:54 +020081};
82
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +020083struct mgr_priv_data {
Tomi Valkeinen388c4c62011-11-16 13:58:07 +020084
85 bool user_info_dirty;
86 struct omap_overlay_manager_info user_info;
87
Tomi Valkeinen0b53f172011-11-16 14:31:58 +020088 bool info_dirty;
Tomi Valkeinen58f255482011-11-04 09:48:54 +020089 struct omap_overlay_manager_info info;
90
Tomi Valkeinen0b53f172011-11-16 14:31:58 +020091 bool shadow_info_dirty;
92
Tomi Valkeinen43a972d2011-11-15 15:04:25 +020093 /* If true, GO bit is up and shadow registers cannot be written.
94 * Never true for manual update displays */
95 bool busy;
96
Tomi Valkeinen34861372011-11-18 15:43:29 +020097 /* If true, dispc output is enabled */
98 bool updating;
99
Tomi Valkeinenbf213522011-11-15 14:43:53 +0200100 /* If true, a display is enabled using this manager */
101 bool enabled;
Archit Taneja45324a22012-04-26 19:31:22 +0530102
103 bool extra_info_dirty;
104 bool shadow_extra_info_dirty;
105
106 struct omap_video_timings timings;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200107};
108
109static struct {
Tomi Valkeinenc10c6f02011-11-15 11:56:57 +0200110 struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +0200111 struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200112
Tomi Valkeinenfb011972011-11-16 15:00:22 +0200113 bool fifo_merge_dirty;
114 bool fifo_merge;
115
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200116 bool irq_enabled;
Tomi Valkeinend09c7aa2011-11-15 12:04:43 +0200117} dss_data;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200118
Tomi Valkeinend09c7aa2011-11-15 12:04:43 +0200119/* protects dss_data */
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200120static spinlock_t data_lock;
Tomi Valkeinen5558db32011-11-15 14:28:48 +0200121/* lock for blocking functions */
122static DEFINE_MUTEX(apply_lock);
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200123static DECLARE_COMPLETION(extra_updated_completion);
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200124
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200125static void dss_register_vsync_isr(void);
126
Tomi Valkeinenc10c6f02011-11-15 11:56:57 +0200127static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
128{
Tomi Valkeinend09c7aa2011-11-15 12:04:43 +0200129 return &dss_data.ovl_priv_data_array[ovl->id];
Tomi Valkeinenc10c6f02011-11-15 11:56:57 +0200130}
131
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +0200132static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
133{
Tomi Valkeinend09c7aa2011-11-15 12:04:43 +0200134 return &dss_data.mgr_priv_data_array[mgr->id];
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +0200135}
136
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200137void dss_apply_init(void)
138{
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +0200139 const int num_ovls = dss_feat_get_num_ovls();
140 int i;
141
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200142 spin_lock_init(&data_lock);
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +0200143
144 for (i = 0; i < num_ovls; ++i) {
145 struct ovl_priv_data *op;
146
147 op = &dss_data.ovl_priv_data_array[i];
148
149 op->info.global_alpha = 255;
150
151 switch (i) {
152 case 0:
153 op->info.zorder = 0;
154 break;
155 case 1:
156 op->info.zorder =
157 dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
158 break;
159 case 2:
160 op->info.zorder =
161 dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
162 break;
163 case 3:
164 op->info.zorder =
165 dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
166 break;
167 }
168
169 op->user_info = op->info;
170 }
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200171}
172
173static bool ovl_manual_update(struct omap_overlay *ovl)
174{
175 return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
176}
177
178static bool mgr_manual_update(struct omap_overlay_manager *mgr)
179{
180 return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
181}
182
Tomi Valkeinen39518352011-11-17 17:35:28 +0200183static int dss_check_settings_low(struct omap_overlay_manager *mgr,
Archit Taneja228b2132012-04-27 01:22:28 +0530184 bool applying)
Tomi Valkeinen39518352011-11-17 17:35:28 +0200185{
186 struct omap_overlay_info *oi;
187 struct omap_overlay_manager_info *mi;
188 struct omap_overlay *ovl;
189 struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
190 struct ovl_priv_data *op;
191 struct mgr_priv_data *mp;
192
193 mp = get_mgr_priv(mgr);
194
Archit Taneja5dd747e2012-05-08 18:19:15 +0530195 if (!mp->enabled)
196 return 0;
197
Tomi Valkeinen39518352011-11-17 17:35:28 +0200198 if (applying && mp->user_info_dirty)
199 mi = &mp->user_info;
200 else
201 mi = &mp->info;
202
203 /* collect the infos to be tested into the array */
204 list_for_each_entry(ovl, &mgr->overlays, list) {
205 op = get_ovl_priv(ovl);
206
Tomi Valkeinen82153ed2011-11-26 14:26:46 +0200207 if (!op->enabled && !op->enabling)
Tomi Valkeinen39518352011-11-17 17:35:28 +0200208 oi = NULL;
209 else if (applying && op->user_info_dirty)
210 oi = &op->user_info;
211 else
212 oi = &op->info;
213
214 ois[ovl->id] = oi;
215 }
216
Archit Taneja228b2132012-04-27 01:22:28 +0530217 return dss_mgr_check(mgr, mi, &mp->timings, ois);
Tomi Valkeinen39518352011-11-17 17:35:28 +0200218}
219
220/*
221 * check manager and overlay settings using overlay_info from data->info
222 */
Archit Taneja228b2132012-04-27 01:22:28 +0530223static int dss_check_settings(struct omap_overlay_manager *mgr)
Tomi Valkeinen39518352011-11-17 17:35:28 +0200224{
Archit Taneja228b2132012-04-27 01:22:28 +0530225 return dss_check_settings_low(mgr, false);
Tomi Valkeinen39518352011-11-17 17:35:28 +0200226}
227
228/*
229 * check manager and overlay settings using overlay_info from ovl->info if
230 * dirty and from data->info otherwise
231 */
Archit Taneja228b2132012-04-27 01:22:28 +0530232static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
Tomi Valkeinen39518352011-11-17 17:35:28 +0200233{
Archit Taneja228b2132012-04-27 01:22:28 +0530234 return dss_check_settings_low(mgr, true);
Tomi Valkeinen39518352011-11-17 17:35:28 +0200235}
236
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200237static bool need_isr(void)
238{
239 const int num_mgrs = dss_feat_get_num_mgrs();
240 int i;
241
242 for (i = 0; i < num_mgrs; ++i) {
243 struct omap_overlay_manager *mgr;
244 struct mgr_priv_data *mp;
245 struct omap_overlay *ovl;
246
247 mgr = omap_dss_get_overlay_manager(i);
248 mp = get_mgr_priv(mgr);
249
250 if (!mp->enabled)
251 continue;
252
Tomi Valkeinen34861372011-11-18 15:43:29 +0200253 if (mgr_manual_update(mgr)) {
254 /* to catch FRAMEDONE */
255 if (mp->updating)
256 return true;
257 } else {
258 /* to catch GO bit going down */
259 if (mp->busy)
260 return true;
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200261
262 /* to write new values to registers */
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200263 if (mp->info_dirty)
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200264 return true;
Tomi Valkeinen34861372011-11-18 15:43:29 +0200265
Tomi Valkeinen9f808952011-11-25 17:26:13 +0200266 /* to set GO bit */
267 if (mp->shadow_info_dirty)
268 return true;
269
Archit Taneja45324a22012-04-26 19:31:22 +0530270 /*
271 * NOTE: we don't check extra_info flags for disabled
272 * managers, once the manager is enabled, the extra_info
273 * related manager changes will be taken in by HW.
274 */
275
276 /* to write new values to registers */
277 if (mp->extra_info_dirty)
278 return true;
279
280 /* to set GO bit */
281 if (mp->shadow_extra_info_dirty)
282 return true;
283
Tomi Valkeinen34861372011-11-18 15:43:29 +0200284 list_for_each_entry(ovl, &mgr->overlays, list) {
285 struct ovl_priv_data *op;
286
287 op = get_ovl_priv(ovl);
288
Tomi Valkeinen9f808952011-11-25 17:26:13 +0200289 /*
290 * NOTE: we check extra_info flags even for
291 * disabled overlays, as extra_infos need to be
292 * always written.
293 */
294
295 /* to write new values to registers */
296 if (op->extra_info_dirty)
297 return true;
298
299 /* to set GO bit */
300 if (op->shadow_extra_info_dirty)
301 return true;
302
Tomi Valkeinen34861372011-11-18 15:43:29 +0200303 if (!op->enabled)
304 continue;
305
306 /* to write new values to registers */
Tomi Valkeinen9f808952011-11-25 17:26:13 +0200307 if (op->info_dirty)
308 return true;
309
310 /* to set GO bit */
311 if (op->shadow_info_dirty)
Tomi Valkeinen34861372011-11-18 15:43:29 +0200312 return true;
313 }
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200314 }
315 }
316
317 return false;
318}
319
320static bool need_go(struct omap_overlay_manager *mgr)
321{
322 struct omap_overlay *ovl;
323 struct mgr_priv_data *mp;
324 struct ovl_priv_data *op;
325
326 mp = get_mgr_priv(mgr);
327
Archit Taneja45324a22012-04-26 19:31:22 +0530328 if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200329 return true;
330
331 list_for_each_entry(ovl, &mgr->overlays, list) {
332 op = get_ovl_priv(ovl);
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200333 if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200334 return true;
335 }
336
337 return false;
338}
339
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200340/* returns true if an extra_info field is currently being updated */
341static bool extra_info_update_ongoing(void)
342{
Archit Taneja45324a22012-04-26 19:31:22 +0530343 const int num_mgrs = dss_feat_get_num_mgrs();
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200344 int i;
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200345
Archit Taneja45324a22012-04-26 19:31:22 +0530346 for (i = 0; i < num_mgrs; ++i) {
347 struct omap_overlay_manager *mgr;
348 struct omap_overlay *ovl;
349 struct mgr_priv_data *mp;
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200350
Archit Taneja45324a22012-04-26 19:31:22 +0530351 mgr = omap_dss_get_overlay_manager(i);
352 mp = get_mgr_priv(mgr);
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200353
354 if (!mp->enabled)
355 continue;
356
Tomi Valkeinen153b6e72011-11-25 17:35:35 +0200357 if (!mp->updating)
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200358 continue;
359
Archit Taneja45324a22012-04-26 19:31:22 +0530360 if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
Tomi Valkeinen153b6e72011-11-25 17:35:35 +0200361 return true;
Archit Taneja45324a22012-04-26 19:31:22 +0530362
363 list_for_each_entry(ovl, &mgr->overlays, list) {
364 struct ovl_priv_data *op = get_ovl_priv(ovl);
365
366 if (op->extra_info_dirty || op->shadow_extra_info_dirty)
367 return true;
368 }
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200369 }
370
371 return false;
372}
373
374/* wait until no extra_info updates are pending */
375static void wait_pending_extra_info_updates(void)
376{
377 bool updating;
378 unsigned long flags;
379 unsigned long t;
Tomi Valkeinen46146792012-02-23 12:21:09 +0200380 int r;
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200381
382 spin_lock_irqsave(&data_lock, flags);
383
384 updating = extra_info_update_ongoing();
385
386 if (!updating) {
387 spin_unlock_irqrestore(&data_lock, flags);
388 return;
389 }
390
391 init_completion(&extra_updated_completion);
392
393 spin_unlock_irqrestore(&data_lock, flags);
394
395 t = msecs_to_jiffies(500);
Tomi Valkeinen46146792012-02-23 12:21:09 +0200396 r = wait_for_completion_timeout(&extra_updated_completion, t);
397 if (r == 0)
398 DSSWARN("timeout in wait_pending_extra_info_updates\n");
399 else if (r < 0)
400 DSSERR("wait_pending_extra_info_updates failed: %d\n", r);
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200401}
402
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200403int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
404{
405 unsigned long timeout = msecs_to_jiffies(500);
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +0200406 struct mgr_priv_data *mp;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200407 u32 irq;
408 int r;
409 int i;
410 struct omap_dss_device *dssdev = mgr->device;
411
412 if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
413 return 0;
414
415 if (mgr_manual_update(mgr))
416 return 0;
417
Lajos Molnar21e56f72012-02-22 12:23:16 +0530418 r = dispc_runtime_get();
419 if (r)
420 return r;
421
Tomi Valkeinenbc1a9512011-11-15 11:20:13 +0200422 irq = dispc_mgr_get_vsync_irq(mgr->id);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200423
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +0200424 mp = get_mgr_priv(mgr);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200425 i = 0;
426 while (1) {
427 unsigned long flags;
428 bool shadow_dirty, dirty;
429
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200430 spin_lock_irqsave(&data_lock, flags);
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200431 dirty = mp->info_dirty;
432 shadow_dirty = mp->shadow_info_dirty;
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200433 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200434
435 if (!dirty && !shadow_dirty) {
436 r = 0;
437 break;
438 }
439
440 /* 4 iterations is the worst case:
441 * 1 - initial iteration, dirty = true (between VFP and VSYNC)
442 * 2 - first VSYNC, dirty = true
443 * 3 - dirty = false, shadow_dirty = true
444 * 4 - shadow_dirty = false */
445 if (i++ == 3) {
446 DSSERR("mgr(%d)->wait_for_go() not finishing\n",
447 mgr->id);
448 r = 0;
449 break;
450 }
451
452 r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
453 if (r == -ERESTARTSYS)
454 break;
455
456 if (r) {
457 DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
458 break;
459 }
460 }
461
Lajos Molnar21e56f72012-02-22 12:23:16 +0530462 dispc_runtime_put();
463
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200464 return r;
465}
466
467int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
468{
469 unsigned long timeout = msecs_to_jiffies(500);
Tomi Valkeinenc10c6f02011-11-15 11:56:57 +0200470 struct ovl_priv_data *op;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200471 struct omap_dss_device *dssdev;
472 u32 irq;
473 int r;
474 int i;
475
476 if (!ovl->manager)
477 return 0;
478
479 dssdev = ovl->manager->device;
480
481 if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
482 return 0;
483
484 if (ovl_manual_update(ovl))
485 return 0;
486
Lajos Molnar21e56f72012-02-22 12:23:16 +0530487 r = dispc_runtime_get();
488 if (r)
489 return r;
490
Tomi Valkeinenbc1a9512011-11-15 11:20:13 +0200491 irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200492
Tomi Valkeinenc10c6f02011-11-15 11:56:57 +0200493 op = get_ovl_priv(ovl);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200494 i = 0;
495 while (1) {
496 unsigned long flags;
497 bool shadow_dirty, dirty;
498
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200499 spin_lock_irqsave(&data_lock, flags);
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200500 dirty = op->info_dirty;
501 shadow_dirty = op->shadow_info_dirty;
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200502 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200503
504 if (!dirty && !shadow_dirty) {
505 r = 0;
506 break;
507 }
508
509 /* 4 iterations is the worst case:
510 * 1 - initial iteration, dirty = true (between VFP and VSYNC)
511 * 2 - first VSYNC, dirty = true
512 * 3 - dirty = false, shadow_dirty = true
513 * 4 - shadow_dirty = false */
514 if (i++ == 3) {
515 DSSERR("ovl(%d)->wait_for_go() not finishing\n",
516 ovl->id);
517 r = 0;
518 break;
519 }
520
521 r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
522 if (r == -ERESTARTSYS)
523 break;
524
525 if (r) {
526 DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
527 break;
528 }
529 }
530
Lajos Molnar21e56f72012-02-22 12:23:16 +0530531 dispc_runtime_put();
532
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200533 return r;
534}
535
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200536static void dss_ovl_write_regs(struct omap_overlay *ovl)
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200537{
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200538 struct ovl_priv_data *op = get_ovl_priv(ovl);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200539 struct omap_overlay_info *oi;
540 bool ilace, replication;
Tomi Valkeinen34861372011-11-18 15:43:29 +0200541 struct mgr_priv_data *mp;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200542 int r;
543
Tomi Valkeinenf6a5e082011-11-15 11:47:39 +0200544 DSSDBGF("%d", ovl->id);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200545
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200546 if (!op->enabled || !op->info_dirty)
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200547 return;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200548
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200549 oi = &op->info;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200550
Archit Taneja81ab95b2012-05-08 15:53:20 +0530551 mp = get_mgr_priv(ovl->manager);
552
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200553 replication = dss_use_replication(ovl->manager->device, oi->color_mode);
554
555 ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
556
Archit Taneja81ab95b2012-05-08 15:53:20 +0530557 r = dispc_ovl_setup(ovl->id, oi, ilace, replication, &mp->timings);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200558 if (r) {
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200559 /*
560 * We can't do much here, as this function can be called from
561 * vsync interrupt.
562 */
Tomi Valkeinenf6a5e082011-11-15 11:47:39 +0200563 DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200564
565 /* This will leave fifo configurations in a nonoptimal state */
566 op->enabled = false;
567 dispc_ovl_enable(ovl->id, false);
568 return;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200569 }
570
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200571 op->info_dirty = false;
Tomi Valkeinen34861372011-11-18 15:43:29 +0200572 if (mp->updating)
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200573 op->shadow_info_dirty = true;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200574}
575
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200576static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
577{
578 struct ovl_priv_data *op = get_ovl_priv(ovl);
Tomi Valkeinen34861372011-11-18 15:43:29 +0200579 struct mgr_priv_data *mp;
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200580
581 DSSDBGF("%d", ovl->id);
582
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200583 if (!op->extra_info_dirty)
584 return;
585
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200586 /* note: write also when op->enabled == false, so that the ovl gets
587 * disabled */
588
589 dispc_ovl_enable(ovl->id, op->enabled);
Tomi Valkeinen5d5a97a2011-11-16 14:17:54 +0200590 dispc_ovl_set_channel_out(ovl->id, op->channel);
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +0200591 dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200592
Tomi Valkeinen34861372011-11-18 15:43:29 +0200593 mp = get_mgr_priv(ovl->manager);
594
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200595 op->extra_info_dirty = false;
Tomi Valkeinen34861372011-11-18 15:43:29 +0200596 if (mp->updating)
597 op->shadow_extra_info_dirty = true;
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200598}
599
Tomi Valkeinenf6a5e082011-11-15 11:47:39 +0200600static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200601{
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200602 struct mgr_priv_data *mp = get_mgr_priv(mgr);
603 struct omap_overlay *ovl;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200604
Tomi Valkeinenf6a5e082011-11-15 11:47:39 +0200605 DSSDBGF("%d", mgr->id);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200606
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200607 if (!mp->enabled)
608 return;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200609
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200610 WARN_ON(mp->busy);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200611
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200612 /* Commit overlay settings */
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200613 list_for_each_entry(ovl, &mgr->overlays, list) {
614 dss_ovl_write_regs(ovl);
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200615 dss_ovl_write_regs_extra(ovl);
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200616 }
617
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200618 if (mp->info_dirty) {
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200619 dispc_mgr_setup(mgr->id, &mp->info);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200620
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200621 mp->info_dirty = false;
Tomi Valkeinen34861372011-11-18 15:43:29 +0200622 if (mp->updating)
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200623 mp->shadow_info_dirty = true;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200624 }
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200625}
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200626
Archit Taneja45324a22012-04-26 19:31:22 +0530627static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
628{
629 struct mgr_priv_data *mp = get_mgr_priv(mgr);
630
631 DSSDBGF("%d", mgr->id);
632
633 if (!mp->extra_info_dirty)
634 return;
635
636 dispc_mgr_set_timings(mgr->id, &mp->timings);
637
638 mp->extra_info_dirty = false;
639 if (mp->updating)
640 mp->shadow_extra_info_dirty = true;
641}
642
Tomi Valkeinenfb011972011-11-16 15:00:22 +0200643static void dss_write_regs_common(void)
644{
645 const int num_mgrs = omap_dss_get_num_overlay_managers();
646 int i;
647
648 if (!dss_data.fifo_merge_dirty)
649 return;
650
651 for (i = 0; i < num_mgrs; ++i) {
652 struct omap_overlay_manager *mgr;
653 struct mgr_priv_data *mp;
654
655 mgr = omap_dss_get_overlay_manager(i);
656 mp = get_mgr_priv(mgr);
657
658 if (mp->enabled) {
659 if (dss_data.fifo_merge_dirty) {
660 dispc_enable_fifomerge(dss_data.fifo_merge);
661 dss_data.fifo_merge_dirty = false;
662 }
663
664 if (mp->updating)
665 mp->shadow_info_dirty = true;
666 }
667 }
668}
669
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200670static void dss_write_regs(void)
671{
672 const int num_mgrs = omap_dss_get_num_overlay_managers();
673 int i;
674
Tomi Valkeinenfb011972011-11-16 15:00:22 +0200675 dss_write_regs_common();
676
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200677 for (i = 0; i < num_mgrs; ++i) {
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200678 struct omap_overlay_manager *mgr;
679 struct mgr_priv_data *mp;
Tomi Valkeinen39518352011-11-17 17:35:28 +0200680 int r;
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200681
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +0200682 mgr = omap_dss_get_overlay_manager(i);
683 mp = get_mgr_priv(mgr);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200684
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200685 if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200686 continue;
687
Archit Taneja228b2132012-04-27 01:22:28 +0530688 r = dss_check_settings(mgr);
Tomi Valkeinen39518352011-11-17 17:35:28 +0200689 if (r) {
690 DSSERR("cannot write registers for manager %s: "
691 "illegal configuration\n", mgr->name);
692 continue;
693 }
694
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200695 dss_mgr_write_regs(mgr);
Archit Taneja45324a22012-04-26 19:31:22 +0530696 dss_mgr_write_regs_extra(mgr);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200697 }
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200698}
699
Tomi Valkeinen3ab15b22011-11-25 17:32:20 +0200700static void dss_set_go_bits(void)
701{
702 const int num_mgrs = omap_dss_get_num_overlay_managers();
703 int i;
704
705 for (i = 0; i < num_mgrs; ++i) {
706 struct omap_overlay_manager *mgr;
707 struct mgr_priv_data *mp;
708
709 mgr = omap_dss_get_overlay_manager(i);
710 mp = get_mgr_priv(mgr);
711
712 if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
713 continue;
714
715 if (!need_go(mgr))
716 continue;
717
718 mp->busy = true;
719
720 if (!dss_data.irq_enabled && need_isr())
721 dss_register_vsync_isr();
722
723 dispc_mgr_go(mgr->id);
724 }
725
726}
727
Tomi Valkeinendf01d532012-03-07 10:28:48 +0200728static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
729{
730 struct omap_overlay *ovl;
731 struct mgr_priv_data *mp;
732 struct ovl_priv_data *op;
733
734 mp = get_mgr_priv(mgr);
735 mp->shadow_info_dirty = false;
Archit Taneja45324a22012-04-26 19:31:22 +0530736 mp->shadow_extra_info_dirty = false;
Tomi Valkeinendf01d532012-03-07 10:28:48 +0200737
738 list_for_each_entry(ovl, &mgr->overlays, list) {
739 op = get_ovl_priv(ovl);
740 op->shadow_info_dirty = false;
741 op->shadow_extra_info_dirty = false;
742 }
743}
744
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200745void dss_mgr_start_update(struct omap_overlay_manager *mgr)
746{
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +0200747 struct mgr_priv_data *mp = get_mgr_priv(mgr);
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +0200748 unsigned long flags;
Tomi Valkeinen39518352011-11-17 17:35:28 +0200749 int r;
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +0200750
751 spin_lock_irqsave(&data_lock, flags);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200752
Tomi Valkeinen34861372011-11-18 15:43:29 +0200753 WARN_ON(mp->updating);
754
Archit Taneja228b2132012-04-27 01:22:28 +0530755 r = dss_check_settings(mgr);
Tomi Valkeinen39518352011-11-17 17:35:28 +0200756 if (r) {
757 DSSERR("cannot start manual update: illegal configuration\n");
758 spin_unlock_irqrestore(&data_lock, flags);
759 return;
760 }
761
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200762 dss_mgr_write_regs(mgr);
Archit Taneja45324a22012-04-26 19:31:22 +0530763 dss_mgr_write_regs_extra(mgr);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200764
Tomi Valkeinenfb011972011-11-16 15:00:22 +0200765 dss_write_regs_common();
766
Tomi Valkeinen34861372011-11-18 15:43:29 +0200767 mp->updating = true;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200768
Tomi Valkeinen34861372011-11-18 15:43:29 +0200769 if (!dss_data.irq_enabled && need_isr())
770 dss_register_vsync_isr();
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200771
Tomi Valkeinen7797c6d2011-11-04 10:22:46 +0200772 dispc_mgr_enable(mgr->id, true);
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +0200773
Tomi Valkeinendf01d532012-03-07 10:28:48 +0200774 mgr_clear_shadow_dirty(mgr);
775
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +0200776 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200777}
778
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200779static void dss_apply_irq_handler(void *data, u32 mask);
780
781static void dss_register_vsync_isr(void)
782{
Tomi Valkeinenbc1a9512011-11-15 11:20:13 +0200783 const int num_mgrs = dss_feat_get_num_mgrs();
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200784 u32 mask;
Tomi Valkeinenbc1a9512011-11-15 11:20:13 +0200785 int r, i;
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200786
Tomi Valkeinenbc1a9512011-11-15 11:20:13 +0200787 mask = 0;
788 for (i = 0; i < num_mgrs; ++i)
789 mask |= dispc_mgr_get_vsync_irq(i);
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200790
Tomi Valkeinen34861372011-11-18 15:43:29 +0200791 for (i = 0; i < num_mgrs; ++i)
792 mask |= dispc_mgr_get_framedone_irq(i);
793
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200794 r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
795 WARN_ON(r);
796
Tomi Valkeinend09c7aa2011-11-15 12:04:43 +0200797 dss_data.irq_enabled = true;
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200798}
799
800static void dss_unregister_vsync_isr(void)
801{
Tomi Valkeinenbc1a9512011-11-15 11:20:13 +0200802 const int num_mgrs = dss_feat_get_num_mgrs();
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200803 u32 mask;
Tomi Valkeinenbc1a9512011-11-15 11:20:13 +0200804 int r, i;
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200805
Tomi Valkeinenbc1a9512011-11-15 11:20:13 +0200806 mask = 0;
807 for (i = 0; i < num_mgrs; ++i)
808 mask |= dispc_mgr_get_vsync_irq(i);
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200809
Tomi Valkeinen34861372011-11-18 15:43:29 +0200810 for (i = 0; i < num_mgrs; ++i)
811 mask |= dispc_mgr_get_framedone_irq(i);
812
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200813 r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
814 WARN_ON(r);
815
Tomi Valkeinend09c7aa2011-11-15 12:04:43 +0200816 dss_data.irq_enabled = false;
Tomi Valkeinendbce0162011-11-15 11:18:12 +0200817}
818
Tomi Valkeinen76098932011-11-16 12:03:22 +0200819static void dss_apply_irq_handler(void *data, u32 mask)
820{
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200821 const int num_mgrs = dss_feat_get_num_mgrs();
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200822 int i;
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200823 bool extra_updating;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200824
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200825 spin_lock(&data_lock);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200826
Tomi Valkeinen76098932011-11-16 12:03:22 +0200827 /* clear busy, updating flags, shadow_dirty flags */
Tomi Valkeinen43a972d2011-11-15 15:04:25 +0200828 for (i = 0; i < num_mgrs; i++) {
Tomi Valkeinen76098932011-11-16 12:03:22 +0200829 struct omap_overlay_manager *mgr;
830 struct mgr_priv_data *mp;
Tomi Valkeinen5b214172011-11-25 17:27:45 +0200831 bool was_updating;
Tomi Valkeinen76098932011-11-16 12:03:22 +0200832
Tomi Valkeinen43a972d2011-11-15 15:04:25 +0200833 mgr = omap_dss_get_overlay_manager(i);
834 mp = get_mgr_priv(mgr);
835
Tomi Valkeinen76098932011-11-16 12:03:22 +0200836 if (!mp->enabled)
Tomi Valkeinen43a972d2011-11-15 15:04:25 +0200837 continue;
838
Tomi Valkeinen5b214172011-11-25 17:27:45 +0200839 was_updating = mp->updating;
Tomi Valkeinen76098932011-11-16 12:03:22 +0200840 mp->updating = dispc_mgr_is_enabled(i);
Tomi Valkeinen43a972d2011-11-15 15:04:25 +0200841
Tomi Valkeinen76098932011-11-16 12:03:22 +0200842 if (!mgr_manual_update(mgr)) {
Tomi Valkeinen5b214172011-11-25 17:27:45 +0200843 bool was_busy = mp->busy;
Tomi Valkeinen76098932011-11-16 12:03:22 +0200844 mp->busy = dispc_mgr_go_busy(i);
845
Tomi Valkeinen5b214172011-11-25 17:27:45 +0200846 if (was_busy && !mp->busy)
Tomi Valkeinen76098932011-11-16 12:03:22 +0200847 mgr_clear_shadow_dirty(mgr);
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200848 }
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200849 }
850
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200851 dss_write_regs();
Tomi Valkeinen3ab15b22011-11-25 17:32:20 +0200852 dss_set_go_bits();
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200853
Tomi Valkeinenf1577ce2011-11-16 14:37:48 +0200854 extra_updating = extra_info_update_ongoing();
855 if (!extra_updating)
856 complete_all(&extra_updated_completion);
857
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200858 if (!need_isr())
859 dss_unregister_vsync_isr();
Tomi Valkeinen43a972d2011-11-15 15:04:25 +0200860
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200861 spin_unlock(&data_lock);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200862}
863
Tomi Valkeinen5738b632011-11-15 13:37:33 +0200864static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200865{
Tomi Valkeinenc10c6f02011-11-15 11:56:57 +0200866 struct ovl_priv_data *op;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200867
Tomi Valkeinenc10c6f02011-11-15 11:56:57 +0200868 op = get_ovl_priv(ovl);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200869
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +0200870 if (!op->user_info_dirty)
Tomi Valkeinen5738b632011-11-15 13:37:33 +0200871 return;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200872
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +0200873 op->user_info_dirty = false;
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200874 op->info_dirty = true;
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +0200875 op->info = op->user_info;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200876}
877
878static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
879{
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +0200880 struct mgr_priv_data *mp;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200881
Tomi Valkeinenaf3d64b2011-11-15 12:02:03 +0200882 mp = get_mgr_priv(mgr);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200883
Tomi Valkeinen388c4c62011-11-16 13:58:07 +0200884 if (!mp->user_info_dirty)
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200885 return;
886
Tomi Valkeinen388c4c62011-11-16 13:58:07 +0200887 mp->user_info_dirty = false;
Tomi Valkeinen0b53f172011-11-16 14:31:58 +0200888 mp->info_dirty = true;
Tomi Valkeinen388c4c62011-11-16 13:58:07 +0200889 mp->info = mp->user_info;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200890}
891
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200892int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
893{
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200894 unsigned long flags;
Tomi Valkeinen07e327c2011-11-05 10:59:59 +0200895 struct omap_overlay *ovl;
Tomi Valkeinen39518352011-11-17 17:35:28 +0200896 int r;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200897
898 DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
899
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200900 spin_lock_irqsave(&data_lock, flags);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200901
Archit Taneja228b2132012-04-27 01:22:28 +0530902 r = dss_check_settings_apply(mgr);
Tomi Valkeinen39518352011-11-17 17:35:28 +0200903 if (r) {
904 spin_unlock_irqrestore(&data_lock, flags);
905 DSSERR("failed to apply settings: illegal configuration.\n");
906 return r;
907 }
908
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200909 /* Configure overlays */
Tomi Valkeinen07e327c2011-11-05 10:59:59 +0200910 list_for_each_entry(ovl, &mgr->overlays, list)
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200911 omap_dss_mgr_apply_ovl(ovl);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200912
913 /* Configure manager */
914 omap_dss_mgr_apply_mgr(mgr);
915
Tomi Valkeinen75c94962011-11-15 18:25:23 +0200916 dss_write_regs();
Tomi Valkeinen3ab15b22011-11-25 17:32:20 +0200917 dss_set_go_bits();
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200918
Tomi Valkeinen063fd702011-11-15 12:04:10 +0200919 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200920
Tomi Valkeinene70f98a2011-11-16 16:53:44 +0200921 return 0;
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200922}
923
Tomi Valkeinen841c09c2011-11-16 15:25:53 +0200924static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
925{
926 struct ovl_priv_data *op;
927
928 op = get_ovl_priv(ovl);
929
930 if (op->enabled == enable)
931 return;
932
933 op->enabled = enable;
934 op->extra_info_dirty = true;
935}
936
Tomi Valkeinen04576d42011-11-26 14:39:16 +0200937static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
938 u32 fifo_low, u32 fifo_high)
939{
940 struct ovl_priv_data *op = get_ovl_priv(ovl);
941
942 if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
943 return;
944
945 op->fifo_low = fifo_low;
946 op->fifo_high = fifo_high;
947 op->extra_info_dirty = true;
948}
949
Tomi Valkeinenfb011972011-11-16 15:00:22 +0200950static void dss_apply_fifo_merge(bool use_fifo_merge)
951{
952 if (dss_data.fifo_merge == use_fifo_merge)
953 return;
954
955 dss_data.fifo_merge = use_fifo_merge;
956 dss_data.fifo_merge_dirty = true;
957}
958
Tomi Valkeinen1d71f422011-11-16 16:44:08 +0200959static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
960 bool use_fifo_merge)
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +0200961{
962 struct ovl_priv_data *op = get_ovl_priv(ovl);
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +0200963 u32 fifo_low, fifo_high;
964
Tomi Valkeinen75ae1182011-11-26 14:36:19 +0200965 if (!op->enabled && !op->enabling)
966 return;
967
Tomi Valkeinen83fa2f22012-01-13 13:17:01 +0200968 dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
Tomi Valkeinen3568f2a2012-05-15 15:31:01 +0300969 use_fifo_merge, ovl_manual_update(ovl));
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +0200970
Tomi Valkeinen04576d42011-11-26 14:39:16 +0200971 dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +0200972}
973
Tomi Valkeinen1d71f422011-11-16 16:44:08 +0200974static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr,
975 bool use_fifo_merge)
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +0200976{
977 struct omap_overlay *ovl;
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +0200978 struct mgr_priv_data *mp;
979
980 mp = get_mgr_priv(mgr);
981
982 if (!mp->enabled)
983 return;
984
Tomi Valkeinen75ae1182011-11-26 14:36:19 +0200985 list_for_each_entry(ovl, &mgr->overlays, list)
Tomi Valkeinen1d71f422011-11-16 16:44:08 +0200986 dss_ovl_setup_fifo(ovl, use_fifo_merge);
Tomi Valkeinen75ae1182011-11-26 14:36:19 +0200987}
988
Tomi Valkeinen1d71f422011-11-16 16:44:08 +0200989static void dss_setup_fifos(bool use_fifo_merge)
Tomi Valkeinen75ae1182011-11-26 14:36:19 +0200990{
991 const int num_mgrs = omap_dss_get_num_overlay_managers();
992 struct omap_overlay_manager *mgr;
993 int i;
994
995 for (i = 0; i < num_mgrs; ++i) {
996 mgr = omap_dss_get_overlay_manager(i);
Tomi Valkeinen1d71f422011-11-16 16:44:08 +0200997 dss_mgr_setup_fifos(mgr, use_fifo_merge);
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +0200998 }
999}
1000
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001001static int get_num_used_managers(void)
1002{
1003 const int num_mgrs = omap_dss_get_num_overlay_managers();
1004 struct omap_overlay_manager *mgr;
1005 struct mgr_priv_data *mp;
1006 int i;
1007 int enabled_mgrs;
1008
1009 enabled_mgrs = 0;
1010
1011 for (i = 0; i < num_mgrs; ++i) {
1012 mgr = omap_dss_get_overlay_manager(i);
1013 mp = get_mgr_priv(mgr);
1014
1015 if (!mp->enabled)
1016 continue;
1017
1018 enabled_mgrs++;
1019 }
1020
1021 return enabled_mgrs;
1022}
1023
1024static int get_num_used_overlays(void)
1025{
1026 const int num_ovls = omap_dss_get_num_overlays();
1027 struct omap_overlay *ovl;
1028 struct ovl_priv_data *op;
1029 struct mgr_priv_data *mp;
1030 int i;
1031 int enabled_ovls;
1032
1033 enabled_ovls = 0;
1034
1035 for (i = 0; i < num_ovls; ++i) {
1036 ovl = omap_dss_get_overlay(i);
1037 op = get_ovl_priv(ovl);
1038
1039 if (!op->enabled && !op->enabling)
1040 continue;
1041
1042 mp = get_mgr_priv(ovl->manager);
1043
1044 if (!mp->enabled)
1045 continue;
1046
1047 enabled_ovls++;
1048 }
1049
1050 return enabled_ovls;
1051}
1052
1053static bool get_use_fifo_merge(void)
1054{
1055 int enabled_mgrs = get_num_used_managers();
1056 int enabled_ovls = get_num_used_overlays();
1057
1058 if (!dss_has_feature(FEAT_FIFO_MERGE))
1059 return false;
1060
1061 /*
1062 * In theory the only requirement for fifomerge is enabled_ovls <= 1.
1063 * However, if we have two managers enabled and set/unset the fifomerge,
1064 * we need to set the GO bits in particular sequence for the managers,
1065 * and wait in between.
1066 *
1067 * This is rather difficult as new apply calls can happen at any time,
1068 * so we simplify the problem by requiring also that enabled_mgrs <= 1.
1069 * In practice this shouldn't matter, because when only one overlay is
1070 * enabled, most likely only one output is enabled.
1071 */
1072
1073 return enabled_mgrs <= 1 && enabled_ovls <= 1;
1074}
1075
Tomi Valkeinen2a4ee7e2011-11-21 13:34:48 +02001076int dss_mgr_enable(struct omap_overlay_manager *mgr)
Tomi Valkeinen7797c6d2011-11-04 10:22:46 +02001077{
Tomi Valkeinenbf213522011-11-15 14:43:53 +02001078 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1079 unsigned long flags;
Tomi Valkeinen39518352011-11-17 17:35:28 +02001080 int r;
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001081 bool fifo_merge;
Tomi Valkeinenbf213522011-11-15 14:43:53 +02001082
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001083 mutex_lock(&apply_lock);
1084
Tomi Valkeinene4f7ad72011-11-16 16:01:33 +02001085 if (mp->enabled)
1086 goto out;
1087
Tomi Valkeinenbf213522011-11-15 14:43:53 +02001088 spin_lock_irqsave(&data_lock, flags);
1089
1090 mp->enabled = true;
Tomi Valkeinena6b24f82011-11-26 14:29:39 +02001091
Archit Taneja228b2132012-04-27 01:22:28 +05301092 r = dss_check_settings(mgr);
Tomi Valkeinen39518352011-11-17 17:35:28 +02001093 if (r) {
1094 DSSERR("failed to enable manager %d: check_settings failed\n",
1095 mgr->id);
Tomi Valkeinen2a4ee7e2011-11-21 13:34:48 +02001096 goto err;
Tomi Valkeinen39518352011-11-17 17:35:28 +02001097 }
1098
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001099 /* step 1: setup fifos/fifomerge before enabling the manager */
1100
1101 fifo_merge = get_use_fifo_merge();
1102 dss_setup_fifos(fifo_merge);
1103 dss_apply_fifo_merge(fifo_merge);
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +02001104
Tomi Valkeinen75c94962011-11-15 18:25:23 +02001105 dss_write_regs();
Tomi Valkeinen3ab15b22011-11-25 17:32:20 +02001106 dss_set_go_bits();
Tomi Valkeinen75c94962011-11-15 18:25:23 +02001107
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001108 spin_unlock_irqrestore(&data_lock, flags);
1109
1110 /* wait until fifo config is in */
1111 wait_pending_extra_info_updates();
1112
1113 /* step 2: enable the manager */
1114 spin_lock_irqsave(&data_lock, flags);
1115
Tomi Valkeinen34861372011-11-18 15:43:29 +02001116 if (!mgr_manual_update(mgr))
1117 mp->updating = true;
1118
Tomi Valkeinenbf213522011-11-15 14:43:53 +02001119 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001120
Tomi Valkeinen75c94962011-11-15 18:25:23 +02001121 if (!mgr_manual_update(mgr))
1122 dispc_mgr_enable(mgr->id, true);
1123
Tomi Valkeinene4f7ad72011-11-16 16:01:33 +02001124out:
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001125 mutex_unlock(&apply_lock);
Tomi Valkeinen2a4ee7e2011-11-21 13:34:48 +02001126
1127 return 0;
1128
1129err:
Tomi Valkeinena6b24f82011-11-26 14:29:39 +02001130 mp->enabled = false;
Tomi Valkeinen2a4ee7e2011-11-21 13:34:48 +02001131 spin_unlock_irqrestore(&data_lock, flags);
1132 mutex_unlock(&apply_lock);
1133 return r;
Tomi Valkeinen7797c6d2011-11-04 10:22:46 +02001134}
1135
1136void dss_mgr_disable(struct omap_overlay_manager *mgr)
1137{
Tomi Valkeinenbf213522011-11-15 14:43:53 +02001138 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1139 unsigned long flags;
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001140 bool fifo_merge;
Tomi Valkeinenbf213522011-11-15 14:43:53 +02001141
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001142 mutex_lock(&apply_lock);
1143
Tomi Valkeinene4f7ad72011-11-16 16:01:33 +02001144 if (!mp->enabled)
1145 goto out;
1146
Tomi Valkeinen9a147a62011-11-09 15:30:11 +02001147 if (!mgr_manual_update(mgr))
1148 dispc_mgr_enable(mgr->id, false);
Tomi Valkeinenbf213522011-11-15 14:43:53 +02001149
1150 spin_lock_irqsave(&data_lock, flags);
1151
Tomi Valkeinen34861372011-11-18 15:43:29 +02001152 mp->updating = false;
Tomi Valkeinenbf213522011-11-15 14:43:53 +02001153 mp->enabled = false;
1154
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001155 fifo_merge = get_use_fifo_merge();
1156 dss_setup_fifos(fifo_merge);
1157 dss_apply_fifo_merge(fifo_merge);
1158
1159 dss_write_regs();
1160 dss_set_go_bits();
1161
Tomi Valkeinenbf213522011-11-15 14:43:53 +02001162 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001163
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001164 wait_pending_extra_info_updates();
Tomi Valkeinene4f7ad72011-11-16 16:01:33 +02001165out:
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001166 mutex_unlock(&apply_lock);
Tomi Valkeinen7797c6d2011-11-04 10:22:46 +02001167}
1168
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001169int dss_mgr_set_info(struct omap_overlay_manager *mgr,
1170 struct omap_overlay_manager_info *info)
1171{
Tomi Valkeinen388c4c62011-11-16 13:58:07 +02001172 struct mgr_priv_data *mp = get_mgr_priv(mgr);
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001173 unsigned long flags;
Tomi Valkeinenf17d04f2011-11-17 14:31:09 +02001174 int r;
1175
1176 r = dss_mgr_simple_check(mgr, info);
1177 if (r)
1178 return r;
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001179
1180 spin_lock_irqsave(&data_lock, flags);
1181
Tomi Valkeinen388c4c62011-11-16 13:58:07 +02001182 mp->user_info = *info;
1183 mp->user_info_dirty = true;
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001184
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001185 spin_unlock_irqrestore(&data_lock, flags);
1186
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001187 return 0;
1188}
1189
1190void dss_mgr_get_info(struct omap_overlay_manager *mgr,
1191 struct omap_overlay_manager_info *info)
1192{
Tomi Valkeinen388c4c62011-11-16 13:58:07 +02001193 struct mgr_priv_data *mp = get_mgr_priv(mgr);
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001194 unsigned long flags;
1195
1196 spin_lock_irqsave(&data_lock, flags);
1197
Tomi Valkeinen388c4c62011-11-16 13:58:07 +02001198 *info = mp->user_info;
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001199
1200 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001201}
1202
1203int dss_mgr_set_device(struct omap_overlay_manager *mgr,
1204 struct omap_dss_device *dssdev)
1205{
1206 int r;
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001207
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001208 mutex_lock(&apply_lock);
1209
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001210 if (dssdev->manager) {
1211 DSSERR("display '%s' already has a manager '%s'\n",
1212 dssdev->name, dssdev->manager->name);
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001213 r = -EINVAL;
1214 goto err;
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001215 }
1216
1217 if ((mgr->supported_displays & dssdev->type) == 0) {
1218 DSSERR("display '%s' does not support manager '%s'\n",
1219 dssdev->name, mgr->name);
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001220 r = -EINVAL;
1221 goto err;
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001222 }
1223
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001224 dssdev->manager = mgr;
1225 mgr->device = dssdev;
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001226
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001227 mutex_unlock(&apply_lock);
1228
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001229 return 0;
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001230err:
1231 mutex_unlock(&apply_lock);
1232 return r;
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001233}
1234
1235int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
1236{
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001237 int r;
1238
1239 mutex_lock(&apply_lock);
1240
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001241 if (!mgr->device) {
1242 DSSERR("failed to unset display, display not set.\n");
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001243 r = -EINVAL;
1244 goto err;
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001245 }
1246
1247 /*
1248 * Don't allow currently enabled displays to have the overlay manager
1249 * pulled out from underneath them
1250 */
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001251 if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
1252 r = -EINVAL;
1253 goto err;
1254 }
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001255
1256 mgr->device->manager = NULL;
1257 mgr->device = NULL;
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001258
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001259 mutex_unlock(&apply_lock);
1260
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001261 return 0;
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001262err:
1263 mutex_unlock(&apply_lock);
1264 return r;
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001265}
1266
Archit Taneja45324a22012-04-26 19:31:22 +05301267static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
1268 struct omap_video_timings *timings)
1269{
1270 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1271
1272 mp->timings = *timings;
1273 mp->extra_info_dirty = true;
1274}
1275
1276void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
1277 struct omap_video_timings *timings)
1278{
1279 unsigned long flags;
1280
1281 mutex_lock(&apply_lock);
1282
1283 spin_lock_irqsave(&data_lock, flags);
1284
1285 dss_apply_mgr_timings(mgr, timings);
1286
1287 dss_write_regs();
1288 dss_set_go_bits();
1289
1290 spin_unlock_irqrestore(&data_lock, flags);
1291
1292 wait_pending_extra_info_updates();
1293
1294 mutex_unlock(&apply_lock);
1295}
Tomi Valkeineneb70d732011-11-15 12:15:18 +02001296
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001297int dss_ovl_set_info(struct omap_overlay *ovl,
1298 struct omap_overlay_info *info)
1299{
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +02001300 struct ovl_priv_data *op = get_ovl_priv(ovl);
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001301 unsigned long flags;
Tomi Valkeinenfcc764d2011-11-17 14:26:48 +02001302 int r;
1303
1304 r = dss_ovl_simple_check(ovl, info);
1305 if (r)
1306 return r;
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001307
1308 spin_lock_irqsave(&data_lock, flags);
1309
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +02001310 op->user_info = *info;
1311 op->user_info_dirty = true;
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001312
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001313 spin_unlock_irqrestore(&data_lock, flags);
1314
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001315 return 0;
1316}
1317
1318void dss_ovl_get_info(struct omap_overlay *ovl,
1319 struct omap_overlay_info *info)
1320{
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +02001321 struct ovl_priv_data *op = get_ovl_priv(ovl);
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001322 unsigned long flags;
1323
1324 spin_lock_irqsave(&data_lock, flags);
1325
Tomi Valkeinenc1a9feb2011-11-16 14:11:56 +02001326 *info = op->user_info;
Tomi Valkeinene0a2aa5b2011-11-15 14:32:57 +02001327
1328 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001329}
1330
1331int dss_ovl_set_manager(struct omap_overlay *ovl,
1332 struct omap_overlay_manager *mgr)
1333{
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001334 struct ovl_priv_data *op = get_ovl_priv(ovl);
1335 unsigned long flags;
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001336 int r;
1337
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001338 if (!mgr)
1339 return -EINVAL;
1340
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001341 mutex_lock(&apply_lock);
1342
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001343 if (ovl->manager) {
1344 DSSERR("overlay '%s' already has a manager '%s'\n",
1345 ovl->name, ovl->manager->name);
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001346 r = -EINVAL;
1347 goto err;
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001348 }
1349
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001350 spin_lock_irqsave(&data_lock, flags);
1351
1352 if (op->enabled) {
1353 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001354 DSSERR("overlay has to be disabled to change the manager\n");
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001355 r = -EINVAL;
1356 goto err;
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001357 }
1358
Tomi Valkeinen5d5a97a2011-11-16 14:17:54 +02001359 op->channel = mgr->id;
1360 op->extra_info_dirty = true;
1361
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001362 ovl->manager = mgr;
1363 list_add_tail(&ovl->list, &mgr->overlays);
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001364
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001365 spin_unlock_irqrestore(&data_lock, flags);
1366
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001367 /* XXX: When there is an overlay on a DSI manual update display, and
1368 * the overlay is first disabled, then moved to tv, and enabled, we
1369 * seem to get SYNC_LOST_DIGIT error.
1370 *
1371 * Waiting doesn't seem to help, but updating the manual update display
1372 * after disabling the overlay seems to fix this. This hints that the
1373 * overlay is perhaps somehow tied to the LCD output until the output
1374 * is updated.
1375 *
1376 * Userspace workaround for this is to update the LCD after disabling
1377 * the overlay, but before moving the overlay to TV.
1378 */
1379
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001380 mutex_unlock(&apply_lock);
1381
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001382 return 0;
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001383err:
1384 mutex_unlock(&apply_lock);
1385 return r;
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001386}
1387
1388int dss_ovl_unset_manager(struct omap_overlay *ovl)
1389{
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001390 struct ovl_priv_data *op = get_ovl_priv(ovl);
1391 unsigned long flags;
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001392 int r;
1393
1394 mutex_lock(&apply_lock);
1395
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001396 if (!ovl->manager) {
1397 DSSERR("failed to detach overlay: manager not set\n");
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001398 r = -EINVAL;
1399 goto err;
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001400 }
1401
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001402 spin_lock_irqsave(&data_lock, flags);
1403
1404 if (op->enabled) {
1405 spin_unlock_irqrestore(&data_lock, flags);
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001406 DSSERR("overlay has to be disabled to unset the manager\n");
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001407 r = -EINVAL;
1408 goto err;
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001409 }
1410
Tomi Valkeinen5d5a97a2011-11-16 14:17:54 +02001411 op->channel = -1;
1412
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001413 ovl->manager = NULL;
1414 list_del(&ovl->list);
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001415
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001416 spin_unlock_irqrestore(&data_lock, flags);
1417
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001418 mutex_unlock(&apply_lock);
1419
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001420 return 0;
Tomi Valkeinen5558db32011-11-15 14:28:48 +02001421err:
1422 mutex_unlock(&apply_lock);
1423 return r;
Tomi Valkeinenf77b3072011-11-15 12:11:11 +02001424}
1425
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001426bool dss_ovl_is_enabled(struct omap_overlay *ovl)
1427{
1428 struct ovl_priv_data *op = get_ovl_priv(ovl);
1429 unsigned long flags;
1430 bool e;
1431
1432 spin_lock_irqsave(&data_lock, flags);
1433
1434 e = op->enabled;
1435
1436 spin_unlock_irqrestore(&data_lock, flags);
1437
1438 return e;
1439}
1440
1441int dss_ovl_enable(struct omap_overlay *ovl)
1442{
1443 struct ovl_priv_data *op = get_ovl_priv(ovl);
1444 unsigned long flags;
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001445 bool fifo_merge;
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001446 int r;
1447
1448 mutex_lock(&apply_lock);
1449
Tomi Valkeinene4f7ad72011-11-16 16:01:33 +02001450 if (op->enabled) {
1451 r = 0;
Tomi Valkeinen39518352011-11-17 17:35:28 +02001452 goto err1;
Tomi Valkeinene4f7ad72011-11-16 16:01:33 +02001453 }
1454
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001455 if (ovl->manager == NULL || ovl->manager->device == NULL) {
1456 r = -EINVAL;
Tomi Valkeinen39518352011-11-17 17:35:28 +02001457 goto err1;
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001458 }
1459
1460 spin_lock_irqsave(&data_lock, flags);
1461
Tomi Valkeinen82153ed2011-11-26 14:26:46 +02001462 op->enabling = true;
1463
Archit Taneja228b2132012-04-27 01:22:28 +05301464 r = dss_check_settings(ovl->manager);
Tomi Valkeinen39518352011-11-17 17:35:28 +02001465 if (r) {
1466 DSSERR("failed to enable overlay %d: check_settings failed\n",
1467 ovl->id);
1468 goto err2;
1469 }
1470
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001471 /* step 1: configure fifos/fifomerge for currently enabled ovls */
1472
1473 fifo_merge = get_use_fifo_merge();
1474 dss_setup_fifos(fifo_merge);
1475 dss_apply_fifo_merge(fifo_merge);
1476
1477 dss_write_regs();
1478 dss_set_go_bits();
1479
1480 spin_unlock_irqrestore(&data_lock, flags);
1481
1482 /* wait for fifo configs to go in */
1483 wait_pending_extra_info_updates();
1484
1485 /* step 2: enable the overlay */
1486 spin_lock_irqsave(&data_lock, flags);
Tomi Valkeinen6dc802e2011-11-16 14:28:12 +02001487
Tomi Valkeinen82153ed2011-11-26 14:26:46 +02001488 op->enabling = false;
1489 dss_apply_ovl_enable(ovl, true);
1490
Tomi Valkeinen75c94962011-11-15 18:25:23 +02001491 dss_write_regs();
Tomi Valkeinen3ab15b22011-11-25 17:32:20 +02001492 dss_set_go_bits();
Tomi Valkeinen75c94962011-11-15 18:25:23 +02001493
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001494 spin_unlock_irqrestore(&data_lock, flags);
1495
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001496 /* wait for overlay to be enabled */
1497 wait_pending_extra_info_updates();
1498
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001499 mutex_unlock(&apply_lock);
1500
1501 return 0;
Tomi Valkeinen39518352011-11-17 17:35:28 +02001502err2:
Tomi Valkeinen82153ed2011-11-26 14:26:46 +02001503 op->enabling = false;
Tomi Valkeinen39518352011-11-17 17:35:28 +02001504 spin_unlock_irqrestore(&data_lock, flags);
1505err1:
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001506 mutex_unlock(&apply_lock);
1507 return r;
1508}
1509
1510int dss_ovl_disable(struct omap_overlay *ovl)
1511{
1512 struct ovl_priv_data *op = get_ovl_priv(ovl);
1513 unsigned long flags;
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001514 bool fifo_merge;
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001515 int r;
1516
1517 mutex_lock(&apply_lock);
1518
Tomi Valkeinene4f7ad72011-11-16 16:01:33 +02001519 if (!op->enabled) {
1520 r = 0;
1521 goto err;
1522 }
1523
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001524 if (ovl->manager == NULL || ovl->manager->device == NULL) {
1525 r = -EINVAL;
1526 goto err;
1527 }
1528
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001529 /* step 1: disable the overlay */
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001530 spin_lock_irqsave(&data_lock, flags);
1531
Tomi Valkeinen841c09c2011-11-16 15:25:53 +02001532 dss_apply_ovl_enable(ovl, false);
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001533
Tomi Valkeinen75c94962011-11-15 18:25:23 +02001534 dss_write_regs();
Tomi Valkeinen3ab15b22011-11-25 17:32:20 +02001535 dss_set_go_bits();
Tomi Valkeinen75c94962011-11-15 18:25:23 +02001536
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001537 spin_unlock_irqrestore(&data_lock, flags);
1538
Tomi Valkeinen1d71f422011-11-16 16:44:08 +02001539 /* wait for the overlay to be disabled */
1540 wait_pending_extra_info_updates();
1541
1542 /* step 2: configure fifos/fifomerge */
1543 spin_lock_irqsave(&data_lock, flags);
1544
1545 fifo_merge = get_use_fifo_merge();
1546 dss_setup_fifos(fifo_merge);
1547 dss_apply_fifo_merge(fifo_merge);
1548
1549 dss_write_regs();
1550 dss_set_go_bits();
1551
1552 spin_unlock_irqrestore(&data_lock, flags);
1553
1554 /* wait for fifo config to go in */
1555 wait_pending_extra_info_updates();
1556
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +02001557 mutex_unlock(&apply_lock);
1558
1559 return 0;
1560
1561err:
1562 mutex_unlock(&apply_lock);
1563 return r;
1564}
1565