blob: 36a9b83a6174d93f703bf76795e7ba140901c739 [file] [log] [blame]
Wu, Fengguang91504872008-11-05 11:16:56 +08001/*
2 *
3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
4 *
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
10 *
11 * Maintained by:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 * for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/slab.h>
32#include <sound/core.h>
Wu, Fengguang91504872008-11-05 11:16:56 +080033#include "hda_codec.h"
34#include "hda_local.h"
Wu, Fengguang91504872008-11-05 11:16:56 +080035
Wu Fengguang54a25f82009-10-30 11:44:26 +010036/*
37 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
38 * could support two independent pipes, each of them can be connected to one or
39 * more ports (DVI, HDMI or DisplayPort).
40 *
41 * The HDA correspondence of pipes/ports are converter/pin nodes.
42 */
Wu Fengguange48b0082010-05-14 16:36:14 +080043#define MAX_HDMI_CVTS 3
Wu Fengguang079d88c2010-03-08 10:44:23 +080044#define MAX_HDMI_PINS 3
Wu, Fengguang91504872008-11-05 11:16:56 +080045
Wu Fengguang079d88c2010-03-08 10:44:23 +080046#include "patch_hdmi.c"
47
48static char *intel_hdmi_pcm_names[MAX_HDMI_CVTS] = {
Wu Fengguang54a25f82009-10-30 11:44:26 +010049 "INTEL HDMI 0",
50 "INTEL HDMI 1",
Wu Fengguange48b0082010-05-14 16:36:14 +080051 "INTEL HDMI 2",
Wu Fengguang54a25f82009-10-30 11:44:26 +010052};
Wu, Fengguang91504872008-11-05 11:16:56 +080053
Wu, Fengguang91504872008-11-05 11:16:56 +080054/*
Wu Fengguang079d88c2010-03-08 10:44:23 +080055 * HDMI callbacks
Wu Fengguang698544d2008-11-19 08:56:17 +080056 */
Wu Fengguang57791912009-11-18 12:38:06 +080057
Wu, Fengguang91504872008-11-05 11:16:56 +080058static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
59 struct hda_codec *codec,
60 unsigned int stream_tag,
61 unsigned int format,
62 struct snd_pcm_substream *substream)
63{
Wu Fengguang54a25f82009-10-30 11:44:26 +010064 hdmi_set_channel_count(codec, hinfo->nid,
Wu Fengguang7bedb012009-10-30 11:41:44 +010065 substream->runtime->channels);
Wu, Fengguang91504872008-11-05 11:16:56 +080066
Wu Fengguang54a25f82009-10-30 11:44:26 +010067 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
Wu, Fengguang91504872008-11-05 11:16:56 +080068
Anssi Hannulaea87d1c2010-08-03 13:28:58 +030069 return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
Wu, Fengguang91504872008-11-05 11:16:56 +080070}
71
72static struct hda_pcm_stream intel_hdmi_pcm_playback = {
73 .substreams = 1,
74 .channels_min = 2,
Wu, Fengguang91504872008-11-05 11:16:56 +080075 .ops = {
Takashi Iwaibbbe3392010-08-13 08:45:23 +020076 .open = hdmi_pcm_open,
Wu Fengguang70ca35f2009-10-30 11:42:18 +010077 .prepare = intel_hdmi_playback_pcm_prepare,
Wu, Fengguang91504872008-11-05 11:16:56 +080078 },
79};
80
81static int intel_hdmi_build_pcms(struct hda_codec *codec)
82{
Wu Fengguang079d88c2010-03-08 10:44:23 +080083 struct hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +010084 struct hda_pcm *info = spec->pcm_rec;
85 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +080086
Wu Fengguang54a25f82009-10-30 11:44:26 +010087 codec->num_pcms = spec->num_cvts;
Wu, Fengguang91504872008-11-05 11:16:56 +080088 codec->pcm_info = info;
89
Wu Fengguang54a25f82009-10-30 11:44:26 +010090 for (i = 0; i < codec->num_pcms; i++, info++) {
Wu Fengguang69fb3462009-10-30 11:45:04 +010091 unsigned int chans;
92
93 chans = get_wcaps(codec, spec->cvt[i]);
94 chans = get_wcaps_channels(chans);
95
Wu Fengguang54a25f82009-10-30 11:44:26 +010096 info->name = intel_hdmi_pcm_names[i];
97 info->pcm_type = HDA_PCM_TYPE_HDMI;
98 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
99 intel_hdmi_pcm_playback;
100 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
Wu Fengguang69fb3462009-10-30 11:45:04 +0100101 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100102 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800103
104 return 0;
105}
106
107static int intel_hdmi_build_controls(struct hda_codec *codec)
108{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800109 struct hdmi_spec *spec = codec->spec;
Wu, Fengguang91504872008-11-05 11:16:56 +0800110 int err;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100111 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800112
Wu Fengguang54a25f82009-10-30 11:44:26 +0100113 for (i = 0; i < codec->num_pcms; i++) {
114 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
115 if (err < 0)
116 return err;
117 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800118
119 return 0;
120}
121
122static int intel_hdmi_init(struct hda_codec *codec)
123{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800124 struct hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100125 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800126
Wu Fengguang54a25f82009-10-30 11:44:26 +0100127 for (i = 0; spec->pin[i]; i++) {
128 hdmi_enable_output(codec, spec->pin[i]);
129 snd_hda_codec_write(codec, spec->pin[i], 0,
130 AC_VERB_SET_UNSOLICITED_ENABLE,
131 AC_USRSP_EN | spec->pin[i]);
132 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800133 return 0;
134}
135
136static void intel_hdmi_free(struct hda_codec *codec)
137{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800138 struct hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100139 int i;
Takashi Iwaif208dba2008-11-21 09:11:50 +0100140
Wu Fengguang54a25f82009-10-30 11:44:26 +0100141 for (i = 0; i < spec->num_pins; i++)
142 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
143
Takashi Iwaif208dba2008-11-21 09:11:50 +0100144 kfree(spec);
Wu, Fengguang91504872008-11-05 11:16:56 +0800145}
146
147static struct hda_codec_ops intel_hdmi_patch_ops = {
148 .init = intel_hdmi_init,
149 .free = intel_hdmi_free,
150 .build_pcms = intel_hdmi_build_pcms,
151 .build_controls = intel_hdmi_build_controls,
Wu Fengguang079d88c2010-03-08 10:44:23 +0800152 .unsol_event = hdmi_unsol_event,
Wu, Fengguang91504872008-11-05 11:16:56 +0800153};
154
Wu Fengguangfd080b22009-10-30 11:46:22 +0100155static int patch_intel_hdmi(struct hda_codec *codec)
Wu, Fengguang91504872008-11-05 11:16:56 +0800156{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800157 struct hdmi_spec *spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100158 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800159
160 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
161 if (spec == NULL)
162 return -ENOMEM;
163
Wu, Fengguang91504872008-11-05 11:16:56 +0800164 codec->spec = spec;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800165 if (hdmi_parse_codec(codec) < 0) {
Wu Fengguangf4243672009-10-30 11:45:35 +0100166 codec->spec = NULL;
167 kfree(spec);
168 return -EINVAL;
169 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800170 codec->patch_ops = intel_hdmi_patch_ops;
171
Wu Fengguang54a25f82009-10-30 11:44:26 +0100172 for (i = 0; i < spec->num_pins; i++)
173 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
Wu Fengguang5f1e71b2008-11-18 11:47:53 +0800174
Wu Fengguang698544d2008-11-19 08:56:17 +0800175 init_channel_allocations();
176
Wu, Fengguang91504872008-11-05 11:16:56 +0800177 return 0;
178}
179
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100180static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
Wu Fengguang41da2e02010-05-14 16:36:13 +0800181{ .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_intel_hdmi },
182{ .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_intel_hdmi },
183{ .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_intel_hdmi },
184{ .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_intel_hdmi },
185{ .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_intel_hdmi },
186{ .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_intel_hdmi },
Wu Fengguange48b0082010-05-14 16:36:14 +0800187{ .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_intel_hdmi },
Wu Fengguang41da2e02010-05-14 16:36:13 +0800188{ .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
189{} /* terminator */
Wu, Fengguang91504872008-11-05 11:16:56 +0800190};
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100191
192MODULE_ALIAS("snd-hda-codec-id:808629fb");
193MODULE_ALIAS("snd-hda-codec-id:80862801");
194MODULE_ALIAS("snd-hda-codec-id:80862802");
195MODULE_ALIAS("snd-hda-codec-id:80862803");
Wu Fengguanga57c0eb2009-02-11 15:22:31 +0800196MODULE_ALIAS("snd-hda-codec-id:80862804");
Wu Fengguange48b0082010-05-14 16:36:14 +0800197MODULE_ALIAS("snd-hda-codec-id:80862805");
Jaroslav Kysela87a8c372009-07-23 10:58:29 +0200198MODULE_ALIAS("snd-hda-codec-id:80860054");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100199MODULE_ALIAS("snd-hda-codec-id:10951392");
200
201MODULE_LICENSE("GPL");
202MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
203
204static struct hda_codec_preset_list intel_list = {
205 .preset = snd_hda_preset_intelhdmi,
206 .owner = THIS_MODULE,
207};
208
209static int __init patch_intelhdmi_init(void)
210{
211 return snd_hda_add_codec_preset(&intel_list);
212}
213
214static void __exit patch_intelhdmi_exit(void)
215{
216 snd_hda_delete_codec_preset(&intel_list);
217}
218
219module_init(patch_intelhdmi_init)
220module_exit(patch_intelhdmi_exit)