| Michael-Luke Jones | 28bd3a0 | 2007-04-28 08:31:40 +0100 | [diff] [blame] | 1 | /* |
| 2 | * DSM-G600 board-level PCI initialization |
| 3 | * |
| 4 | * Copyright (C) 2006 Tower Technologies |
| 5 | * Author: Alessandro Zummo <a.zummo@towertech.it> |
| 6 | * |
| 7 | * based on ixdp425-pci.c: |
| 8 | * Copyright (C) 2002 Intel Corporation. |
| 9 | * Copyright (C) 2003-2004 MontaVista Software, Inc. |
| 10 | * |
| 11 | * Maintainer: http://www.nslu2-linux.org/ |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License version 2 as |
| 15 | * published by the Free Software Foundation. |
| 16 | * |
| 17 | */ |
| 18 | |
| 19 | #include <linux/pci.h> |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/irq.h> |
| Michael-Luke Jones | 28bd3a0 | 2007-04-28 08:31:40 +0100 | [diff] [blame] | 22 | #include <asm/mach/pci.h> |
| 23 | #include <asm/mach-types.h> |
| 24 | |
| Krzysztof Hałasa | 395e712 | 2009-11-16 21:56:56 +0100 | [diff] [blame^] | 25 | #define DSMG600_PCI_MAX_DEV 4 |
| 26 | #define DSMG600_PCI_IRQ_LINES 3 |
| 27 | |
| 28 | /* PCI controller GPIO to IRQ pin mappings */ |
| 29 | #define DSMG600_PCI_INTA_PIN 11 |
| 30 | #define DSMG600_PCI_INTB_PIN 10 |
| 31 | #define DSMG600_PCI_INTC_PIN 9 |
| 32 | #define DSMG600_PCI_INTD_PIN 8 |
| 33 | #define DSMG600_PCI_INTE_PIN 7 |
| 34 | #define DSMG600_PCI_INTF_PIN 6 |
| 35 | |
| 36 | #define IRQ_DSMG600_PCI_INTA IRQ_IXP4XX_GPIO11 |
| 37 | #define IRQ_DSMG600_PCI_INTB IRQ_IXP4XX_GPIO10 |
| 38 | #define IRQ_DSMG600_PCI_INTC IRQ_IXP4XX_GPIO9 |
| 39 | #define IRQ_DSMG600_PCI_INTD IRQ_IXP4XX_GPIO8 |
| 40 | #define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7 |
| 41 | #define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6 |
| 42 | |
| Michael-Luke Jones | 28bd3a0 | 2007-04-28 08:31:40 +0100 | [diff] [blame] | 43 | void __init dsmg600_pci_preinit(void) |
| 44 | { |
| Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 45 | set_irq_type(IRQ_DSMG600_PCI_INTA, IRQ_TYPE_LEVEL_LOW); |
| 46 | set_irq_type(IRQ_DSMG600_PCI_INTB, IRQ_TYPE_LEVEL_LOW); |
| 47 | set_irq_type(IRQ_DSMG600_PCI_INTC, IRQ_TYPE_LEVEL_LOW); |
| 48 | set_irq_type(IRQ_DSMG600_PCI_INTD, IRQ_TYPE_LEVEL_LOW); |
| 49 | set_irq_type(IRQ_DSMG600_PCI_INTE, IRQ_TYPE_LEVEL_LOW); |
| 50 | set_irq_type(IRQ_DSMG600_PCI_INTF, IRQ_TYPE_LEVEL_LOW); |
| Michael-Luke Jones | 28bd3a0 | 2007-04-28 08:31:40 +0100 | [diff] [blame] | 51 | |
| 52 | ixp4xx_pci_preinit(); |
| 53 | } |
| 54 | |
| 55 | static int __init dsmg600_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 56 | { |
| 57 | static int pci_irq_table[DSMG600_PCI_MAX_DEV][DSMG600_PCI_IRQ_LINES] = |
| 58 | { |
| 59 | { IRQ_DSMG600_PCI_INTE, -1, -1 }, |
| 60 | { IRQ_DSMG600_PCI_INTA, -1, -1 }, |
| 61 | { IRQ_DSMG600_PCI_INTB, IRQ_DSMG600_PCI_INTC, IRQ_DSMG600_PCI_INTD }, |
| 62 | { IRQ_DSMG600_PCI_INTF, -1, -1 }, |
| 63 | }; |
| 64 | |
| 65 | int irq = -1; |
| 66 | |
| 67 | if (slot >= 1 && slot <= DSMG600_PCI_MAX_DEV && |
| 68 | pin >= 1 && pin <= DSMG600_PCI_IRQ_LINES) |
| 69 | irq = pci_irq_table[slot-1][pin-1]; |
| 70 | |
| 71 | return irq; |
| 72 | } |
| 73 | |
| 74 | struct hw_pci __initdata dsmg600_pci = { |
| 75 | .nr_controllers = 1, |
| 76 | .preinit = dsmg600_pci_preinit, |
| 77 | .swizzle = pci_std_swizzle, |
| 78 | .setup = ixp4xx_setup, |
| 79 | .scan = ixp4xx_scan_bus, |
| 80 | .map_irq = dsmg600_map_irq, |
| 81 | }; |
| 82 | |
| 83 | int __init dsmg600_pci_init(void) |
| 84 | { |
| 85 | if (machine_is_dsmg600()) |
| 86 | pci_common_init(&dsmg600_pci); |
| 87 | |
| 88 | return 0; |
| 89 | } |
| 90 | |
| 91 | subsys_initcall(dsmg600_pci_init); |