blob: 0921e454185b52bb03870b7d473ebd5b3a0a453e [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatre01f81622009-01-08 10:20:02 -08003 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
Winkler, Tomas759ef892008-12-09 11:28:58 -080022 * Intel Linux Wireless <ilw@linux.intel.com>
Zhu Yib481de92007-09-25 17:54:57 -070023 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
Zhu Yib481de92007-09-25 17:54:57 -070029#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/dma-mapping.h>
32#include <linux/delay.h>
33#include <linux/skbuff.h>
34#include <linux/netdevice.h>
35#include <linux/wireless.h>
36#include <net/mac80211.h>
Zhu Yib481de92007-09-25 17:54:57 -070037#include <linux/etherdevice.h>
Zhu Yi12342c42007-12-20 11:27:32 +080038#include <asm/unaligned.h>
Zhu Yib481de92007-09-25 17:54:57 -070039
Assaf Krauss6bc913b2008-03-11 16:17:18 -070040#include "iwl-eeprom.h"
Tomas Winkler3e0d4cb2008-04-24 11:55:38 -070041#include "iwl-dev.h"
Tomas Winklerfee12472008-04-03 16:05:21 -070042#include "iwl-core.h"
Tomas Winkler3395f6e2008-03-25 16:33:37 -070043#include "iwl-io.h"
Zhu Yib481de92007-09-25 17:54:57 -070044#include "iwl-helpers.h"
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -070045#include "iwl-calib.h"
Tomas Winkler5083e562008-05-29 16:35:15 +080046#include "iwl-sta.h"
Zhu Yib481de92007-09-25 17:54:57 -070047
Tomas Winkler630fe9b2008-06-12 09:47:08 +080048static int iwl4965_send_tx_power(struct iwl_priv *priv);
Reinette Chatre3d816c72009-08-07 15:41:37 -070049static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
Tomas Winkler630fe9b2008-06-12 09:47:08 +080050
Reinette Chatrea0987a82008-12-02 12:14:06 -080051/* Highest firmware API version supported */
52#define IWL4965_UCODE_API_MAX 2
53
54/* Lowest firmware API version supported */
55#define IWL4965_UCODE_API_MIN 2
56
57#define IWL4965_FW_PRE "iwlwifi-4965-"
58#define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
59#define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
Tomas Winklerd16dc482008-07-11 11:53:38 +080060
61
Assaf Krauss1ea87392008-03-18 14:57:50 -070062/* module parameters */
63static struct iwl_mod_params iwl4965_mod_params = {
Emmanuel Grumbach038669e2008-04-23 17:15:04 -070064 .num_of_queues = IWL49_NUM_QUEUES,
Tomas Winkler9f17b312008-07-11 11:53:35 +080065 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
Assaf Krauss1ea87392008-03-18 14:57:50 -070066 .amsdu_size_8K = 1,
Ester Kummer3a1081e2008-05-06 11:05:14 +080067 .restart_fw = 1,
Assaf Krauss1ea87392008-03-18 14:57:50 -070068 /* the rest are 0 by default */
69};
70
Tomas Winkler57aab752008-04-14 21:16:03 -070071/* check contents of special bootstrap uCode SRAM */
72static int iwl4965_verify_bsm(struct iwl_priv *priv)
73{
74 __le32 *image = priv->ucode_boot.v_addr;
75 u32 len = priv->ucode_boot.len;
76 u32 reg;
77 u32 val;
78
Tomas Winklere1623442009-01-27 14:27:56 -080079 IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
Tomas Winkler57aab752008-04-14 21:16:03 -070080
81 /* verify BSM SRAM contents */
82 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
83 for (reg = BSM_SRAM_LOWER_BOUND;
84 reg < BSM_SRAM_LOWER_BOUND + len;
85 reg += sizeof(u32), image++) {
86 val = iwl_read_prph(priv, reg);
87 if (val != le32_to_cpu(*image)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +080088 IWL_ERR(priv, "BSM uCode verification failed at "
Tomas Winkler57aab752008-04-14 21:16:03 -070089 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
90 BSM_SRAM_LOWER_BOUND,
91 reg - BSM_SRAM_LOWER_BOUND, len,
92 val, le32_to_cpu(*image));
93 return -EIO;
94 }
95 }
96
Tomas Winklere1623442009-01-27 14:27:56 -080097 IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
Tomas Winkler57aab752008-04-14 21:16:03 -070098
99 return 0;
100}
101
102/**
103 * iwl4965_load_bsm - Load bootstrap instructions
104 *
105 * BSM operation:
106 *
107 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
108 * in special SRAM that does not power down during RFKILL. When powering back
109 * up after power-saving sleeps (or during initial uCode load), the BSM loads
110 * the bootstrap program into the on-board processor, and starts it.
111 *
112 * The bootstrap program loads (via DMA) instructions and data for a new
113 * program from host DRAM locations indicated by the host driver in the
114 * BSM_DRAM_* registers. Once the new program is loaded, it starts
115 * automatically.
116 *
117 * When initializing the NIC, the host driver points the BSM to the
118 * "initialize" uCode image. This uCode sets up some internal data, then
119 * notifies host via "initialize alive" that it is complete.
120 *
121 * The host then replaces the BSM_DRAM_* pointer values to point to the
122 * normal runtime uCode instructions and a backup uCode data cache buffer
123 * (filled initially with starting data values for the on-board processor),
124 * then triggers the "initialize" uCode to load and launch the runtime uCode,
125 * which begins normal operation.
126 *
127 * When doing a power-save shutdown, runtime uCode saves data SRAM into
128 * the backup data cache in DRAM before SRAM is powered down.
129 *
130 * When powering back up, the BSM loads the bootstrap program. This reloads
131 * the runtime uCode instructions and the backup data cache into SRAM,
132 * and re-launches the runtime uCode from where it left off.
133 */
134static int iwl4965_load_bsm(struct iwl_priv *priv)
135{
136 __le32 *image = priv->ucode_boot.v_addr;
137 u32 len = priv->ucode_boot.len;
138 dma_addr_t pinst;
139 dma_addr_t pdata;
140 u32 inst_len;
141 u32 data_len;
142 int i;
143 u32 done;
144 u32 reg_offset;
145 int ret;
146
Tomas Winklere1623442009-01-27 14:27:56 -0800147 IWL_DEBUG_INFO(priv, "Begin load bsm\n");
Tomas Winkler57aab752008-04-14 21:16:03 -0700148
Reinette Chatrec03ea162009-08-07 15:41:44 -0700149 priv->ucode_type = UCODE_RT;
Ron Rindjunskyfe9b6b72008-05-29 16:35:06 +0800150
Tomas Winkler57aab752008-04-14 21:16:03 -0700151 /* make sure bootstrap program is no larger than BSM's SRAM size */
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800152 if (len > IWL49_MAX_BSM_SIZE)
Tomas Winkler57aab752008-04-14 21:16:03 -0700153 return -EINVAL;
154
155 /* Tell bootstrap uCode where to find the "Initialize" uCode
156 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
Tomas Winkler2d878892008-05-29 16:34:51 +0800157 * NOTE: iwl_init_alive_start() will replace these values,
Tomas Winkler57aab752008-04-14 21:16:03 -0700158 * after the "initialize" uCode has run, to point to
Tomas Winkler2d878892008-05-29 16:34:51 +0800159 * runtime/protocol instructions and backup data cache.
160 */
Tomas Winkler57aab752008-04-14 21:16:03 -0700161 pinst = priv->ucode_init.p_addr >> 4;
162 pdata = priv->ucode_init_data.p_addr >> 4;
163 inst_len = priv->ucode_init.len;
164 data_len = priv->ucode_init_data.len;
165
Tomas Winkler57aab752008-04-14 21:16:03 -0700166 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
167 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
168 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
169 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
170
171 /* Fill BSM memory with bootstrap instructions */
172 for (reg_offset = BSM_SRAM_LOWER_BOUND;
173 reg_offset < BSM_SRAM_LOWER_BOUND + len;
174 reg_offset += sizeof(u32), image++)
175 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
176
177 ret = iwl4965_verify_bsm(priv);
Mohamed Abbasa8b50a02009-05-22 11:01:47 -0700178 if (ret)
Tomas Winkler57aab752008-04-14 21:16:03 -0700179 return ret;
Tomas Winkler57aab752008-04-14 21:16:03 -0700180
181 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
182 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800183 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
Tomas Winkler57aab752008-04-14 21:16:03 -0700184 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
185
186 /* Load bootstrap code into instruction SRAM now,
187 * to prepare to load "initialize" uCode */
188 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
189
190 /* Wait for load of bootstrap uCode to finish */
191 for (i = 0; i < 100; i++) {
192 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
193 if (!(done & BSM_WR_CTRL_REG_BIT_START))
194 break;
195 udelay(10);
196 }
197 if (i < 100)
Tomas Winklere1623442009-01-27 14:27:56 -0800198 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
Tomas Winkler57aab752008-04-14 21:16:03 -0700199 else {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800200 IWL_ERR(priv, "BSM write did not complete!\n");
Tomas Winkler57aab752008-04-14 21:16:03 -0700201 return -EIO;
202 }
203
204 /* Enable future boot loads whenever power management unit triggers it
205 * (e.g. when powering back up after power-save shutdown) */
206 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
207
Tomas Winkler57aab752008-04-14 21:16:03 -0700208
209 return 0;
210}
211
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800212/**
213 * iwl4965_set_ucode_ptrs - Set uCode address location
214 *
215 * Tell initialization uCode where to find runtime uCode.
216 *
217 * BSM registers initially contain pointers to initialization uCode.
218 * We need to replace them to load runtime uCode inst and data,
219 * and to save runtime data when powering down.
220 */
221static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
222{
223 dma_addr_t pinst;
224 dma_addr_t pdata;
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800225 int ret = 0;
226
227 /* bits 35:4 for 4965 */
228 pinst = priv->ucode_code.p_addr >> 4;
229 pdata = priv->ucode_data_backup.p_addr >> 4;
230
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800231 /* Tell bootstrap uCode where to find image to load */
232 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
233 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
234 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
235 priv->ucode_data.len);
236
Tomas Winklera96a27f2008-10-23 23:48:56 -0700237 /* Inst byte count must be last to set up, bit 31 signals uCode
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800238 * that all new ptr/size info is in place */
239 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
240 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
Tomas Winklere1623442009-01-27 14:27:56 -0800241 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800242
243 return ret;
244}
245
246/**
247 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
248 *
249 * Called after REPLY_ALIVE notification received from "initialize" uCode.
250 *
251 * The 4965 "initialize" ALIVE reply contains calibration data for:
252 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
253 * (3945 does not contain this data).
254 *
255 * Tell "initialize" uCode to go ahead and load the runtime uCode.
256*/
257static void iwl4965_init_alive_start(struct iwl_priv *priv)
258{
259 /* Check alive response for "valid" sign from uCode */
260 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
261 /* We had an error bringing up the hardware, so take it
262 * all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800263 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800264 goto restart;
265 }
266
267 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
268 * This is a paranoid check, because we would not have gotten the
269 * "initialize" alive if code weren't properly loaded. */
270 if (iwl_verify_ucode(priv)) {
271 /* Runtime instruction load was bad;
272 * take it all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800273 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800274 goto restart;
275 }
276
277 /* Calculate temperature */
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +0800278 priv->temperature = iwl4965_hw_get_temperature(priv);
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800279
280 /* Send pointers to protocol/runtime uCode image ... init code will
281 * load and launch runtime uCode, which will send us another "Alive"
282 * notification. */
Tomas Winklere1623442009-01-27 14:27:56 -0800283 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800284 if (iwl4965_set_ucode_ptrs(priv)) {
285 /* Runtime instruction load won't happen;
286 * take it all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800287 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800288 goto restart;
289 }
290 return;
291
292restart:
293 queue_work(priv->workqueue, &priv->restart);
294}
295
Wey-Yi Guy7aafef12009-08-07 15:41:38 -0700296static bool is_ht40_channel(__le32 rxon_flags)
Zhu Yib481de92007-09-25 17:54:57 -0700297{
Wey-Yi Guya2b0f022009-05-22 11:01:49 -0700298 int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
299 >> RXON_FLG_CHANNEL_MODE_POS;
300 return ((chan_mod == CHANNEL_MODE_PURE_40) ||
301 (chan_mod == CHANNEL_MODE_MIXED));
Zhu Yib481de92007-09-25 17:54:57 -0700302}
303
Tomas Winkler8614f362008-04-23 17:14:55 -0700304/*
305 * EEPROM handlers
306 */
Tomas Winkler0ef2ca62008-10-23 23:48:51 -0700307static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
Tomas Winkler8614f362008-04-23 17:14:55 -0700308{
Tomas Winkler0ef2ca62008-10-23 23:48:51 -0700309 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
Tomas Winkler8614f362008-04-23 17:14:55 -0700310}
Zhu Yib481de92007-09-25 17:54:57 -0700311
Tomas Winklerda1bc452008-05-29 16:35:00 +0800312/*
Tomas Winklera96a27f2008-10-23 23:48:56 -0700313 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
Tomas Winklerda1bc452008-05-29 16:35:00 +0800314 * must be called under priv->lock and mac access
315 */
316static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
Zhu Yib481de92007-09-25 17:54:57 -0700317{
Tomas Winklerda1bc452008-05-29 16:35:00 +0800318 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
Zhu Yib481de92007-09-25 17:54:57 -0700319}
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800320
Tomas Winkler91238712008-04-23 17:14:53 -0700321static int iwl4965_apm_init(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700322{
Tomas Winkler91238712008-04-23 17:14:53 -0700323 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700324
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700325 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
Tomas Winkler91238712008-04-23 17:14:53 -0700326 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
Zhu Yib481de92007-09-25 17:54:57 -0700327
Tomas Winkler8f061892008-05-29 16:34:56 +0800328 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
329 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
330 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
331
Tomas Winkler91238712008-04-23 17:14:53 -0700332 /* set "initialization complete" bit to move adapter
333 * D0U* --> D0A* state */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700334 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winkler91238712008-04-23 17:14:53 -0700335
336 /* wait for clock stabilization */
Zhu, Yi73d7b5a2008-12-05 07:58:40 -0800337 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
338 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
Tomas Winkler91238712008-04-23 17:14:53 -0700339 if (ret < 0) {
Tomas Winklere1623442009-01-27 14:27:56 -0800340 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
Tomas Winkler91238712008-04-23 17:14:53 -0700341 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700342 }
343
Tomas Winkler91238712008-04-23 17:14:53 -0700344 /* enable DMA */
Tomas Winkler8f061892008-05-29 16:34:56 +0800345 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
346 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700347
348 udelay(20);
349
Tomas Winkler8f061892008-05-29 16:34:56 +0800350 /* disable L1-Active */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700351 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
Tomas Winkler91238712008-04-23 17:14:53 -0700352 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700353
Tomas Winkler91238712008-04-23 17:14:53 -0700354out:
Tomas Winkler91238712008-04-23 17:14:53 -0700355 return ret;
356}
357
Tomas Winkler694cc562008-04-24 11:55:22 -0700358
359static void iwl4965_nic_config(struct iwl_priv *priv)
360{
361 unsigned long flags;
Tomas Winkler694cc562008-04-24 11:55:22 -0700362 u16 radio_cfg;
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800363 u16 lctl;
Tomas Winkler694cc562008-04-24 11:55:22 -0700364
365 spin_lock_irqsave(&priv->lock, flags);
366
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800367 lctl = iwl_pcie_link_ctl(priv);
Tomas Winkler694cc562008-04-24 11:55:22 -0700368
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800369 /* HW bug W/A - negligible power consumption */
370 /* L1-ASPM is enabled by BIOS */
371 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
372 /* L1-ASPM enabled: disable L0S */
Tomas Winkler8f061892008-05-29 16:34:56 +0800373 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
374 else
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800375 /* L1-ASPM disabled: enable L0S */
Tomas Winkler8f061892008-05-29 16:34:56 +0800376 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
Tomas Winkler694cc562008-04-24 11:55:22 -0700377
378 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
379
380 /* write radio config values to register */
381 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
382 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
383 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
384 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
385 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
386
387 /* set CSR_HW_CONFIG_REG for uCode use */
388 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
389 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
390 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
391
392 priv->calib_info = (struct iwl_eeprom_calib_info *)
393 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
394
395 spin_unlock_irqrestore(&priv->lock, flags);
396}
397
Tomas Winkler46315e02008-05-29 16:34:59 +0800398static int iwl4965_apm_stop_master(struct iwl_priv *priv)
399{
Tomas Winkler46315e02008-05-29 16:34:59 +0800400 unsigned long flags;
401
402 spin_lock_irqsave(&priv->lock, flags);
403
404 /* set stop master bit */
405 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
406
Wu Fengguangfebf3372008-12-17 16:52:31 +0800407 iwl_poll_direct_bit(priv, CSR_RESET,
Zhu, Yi73d7b5a2008-12-05 07:58:40 -0800408 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
Tomas Winkler46315e02008-05-29 16:34:59 +0800409
Tomas Winkler46315e02008-05-29 16:34:59 +0800410 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winklere1623442009-01-27 14:27:56 -0800411 IWL_DEBUG_INFO(priv, "stop master\n");
Tomas Winkler46315e02008-05-29 16:34:59 +0800412
Wu Fengguangfebf3372008-12-17 16:52:31 +0800413 return 0;
Tomas Winkler46315e02008-05-29 16:34:59 +0800414}
415
Tomas Winklerf118a912008-05-29 16:34:58 +0800416static void iwl4965_apm_stop(struct iwl_priv *priv)
417{
418 unsigned long flags;
419
Tomas Winkler46315e02008-05-29 16:34:59 +0800420 iwl4965_apm_stop_master(priv);
Tomas Winklerf118a912008-05-29 16:34:58 +0800421
422 spin_lock_irqsave(&priv->lock, flags);
423
424 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
425
426 udelay(10);
Mohamed Abbas1d3e6c62008-08-28 17:25:05 +0800427 /* clear "init complete" move adapter D0A* --> D0U state */
428 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winklerf118a912008-05-29 16:34:58 +0800429 spin_unlock_irqrestore(&priv->lock, flags);
430}
431
Tomas Winkler7f066102008-05-29 16:34:57 +0800432static int iwl4965_apm_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700433{
Tomas Winkler7f066102008-05-29 16:34:57 +0800434 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700435
Tomas Winkler46315e02008-05-29 16:34:59 +0800436 iwl4965_apm_stop_master(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700437
Zhu Yib481de92007-09-25 17:54:57 -0700438
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700439 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
Zhu Yib481de92007-09-25 17:54:57 -0700440
441 udelay(10);
442
Tomas Winkler7f066102008-05-29 16:34:57 +0800443 /* FIXME: put here L1A -L0S w/a */
444
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700445 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winklerf118a912008-05-29 16:34:58 +0800446
Zhu, Yi73d7b5a2008-12-05 07:58:40 -0800447 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
448 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
Zhu, Yi42802d72008-12-05 07:58:39 -0800449 if (ret < 0)
Tomas Winkler7f066102008-05-29 16:34:57 +0800450 goto out;
451
Zhu Yib481de92007-09-25 17:54:57 -0700452 udelay(10);
453
Tomas Winkler7f066102008-05-29 16:34:57 +0800454 /* Enable DMA and BSM Clock */
455 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
456 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700457
Tomas Winkler7f066102008-05-29 16:34:57 +0800458 udelay(10);
Zhu Yib481de92007-09-25 17:54:57 -0700459
Tomas Winkler7f066102008-05-29 16:34:57 +0800460 /* disable L1A */
461 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
462 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700463
Zhu Yib481de92007-09-25 17:54:57 -0700464 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
465 wake_up_interruptible(&priv->wait_command_queue);
466
Tomas Winkler7f066102008-05-29 16:34:57 +0800467out:
Tomas Winkler7f066102008-05-29 16:34:57 +0800468 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700469}
470
Zhu Yib481de92007-09-25 17:54:57 -0700471/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
472 * Called after every association, but this runs only once!
473 * ... once chain noise is calibrated the first time, it's good forever. */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700474static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700475{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700476 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
Zhu Yib481de92007-09-25 17:54:57 -0700477
Tomas Winkler3109ece2008-03-28 16:33:35 -0700478 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
Tomas Winklerf69f42a2008-10-23 23:48:52 -0700479 struct iwl_calib_diff_gain_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700480
481 memset(&cmd, 0, sizeof(cmd));
Tomas Winkler0d950d82008-11-25 13:36:01 -0800482 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
Zhu Yib481de92007-09-25 17:54:57 -0700483 cmd.diff_gain_a = 0;
484 cmd.diff_gain_b = 0;
485 cmd.diff_gain_c = 0;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700486 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
487 sizeof(cmd), &cmd))
Winkler, Tomas15b16872008-12-19 10:37:33 +0800488 IWL_ERR(priv,
489 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
Zhu Yib481de92007-09-25 17:54:57 -0700490 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
Tomas Winklere1623442009-01-27 14:27:56 -0800491 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
Zhu Yib481de92007-09-25 17:54:57 -0700492 }
Zhu Yib481de92007-09-25 17:54:57 -0700493}
494
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700495static void iwl4965_gain_computation(struct iwl_priv *priv,
496 u32 *average_noise,
497 u16 min_average_noise_antenna_i,
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -0700498 u32 min_average_noise,
499 u8 default_chain)
Zhu Yib481de92007-09-25 17:54:57 -0700500{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700501 int i, ret;
502 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
Zhu Yib481de92007-09-25 17:54:57 -0700503
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700504 data->delta_gain_code[min_average_noise_antenna_i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700505
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -0700506 for (i = default_chain; i < NUM_RX_CHAINS; i++) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700507 s32 delta_g = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700508
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700509 if (!(data->disconn_array[i]) &&
510 (data->delta_gain_code[i] ==
Zhu Yib481de92007-09-25 17:54:57 -0700511 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700512 delta_g = average_noise[i] - min_average_noise;
513 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
514 data->delta_gain_code[i] =
515 min(data->delta_gain_code[i],
516 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
Zhu Yib481de92007-09-25 17:54:57 -0700517
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700518 data->delta_gain_code[i] =
519 (data->delta_gain_code[i] | (1 << 2));
520 } else {
521 data->delta_gain_code[i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700522 }
Zhu Yib481de92007-09-25 17:54:57 -0700523 }
Tomas Winklere1623442009-01-27 14:27:56 -0800524 IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700525 data->delta_gain_code[0],
526 data->delta_gain_code[1],
527 data->delta_gain_code[2]);
Zhu Yib481de92007-09-25 17:54:57 -0700528
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700529 /* Differential gain gets sent to uCode only once */
530 if (!data->radio_write) {
Tomas Winklerf69f42a2008-10-23 23:48:52 -0700531 struct iwl_calib_diff_gain_cmd cmd;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700532 data->radio_write = 1;
Zhu Yib481de92007-09-25 17:54:57 -0700533
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700534 memset(&cmd, 0, sizeof(cmd));
Tomas Winkler0d950d82008-11-25 13:36:01 -0800535 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700536 cmd.diff_gain_a = data->delta_gain_code[0];
537 cmd.diff_gain_b = data->delta_gain_code[1];
538 cmd.diff_gain_c = data->delta_gain_code[2];
539 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
540 sizeof(cmd), &cmd);
541 if (ret)
Tomas Winklere1623442009-01-27 14:27:56 -0800542 IWL_DEBUG_CALIB(priv, "fail sending cmd "
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700543 "REPLY_PHY_CALIBRATION_CMD \n");
Zhu Yib481de92007-09-25 17:54:57 -0700544
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700545 /* TODO we might want recalculate
546 * rx_chain in rxon cmd */
547
548 /* Mark so we run this algo only once! */
549 data->state = IWL_CHAIN_NOISE_CALIBRATED;
Zhu Yib481de92007-09-25 17:54:57 -0700550 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700551 data->chain_noise_a = 0;
552 data->chain_noise_b = 0;
553 data->chain_noise_c = 0;
554 data->chain_signal_a = 0;
555 data->chain_signal_b = 0;
556 data->chain_signal_c = 0;
557 data->beacon_count = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700558}
559
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800560static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
561 __le32 *tx_flags)
562{
Johannes Berge6a98542008-10-21 12:40:02 +0200563 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800564 *tx_flags |= TX_CMD_FLG_RTS_MSK;
565 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
Johannes Berge6a98542008-10-21 12:40:02 +0200566 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800567 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
568 *tx_flags |= TX_CMD_FLG_CTS_MSK;
569 }
570}
571
Zhu Yib481de92007-09-25 17:54:57 -0700572static void iwl4965_bg_txpower_work(struct work_struct *work)
573{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700574 struct iwl_priv *priv = container_of(work, struct iwl_priv,
Zhu Yib481de92007-09-25 17:54:57 -0700575 txpower_work);
576
577 /* If a scan happened to start before we got here
578 * then just return; the statistics notification will
579 * kick off another scheduled work to compensate for
580 * any temperature delta we missed here. */
581 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
582 test_bit(STATUS_SCANNING, &priv->status))
583 return;
584
585 mutex_lock(&priv->mutex);
586
Tomas Winklera96a27f2008-10-23 23:48:56 -0700587 /* Regardless of if we are associated, we must reconfigure the
Zhu Yib481de92007-09-25 17:54:57 -0700588 * TX power since frames can be sent on non-radar channels while
589 * not associated */
Tomas Winkler630fe9b2008-06-12 09:47:08 +0800590 iwl4965_send_tx_power(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700591
592 /* Update last_temperature to keep is_calib_needed from running
593 * when it isn't needed... */
594 priv->last_temperature = priv->temperature;
595
596 mutex_unlock(&priv->mutex);
597}
598
599/*
600 * Acquire priv->lock before calling this function !
601 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700602static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
Zhu Yib481de92007-09-25 17:54:57 -0700603{
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700604 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
Zhu Yib481de92007-09-25 17:54:57 -0700605 (index & 0xff) | (txq_id << 8));
Tomas Winkler12a81f62008-04-03 16:05:20 -0700606 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
Zhu Yib481de92007-09-25 17:54:57 -0700607}
608
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800609/**
610 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
611 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
612 * @scd_retry: (1) Indicates queue will be used in aggregation mode
613 *
614 * NOTE: Acquire priv->lock before calling this function !
Zhu Yib481de92007-09-25 17:54:57 -0700615 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700616static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +0800617 struct iwl_tx_queue *txq,
Zhu Yib481de92007-09-25 17:54:57 -0700618 int tx_fifo_id, int scd_retry)
619{
620 int txq_id = txq->q.id;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800621
622 /* Find out whether to activate Tx queue */
Abhijeet Kolekarc3056062008-11-12 13:14:08 -0800623 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
Zhu Yib481de92007-09-25 17:54:57 -0700624
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800625 /* Set up and activate */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700626 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700627 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
628 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
629 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
630 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
631 IWL49_SCD_QUEUE_STTS_REG_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700632
633 txq->sched_retry = scd_retry;
634
Tomas Winklere1623442009-01-27 14:27:56 -0800635 IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800636 active ? "Activate" : "Deactivate",
Zhu Yib481de92007-09-25 17:54:57 -0700637 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
638}
639
640static const u16 default_queue_to_tx_fifo[] = {
641 IWL_TX_FIFO_AC3,
642 IWL_TX_FIFO_AC2,
643 IWL_TX_FIFO_AC1,
644 IWL_TX_FIFO_AC0,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700645 IWL49_CMD_FIFO_NUM,
Zhu Yib481de92007-09-25 17:54:57 -0700646 IWL_TX_FIFO_HCCA_1,
647 IWL_TX_FIFO_HCCA_2
648};
649
Emmanuel Grumbachbe1f3ab62008-06-12 09:47:18 +0800650static int iwl4965_alive_notify(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700651{
652 u32 a;
Zhu Yib481de92007-09-25 17:54:57 -0700653 unsigned long flags;
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800654 int i, chan;
Winkler, Tomas40fc95d2008-11-19 15:32:27 -0800655 u32 reg_val;
Zhu Yib481de92007-09-25 17:54:57 -0700656
657 spin_lock_irqsave(&priv->lock, flags);
658
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800659 /* Clear 4965's internal Tx Scheduler data base */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700660 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700661 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
662 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700663 iwl_write_targ_mem(priv, a, 0);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700664 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700665 iwl_write_targ_mem(priv, a, 0);
Huaxu Wan39d5e0c2009-10-02 13:44:00 -0700666 for (; a < priv->scd_base_addr +
667 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700668 iwl_write_targ_mem(priv, a, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700669
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800670 /* Tel 4965 where to find Tx byte count tables */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700671 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800672 priv->scd_bc_tbls.dma >> 10);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800673
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800674 /* Enable DMA channel */
675 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
676 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
677 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
678 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
679
Winkler, Tomas40fc95d2008-11-19 15:32:27 -0800680 /* Update FH chicken bits */
681 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
682 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
683 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
684
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800685 /* Disable chain mode for all queues */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700686 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700687
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800688 /* Initialize each Tx queue (including the command queue) */
Tomas Winkler5425e492008-04-15 16:01:38 -0700689 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800690
691 /* TFD circular buffer read/write indexes */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700692 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700693 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800694
695 /* Max Tx Window size for Scheduler-ACK mode */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700696 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700697 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
698 (SCD_WIN_SIZE <<
699 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
700 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800701
702 /* Frame limit */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700703 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700704 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
705 sizeof(u32),
706 (SCD_FRAME_LIMIT <<
707 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
708 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700709
710 }
Tomas Winkler12a81f62008-04-03 16:05:20 -0700711 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
Tomas Winkler5425e492008-04-15 16:01:38 -0700712 (1 << priv->hw_params.max_txq_num) - 1);
Zhu Yib481de92007-09-25 17:54:57 -0700713
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800714 /* Activate all Tx DMA/FIFO channels */
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800715 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
Zhu Yib481de92007-09-25 17:54:57 -0700716
717 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800718
719 /* Map each Tx/cmd queue to its corresponding fifo */
Zhu Yib481de92007-09-25 17:54:57 -0700720 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
721 int ac = default_queue_to_tx_fifo[i];
Ron Rindjunsky36470742008-05-15 13:54:10 +0800722 iwl_txq_ctx_activate(priv, i);
Zhu Yib481de92007-09-25 17:54:57 -0700723 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
724 }
725
Zhu Yib481de92007-09-25 17:54:57 -0700726 spin_unlock_irqrestore(&priv->lock, flags);
727
Mohamed Abbasa8b50a02009-05-22 11:01:47 -0700728 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700729}
730
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700731static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
732 .min_nrg_cck = 97,
Wey-Yi Guyfe6efb42009-06-12 13:22:54 -0700733 .max_nrg_cck = 0, /* not used, set to 0 */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700734
735 .auto_corr_min_ofdm = 85,
736 .auto_corr_min_ofdm_mrc = 170,
737 .auto_corr_min_ofdm_x1 = 105,
738 .auto_corr_min_ofdm_mrc_x1 = 220,
739
740 .auto_corr_max_ofdm = 120,
741 .auto_corr_max_ofdm_mrc = 210,
742 .auto_corr_max_ofdm_x1 = 140,
743 .auto_corr_max_ofdm_mrc_x1 = 270,
744
745 .auto_corr_min_cck = 125,
746 .auto_corr_max_cck = 200,
747 .auto_corr_min_cck_mrc = 200,
748 .auto_corr_max_cck_mrc = 400,
749
750 .nrg_th_cck = 100,
751 .nrg_th_ofdm = 100,
752};
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700753
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700754static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
755{
756 /* want Kelvin */
Wey-Yi Guy672639d2009-07-24 11:13:01 -0700757 priv->hw_params.ct_kill_threshold =
758 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700759}
760
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800761/**
Tomas Winkler5425e492008-04-15 16:01:38 -0700762 * iwl4965_hw_set_hw_params
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800763 *
764 * Called when initializing driver
765 */
Emmanuel Grumbachbe1f3ab62008-06-12 09:47:18 +0800766static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700767{
Assaf Krauss316c30d2008-03-14 10:38:46 -0700768
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700769 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
Assaf Krauss1ea87392008-03-18 14:57:50 -0700770 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800771 IWL_ERR(priv,
772 "invalid queues_num, should be between %d and %d\n",
773 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
Tomas Winkler059ff822008-04-14 21:16:14 -0700774 return -EINVAL;
Assaf Krauss316c30d2008-03-14 10:38:46 -0700775 }
776
Tomas Winkler5425e492008-04-15 16:01:38 -0700777 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
Zhu Yif3f911d2008-12-02 12:14:04 -0800778 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800779 priv->hw_params.scd_bc_tbls_size =
780 IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
Samuel Ortiza8e74e22009-01-23 13:45:14 -0800781 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
Tomas Winkler5425e492008-04-15 16:01:38 -0700782 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
783 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700784 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
785 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
786 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -0700787 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700788
Winkler, Tomas141c43a2009-01-08 10:19:53 -0800789 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
790
Tomas Winklerec35cf22008-04-15 16:01:39 -0700791 priv->hw_params.tx_chains_num = 2;
792 priv->hw_params.rx_chains_num = 2;
Guy Cohenfde0db32008-04-21 15:42:01 -0700793 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
794 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700795 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
796 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700797
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700798 priv->hw_params.sens = &iwl4965_sensitivity;
Tomas Winkler3e82a822008-02-13 11:32:31 -0800799
Tomas Winkler059ff822008-04-14 21:16:14 -0700800 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700801}
802
Zhu Yib481de92007-09-25 17:54:57 -0700803static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
804{
805 s32 sign = 1;
806
807 if (num < 0) {
808 sign = -sign;
809 num = -num;
810 }
811 if (denom < 0) {
812 sign = -sign;
813 denom = -denom;
814 }
815 *res = 1;
816 *res = ((num * 2 + denom) / (denom * 2)) * sign;
817
818 return 1;
819}
820
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800821/**
822 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
823 *
824 * Determines power supply voltage compensation for txpower calculations.
825 * Returns number of 1/2-dB steps to subtract from gain table index,
826 * to compensate for difference between power supply voltage during
827 * factory measurements, vs. current power supply voltage.
828 *
829 * Voltage indication is higher for lower voltage.
830 * Lower voltage requires more gain (lower gain table index).
831 */
Zhu Yib481de92007-09-25 17:54:57 -0700832static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
833 s32 current_voltage)
834{
835 s32 comp = 0;
836
837 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
838 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
839 return 0;
840
841 iwl4965_math_div_round(current_voltage - eeprom_voltage,
842 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
843
844 if (current_voltage > eeprom_voltage)
845 comp *= 2;
846 if ((comp < -2) || (comp > 2))
847 comp = 0;
848
849 return comp;
850}
851
Zhu Yib481de92007-09-25 17:54:57 -0700852static s32 iwl4965_get_tx_atten_grp(u16 channel)
853{
854 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
855 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
856 return CALIB_CH_GROUP_5;
857
858 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
859 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
860 return CALIB_CH_GROUP_1;
861
862 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
863 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
864 return CALIB_CH_GROUP_2;
865
866 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
867 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
868 return CALIB_CH_GROUP_3;
869
870 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
871 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
872 return CALIB_CH_GROUP_4;
873
Zhu Yib481de92007-09-25 17:54:57 -0700874 return -1;
875}
876
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700877static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700878{
879 s32 b = -1;
880
881 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -0700882 if (priv->calib_info->band_info[b].ch_from == 0)
Zhu Yib481de92007-09-25 17:54:57 -0700883 continue;
884
Tomas Winkler073d3f52008-04-21 15:41:52 -0700885 if ((channel >= priv->calib_info->band_info[b].ch_from)
886 && (channel <= priv->calib_info->band_info[b].ch_to))
Zhu Yib481de92007-09-25 17:54:57 -0700887 break;
888 }
889
890 return b;
891}
892
893static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
894{
895 s32 val;
896
897 if (x2 == x1)
898 return y1;
899 else {
900 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
901 return val + y2;
902 }
903}
904
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800905/**
906 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
907 *
908 * Interpolates factory measurements from the two sample channels within a
909 * sub-band, to apply to channel of interest. Interpolation is proportional to
910 * differences in channel frequencies, which is proportional to differences
911 * in channel number.
912 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700913static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
Tomas Winkler073d3f52008-04-21 15:41:52 -0700914 struct iwl_eeprom_calib_ch_info *chan_info)
Zhu Yib481de92007-09-25 17:54:57 -0700915{
916 s32 s = -1;
917 u32 c;
918 u32 m;
Tomas Winkler073d3f52008-04-21 15:41:52 -0700919 const struct iwl_eeprom_calib_measure *m1;
920 const struct iwl_eeprom_calib_measure *m2;
921 struct iwl_eeprom_calib_measure *omeas;
Zhu Yib481de92007-09-25 17:54:57 -0700922 u32 ch_i1;
923 u32 ch_i2;
924
925 s = iwl4965_get_sub_band(priv, channel);
926 if (s >= EEPROM_TX_POWER_BANDS) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800927 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
Zhu Yib481de92007-09-25 17:54:57 -0700928 return -1;
929 }
930
Tomas Winkler073d3f52008-04-21 15:41:52 -0700931 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
932 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
Zhu Yib481de92007-09-25 17:54:57 -0700933 chan_info->ch_num = (u8) channel;
934
Tomas Winklere1623442009-01-27 14:27:56 -0800935 IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700936 channel, s, ch_i1, ch_i2);
937
938 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
939 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -0700940 m1 = &(priv->calib_info->band_info[s].ch1.
Zhu Yib481de92007-09-25 17:54:57 -0700941 measurements[c][m]);
Tomas Winkler073d3f52008-04-21 15:41:52 -0700942 m2 = &(priv->calib_info->band_info[s].ch2.
Zhu Yib481de92007-09-25 17:54:57 -0700943 measurements[c][m]);
944 omeas = &(chan_info->measurements[c][m]);
945
946 omeas->actual_pow =
947 (u8) iwl4965_interpolate_value(channel, ch_i1,
948 m1->actual_pow,
949 ch_i2,
950 m2->actual_pow);
951 omeas->gain_idx =
952 (u8) iwl4965_interpolate_value(channel, ch_i1,
953 m1->gain_idx, ch_i2,
954 m2->gain_idx);
955 omeas->temperature =
956 (u8) iwl4965_interpolate_value(channel, ch_i1,
957 m1->temperature,
958 ch_i2,
959 m2->temperature);
960 omeas->pa_det =
961 (s8) iwl4965_interpolate_value(channel, ch_i1,
962 m1->pa_det, ch_i2,
963 m2->pa_det);
964
Tomas Winklere1623442009-01-27 14:27:56 -0800965 IWL_DEBUG_TXPOWER(priv,
966 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
967 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
968 IWL_DEBUG_TXPOWER(priv,
969 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
970 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
971 IWL_DEBUG_TXPOWER(priv,
972 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
973 m1->pa_det, m2->pa_det, omeas->pa_det);
974 IWL_DEBUG_TXPOWER(priv,
975 "chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
976 m1->temperature, m2->temperature,
977 omeas->temperature);
Zhu Yib481de92007-09-25 17:54:57 -0700978 }
979 }
980
981 return 0;
982}
983
984/* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
985 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
986static s32 back_off_table[] = {
987 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
988 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
989 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
990 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
991 10 /* CCK */
992};
993
994/* Thermal compensation values for txpower for various frequency ranges ...
995 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800996static struct iwl4965_txpower_comp_entry {
Zhu Yib481de92007-09-25 17:54:57 -0700997 s32 degrees_per_05db_a;
998 s32 degrees_per_05db_a_denom;
999} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1000 {9, 2}, /* group 0 5.2, ch 34-43 */
1001 {4, 1}, /* group 1 5.2, ch 44-70 */
1002 {4, 1}, /* group 2 5.2, ch 71-124 */
1003 {4, 1}, /* group 3 5.2, ch 125-200 */
1004 {3, 1} /* group 4 2.4, ch all */
1005};
1006
1007static s32 get_min_power_index(s32 rate_power_index, u32 band)
1008{
1009 if (!band) {
1010 if ((rate_power_index & 7) <= 4)
1011 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1012 }
1013 return MIN_TX_GAIN_INDEX;
1014}
1015
1016struct gain_entry {
1017 u8 dsp;
1018 u8 radio;
1019};
1020
1021static const struct gain_entry gain_table[2][108] = {
1022 /* 5.2GHz power gain index table */
1023 {
1024 {123, 0x3F}, /* highest txpower */
1025 {117, 0x3F},
1026 {110, 0x3F},
1027 {104, 0x3F},
1028 {98, 0x3F},
1029 {110, 0x3E},
1030 {104, 0x3E},
1031 {98, 0x3E},
1032 {110, 0x3D},
1033 {104, 0x3D},
1034 {98, 0x3D},
1035 {110, 0x3C},
1036 {104, 0x3C},
1037 {98, 0x3C},
1038 {110, 0x3B},
1039 {104, 0x3B},
1040 {98, 0x3B},
1041 {110, 0x3A},
1042 {104, 0x3A},
1043 {98, 0x3A},
1044 {110, 0x39},
1045 {104, 0x39},
1046 {98, 0x39},
1047 {110, 0x38},
1048 {104, 0x38},
1049 {98, 0x38},
1050 {110, 0x37},
1051 {104, 0x37},
1052 {98, 0x37},
1053 {110, 0x36},
1054 {104, 0x36},
1055 {98, 0x36},
1056 {110, 0x35},
1057 {104, 0x35},
1058 {98, 0x35},
1059 {110, 0x34},
1060 {104, 0x34},
1061 {98, 0x34},
1062 {110, 0x33},
1063 {104, 0x33},
1064 {98, 0x33},
1065 {110, 0x32},
1066 {104, 0x32},
1067 {98, 0x32},
1068 {110, 0x31},
1069 {104, 0x31},
1070 {98, 0x31},
1071 {110, 0x30},
1072 {104, 0x30},
1073 {98, 0x30},
1074 {110, 0x25},
1075 {104, 0x25},
1076 {98, 0x25},
1077 {110, 0x24},
1078 {104, 0x24},
1079 {98, 0x24},
1080 {110, 0x23},
1081 {104, 0x23},
1082 {98, 0x23},
1083 {110, 0x22},
1084 {104, 0x18},
1085 {98, 0x18},
1086 {110, 0x17},
1087 {104, 0x17},
1088 {98, 0x17},
1089 {110, 0x16},
1090 {104, 0x16},
1091 {98, 0x16},
1092 {110, 0x15},
1093 {104, 0x15},
1094 {98, 0x15},
1095 {110, 0x14},
1096 {104, 0x14},
1097 {98, 0x14},
1098 {110, 0x13},
1099 {104, 0x13},
1100 {98, 0x13},
1101 {110, 0x12},
1102 {104, 0x08},
1103 {98, 0x08},
1104 {110, 0x07},
1105 {104, 0x07},
1106 {98, 0x07},
1107 {110, 0x06},
1108 {104, 0x06},
1109 {98, 0x06},
1110 {110, 0x05},
1111 {104, 0x05},
1112 {98, 0x05},
1113 {110, 0x04},
1114 {104, 0x04},
1115 {98, 0x04},
1116 {110, 0x03},
1117 {104, 0x03},
1118 {98, 0x03},
1119 {110, 0x02},
1120 {104, 0x02},
1121 {98, 0x02},
1122 {110, 0x01},
1123 {104, 0x01},
1124 {98, 0x01},
1125 {110, 0x00},
1126 {104, 0x00},
1127 {98, 0x00},
1128 {93, 0x00},
1129 {88, 0x00},
1130 {83, 0x00},
1131 {78, 0x00},
1132 },
1133 /* 2.4GHz power gain index table */
1134 {
1135 {110, 0x3f}, /* highest txpower */
1136 {104, 0x3f},
1137 {98, 0x3f},
1138 {110, 0x3e},
1139 {104, 0x3e},
1140 {98, 0x3e},
1141 {110, 0x3d},
1142 {104, 0x3d},
1143 {98, 0x3d},
1144 {110, 0x3c},
1145 {104, 0x3c},
1146 {98, 0x3c},
1147 {110, 0x3b},
1148 {104, 0x3b},
1149 {98, 0x3b},
1150 {110, 0x3a},
1151 {104, 0x3a},
1152 {98, 0x3a},
1153 {110, 0x39},
1154 {104, 0x39},
1155 {98, 0x39},
1156 {110, 0x38},
1157 {104, 0x38},
1158 {98, 0x38},
1159 {110, 0x37},
1160 {104, 0x37},
1161 {98, 0x37},
1162 {110, 0x36},
1163 {104, 0x36},
1164 {98, 0x36},
1165 {110, 0x35},
1166 {104, 0x35},
1167 {98, 0x35},
1168 {110, 0x34},
1169 {104, 0x34},
1170 {98, 0x34},
1171 {110, 0x33},
1172 {104, 0x33},
1173 {98, 0x33},
1174 {110, 0x32},
1175 {104, 0x32},
1176 {98, 0x32},
1177 {110, 0x31},
1178 {104, 0x31},
1179 {98, 0x31},
1180 {110, 0x30},
1181 {104, 0x30},
1182 {98, 0x30},
1183 {110, 0x6},
1184 {104, 0x6},
1185 {98, 0x6},
1186 {110, 0x5},
1187 {104, 0x5},
1188 {98, 0x5},
1189 {110, 0x4},
1190 {104, 0x4},
1191 {98, 0x4},
1192 {110, 0x3},
1193 {104, 0x3},
1194 {98, 0x3},
1195 {110, 0x2},
1196 {104, 0x2},
1197 {98, 0x2},
1198 {110, 0x1},
1199 {104, 0x1},
1200 {98, 0x1},
1201 {110, 0x0},
1202 {104, 0x0},
1203 {98, 0x0},
1204 {97, 0},
1205 {96, 0},
1206 {95, 0},
1207 {94, 0},
1208 {93, 0},
1209 {92, 0},
1210 {91, 0},
1211 {90, 0},
1212 {89, 0},
1213 {88, 0},
1214 {87, 0},
1215 {86, 0},
1216 {85, 0},
1217 {84, 0},
1218 {83, 0},
1219 {82, 0},
1220 {81, 0},
1221 {80, 0},
1222 {79, 0},
1223 {78, 0},
1224 {77, 0},
1225 {76, 0},
1226 {75, 0},
1227 {74, 0},
1228 {73, 0},
1229 {72, 0},
1230 {71, 0},
1231 {70, 0},
1232 {69, 0},
1233 {68, 0},
1234 {67, 0},
1235 {66, 0},
1236 {65, 0},
1237 {64, 0},
1238 {63, 0},
1239 {62, 0},
1240 {61, 0},
1241 {60, 0},
1242 {59, 0},
1243 }
1244};
1245
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001246static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001247 u8 is_ht40, u8 ctrl_chan_high,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001248 struct iwl4965_tx_power_db *tx_power_tbl)
Zhu Yib481de92007-09-25 17:54:57 -07001249{
1250 u8 saturation_power;
1251 s32 target_power;
1252 s32 user_target_power;
1253 s32 power_limit;
1254 s32 current_temp;
1255 s32 reg_limit;
1256 s32 current_regulatory;
1257 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1258 int i;
1259 int c;
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001260 const struct iwl_channel_info *ch_info = NULL;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001261 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1262 const struct iwl_eeprom_calib_measure *measurement;
Zhu Yib481de92007-09-25 17:54:57 -07001263 s16 voltage;
1264 s32 init_voltage;
1265 s32 voltage_compensation;
1266 s32 degrees_per_05db_num;
1267 s32 degrees_per_05db_denom;
1268 s32 factory_temp;
1269 s32 temperature_comp[2];
1270 s32 factory_gain_index[2];
1271 s32 factory_actual_pwr[2];
1272 s32 power_index;
1273
Winkler, Tomas62ea9c52009-01-19 15:30:29 -08001274 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
Zhu Yib481de92007-09-25 17:54:57 -07001275 * are used for indexing into txpower table) */
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001276 user_target_power = 2 * priv->tx_power_user_lmt;
Zhu Yib481de92007-09-25 17:54:57 -07001277
1278 /* Get current (RXON) channel, band, width */
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001279 IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1280 is_ht40);
Zhu Yib481de92007-09-25 17:54:57 -07001281
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001282 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1283
1284 if (!is_channel_valid(ch_info))
Zhu Yib481de92007-09-25 17:54:57 -07001285 return -EINVAL;
1286
1287 /* get txatten group, used to select 1) thermal txpower adjustment
1288 * and 2) mimo txpower balance between Tx chains. */
1289 txatten_grp = iwl4965_get_tx_atten_grp(channel);
Samuel Ortiza3139c52008-12-19 10:37:09 +08001290 if (txatten_grp < 0) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001291 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
Samuel Ortiza3139c52008-12-19 10:37:09 +08001292 channel);
Zhu Yib481de92007-09-25 17:54:57 -07001293 return -EINVAL;
Samuel Ortiza3139c52008-12-19 10:37:09 +08001294 }
Zhu Yib481de92007-09-25 17:54:57 -07001295
Tomas Winklere1623442009-01-27 14:27:56 -08001296 IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001297 channel, txatten_grp);
1298
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001299 if (is_ht40) {
Zhu Yib481de92007-09-25 17:54:57 -07001300 if (ctrl_chan_high)
1301 channel -= 2;
1302 else
1303 channel += 2;
1304 }
1305
1306 /* hardware txpower limits ...
1307 * saturation (clipping distortion) txpowers are in half-dBm */
1308 if (band)
Tomas Winkler073d3f52008-04-21 15:41:52 -07001309 saturation_power = priv->calib_info->saturation_power24;
Zhu Yib481de92007-09-25 17:54:57 -07001310 else
Tomas Winkler073d3f52008-04-21 15:41:52 -07001311 saturation_power = priv->calib_info->saturation_power52;
Zhu Yib481de92007-09-25 17:54:57 -07001312
1313 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1314 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1315 if (band)
1316 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1317 else
1318 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1319 }
1320
1321 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1322 * max_power_avg values are in dBm, convert * 2 */
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001323 if (is_ht40)
1324 reg_limit = ch_info->ht40_max_power_avg * 2;
Zhu Yib481de92007-09-25 17:54:57 -07001325 else
1326 reg_limit = ch_info->max_power_avg * 2;
1327
1328 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1329 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1330 if (band)
1331 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1332 else
1333 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1334 }
1335
1336 /* Interpolate txpower calibration values for this channel,
1337 * based on factory calibration tests on spaced channels. */
1338 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1339
1340 /* calculate tx gain adjustment based on power supply voltage */
Tomas Winkler073d3f52008-04-21 15:41:52 -07001341 voltage = priv->calib_info->voltage;
Zhu Yib481de92007-09-25 17:54:57 -07001342 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1343 voltage_compensation =
1344 iwl4965_get_voltage_compensation(voltage, init_voltage);
1345
Tomas Winklere1623442009-01-27 14:27:56 -08001346 IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001347 init_voltage,
1348 voltage, voltage_compensation);
1349
1350 /* get current temperature (Celsius) */
1351 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1352 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1353 current_temp = KELVIN_TO_CELSIUS(current_temp);
1354
1355 /* select thermal txpower adjustment params, based on channel group
1356 * (same frequency group used for mimo txatten adjustment) */
1357 degrees_per_05db_num =
1358 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1359 degrees_per_05db_denom =
1360 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1361
1362 /* get per-chain txpower values from factory measurements */
1363 for (c = 0; c < 2; c++) {
1364 measurement = &ch_eeprom_info.measurements[c][1];
1365
1366 /* txgain adjustment (in half-dB steps) based on difference
1367 * between factory and current temperature */
1368 factory_temp = measurement->temperature;
1369 iwl4965_math_div_round((current_temp - factory_temp) *
1370 degrees_per_05db_denom,
1371 degrees_per_05db_num,
1372 &temperature_comp[c]);
1373
1374 factory_gain_index[c] = measurement->gain_idx;
1375 factory_actual_pwr[c] = measurement->actual_pow;
1376
Tomas Winklere1623442009-01-27 14:27:56 -08001377 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1378 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
Zhu Yib481de92007-09-25 17:54:57 -07001379 "curr tmp %d, comp %d steps\n",
1380 factory_temp, current_temp,
1381 temperature_comp[c]);
1382
Tomas Winklere1623442009-01-27 14:27:56 -08001383 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001384 factory_gain_index[c],
1385 factory_actual_pwr[c]);
1386 }
1387
1388 /* for each of 33 bit-rates (including 1 for CCK) */
1389 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1390 u8 is_mimo_rate;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001391 union iwl4965_tx_power_dual_stream tx_power;
Zhu Yib481de92007-09-25 17:54:57 -07001392
1393 /* for mimo, reduce each chain's txpower by half
1394 * (3dB, 6 steps), so total output power is regulatory
1395 * compliant. */
1396 if (i & 0x8) {
1397 current_regulatory = reg_limit -
1398 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1399 is_mimo_rate = 1;
1400 } else {
1401 current_regulatory = reg_limit;
1402 is_mimo_rate = 0;
1403 }
1404
1405 /* find txpower limit, either hardware or regulatory */
1406 power_limit = saturation_power - back_off_table[i];
1407 if (power_limit > current_regulatory)
1408 power_limit = current_regulatory;
1409
1410 /* reduce user's txpower request if necessary
1411 * for this rate on this channel */
1412 target_power = user_target_power;
1413 if (target_power > power_limit)
1414 target_power = power_limit;
1415
Tomas Winklere1623442009-01-27 14:27:56 -08001416 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001417 i, saturation_power - back_off_table[i],
1418 current_regulatory, user_target_power,
1419 target_power);
1420
1421 /* for each of 2 Tx chains (radio transmitters) */
1422 for (c = 0; c < 2; c++) {
1423 s32 atten_value;
1424
1425 if (is_mimo_rate)
1426 atten_value =
1427 (s32)le32_to_cpu(priv->card_alive_init.
1428 tx_atten[txatten_grp][c]);
1429 else
1430 atten_value = 0;
1431
1432 /* calculate index; higher index means lower txpower */
1433 power_index = (u8) (factory_gain_index[c] -
1434 (target_power -
1435 factory_actual_pwr[c]) -
1436 temperature_comp[c] -
1437 voltage_compensation +
1438 atten_value);
1439
Tomas Winklere1623442009-01-27 14:27:56 -08001440/* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001441 power_index); */
1442
1443 if (power_index < get_min_power_index(i, band))
1444 power_index = get_min_power_index(i, band);
1445
1446 /* adjust 5 GHz index to support negative indexes */
1447 if (!band)
1448 power_index += 9;
1449
1450 /* CCK, rate 32, reduce txpower for CCK */
1451 if (i == POWER_TABLE_CCK_ENTRY)
1452 power_index +=
1453 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1454
1455 /* stay within the table! */
1456 if (power_index > 107) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001457 IWL_WARN(priv, "txpower index %d > 107\n",
Zhu Yib481de92007-09-25 17:54:57 -07001458 power_index);
1459 power_index = 107;
1460 }
1461 if (power_index < 0) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001462 IWL_WARN(priv, "txpower index %d < 0\n",
Zhu Yib481de92007-09-25 17:54:57 -07001463 power_index);
1464 power_index = 0;
1465 }
1466
1467 /* fill txpower command for this rate/chain */
1468 tx_power.s.radio_tx_gain[c] =
1469 gain_table[band][power_index].radio;
1470 tx_power.s.dsp_predis_atten[c] =
1471 gain_table[band][power_index].dsp;
1472
Tomas Winklere1623442009-01-27 14:27:56 -08001473 IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
Zhu Yib481de92007-09-25 17:54:57 -07001474 "gain 0x%02x dsp %d\n",
1475 c, atten_value, power_index,
1476 tx_power.s.radio_tx_gain[c],
1477 tx_power.s.dsp_predis_atten[c]);
Tomas Winkler3ac7f142008-07-21 02:40:14 +03001478 } /* for each chain */
Zhu Yib481de92007-09-25 17:54:57 -07001479
1480 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1481
Tomas Winkler3ac7f142008-07-21 02:40:14 +03001482 } /* for each rate */
Zhu Yib481de92007-09-25 17:54:57 -07001483
1484 return 0;
1485}
1486
1487/**
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001488 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
Zhu Yib481de92007-09-25 17:54:57 -07001489 *
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001490 * Uses the active RXON for channel, band, and characteristics (ht40, high)
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001491 * The power limit is taken from priv->tx_power_user_lmt.
Zhu Yib481de92007-09-25 17:54:57 -07001492 */
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001493static int iwl4965_send_tx_power(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001494{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001495 struct iwl4965_txpowertable_cmd cmd = { 0 };
Tomas Winkler857485c2008-03-21 13:53:44 -07001496 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07001497 u8 band = 0;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001498 bool is_ht40 = false;
Zhu Yib481de92007-09-25 17:54:57 -07001499 u8 ctrl_chan_high = 0;
1500
1501 if (test_bit(STATUS_SCANNING, &priv->status)) {
1502 /* If this gets hit a lot, switch it to a BUG() and catch
1503 * the stack trace to find out who is calling this during
1504 * a scan. */
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001505 IWL_WARN(priv, "TX Power requested while scanning!\n");
Zhu Yib481de92007-09-25 17:54:57 -07001506 return -EAGAIN;
1507 }
1508
Johannes Berg8318d782008-01-24 19:38:38 +01001509 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001510
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001511 is_ht40 = is_ht40_channel(priv->active_rxon.flags);
Zhu Yib481de92007-09-25 17:54:57 -07001512
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001513 if (is_ht40 &&
Zhu Yib481de92007-09-25 17:54:57 -07001514 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1515 ctrl_chan_high = 1;
1516
1517 cmd.band = band;
1518 cmd.channel = priv->active_rxon.channel;
1519
Tomas Winkler857485c2008-03-21 13:53:44 -07001520 ret = iwl4965_fill_txpower_tbl(priv, band,
Zhu Yib481de92007-09-25 17:54:57 -07001521 le16_to_cpu(priv->active_rxon.channel),
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001522 is_ht40, ctrl_chan_high, &cmd.tx_power);
Tomas Winkler857485c2008-03-21 13:53:44 -07001523 if (ret)
1524 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07001525
Tomas Winkler857485c2008-03-21 13:53:44 -07001526 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1527
1528out:
1529 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07001530}
1531
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001532static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1533{
1534 int ret = 0;
1535 struct iwl4965_rxon_assoc_cmd rxon_assoc;
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001536 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1537 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001538
1539 if ((rxon1->flags == rxon2->flags) &&
1540 (rxon1->filter_flags == rxon2->filter_flags) &&
1541 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1542 (rxon1->ofdm_ht_single_stream_basic_rates ==
1543 rxon2->ofdm_ht_single_stream_basic_rates) &&
1544 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1545 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1546 (rxon1->rx_chain == rxon2->rx_chain) &&
1547 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
Tomas Winklere1623442009-01-27 14:27:56 -08001548 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001549 return 0;
1550 }
1551
1552 rxon_assoc.flags = priv->staging_rxon.flags;
1553 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1554 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1555 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1556 rxon_assoc.reserved = 0;
1557 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1558 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1559 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1560 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1561 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1562
1563 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1564 sizeof(rxon_assoc), &rxon_assoc, NULL);
1565 if (ret)
1566 return ret;
1567
1568 return ret;
1569}
1570
Zhu Yi3c935522008-09-03 11:26:57 +08001571#ifdef IEEE80211_CONF_CHANNEL_SWITCH
Emmanuel Grumbacha33c2f42008-09-03 11:26:56 +08001572static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001573{
1574 int rc;
1575 u8 band = 0;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001576 bool is_ht40 = false;
Zhu Yib481de92007-09-25 17:54:57 -07001577 u8 ctrl_chan_high = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001578 struct iwl4965_channel_switch_cmd cmd = { 0 };
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001579 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001580
Johannes Berg8318d782008-01-24 19:38:38 +01001581 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001582
Assaf Krauss8622e702008-03-21 13:53:43 -07001583 ch_info = iwl_get_channel_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001584
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001585 is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
Zhu Yib481de92007-09-25 17:54:57 -07001586
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001587 if (is_ht40 &&
Zhu Yib481de92007-09-25 17:54:57 -07001588 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1589 ctrl_chan_high = 1;
1590
1591 cmd.band = band;
1592 cmd.expect_beacon = 0;
1593 cmd.channel = cpu_to_le16(channel);
1594 cmd.rxon_flags = priv->active_rxon.flags;
1595 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1596 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1597 if (ch_info)
1598 cmd.expect_beacon = is_channel_radar(ch_info);
1599 else
1600 cmd.expect_beacon = 1;
1601
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001602 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
Zhu Yib481de92007-09-25 17:54:57 -07001603 ctrl_chan_high, &cmd.tx_power);
1604 if (rc) {
Tomas Winklere1623442009-01-27 14:27:56 -08001605 IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc);
Zhu Yib481de92007-09-25 17:54:57 -07001606 return rc;
1607 }
1608
Tomas Winkler857485c2008-03-21 13:53:44 -07001609 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001610 return rc;
1611}
Zhu Yi3c935522008-09-03 11:26:57 +08001612#endif
Zhu Yib481de92007-09-25 17:54:57 -07001613
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001614/**
Tomas Winklere2a722e2008-04-14 21:16:10 -07001615 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001616 */
Tomas Winklere2a722e2008-04-14 21:16:10 -07001617static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +08001618 struct iwl_tx_queue *txq,
Tomas Winklere2a722e2008-04-14 21:16:10 -07001619 u16 byte_cnt)
Zhu Yib481de92007-09-25 17:54:57 -07001620{
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001621 struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
Tomas Winkler127901a2008-10-23 23:48:55 -07001622 int txq_id = txq->q.id;
1623 int write_ptr = txq->q.write_ptr;
1624 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1625 __le16 bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001626
Tomas Winkler127901a2008-10-23 23:48:55 -07001627 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
Zhu Yib481de92007-09-25 17:54:57 -07001628
Tomas Winkler127901a2008-10-23 23:48:55 -07001629 bc_ent = cpu_to_le16(len & 0xFFF);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001630 /* Set up byte count within first 256 entries */
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001631 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001632
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001633 /* If within first 64 entries, duplicate at end */
Tomas Winkler127901a2008-10-23 23:48:55 -07001634 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001635 scd_bc_tbl[txq_id].
Tomas Winkler127901a2008-10-23 23:48:55 -07001636 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001637}
1638
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001639/**
Zhu Yib481de92007-09-25 17:54:57 -07001640 * sign_extend - Sign extend a value using specified bit as sign-bit
1641 *
1642 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1643 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1644 *
1645 * @param oper value to sign extend
1646 * @param index 0 based bit index (0<=index<32) to sign bit
1647 */
1648static s32 sign_extend(u32 oper, int index)
1649{
1650 u8 shift = 31 - index;
1651
1652 return (s32)(oper << shift) >> shift;
1653}
1654
1655/**
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001656 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
Zhu Yib481de92007-09-25 17:54:57 -07001657 * @statistics: Provides the temperature reading from the uCode
1658 *
1659 * A return of <0 indicates bogus data in the statistics
1660 */
Reinette Chatre3d816c72009-08-07 15:41:37 -07001661static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001662{
1663 s32 temperature;
1664 s32 vt;
1665 s32 R1, R2, R3;
1666 u32 R4;
1667
1668 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001669 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1670 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
Zhu Yib481de92007-09-25 17:54:57 -07001671 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1672 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1673 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1674 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1675 } else {
Tomas Winklere1623442009-01-27 14:27:56 -08001676 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
Zhu Yib481de92007-09-25 17:54:57 -07001677 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1678 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1679 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1680 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1681 }
1682
1683 /*
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001684 * Temperature is only 23 bits, so sign extend out to 32.
Zhu Yib481de92007-09-25 17:54:57 -07001685 *
1686 * NOTE If we haven't received a statistics notification yet
1687 * with an updated temperature, use R4 provided to us in the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001688 * "initialize" ALIVE response.
1689 */
Zhu Yib481de92007-09-25 17:54:57 -07001690 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1691 vt = sign_extend(R4, 23);
1692 else
1693 vt = sign_extend(
1694 le32_to_cpu(priv->statistics.general.temperature), 23);
1695
Tomas Winklere1623442009-01-27 14:27:56 -08001696 IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
Zhu Yib481de92007-09-25 17:54:57 -07001697
1698 if (R3 == R1) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001699 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
Zhu Yib481de92007-09-25 17:54:57 -07001700 return -1;
1701 }
1702
1703 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1704 * Add offset to center the adjustment around 0 degrees Centigrade. */
1705 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1706 temperature /= (R3 - R1);
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001707 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
Zhu Yib481de92007-09-25 17:54:57 -07001708
Tomas Winklere1623442009-01-27 14:27:56 -08001709 IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001710 temperature, KELVIN_TO_CELSIUS(temperature));
Zhu Yib481de92007-09-25 17:54:57 -07001711
1712 return temperature;
1713}
1714
1715/* Adjust Txpower only if temperature variance is greater than threshold. */
1716#define IWL_TEMPERATURE_THRESHOLD 3
1717
1718/**
1719 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1720 *
1721 * If the temperature changed has changed sufficiently, then a recalibration
1722 * is needed.
1723 *
1724 * Assumes caller will replace priv->last_temperature once calibration
1725 * executed.
1726 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001727static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001728{
1729 int temp_diff;
1730
1731 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
Tomas Winklere1623442009-01-27 14:27:56 -08001732 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001733 return 0;
1734 }
1735
1736 temp_diff = priv->temperature - priv->last_temperature;
1737
1738 /* get absolute value */
1739 if (temp_diff < 0) {
Tomas Winklere1623442009-01-27 14:27:56 -08001740 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
Zhu Yib481de92007-09-25 17:54:57 -07001741 temp_diff = -temp_diff;
1742 } else if (temp_diff == 0)
Tomas Winklere1623442009-01-27 14:27:56 -08001743 IWL_DEBUG_POWER(priv, "Same temp, \n");
Zhu Yib481de92007-09-25 17:54:57 -07001744 else
Tomas Winklere1623442009-01-27 14:27:56 -08001745 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
Zhu Yib481de92007-09-25 17:54:57 -07001746
1747 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
Tomas Winklere1623442009-01-27 14:27:56 -08001748 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
Zhu Yib481de92007-09-25 17:54:57 -07001749 return 0;
1750 }
1751
Tomas Winklere1623442009-01-27 14:27:56 -08001752 IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
Zhu Yib481de92007-09-25 17:54:57 -07001753
1754 return 1;
1755}
1756
Zhu Yi52256402008-06-30 17:23:31 +08001757static void iwl4965_temperature_calib(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001758{
Zhu Yib481de92007-09-25 17:54:57 -07001759 s32 temp;
Zhu Yib481de92007-09-25 17:54:57 -07001760
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001761 temp = iwl4965_hw_get_temperature(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001762 if (temp < 0)
1763 return;
1764
1765 if (priv->temperature != temp) {
1766 if (priv->temperature)
Tomas Winklere1623442009-01-27 14:27:56 -08001767 IWL_DEBUG_TEMP(priv, "Temperature changed "
Zhu Yib481de92007-09-25 17:54:57 -07001768 "from %dC to %dC\n",
1769 KELVIN_TO_CELSIUS(priv->temperature),
1770 KELVIN_TO_CELSIUS(temp));
1771 else
Tomas Winklere1623442009-01-27 14:27:56 -08001772 IWL_DEBUG_TEMP(priv, "Temperature "
Zhu Yib481de92007-09-25 17:54:57 -07001773 "initialized to %dC\n",
1774 KELVIN_TO_CELSIUS(temp));
1775 }
1776
1777 priv->temperature = temp;
Wey-Yi Guy39b73fb2009-07-24 11:13:02 -07001778 iwl_tt_handler(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001779 set_bit(STATUS_TEMPERATURE, &priv->status);
1780
Emmanuel Grumbach203566f2008-06-12 09:46:54 +08001781 if (!priv->disable_tx_power_cal &&
1782 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1783 iwl4965_is_temp_calib_needed(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001784 queue_work(priv->workqueue, &priv->txpower_work);
1785}
1786
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001787/**
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001788 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1789 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001790static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001791 u16 txq_id)
1792{
1793 /* Simply stop the queue, but don't change any configuration;
1794 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001795 iwl_write_prph(priv,
Tomas Winkler12a81f62008-04-03 16:05:20 -07001796 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001797 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1798 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001799}
1800
1801/**
Ron Rindjunsky7f3e4bb2008-06-12 09:46:55 +08001802 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08001803 * priv->lock must be held by the caller
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001804 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08001805static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1806 u16 ssn_idx, u8 tx_fifo)
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001807{
Tomas Winkler9f17b312008-07-11 11:53:35 +08001808 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1809 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001810 IWL_WARN(priv,
1811 "queue number out of range: %d, must be %d to %d\n",
Tomas Winkler9f17b312008-07-11 11:53:35 +08001812 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1813 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001814 return -EINVAL;
1815 }
1816
1817 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1818
Tomas Winkler12a81f62008-04-03 16:05:20 -07001819 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001820
1821 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1822 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1823 /* supposes that ssn_idx is valid (!= 0xFFF) */
1824 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1825
Tomas Winkler12a81f62008-04-03 16:05:20 -07001826 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Ron Rindjunsky36470742008-05-15 13:54:10 +08001827 iwl_txq_ctx_deactivate(priv, txq_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001828 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1829
1830 return 0;
1831}
1832
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001833/**
1834 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1835 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001836static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
Zhu Yib481de92007-09-25 17:54:57 -07001837 u16 txq_id)
1838{
1839 u32 tbl_dw_addr;
1840 u32 tbl_dw;
1841 u16 scd_q2ratid;
1842
Tomas Winkler30e553e2008-05-29 16:35:16 +08001843 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
Zhu Yib481de92007-09-25 17:54:57 -07001844
1845 tbl_dw_addr = priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001846 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
Zhu Yib481de92007-09-25 17:54:57 -07001847
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001848 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
Zhu Yib481de92007-09-25 17:54:57 -07001849
1850 if (txq_id & 0x1)
1851 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1852 else
1853 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1854
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001855 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
Zhu Yib481de92007-09-25 17:54:57 -07001856
1857 return 0;
1858}
1859
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001860
Zhu Yib481de92007-09-25 17:54:57 -07001861/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001862 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1863 *
Ron Rindjunsky7f3e4bb2008-06-12 09:46:55 +08001864 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001865 * i.e. it must be one of the higher queues used for aggregation
Zhu Yib481de92007-09-25 17:54:57 -07001866 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08001867static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1868 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
Zhu Yib481de92007-09-25 17:54:57 -07001869{
1870 unsigned long flags;
Zhu Yib481de92007-09-25 17:54:57 -07001871 u16 ra_tid;
1872
Tomas Winkler9f17b312008-07-11 11:53:35 +08001873 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1874 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001875 IWL_WARN(priv,
1876 "queue number out of range: %d, must be %d to %d\n",
Tomas Winkler9f17b312008-07-11 11:53:35 +08001877 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1878 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1879 return -EINVAL;
1880 }
Zhu Yib481de92007-09-25 17:54:57 -07001881
1882 ra_tid = BUILD_RAxTID(sta_id, tid);
1883
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001884 /* Modify device's station table to Tx this TID */
Tomas Winkler9f586712008-11-12 13:14:05 -08001885 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
Zhu Yib481de92007-09-25 17:54:57 -07001886
1887 spin_lock_irqsave(&priv->lock, flags);
Zhu Yib481de92007-09-25 17:54:57 -07001888
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001889 /* Stop this Tx queue before configuring it */
Zhu Yib481de92007-09-25 17:54:57 -07001890 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1891
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001892 /* Map receiver-address / traffic-ID to this queue */
Zhu Yib481de92007-09-25 17:54:57 -07001893 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1894
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001895 /* Set this queue as a chain-building queue */
Tomas Winkler12a81f62008-04-03 16:05:20 -07001896 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07001897
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001898 /* Place first TFD at index corresponding to start sequence number.
1899 * Assumes that ssn_idx is valid (!= 0xFFF) */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08001900 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1901 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
Zhu Yib481de92007-09-25 17:54:57 -07001902 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1903
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001904 /* Set up Tx window size and frame limit for this queue */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001905 iwl_write_targ_mem(priv,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001906 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1907 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1908 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001909
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001910 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001911 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1912 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1913 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001914
Tomas Winkler12a81f62008-04-03 16:05:20 -07001915 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07001916
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001917 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
Zhu Yib481de92007-09-25 17:54:57 -07001918 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1919
Zhu Yib481de92007-09-25 17:54:57 -07001920 spin_unlock_irqrestore(&priv->lock, flags);
1921
1922 return 0;
1923}
1924
Tomas Winkler133636d2008-05-05 10:22:34 +08001925
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001926static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1927{
1928 switch (cmd_id) {
1929 case REPLY_RXON:
1930 return (u16) sizeof(struct iwl4965_rxon_cmd);
1931 default:
1932 return len;
1933 }
1934}
1935
Tomas Winkler133636d2008-05-05 10:22:34 +08001936static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1937{
1938 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1939 addsta->mode = cmd->mode;
1940 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1941 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1942 addsta->station_flags = cmd->station_flags;
1943 addsta->station_flags_msk = cmd->station_flags_msk;
1944 addsta->tid_disable_tx = cmd->tid_disable_tx;
1945 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1946 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1947 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
Harvey Harrisonc1b4aa32009-01-29 13:26:44 -08001948 addsta->reserved1 = cpu_to_le16(0);
1949 addsta->reserved2 = cpu_to_le32(0);
Tomas Winkler133636d2008-05-05 10:22:34 +08001950
1951 return (u16)sizeof(struct iwl4965_addsta_cmd);
1952}
Tomas Winklerf20217d2008-05-29 16:35:10 +08001953
Tomas Winklerf20217d2008-05-29 16:35:10 +08001954static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1955{
Tomas Winkler25a65722008-06-12 09:47:07 +08001956 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001957}
1958
1959/**
Tomas Winklera96a27f2008-10-23 23:48:56 -07001960 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
Tomas Winklerf20217d2008-05-29 16:35:10 +08001961 */
1962static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1963 struct iwl_ht_agg *agg,
Tomas Winkler25a65722008-06-12 09:47:07 +08001964 struct iwl4965_tx_resp *tx_resp,
1965 int txq_id, u16 start_idx)
Tomas Winklerf20217d2008-05-29 16:35:10 +08001966{
1967 u16 status;
Tomas Winkler25a65722008-06-12 09:47:07 +08001968 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001969 struct ieee80211_tx_info *info = NULL;
1970 struct ieee80211_hdr *hdr = NULL;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001971 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
Tomas Winkler25a65722008-06-12 09:47:07 +08001972 int i, sh, idx;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001973 u16 seq;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001974 if (agg->wait_for_ba)
Tomas Winklere1623442009-01-27 14:27:56 -08001975 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08001976
1977 agg->frame_count = tx_resp->frame_count;
1978 agg->start_idx = start_idx;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001979 agg->rate_n_flags = rate_n_flags;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001980 agg->bitmap = 0;
1981
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001982 /* num frames attempted by Tx command */
Tomas Winklerf20217d2008-05-29 16:35:10 +08001983 if (agg->frame_count == 1) {
1984 /* Only one frame was attempted; no block-ack will arrive */
1985 status = le16_to_cpu(frame_status[0].status);
Tomas Winkler25a65722008-06-12 09:47:07 +08001986 idx = start_idx;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001987
1988 /* FIXME: code repetition */
Tomas Winklere1623442009-01-27 14:27:56 -08001989 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001990 agg->frame_count, agg->start_idx, idx);
1991
1992 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
Johannes Berge6a98542008-10-21 12:40:02 +02001993 info->status.rates[0].count = tx_resp->failure_frame + 1;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001994 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
Abhijeet Kolekarc3056062008-11-12 13:14:08 -08001995 info->flags |= iwl_is_tx_success(status) ?
Tomas Winklerf20217d2008-05-29 16:35:10 +08001996 IEEE80211_TX_STAT_ACK : 0;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001997 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001998 /* FIXME: code repetition end */
1999
Tomas Winklere1623442009-01-27 14:27:56 -08002000 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08002001 status & 0xff, tx_resp->failure_frame);
Tomas Winklere1623442009-01-27 14:27:56 -08002002 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002003
2004 agg->wait_for_ba = 0;
2005 } else {
2006 /* Two or more frames were attempted; expect block-ack */
2007 u64 bitmap = 0;
2008 int start = agg->start_idx;
2009
2010 /* Construct bit-map of pending frames within Tx window */
2011 for (i = 0; i < agg->frame_count; i++) {
2012 u16 sc;
2013 status = le16_to_cpu(frame_status[i].status);
2014 seq = le16_to_cpu(frame_status[i].sequence);
2015 idx = SEQ_TO_INDEX(seq);
2016 txq_id = SEQ_TO_QUEUE(seq);
2017
2018 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2019 AGG_TX_STATE_ABORT_MSK))
2020 continue;
2021
Tomas Winklere1623442009-01-27 14:27:56 -08002022 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08002023 agg->frame_count, txq_id, idx);
2024
2025 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
Stanislaw Gruszka6c6a22e2009-09-23 10:51:34 +02002026 if (!hdr) {
2027 IWL_ERR(priv,
2028 "BUG_ON idx doesn't point to valid skb"
2029 " idx=%d, txq_id=%d\n", idx, txq_id);
2030 return -1;
2031 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002032
2033 sc = le16_to_cpu(hdr->seq_ctrl);
2034 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002035 IWL_ERR(priv,
2036 "BUG_ON idx doesn't match seq control"
2037 " idx=%d, seq_idx=%d, seq=%d\n",
2038 idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002039 return -1;
2040 }
2041
Tomas Winklere1623442009-01-27 14:27:56 -08002042 IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08002043 i, idx, SEQ_TO_SN(sc));
2044
2045 sh = idx - start;
2046 if (sh > 64) {
2047 sh = (start - idx) + 0xff;
2048 bitmap = bitmap << sh;
2049 sh = 0;
2050 start = idx;
2051 } else if (sh < -64)
2052 sh = 0xff - (start - idx);
2053 else if (sh < 0) {
2054 sh = start - idx;
2055 start = idx;
2056 bitmap = bitmap << sh;
2057 sh = 0;
2058 }
Emmanuel Grumbach4aa41f12008-07-18 13:53:09 +08002059 bitmap |= 1ULL << sh;
Tomas Winklere1623442009-01-27 14:27:56 -08002060 IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
Emmanuel Grumbach4aa41f12008-07-18 13:53:09 +08002061 start, (unsigned long long)bitmap);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002062 }
2063
2064 agg->bitmap = bitmap;
2065 agg->start_idx = start;
Tomas Winklere1623442009-01-27 14:27:56 -08002066 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08002067 agg->frame_count, agg->start_idx,
2068 (unsigned long long)agg->bitmap);
2069
2070 if (bitmap)
2071 agg->wait_for_ba = 1;
2072 }
2073 return 0;
2074}
Tomas Winklerf20217d2008-05-29 16:35:10 +08002075
2076/**
2077 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2078 */
2079static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2080 struct iwl_rx_mem_buffer *rxb)
2081{
2082 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2083 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2084 int txq_id = SEQ_TO_QUEUE(sequence);
2085 int index = SEQ_TO_INDEX(sequence);
2086 struct iwl_tx_queue *txq = &priv->txq[txq_id];
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002087 struct ieee80211_hdr *hdr;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002088 struct ieee80211_tx_info *info;
2089 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Tomas Winkler25a65722008-06-12 09:47:07 +08002090 u32 status = le32_to_cpu(tx_resp->u.status);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002091 int tid = MAX_TID_COUNT;
2092 int sta_id;
2093 int freed;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002094 u8 *qc = NULL;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002095
2096 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002097 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
Tomas Winklerf20217d2008-05-29 16:35:10 +08002098 "is out of range [0-%d] %d %d\n", txq_id,
2099 index, txq->q.n_bd, txq->q.write_ptr,
2100 txq->q.read_ptr);
2101 return;
2102 }
2103
2104 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2105 memset(&info->status, 0, sizeof(info->status));
2106
Tomas Winklerf20217d2008-05-29 16:35:10 +08002107 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002108 if (ieee80211_is_data_qos(hdr->frame_control)) {
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002109 qc = ieee80211_get_qos_ctl(hdr);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002110 tid = qc[0] & 0xf;
2111 }
2112
2113 sta_id = iwl_get_ra_sta_id(priv, hdr);
2114 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002115 IWL_ERR(priv, "Station not known\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08002116 return;
2117 }
2118
2119 if (txq->sched_retry) {
2120 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2121 struct iwl_ht_agg *agg = NULL;
2122
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002123 WARN_ON(!qc);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002124
2125 agg = &priv->stations[sta_id].tid[tid].agg;
2126
Tomas Winkler25a65722008-06-12 09:47:07 +08002127 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002128
Ron Rindjunsky32354272008-07-01 10:44:51 +03002129 /* check if BAR is needed */
2130 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2131 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002132
2133 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
Tomas Winklerf20217d2008-05-29 16:35:10 +08002134 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
Tomas Winklere1623442009-01-27 14:27:56 -08002135 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
Tomas Winklerf20217d2008-05-29 16:35:10 +08002136 "%d index %d\n", scd_ssn , index);
Tomas Winkler17b88922008-05-29 16:35:12 +08002137 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002138 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2139
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002140 if (priv->mac80211_registered &&
2141 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2142 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
Tomas Winklerf20217d2008-05-29 16:35:10 +08002143 if (agg->state == IWL_AGG_OFF)
Johannes Berge4e72fb2009-03-23 17:28:42 +01002144 iwl_wake_queue(priv, txq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002145 else
Johannes Berge4e72fb2009-03-23 17:28:42 +01002146 iwl_wake_queue(priv, txq->swq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002147 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002148 }
2149 } else {
Johannes Berge6a98542008-10-21 12:40:02 +02002150 info->status.rates[0].count = tx_resp->failure_frame + 1;
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002151 info->flags |= iwl_is_tx_success(status) ?
2152 IEEE80211_TX_STAT_ACK : 0;
Tomas Winklere7d326a2008-06-12 09:47:11 +08002153 iwl_hwrate_to_tx_control(priv,
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03002154 le32_to_cpu(tx_resp->rate_n_flags),
2155 info);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002156
Tomas Winklere1623442009-01-27 14:27:56 -08002157 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002158 "rate_n_flags 0x%x retries %d\n",
2159 txq_id,
2160 iwl_get_tx_fail_reason(status), status,
2161 le32_to_cpu(tx_resp->rate_n_flags),
2162 tx_resp->failure_frame);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002163
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002164 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
Tomas Winklered7fafe2008-10-23 23:48:50 -07002165 if (qc && likely(sta_id != IWL_INVALID_STATION))
Tomas Winklerf20217d2008-05-29 16:35:10 +08002166 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002167
2168 if (priv->mac80211_registered &&
2169 (iwl_queue_space(&txq->q) > txq->q.low_mark))
Johannes Berge4e72fb2009-03-23 17:28:42 +01002170 iwl_wake_queue(priv, txq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002171 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002172
Tomas Winklered7fafe2008-10-23 23:48:50 -07002173 if (qc && likely(sta_id != IWL_INVALID_STATION))
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002174 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2175
Tomas Winklerf20217d2008-05-29 16:35:10 +08002176 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
Winkler, Tomas15b16872008-12-19 10:37:33 +08002177 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08002178}
2179
Tomas Winklercaab8f12008-08-04 16:00:42 +08002180static int iwl4965_calc_rssi(struct iwl_priv *priv,
2181 struct iwl_rx_phy_res *rx_resp)
2182{
2183 /* data from PHY/DSP regarding signal strength, etc.,
2184 * contents are always there, not configurable by host. */
2185 struct iwl4965_rx_non_cfg_phy *ncphy =
2186 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2187 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2188 >> IWL49_AGC_DB_POS;
2189
2190 u32 valid_antennae =
2191 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2192 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2193 u8 max_rssi = 0;
2194 u32 i;
2195
2196 /* Find max rssi among 3 possible receivers.
2197 * These values are measured by the digital signal processor (DSP).
2198 * They should stay fairly constant even as the signal strength varies,
2199 * if the radio's automatic gain control (AGC) is working right.
2200 * AGC value (see below) will provide the "interesting" info. */
2201 for (i = 0; i < 3; i++)
2202 if (valid_antennae & (1 << i))
2203 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2204
Tomas Winklere1623442009-01-27 14:27:56 -08002205 IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
Tomas Winklercaab8f12008-08-04 16:00:42 +08002206 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2207 max_rssi, agc);
2208
2209 /* dBm = max_rssi dB - agc dB - constant.
2210 * Higher AGC (higher radio gain) means lower signal. */
Samuel Ortiz250bdd22008-12-19 10:37:11 +08002211 return max_rssi - agc - IWL49_RSSI_OFFSET;
Tomas Winklercaab8f12008-08-04 16:00:42 +08002212}
2213
Tomas Winklerf20217d2008-05-29 16:35:10 +08002214
Zhu Yib481de92007-09-25 17:54:57 -07002215/* Set up 4965-specific Rx frame reply handlers */
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07002216static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002217{
2218 /* Legacy Rx frames */
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08002219 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
Ron Rindjunsky37a44212008-05-29 16:35:18 +08002220 /* Tx response */
Tomas Winklerf20217d2008-05-29 16:35:10 +08002221 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07002222}
2223
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002224static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002225{
2226 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
Zhu Yib481de92007-09-25 17:54:57 -07002227}
2228
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002229static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002230{
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002231 cancel_work_sync(&priv->txpower_work);
Zhu Yib481de92007-09-25 17:54:57 -07002232}
2233
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002234#define IWL4965_UCODE_GET(item) \
2235static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2236 u32 api_ver) \
2237{ \
2238 return le32_to_cpu(ucode->u.v1.item); \
2239}
2240
2241static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2242{
2243 return UCODE_HEADER_SIZE(1);
2244}
2245static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2246 u32 api_ver)
2247{
2248 return 0;
2249}
2250static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2251 u32 api_ver)
2252{
2253 return (u8 *) ucode->u.v1.data;
2254}
2255
2256IWL4965_UCODE_GET(inst_size);
2257IWL4965_UCODE_GET(data_size);
2258IWL4965_UCODE_GET(init_size);
2259IWL4965_UCODE_GET(init_data_size);
2260IWL4965_UCODE_GET(boot_size);
2261
Tomas Winkler3c424c22008-04-15 16:01:42 -07002262static struct iwl_hcmd_ops iwl4965_hcmd = {
Tomas Winkler7e8c5192008-04-15 16:01:43 -07002263 .rxon_assoc = iwl4965_send_rxon_assoc,
Abhijeet Kolekare0158e62009-04-08 11:26:37 -07002264 .commit_rxon = iwl_commit_rxon,
Abhijeet Kolekar45823532009-04-08 11:26:44 -07002265 .set_rxon_chain = iwl_set_rxon_chain,
Tomas Winkler3c424c22008-04-15 16:01:42 -07002266};
2267
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002268static struct iwl_ucode_ops iwl4965_ucode = {
2269 .get_header_size = iwl4965_ucode_get_header_size,
2270 .get_build = iwl4965_ucode_get_build,
2271 .get_inst_size = iwl4965_ucode_get_inst_size,
2272 .get_data_size = iwl4965_ucode_get_data_size,
2273 .get_init_size = iwl4965_ucode_get_init_size,
2274 .get_init_data_size = iwl4965_ucode_get_init_data_size,
2275 .get_boot_size = iwl4965_ucode_get_boot_size,
2276 .get_data = iwl4965_ucode_get_data,
2277};
Tomas Winkler857485c2008-03-21 13:53:44 -07002278static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08002279 .get_hcmd_size = iwl4965_get_hcmd_size,
Tomas Winkler133636d2008-05-05 10:22:34 +08002280 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002281 .chain_noise_reset = iwl4965_chain_noise_reset,
2282 .gain_computation = iwl4965_gain_computation,
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +08002283 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
Tomas Winklercaab8f12008-08-04 16:00:42 +08002284 .calc_rssi = iwl4965_calc_rssi,
Tomas Winkler857485c2008-03-21 13:53:44 -07002285};
2286
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002287static struct iwl_lib_ops iwl4965_lib = {
Tomas Winkler5425e492008-04-15 16:01:38 -07002288 .set_hw_params = iwl4965_hw_set_hw_params,
Tomas Winklere2a722e2008-04-14 21:16:10 -07002289 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
Tomas Winklerda1bc452008-05-29 16:35:00 +08002290 .txq_set_sched = iwl4965_txq_set_sched,
Tomas Winkler30e553e2008-05-29 16:35:16 +08002291 .txq_agg_enable = iwl4965_txq_agg_enable,
2292 .txq_agg_disable = iwl4965_txq_agg_disable,
Samuel Ortiz7aaa1d72009-01-19 15:30:26 -08002293 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2294 .txq_free_tfd = iwl_hw_txq_free_tfd,
Samuel Ortiza8e74e22009-01-23 13:45:14 -08002295 .txq_init = iwl_hw_tx_queue_init,
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07002296 .rx_handler_setup = iwl4965_rx_handler_setup,
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002297 .setup_deferred_work = iwl4965_setup_deferred_work,
2298 .cancel_deferred_work = iwl4965_cancel_deferred_work,
Tomas Winkler57aab752008-04-14 21:16:03 -07002299 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2300 .alive_notify = iwl4965_alive_notify,
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +08002301 .init_alive_start = iwl4965_init_alive_start,
Tomas Winkler57aab752008-04-14 21:16:03 -07002302 .load_ucode = iwl4965_load_bsm,
Reinette Chatreb7a79402009-09-25 14:24:23 -07002303 .dump_nic_event_log = iwl_dump_nic_event_log,
2304 .dump_nic_error_log = iwl_dump_nic_error_log,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07002305 .apm_ops = {
Tomas Winkler91238712008-04-23 17:14:53 -07002306 .init = iwl4965_apm_init,
Tomas Winkler7f066102008-05-29 16:34:57 +08002307 .reset = iwl4965_apm_reset,
Tomas Winklerf118a912008-05-29 16:34:58 +08002308 .stop = iwl4965_apm_stop,
Tomas Winkler694cc562008-04-24 11:55:22 -07002309 .config = iwl4965_nic_config,
Emmanuel Grumbach5b9f8cd2008-10-29 14:05:46 -07002310 .set_pwr_src = iwl_set_pwr_src,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07002311 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002312 .eeprom_ops = {
Tomas Winkler073d3f52008-04-21 15:41:52 -07002313 .regulatory_bands = {
2314 EEPROM_REGULATORY_BAND_1_CHANNELS,
2315 EEPROM_REGULATORY_BAND_2_CHANNELS,
2316 EEPROM_REGULATORY_BAND_3_CHANNELS,
2317 EEPROM_REGULATORY_BAND_4_CHANNELS,
2318 EEPROM_REGULATORY_BAND_5_CHANNELS,
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07002319 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2320 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
Tomas Winkler073d3f52008-04-21 15:41:52 -07002321 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002322 .verify_signature = iwlcore_eeprom_verify_signature,
2323 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2324 .release_semaphore = iwlcore_eeprom_release_semaphore,
Tomas Winkler0ef2ca62008-10-23 23:48:51 -07002325 .calib_version = iwl4965_eeprom_calib_version,
Tomas Winkler073d3f52008-04-21 15:41:52 -07002326 .query_addr = iwlcore_eeprom_query_addr,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002327 },
Tomas Winkler630fe9b2008-06-12 09:47:08 +08002328 .send_tx_power = iwl4965_send_tx_power,
Emmanuel Grumbach5b9f8cd2008-10-29 14:05:46 -07002329 .update_chain_flags = iwl_update_chain_flags,
Abhijeet Kolekar5bbe2332009-04-08 11:26:35 -07002330 .post_associate = iwl_post_associate,
Abhijeet Kolekar60690a62009-04-08 11:26:49 -07002331 .config_ap = iwl_config_ap,
Mohamed Abbasef850d72009-05-22 11:01:50 -07002332 .isr = iwl_isr_legacy,
Wey-Yi Guy62161ae2009-05-21 13:44:23 -07002333 .temp_ops = {
2334 .temperature = iwl4965_temperature_calib,
2335 .set_ct_kill = iwl4965_set_ct_threshold,
2336 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002337};
2338
2339static struct iwl_ops iwl4965_ops = {
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002340 .ucode = &iwl4965_ucode,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002341 .lib = &iwl4965_lib,
Tomas Winkler3c424c22008-04-15 16:01:42 -07002342 .hcmd = &iwl4965_hcmd,
Tomas Winkler857485c2008-03-21 13:53:44 -07002343 .utils = &iwl4965_hcmd_utils,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002344};
2345
Ron Rindjunskyfed90172008-04-15 16:01:41 -07002346struct iwl_cfg iwl4965_agn_cfg = {
Tomas Winkler82b9a122008-03-04 18:09:30 -08002347 .name = "4965AGN",
Reinette Chatrea0987a82008-12-02 12:14:06 -08002348 .fw_name_pre = IWL4965_FW_PRE,
2349 .ucode_api_max = IWL4965_UCODE_API_MAX,
2350 .ucode_api_min = IWL4965_UCODE_API_MIN,
Tomas Winkler82b9a122008-03-04 18:09:30 -08002351 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
Tomas Winkler073d3f52008-04-21 15:41:52 -07002352 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
Tomas Winkler0ef2ca62008-10-23 23:48:51 -07002353 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2354 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002355 .ops = &iwl4965_ops,
Assaf Krauss1ea87392008-03-18 14:57:50 -07002356 .mod_params = &iwl4965_mod_params,
Daniel C Halperinb2617932009-08-13 13:30:59 -07002357 .use_isr_legacy = true,
2358 .ht_greenfield_support = false,
Johannes Berg96d8c6a2009-09-11 10:50:37 -07002359 .broken_powersave = true,
Wey-Yi Guyf2d0d0e2009-09-11 10:38:14 -07002360 .led_compensation = 61,
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -07002361 .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
Tomas Winkler82b9a122008-03-04 18:09:30 -08002362};
2363
Tomas Winklerd16dc482008-07-11 11:53:38 +08002364/* Module firmware */
Reinette Chatrea0987a82008-12-02 12:14:06 -08002365MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
Tomas Winklerd16dc482008-07-11 11:53:38 +08002366
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002367module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002368MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002369module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
Niels de Vos61a2d072008-07-31 00:07:23 -07002370MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
Assaf Krauss1ea87392008-03-18 14:57:50 -07002371module_param_named(
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002372 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002373MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2374
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002375module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002376MODULE_PARM_DESC(queues_num, "number of hw queues.");
Ron Rindjunsky49779292008-06-30 17:23:21 +08002377/* 11n */
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002378module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
Ron Rindjunsky49779292008-06-30 17:23:21 +08002379MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002380module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2381 int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002382MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
Ron Rindjunsky49779292008-06-30 17:23:21 +08002383
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002384module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
Ester Kummer3a1081e2008-05-06 11:05:14 +08002385MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");