blob: 0668843004e8fd81ec2560b4f3346522b5ed1946 [file] [log] [blame]
AnilKumar Ch32bb00e2012-06-22 15:10:49 +05301/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "am33xx.dtsi"
11
12/ {
13 model = "TI AM335x EVM";
14 compatible = "ti,am335x-evm", "ti,am33xx";
15
AnilKumar Chefeedcf2012-08-31 15:07:20 +053016 cpus {
17 cpu@0 {
18 cpu0-supply = <&vdd1_reg>;
19 };
20 };
21
AnilKumar Ch32bb00e2012-06-22 15:10:49 +053022 memory {
23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 };
Vaibhav Hiremath53d91032012-08-15 16:53:25 +053026
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +053027 am33xx_pinmux: pinmux@44e10800 {
28 pinctrl-names = "default";
AnilKumar Ch404aa0d2012-11-06 19:18:31 +053029 pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>;
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +053030
31 matrix_keypad_s0: matrix_keypad_s0 {
32 pinctrl-single,pins = <
33 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
34 0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */
35 0x64 0x27 /* gpmc_a9.gpio1_25, INPUT | MODE7 */
36 0x68 0x27 /* gpmc_a10.gpio1_26, INPUT | MODE7 */
37 0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT | MODE7 */
38 >;
39 };
AnilKumar Ch404aa0d2012-11-06 19:18:31 +053040
41 volume_keys_s0: volume_keys_s0 {
42 pinctrl-single,pins = <
43 0x150 0x27 /* spi0_sclk.gpio0_2, INPUT | MODE7 */
44 0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */
45 >;
46 };
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053047
48 i2c0_pins: pinmux_i2c0_pins {
49 pinctrl-single,pins = <
50 0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */
51 0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */
52 >;
53 };
54
55 i2c1_pins: pinmux_i2c1_pins {
56 pinctrl-single,pins = <
57 0x158 0x32 /* spi0_d1.i2c1_sda PULLUP | INPUTENABLE | MODE2 */
58 0x15c 0x32 /* spi0_cs0.i2c1_scl PULLUP | INPUTENABLE | MODE2 */
59 >;
60 };
AnilKumar Ch5d9b66f2012-11-06 19:18:29 +053061 };
62
Vaibhav Hiremath53d91032012-08-15 16:53:25 +053063 ocp {
Vaibhav Hiremath5d83cb82012-08-27 16:59:08 +053064 uart1: serial@44e09000 {
Vaibhav Hiremath53d91032012-08-15 16:53:25 +053065 status = "okay";
66 };
AnilKumar Ch1b2a9702012-08-21 16:47:29 +053067
AnilKumar Chb918e2c2012-11-21 17:22:17 +053068 i2c0: i2c@44e0b000 {
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053069 pinctrl-names = "default";
70 pinctrl-0 = <&i2c0_pins>;
71
AnilKumar Ch1b2a9702012-08-21 16:47:29 +053072 status = "okay";
73 clock-frequency = <400000>;
74
Vaibhav Hiremath5d83cb82012-08-27 16:59:08 +053075 tps: tps@2d {
76 reg = <0x2d>;
AnilKumar Ch1b2a9702012-08-21 16:47:29 +053077 };
78 };
AnilKumar Ch492dd022012-09-20 02:49:29 +053079
AnilKumar Chb918e2c2012-11-21 17:22:17 +053080 i2c1: i2c@4802a000 {
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053081 pinctrl-names = "default";
82 pinctrl-0 = <&i2c1_pins>;
83
AnilKumar Ch492dd022012-09-20 02:49:29 +053084 status = "okay";
AnilKumar Chcd5cfac2012-09-21 21:19:11 +053085 clock-frequency = <100000>;
AnilKumar Ch492dd022012-09-20 02:49:29 +053086
87 lis331dlh: lis331dlh@18 {
88 compatible = "st,lis331dlh", "st,lis3lv02d";
89 reg = <0x18>;
90 Vdd-supply = <&lis3_reg>;
91 Vdd_IO-supply = <&lis3_reg>;
92
93 st,click-single-x;
94 st,click-single-y;
95 st,click-single-z;
96 st,click-thresh-x = <10>;
97 st,click-thresh-y = <10>;
98 st,click-thresh-z = <10>;
99 st,irq1-click;
100 st,irq2-click;
101 st,wakeup-x-lo;
102 st,wakeup-x-hi;
103 st,wakeup-y-lo;
104 st,wakeup-y-hi;
105 st,wakeup-z-lo;
106 st,wakeup-z-hi;
107 st,min-limit-x = <120>;
108 st,min-limit-y = <120>;
109 st,min-limit-z = <140>;
110 st,max-limit-x = <550>;
111 st,max-limit-y = <550>;
112 st,max-limit-z = <750>;
113 };
AnilKumar Chbf078552012-09-20 02:49:30 +0530114
AnilKumar Chcd5cfac2012-09-21 21:19:11 +0530115 tsl2550: tsl2550@39 {
116 compatible = "taos,tsl2550";
117 reg = <0x39>;
118 };
119
AnilKumar Chbf078552012-09-20 02:49:30 +0530120 tmp275: tmp275@48 {
121 compatible = "ti,tmp275";
122 reg = <0x48>;
123 };
AnilKumar Ch492dd022012-09-20 02:49:29 +0530124 };
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530125 };
126
127 vbat: fixedregulator@0 {
128 compatible = "regulator-fixed";
129 regulator-name = "vbat";
130 regulator-min-microvolt = <5000000>;
131 regulator-max-microvolt = <5000000>;
132 regulator-boot-on;
133 };
AnilKumar Ch492dd022012-09-20 02:49:29 +0530134
135 lis3_reg: fixedregulator@1 {
136 compatible = "regulator-fixed";
137 regulator-name = "lis3_reg";
138 regulator-boot-on;
139 };
AnilKumar Ch2ca1d312012-11-06 19:18:30 +0530140
141 matrix_keypad: matrix_keypad@0 {
142 compatible = "gpio-matrix-keypad";
143 debounce-delay-ms = <5>;
144 col-scan-delay-us = <2>;
145
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530146 row-gpios = <&gpio1 25 0 /* Bank1, pin25 */
147 &gpio1 26 0 /* Bank1, pin26 */
148 &gpio1 27 0>; /* Bank1, pin27 */
AnilKumar Ch2ca1d312012-11-06 19:18:30 +0530149
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530150 col-gpios = <&gpio1 21 0 /* Bank1, pin21 */
151 &gpio1 22 0>; /* Bank1, pin22 */
AnilKumar Ch2ca1d312012-11-06 19:18:30 +0530152
153 linux,keymap = <0x0000008b /* MENU */
154 0x0100009e /* BACK */
155 0x02000069 /* LEFT */
156 0x0001006a /* RIGHT */
157 0x0101001c /* ENTER */
158 0x0201006c>; /* DOWN */
159 };
AnilKumar Ch822c9932012-11-06 19:18:32 +0530160
161 gpio_keys: volume_keys@0 {
162 compatible = "gpio-keys";
163 #address-cells = <1>;
164 #size-cells = <0>;
165 autorepeat;
166
167 switch@9 {
168 label = "volume-up";
169 linux,code = <115>;
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530170 gpios = <&gpio0 2 1>;
AnilKumar Ch822c9932012-11-06 19:18:32 +0530171 gpio-key,wakeup;
172 };
173
174 switch@10 {
175 label = "volume-down";
176 linux,code = <114>;
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530177 gpios = <&gpio0 3 1>;
AnilKumar Ch822c9932012-11-06 19:18:32 +0530178 gpio-key,wakeup;
179 };
180 };
AnilKumar Ch1b2a9702012-08-21 16:47:29 +0530181};
182
183/include/ "tps65910.dtsi"
184
185&tps {
186 vcc1-supply = <&vbat>;
187 vcc2-supply = <&vbat>;
188 vcc3-supply = <&vbat>;
189 vcc4-supply = <&vbat>;
190 vcc5-supply = <&vbat>;
191 vcc6-supply = <&vbat>;
192 vcc7-supply = <&vbat>;
193 vccio-supply = <&vbat>;
194
195 regulators {
196 vrtc_reg: regulator@0 {
197 regulator-always-on;
198 };
199
200 vio_reg: regulator@1 {
201 regulator-always-on;
202 };
203
204 vdd1_reg: regulator@2 {
205 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
206 regulator-name = "vdd_mpu";
207 regulator-min-microvolt = <912500>;
208 regulator-max-microvolt = <1312500>;
209 regulator-boot-on;
210 regulator-always-on;
211 };
212
213 vdd2_reg: regulator@3 {
214 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
215 regulator-name = "vdd_core";
216 regulator-min-microvolt = <912500>;
217 regulator-max-microvolt = <1150000>;
218 regulator-boot-on;
219 regulator-always-on;
220 };
221
222 vdd3_reg: regulator@4 {
223 regulator-always-on;
224 };
225
226 vdig1_reg: regulator@5 {
227 regulator-always-on;
228 };
229
230 vdig2_reg: regulator@6 {
231 regulator-always-on;
232 };
233
234 vpll_reg: regulator@7 {
235 regulator-always-on;
236 };
237
238 vdac_reg: regulator@8 {
239 regulator-always-on;
240 };
241
242 vaux1_reg: regulator@9 {
243 regulator-always-on;
244 };
245
246 vaux2_reg: regulator@10 {
247 regulator-always-on;
248 };
249
250 vaux33_reg: regulator@11 {
251 regulator-always-on;
252 };
253
254 vmmc_reg: regulator@12 {
255 regulator-always-on;
256 };
Vaibhav Hiremath53d91032012-08-15 16:53:25 +0530257 };
AnilKumar Ch32bb00e2012-06-22 15:10:49 +0530258};
Mugunthan V N1a39a652012-11-14 09:08:00 +0000259
260&cpsw_emac0 {
261 phy_id = <&davinci_mdio>, <0>;
262};
263
264&cpsw_emac1 {
265 phy_id = <&davinci_mdio>, <1>;
266};