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Mark Browne1a3c742011-05-06 09:45:13 +09001/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
Mark Brown66211f92011-12-29 18:05:29 +090022#include <linux/leds.h>
Mark Browne1a3c742011-05-06 09:45:13 +090023#include <linux/delay.h>
Mark Brownfb7f60f2011-12-30 13:44:31 +090024#include <linux/mmc/host.h>
Mark Browne1a3c742011-05-06 09:45:13 +090025#include <linux/regulator/machine.h>
Mark Brownae24c262011-06-22 13:08:13 +090026#include <linux/regulator/fixed.h>
Mark Browne1a3c742011-05-06 09:45:13 +090027#include <linux/pwm_backlight.h>
28#include <linux/dm9000.h>
29#include <linux/gpio_keys.h>
30#include <linux/basic_mmio_gpio.h>
31#include <linux/spi/spi.h>
32
33#include <linux/i2c/pca953x.h>
34
35#include <video/platform_lcd.h>
36
37#include <linux/mfd/wm831x/core.h>
38#include <linux/mfd/wm831x/pdata.h>
Mark Brownae24c262011-06-22 13:08:13 +090039#include <linux/mfd/wm831x/irq.h>
Mark Browne1a3c742011-05-06 09:45:13 +090040#include <linux/mfd/wm831x/gpio.h>
41
Mark Brown8504a3c2011-12-02 14:29:07 +090042#include <sound/wm1250-ev1.h>
43
Jamie Iles774b51f2011-11-04 01:10:04 +000044#include <asm/hardware/vic.h>
Mark Browne1a3c742011-05-06 09:45:13 +090045#include <asm/mach/arch.h>
46#include <asm/mach-types.h>
47
48#include <mach/hardware.h>
49#include <mach/map.h>
50
Mark Browne1a3c742011-05-06 09:45:13 +090051#include <mach/regs-sys.h>
52#include <mach/regs-gpio.h>
53#include <mach/regs-modem.h>
Mark Brownd0f0b432011-08-19 22:40:07 +090054#include <mach/crag6410.h>
Mark Browne1a3c742011-05-06 09:45:13 +090055
Mark Browne1a3c742011-05-06 09:45:13 +090056#include <mach/regs-gpio-memport.h>
57
58#include <plat/regs-serial.h>
59#include <plat/regs-fb-v4.h>
60#include <plat/fb.h>
61#include <plat/sdhci.h>
62#include <plat/gpio-cfg.h>
63#include <plat/s3c64xx-spi.h>
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -080064#include <plat/udc-hs.h>
Mark Browne1a3c742011-05-06 09:45:13 +090065
66#include <plat/keypad.h>
67#include <plat/clock.h>
68#include <plat/devs.h>
69#include <plat/cpu.h>
70#include <plat/adc.h>
71#include <plat/iic.h>
72#include <plat/pm.h>
73
Kukjin Kimb024043b2011-12-22 23:27:42 +010074#include "common.h"
75
Mark Browne1a3c742011-05-06 09:45:13 +090076/* serial port setup */
77
78#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
79#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
80#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
81
82static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
83 [0] = {
Mark Brownae24c262011-06-22 13:08:13 +090084 .hwport = 0,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090089 },
90 [1] = {
Mark Brownae24c262011-06-22 13:08:13 +090091 .hwport = 1,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090096 },
97 [2] = {
Mark Brownae24c262011-06-22 13:08:13 +090098 .hwport = 2,
99 .flags = 0,
100 .ucon = UCON,
101 .ulcon = ULCON,
102 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900103 },
104 [3] = {
Mark Brownae24c262011-06-22 13:08:13 +0900105 .hwport = 3,
106 .flags = 0,
107 .ucon = UCON,
108 .ulcon = ULCON,
109 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900110 },
111};
112
113static struct platform_pwm_backlight_data crag6410_backlight_data = {
114 .pwm_id = 0,
115 .max_brightness = 1000,
116 .dft_brightness = 600,
117 .pwm_period_ns = 100000, /* about 1kHz */
118};
119
120static struct platform_device crag6410_backlight_device = {
121 .name = "pwm-backlight",
122 .id = -1,
123 .dev = {
124 .parent = &s3c_device_timer[0].dev,
125 .platform_data = &crag6410_backlight_data,
126 },
127};
128
129static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
130{
131 pr_debug("%s: setting power %d\n", __func__, power);
132
133 if (power) {
134 gpio_set_value(S3C64XX_GPB(0), 1);
135 msleep(1);
136 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
137 } else {
138 gpio_direction_output(S3C64XX_GPF(14), 0);
139 gpio_set_value(S3C64XX_GPB(0), 0);
140 }
141}
142
143static struct platform_device crag6410_lcd_powerdev = {
144 .name = "platform-lcd",
145 .id = -1,
146 .dev.parent = &s3c_device_fb.dev,
147 .dev.platform_data = &(struct plat_lcd_data) {
148 .set_power = crag6410_lcd_power_set,
149 },
150};
151
152/* 640x480 URT */
153static struct s3c_fb_pd_win crag6410_fb_win0 = {
154 /* this is to ensure we use win0 */
155 .win_mode = {
156 .left_margin = 150,
157 .right_margin = 80,
158 .upper_margin = 40,
159 .lower_margin = 5,
160 .hsync_len = 40,
161 .vsync_len = 5,
162 .xres = 640,
163 .yres = 480,
164 },
165 .max_bpp = 32,
166 .default_bpp = 16,
167 .virtual_y = 480 * 2,
168 .virtual_x = 640,
169};
170
171/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
172static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
173 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
174 .win[0] = &crag6410_fb_win0,
175 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
176 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
177};
178
179/* 2x6 keypad */
180
181static uint32_t crag6410_keymap[] __initdata = {
182 /* KEY(row, col, keycode) */
183 KEY(0, 0, KEY_VOLUMEUP),
184 KEY(0, 1, KEY_HOME),
185 KEY(0, 2, KEY_VOLUMEDOWN),
186 KEY(0, 3, KEY_HELP),
187 KEY(0, 4, KEY_MENU),
188 KEY(0, 5, KEY_MEDIA),
189 KEY(1, 0, 232),
190 KEY(1, 1, KEY_DOWN),
191 KEY(1, 2, KEY_LEFT),
192 KEY(1, 3, KEY_UP),
193 KEY(1, 4, KEY_RIGHT),
194 KEY(1, 5, KEY_CAMERA),
195};
196
197static struct matrix_keymap_data crag6410_keymap_data __initdata = {
198 .keymap = crag6410_keymap,
199 .keymap_size = ARRAY_SIZE(crag6410_keymap),
200};
201
202static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
203 .keymap_data = &crag6410_keymap_data,
204 .rows = 2,
205 .cols = 6,
206};
207
208static struct gpio_keys_button crag6410_gpio_keys[] = {
209 [0] = {
210 .code = KEY_SUSPEND,
211 .gpio = S3C64XX_GPL(10), /* EINT 18 */
Mark Brownae24c262011-06-22 13:08:13 +0900212 .type = EV_KEY,
Mark Browne1a3c742011-05-06 09:45:13 +0900213 .wakeup = 1,
214 .active_low = 1,
215 },
Mark Brownae24c262011-06-22 13:08:13 +0900216 [1] = {
217 .code = SW_FRONT_PROXIMITY,
218 .gpio = S3C64XX_GPN(11), /* EINT 11 */
219 .type = EV_SW,
220 },
Mark Browne1a3c742011-05-06 09:45:13 +0900221};
222
223static struct gpio_keys_platform_data crag6410_gpio_keydata = {
224 .buttons = crag6410_gpio_keys,
225 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
226};
227
228static struct platform_device crag6410_gpio_keydev = {
229 .name = "gpio-keys",
230 .id = 0,
231 .dev.platform_data = &crag6410_gpio_keydata,
232};
233
234static struct resource crag6410_dm9k_resource[] = {
235 [0] = {
236 .start = S3C64XX_PA_XM0CSN5,
237 .end = S3C64XX_PA_XM0CSN5 + 1,
238 .flags = IORESOURCE_MEM,
239 },
240 [1] = {
241 .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
242 .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
243 .flags = IORESOURCE_MEM,
244 },
245 [2] = {
246 .start = S3C_EINT(17),
247 .end = S3C_EINT(17),
248 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
249 },
250};
251
252static struct dm9000_plat_data mini6410_dm9k_pdata = {
253 .flags = DM9000_PLATF_16BITONLY,
254};
255
256static struct platform_device crag6410_dm9k_device = {
257 .name = "dm9000",
258 .id = -1,
259 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
260 .resource = crag6410_dm9k_resource,
261 .dev.platform_data = &mini6410_dm9k_pdata,
262};
263
264static struct resource crag6410_mmgpio_resource[] = {
265 [0] = {
Mark Brown91b60b12011-12-29 18:02:39 +0900266 .name = "dat",
Mark Browne1a3c742011-05-06 09:45:13 +0900267 .start = S3C64XX_PA_XM0CSN4 + 1,
268 .end = S3C64XX_PA_XM0CSN4 + 1,
269 .flags = IORESOURCE_MEM,
270 },
271};
272
273static struct platform_device crag6410_mmgpio = {
274 .name = "basic-mmio-gpio",
275 .id = -1,
276 .resource = crag6410_mmgpio_resource,
277 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
278 .dev.platform_data = &(struct bgpio_pdata) {
Mark Brown91b60b12011-12-29 18:02:39 +0900279 .base = MMGPIO_GPIO_BASE,
Mark Browne1a3c742011-05-06 09:45:13 +0900280 },
281};
282
Mark Brownae24c262011-06-22 13:08:13 +0900283static struct platform_device speyside_device = {
284 .name = "speyside",
285 .id = -1,
286};
287
Mark Brown8c051ab2011-09-05 14:50:02 +0900288static struct platform_device lowland_device = {
289 .name = "lowland",
290 .id = -1,
291};
292
Mark Brown64142612011-11-30 13:30:27 +0000293static struct platform_device tobermory_device = {
294 .name = "tobermory",
Mark Brownae24c262011-06-22 13:08:13 +0900295 .id = -1,
296};
297
Mark Brownc5c32c92011-12-02 14:32:32 +0900298static struct platform_device littlemill_device = {
299 .name = "littlemill",
300 .id = -1,
301};
302
Mark Brownae24c262011-06-22 13:08:13 +0900303static struct regulator_consumer_supply wallvdd_consumers[] = {
Mark Brown554f01f2012-01-27 14:58:46 +0900304 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900305 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
306 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900307 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
308 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
Mark Brown402f6242012-04-04 09:21:15 -0700309
310 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
311 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
312 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
313 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
314 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
315 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
316 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
317 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
318 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
319 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
320 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
321 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
322 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
323
324 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
325 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
326 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
Mark Brownae24c262011-06-22 13:08:13 +0900327};
328
329static struct regulator_init_data wallvdd_data = {
330 .constraints = {
331 .always_on = 1,
332 },
333 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
334 .consumer_supplies = wallvdd_consumers,
335};
336
337static struct fixed_voltage_config wallvdd_pdata = {
338 .supply_name = "WALLVDD",
339 .microvolts = 5000000,
340 .init_data = &wallvdd_data,
341 .gpio = -EINVAL,
342};
343
344static struct platform_device wallvdd_device = {
345 .name = "reg-fixed-voltage",
346 .id = -1,
347 .dev = {
348 .platform_data = &wallvdd_pdata,
349 },
350};
351
Mark Browne1a3c742011-05-06 09:45:13 +0900352static struct platform_device *crag6410_devices[] __initdata = {
353 &s3c_device_hsmmc0,
Mark Browne1a3c742011-05-06 09:45:13 +0900354 &s3c_device_hsmmc2,
355 &s3c_device_i2c0,
356 &s3c_device_i2c1,
357 &s3c_device_fb,
358 &s3c_device_ohci,
359 &s3c_device_usb_hsotg,
Mark Browne1a3c742011-05-06 09:45:13 +0900360 &s3c_device_timer[0],
361 &s3c64xx_device_iis0,
362 &s3c64xx_device_iis1,
363 &samsung_asoc_dma,
364 &samsung_device_keypad,
365 &crag6410_gpio_keydev,
366 &crag6410_dm9k_device,
367 &s3c64xx_device_spi0,
368 &crag6410_mmgpio,
369 &crag6410_lcd_powerdev,
370 &crag6410_backlight_device,
Mark Brownae24c262011-06-22 13:08:13 +0900371 &speyside_device,
Mark Brown64142612011-11-30 13:30:27 +0000372 &tobermory_device,
Mark Brownc5c32c92011-12-02 14:32:32 +0900373 &littlemill_device,
Mark Brown8c051ab2011-09-05 14:50:02 +0900374 &lowland_device,
Mark Brownae24c262011-06-22 13:08:13 +0900375 &wallvdd_device,
Mark Browne1a3c742011-05-06 09:45:13 +0900376};
377
378static struct pca953x_platform_data crag6410_pca_data = {
379 .gpio_base = PCA935X_GPIO_BASE,
Mark Brown6e11e0b2011-12-30 09:46:40 +0900380 .irq_base = -1,
Mark Browne1a3c742011-05-06 09:45:13 +0900381};
382
Mark Brown986afc92011-08-12 18:08:17 +0900383/* VDDARM is controlled by DVS1 connected to GPK(0) */
384static struct wm831x_buckv_pdata vddarm_pdata = {
385 .dvs_control_src = 1,
386 .dvs_gpio = S3C64XX_GPK(0),
387};
388
Mark Browne1a3c742011-05-06 09:45:13 +0900389static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
390 REGULATOR_SUPPLY("vddarm", NULL),
391};
392
393static struct regulator_init_data vddarm __initdata = {
394 .constraints = {
395 .name = "VDDARM",
396 .min_uV = 1000000,
397 .max_uV = 1300000,
398 .always_on = 1,
399 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
400 },
401 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
402 .consumer_supplies = vddarm_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900403 .supply_regulator = "WALLVDD",
Mark Brown986afc92011-08-12 18:08:17 +0900404 .driver_data = &vddarm_pdata,
Mark Browne1a3c742011-05-06 09:45:13 +0900405};
406
Mark Brown39cb2632011-12-08 10:52:19 +0900407static struct regulator_consumer_supply vddint_consumers[] __initdata = {
408 REGULATOR_SUPPLY("vddint", NULL),
409};
410
Mark Browne1a3c742011-05-06 09:45:13 +0900411static struct regulator_init_data vddint __initdata = {
412 .constraints = {
413 .name = "VDDINT",
414 .min_uV = 1000000,
415 .max_uV = 1200000,
416 .always_on = 1,
417 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
418 },
Mark Brown39cb2632011-12-08 10:52:19 +0900419 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
420 .consumer_supplies = vddint_consumers,
421 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900422};
423
424static struct regulator_init_data vddmem __initdata = {
425 .constraints = {
426 .name = "VDDMEM",
427 .always_on = 1,
428 },
429};
430
431static struct regulator_init_data vddsys __initdata = {
432 .constraints = {
433 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
434 .always_on = 1,
435 },
436};
437
438static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
439 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
440 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
441 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
442};
443
444static struct regulator_init_data vddmmc __initdata = {
445 .constraints = {
446 .name = "VDDMMC,UH",
447 .always_on = 1,
448 },
449 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
450 .consumer_supplies = vddmmc_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900451 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900452};
453
454static struct regulator_init_data vddotgi __initdata = {
455 .constraints = {
456 .name = "VDDOTGi",
457 .always_on = 1,
458 },
Mark Brown35127292011-06-22 13:08:17 +0900459 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900460};
461
462static struct regulator_init_data vddotg __initdata = {
463 .constraints = {
464 .name = "VDDOTG",
465 .always_on = 1,
466 },
Mark Brown35127292011-06-22 13:08:17 +0900467 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900468};
469
470static struct regulator_init_data vddhi __initdata = {
471 .constraints = {
472 .name = "VDDHI",
473 .always_on = 1,
474 },
Mark Brown35127292011-06-22 13:08:17 +0900475 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900476};
477
478static struct regulator_init_data vddadc __initdata = {
479 .constraints = {
480 .name = "VDDADC,VDDDAC",
481 .always_on = 1,
482 },
Mark Brown35127292011-06-22 13:08:17 +0900483 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900484};
485
486static struct regulator_init_data vddmem0 __initdata = {
487 .constraints = {
488 .name = "VDDMEM0",
489 .always_on = 1,
490 },
Mark Brown35127292011-06-22 13:08:17 +0900491 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900492};
493
494static struct regulator_init_data vddpll __initdata = {
495 .constraints = {
496 .name = "VDDPLL",
497 .always_on = 1,
498 },
Mark Brown35127292011-06-22 13:08:17 +0900499 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900500};
501
502static struct regulator_init_data vddlcd __initdata = {
503 .constraints = {
504 .name = "VDDLCD",
505 .always_on = 1,
506 },
Mark Brown35127292011-06-22 13:08:17 +0900507 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900508};
509
510static struct regulator_init_data vddalive __initdata = {
511 .constraints = {
512 .name = "VDDALIVE",
513 .always_on = 1,
514 },
Mark Brown35127292011-06-22 13:08:17 +0900515 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900516};
517
Mark Brown89e1c3d2011-07-21 01:26:24 +0900518static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
519 .charger_enable = 1,
520 .vlim = 2500, /* mV */
521 .ilim = 200, /* uA */
522};
523
Mark Browne1a3c742011-05-06 09:45:13 +0900524static struct wm831x_status_pdata banff_red_led __initdata = {
525 .name = "banff:red:",
526 .default_src = WM831X_STATUS_MANUAL,
527};
528
529static struct wm831x_status_pdata banff_green_led __initdata = {
530 .name = "banff:green:",
531 .default_src = WM831X_STATUS_MANUAL,
532};
533
534static struct wm831x_touch_pdata touch_pdata __initdata = {
535 .data_irq = S3C_EINT(26),
Mark Brownae24c262011-06-22 13:08:13 +0900536 .pd_irq = S3C_EINT(27),
Mark Browne1a3c742011-05-06 09:45:13 +0900537};
538
Mark Browne1a3c742011-05-06 09:45:13 +0900539static struct wm831x_pdata crag_pmic_pdata __initdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900540 .wm831x_num = 1,
Mark Browne1a3c742011-05-06 09:45:13 +0900541 .irq_base = BANFF_PMIC_IRQ_BASE,
Mark Brownaaed44e2011-11-03 16:28:15 +0900542 .gpio_base = BANFF_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900543 .soft_shutdown = true,
Mark Browne1a3c742011-05-06 09:45:13 +0900544
Mark Brown89e1c3d2011-07-21 01:26:24 +0900545 .backup = &banff_backup_pdata,
546
Mark Brownae24c262011-06-22 13:08:13 +0900547 .gpio_defaults = {
Mark Brown986afc92011-08-12 18:08:17 +0900548 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
549 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
Mark Brownae24c262011-06-22 13:08:13 +0900550 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
551 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
552 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
553 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
554 },
555
Mark Browne1a3c742011-05-06 09:45:13 +0900556 .dcdc = {
557 &vddarm, /* DCDC1 */
558 &vddint, /* DCDC2 */
559 &vddmem, /* DCDC3 */
560 },
561
562 .ldo = {
563 &vddsys, /* LDO1 */
564 &vddmmc, /* LDO2 */
565 NULL, /* LDO3 */
566 &vddotgi, /* LDO4 */
567 &vddotg, /* LDO5 */
568 &vddhi, /* LDO6 */
569 &vddadc, /* LDO7 */
570 &vddmem0, /* LDO8 */
571 &vddpll, /* LDO9 */
572 &vddlcd, /* LDO10 */
573 &vddalive, /* LDO11 */
574 },
575
576 .status = {
577 &banff_green_led,
578 &banff_red_led,
579 },
580
581 .touch = &touch_pdata,
582};
583
584static struct i2c_board_info i2c_devs0[] __initdata = {
585 { I2C_BOARD_INFO("24c08", 0x50), },
586 { I2C_BOARD_INFO("tca6408", 0x20),
587 .platform_data = &crag6410_pca_data,
588 },
589 { I2C_BOARD_INFO("wm8312", 0x34),
590 .platform_data = &crag_pmic_pdata,
591 .irq = S3C_EINT(23),
592 },
593};
594
595static struct s3c2410_platform_i2c i2c0_pdata = {
596 .frequency = 400000,
597};
598
Mark Browncda23492012-01-12 11:04:56 +0900599static struct regulator_consumer_supply pvdd_1v2_consumers[] __initdata = {
600 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
601 REGULATOR_SUPPLY("AVDD", "spi0.0"),
602};
603
Mark Brownae24c262011-06-22 13:08:13 +0900604static struct regulator_init_data pvdd_1v2 __initdata = {
605 .constraints = {
606 .name = "PVDD_1V2",
Mark Browncda23492012-01-12 11:04:56 +0900607 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
Mark Brownae24c262011-06-22 13:08:13 +0900608 },
Mark Browncda23492012-01-12 11:04:56 +0900609
610 .consumer_supplies = pvdd_1v2_consumers,
611 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
Mark Brownae24c262011-06-22 13:08:13 +0900612};
613
614static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
Mark Brownd5160ec2011-09-26 13:18:28 +0900615 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900616 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
617 REGULATOR_SUPPLY("DBVDD", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900618 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
619 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
620 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900621 REGULATOR_SUPPLY("CPVDD", "1-001a"),
622 REGULATOR_SUPPLY("AVDD2", "1-001a"),
623 REGULATOR_SUPPLY("DCVDD", "1-001a"),
624 REGULATOR_SUPPLY("AVDD", "1-001a"),
Mark Browncda23492012-01-12 11:04:56 +0900625 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
Mark Brownae24c262011-06-22 13:08:13 +0900626};
627
628static struct regulator_init_data pvdd_1v8 __initdata = {
629 .constraints = {
630 .name = "PVDD_1V8",
631 .always_on = 1,
632 },
633
634 .consumer_supplies = pvdd_1v8_consumers,
635 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
636};
637
638static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
639 REGULATOR_SUPPLY("MICVDD", "1-001a"),
640 REGULATOR_SUPPLY("AVDD1", "1-001a"),
641};
642
643static struct regulator_init_data pvdd_3v3 __initdata = {
644 .constraints = {
645 .name = "PVDD_3V3",
646 .always_on = 1,
647 },
648
649 .consumer_supplies = pvdd_3v3_consumers,
650 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
651};
652
653static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
654 .wm831x_num = 2,
655 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
656 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900657 .soft_shutdown = true,
Mark Brownae24c262011-06-22 13:08:13 +0900658
659 .gpio_defaults = {
660 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
661 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
662 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
663 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
664 },
665
666 .dcdc = {
667 &pvdd_1v2, /* DCDC1 */
668 &pvdd_1v8, /* DCDC2 */
669 &pvdd_3v3, /* DCDC3 */
670 },
671
672 .disable_touch = true,
673};
674
Mark Brown8504a3c2011-12-02 14:29:07 +0900675static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
676 .gpios = {
677 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
678 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
679 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
680 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
681 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
682 },
683};
684
Mark Browne1a3c742011-05-06 09:45:13 +0900685static struct i2c_board_info i2c_devs1[] __initdata = {
686 { I2C_BOARD_INFO("wm8311", 0x34),
Mark Brownae24c262011-06-22 13:08:13 +0900687 .irq = S3C_EINT(0),
688 .platform_data = &glenfarclas_pmic_pdata },
689
Mark Brownd0f0b432011-08-19 22:40:07 +0900690 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
691 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
692 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
693
Mark Brown8504a3c2011-12-02 14:29:07 +0900694 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
695 .platform_data = &wm1250_ev1_pdata },
Mark Browne1a3c742011-05-06 09:45:13 +0900696};
697
Mark Brown8351c7a2011-12-02 14:29:07 +0900698static struct s3c2410_platform_i2c i2c1_pdata = {
699 .frequency = 400000,
700 .bus_num = 1,
Mark Browne1a3c742011-05-06 09:45:13 +0900701};
702
703static void __init crag6410_map_io(void)
704{
705 s3c64xx_init_io(NULL, 0);
706 s3c24xx_init_clocks(12000000);
707 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
708
709 /* LCD type and Bypass set by bootloader */
710}
711
712static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
713 .max_width = 4,
714 .cd_type = S3C_SDHCI_CD_PERMANENT,
Mark Browna9294cd2011-12-30 13:44:36 +0900715 .host_caps = MMC_CAP_POWER_OFF_CARD,
Mark Browne1a3c742011-05-06 09:45:13 +0900716};
717
Mark Browne1a3c742011-05-06 09:45:13 +0900718static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
719{
720 /* Set all the necessary GPG pins to special-function 2 */
721 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
722
723 /* force card-detected for prototype 0 */
724 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
725}
726
727static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
728 .max_width = 4,
729 .cd_type = S3C_SDHCI_CD_INTERNAL,
730 .cfg_gpio = crag6410_cfg_sdhci0,
Mark Brownfb7f60f2011-12-30 13:44:31 +0900731 .host_caps = MMC_CAP_POWER_OFF_CARD,
Mark Browne1a3c742011-05-06 09:45:13 +0900732};
733
Mark Brown66211f92011-12-29 18:05:29 +0900734static const struct gpio_led gpio_leds[] = {
735 {
736 .name = "d13:green:",
737 .gpio = MMGPIO_GPIO_BASE + 0,
738 .default_state = LEDS_GPIO_DEFSTATE_ON,
739 },
740 {
741 .name = "d14:green:",
742 .gpio = MMGPIO_GPIO_BASE + 1,
743 .default_state = LEDS_GPIO_DEFSTATE_ON,
744 },
745 {
746 .name = "d15:green:",
747 .gpio = MMGPIO_GPIO_BASE + 2,
748 .default_state = LEDS_GPIO_DEFSTATE_ON,
749 },
750 {
751 .name = "d16:green:",
752 .gpio = MMGPIO_GPIO_BASE + 3,
753 .default_state = LEDS_GPIO_DEFSTATE_ON,
754 },
755 {
756 .name = "d17:green:",
757 .gpio = MMGPIO_GPIO_BASE + 4,
758 .default_state = LEDS_GPIO_DEFSTATE_ON,
759 },
760 {
761 .name = "d18:green:",
762 .gpio = MMGPIO_GPIO_BASE + 5,
763 .default_state = LEDS_GPIO_DEFSTATE_ON,
764 },
765 {
766 .name = "d19:green:",
767 .gpio = MMGPIO_GPIO_BASE + 6,
768 .default_state = LEDS_GPIO_DEFSTATE_ON,
769 },
770 {
771 .name = "d20:green:",
772 .gpio = MMGPIO_GPIO_BASE + 7,
773 .default_state = LEDS_GPIO_DEFSTATE_ON,
774 },
775};
776
777static const struct gpio_led_platform_data gpio_leds_pdata = {
778 .leds = gpio_leds,
779 .num_leds = ARRAY_SIZE(gpio_leds),
Mark Browne1a3c742011-05-06 09:45:13 +0900780};
781
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800782static struct s3c_hsotg_plat crag6410_hsotg_pdata;
783
Mark Browne1a3c742011-05-06 09:45:13 +0900784static void __init crag6410_machine_init(void)
785{
786 /* Open drain IRQs need pullups */
787 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
788 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
789
790 gpio_request(S3C64XX_GPB(0), "LCD power");
791 gpio_direction_output(S3C64XX_GPB(0), 0);
792
793 gpio_request(S3C64XX_GPF(14), "LCD PWM");
794 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
795
796 gpio_request(S3C64XX_GPB(1), "SD power");
797 gpio_direction_output(S3C64XX_GPB(1), 0);
798
799 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
800 gpio_direction_output(S3C64XX_GPF(10), 1);
801
802 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900803 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
804
805 s3c_i2c0_set_platdata(&i2c0_pdata);
Mark Brown8351c7a2011-12-02 14:29:07 +0900806 s3c_i2c1_set_platdata(&i2c1_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900807 s3c_fb_set_platdata(&crag6410_lcd_pdata);
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800808 s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900809
810 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
811 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
812
813 samsung_keypad_set_platdata(&crag6410_keypad_data);
Mark Brown6f042472012-03-07 04:27:50 -0800814 s3c64xx_spi0_set_platdata(&s3c64xx_spi0_pdata, 0, 1);
Mark Browne1a3c742011-05-06 09:45:13 +0900815
816 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
817
Mark Brown66211f92011-12-29 18:05:29 +0900818 gpio_led_register_device(-1, &gpio_leds_pdata);
819
Mark Brownae24c262011-06-22 13:08:13 +0900820 regulator_has_full_constraints();
821
Mark Brownc656c302011-12-08 23:27:48 +0100822 s3c64xx_pm_init();
Mark Browne1a3c742011-05-06 09:45:13 +0900823}
824
825MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
826 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
Nicolas Pitre170a5902011-07-05 22:38:17 -0400827 .atag_offset = 0x100,
Mark Browne1a3c742011-05-06 09:45:13 +0900828 .init_irq = s3c6410_init_irq,
Jamie Iles774b51f2011-11-04 01:10:04 +0000829 .handle_irq = vic_handle_irq,
Mark Browne1a3c742011-05-06 09:45:13 +0900830 .map_io = crag6410_map_io,
831 .init_machine = crag6410_machine_init,
832 .timer = &s3c24xx_timer,
Kukjin Kimff84ded2012-01-03 14:03:30 +0100833 .restart = s3c64xx_restart,
Mark Browne1a3c742011-05-06 09:45:13 +0900834MACHINE_END