blob: 37d1f64a34d56be6d6bca20f0bcb10d156a7b9d5 [file] [log] [blame]
Auke Kok9a799d72007-09-15 14:07:45 -07001/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
Shannon Nelson8c47eaa2010-01-13 01:49:34 +00004 Copyright(c) 1999 - 2010 Intel Corporation.
Auke Kok9a799d72007-09-15 14:07:45 -07005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
Auke Kok9a799d72007-09-15 14:07:45 -070023 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include <linux/types.h>
29#include <linux/module.h>
30#include <linux/pci.h>
31#include <linux/netdevice.h>
32#include <linux/vmalloc.h>
33#include <linux/string.h>
34#include <linux/in.h>
35#include <linux/ip.h>
36#include <linux/tcp.h>
Lucy Liu60127862009-07-22 14:07:33 +000037#include <linux/pkt_sched.h>
Auke Kok9a799d72007-09-15 14:07:45 -070038#include <linux/ipv6.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090039#include <linux/slab.h>
Auke Kok9a799d72007-09-15 14:07:45 -070040#include <net/checksum.h>
41#include <net/ip6_checksum.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
Yi Zoueacd73f2009-05-13 13:11:06 +000044#include <scsi/fc/fc_fcoe.h>
Auke Kok9a799d72007-09-15 14:07:45 -070045
46#include "ixgbe.h"
47#include "ixgbe_common.h"
Don Skidmoreee5f7842009-11-06 12:56:20 +000048#include "ixgbe_dcb_82599.h"
Greg Rose1cdd1ec2010-01-09 02:26:46 +000049#include "ixgbe_sriov.h"
Auke Kok9a799d72007-09-15 14:07:45 -070050
51char ixgbe_driver_name[] = "ixgbe";
Stephen Hemminger9c8eb722007-10-29 10:46:24 -070052static const char ixgbe_driver_string[] =
Peter P Waskiewiczb4617242008-09-11 20:04:46 -070053 "Intel(R) 10 Gigabit PCI Express Network Driver";
Auke Kok9a799d72007-09-15 14:07:45 -070054
Don Skidmore99faf682010-07-19 14:00:47 +000055#define DRV_VERSION "2.0.84-k2"
Stephen Hemminger9c8eb722007-10-29 10:46:24 -070056const char ixgbe_driver_version[] = DRV_VERSION;
Shannon Nelson8c47eaa2010-01-13 01:49:34 +000057static char ixgbe_copyright[] = "Copyright (c) 1999-2010 Intel Corporation.";
Auke Kok9a799d72007-09-15 14:07:45 -070058
59static const struct ixgbe_info *ixgbe_info_tbl[] = {
Peter P Waskiewiczb4617242008-09-11 20:04:46 -070060 [board_82598] = &ixgbe_82598_info,
PJ Waskiewicze8e26352009-02-27 15:45:05 +000061 [board_82599] = &ixgbe_82599_info,
Auke Kok9a799d72007-09-15 14:07:45 -070062};
63
64/* ixgbe_pci_tbl - PCI Device ID Table
65 *
66 * Wildcard entries (PCI_ANY_ID) should come last
67 * Last entry must be all 0s
68 *
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
71 */
Alexey Dobriyana3aa1882010-01-07 11:58:11 +000072static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
Don Skidmore1e336d02009-01-26 20:57:51 -080073 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
74 board_82598 },
Auke Kok9a799d72007-09-15 14:07:45 -070075 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
Auke Kok3957d632007-10-31 15:22:10 -070076 board_82598 },
Auke Kok9a799d72007-09-15 14:07:45 -070077 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
Auke Kok3957d632007-10-31 15:22:10 -070078 board_82598 },
Jesse Brandeburg0befdb32008-10-31 00:46:40 -070079 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
80 board_82598 },
Peter P Waskiewicz Jr3845bec2009-07-16 15:50:52 +000081 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2),
82 board_82598 },
Auke Kok9a799d72007-09-15 14:07:45 -070083 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
Auke Kok3957d632007-10-31 15:22:10 -070084 board_82598 },
Jesse Brandeburg8d792cd2008-08-08 16:24:19 -070085 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
86 board_82598 },
Donald Skidmorec4900be2008-11-20 21:11:42 -080087 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
88 board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
90 board_82598 },
Jesse Brandeburgb95f5fc2008-09-11 19:58:59 -070091 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
92 board_82598 },
Donald Skidmorec4900be2008-11-20 21:11:42 -080093 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
94 board_82598 },
Don Skidmore2f21bdd2009-02-01 01:18:23 -080095 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX),
96 board_82598 },
PJ Waskiewicze8e26352009-02-27 15:45:05 +000097 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4),
98 board_82599 },
Peter P Waskiewicz Jr1fcf03e2009-05-17 20:58:04 +000099 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM),
100 board_82599 },
Don Skidmore74757d42009-12-08 07:22:23 +0000101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR),
102 board_82599 },
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP),
104 board_82599 },
Don Skidmore38ad1c82009-10-08 15:35:58 +0000105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM),
106 board_82599 },
Don Skidmoredbfec662009-10-02 08:58:25 +0000107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ),
108 board_82599 },
Peter P Waskiewicz Jr89111842009-09-14 07:47:49 +0000109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4),
110 board_82599 },
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -0700111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM),
112 board_82599 },
Don Skidmore312eb932009-10-02 08:58:04 +0000113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE),
114 board_82599 },
Auke Kok9a799d72007-09-15 14:07:45 -0700115
116 /* required last entry */
117 {0, }
118};
119MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
120
Jeff Garzik5dd2d332008-10-16 05:09:31 -0400121#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800122static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700123 void *p);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800124static struct notifier_block dca_notifier = {
125 .notifier_call = ixgbe_notify_dca,
126 .next = NULL,
127 .priority = 0
128};
129#endif
130
Greg Rose1cdd1ec2010-01-09 02:26:46 +0000131#ifdef CONFIG_PCI_IOV
132static unsigned int max_vfs;
133module_param(max_vfs, uint, 0);
134MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
135 "per physical function");
136#endif /* CONFIG_PCI_IOV */
137
Auke Kok9a799d72007-09-15 14:07:45 -0700138MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
139MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
140MODULE_LICENSE("GPL");
141MODULE_VERSION(DRV_VERSION);
142
143#define DEFAULT_DEBUG_LEVEL_SHIFT 3
144
Greg Rose1cdd1ec2010-01-09 02:26:46 +0000145static inline void ixgbe_disable_sriov(struct ixgbe_adapter *adapter)
146{
147 struct ixgbe_hw *hw = &adapter->hw;
148 u32 gcr;
149 u32 gpie;
150 u32 vmdctl;
151
152#ifdef CONFIG_PCI_IOV
153 /* disable iov and allow time for transactions to clear */
154 pci_disable_sriov(adapter->pdev);
155#endif
156
157 /* turn off device IOV mode */
158 gcr = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
159 gcr &= ~(IXGBE_GCR_EXT_SRIOV);
160 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr);
161 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
162 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
163 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
164
165 /* set default pool back to 0 */
166 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
167 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
168 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
169
170 /* take a breather then clean up driver data */
171 msleep(100);
172 if (adapter->vfinfo)
173 kfree(adapter->vfinfo);
174 adapter->vfinfo = NULL;
175
176 adapter->num_vfs = 0;
177 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
178}
179
Taku Izumidcd79ae2010-04-27 14:39:53 +0000180struct ixgbe_reg_info {
181 u32 ofs;
182 char *name;
183};
184
185static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
186
187 /* General Registers */
188 {IXGBE_CTRL, "CTRL"},
189 {IXGBE_STATUS, "STATUS"},
190 {IXGBE_CTRL_EXT, "CTRL_EXT"},
191
192 /* Interrupt Registers */
193 {IXGBE_EICR, "EICR"},
194
195 /* RX Registers */
196 {IXGBE_SRRCTL(0), "SRRCTL"},
197 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
198 {IXGBE_RDLEN(0), "RDLEN"},
199 {IXGBE_RDH(0), "RDH"},
200 {IXGBE_RDT(0), "RDT"},
201 {IXGBE_RXDCTL(0), "RXDCTL"},
202 {IXGBE_RDBAL(0), "RDBAL"},
203 {IXGBE_RDBAH(0), "RDBAH"},
204
205 /* TX Registers */
206 {IXGBE_TDBAL(0), "TDBAL"},
207 {IXGBE_TDBAH(0), "TDBAH"},
208 {IXGBE_TDLEN(0), "TDLEN"},
209 {IXGBE_TDH(0), "TDH"},
210 {IXGBE_TDT(0), "TDT"},
211 {IXGBE_TXDCTL(0), "TXDCTL"},
212
213 /* List Terminator */
214 {}
215};
216
217
218/*
219 * ixgbe_regdump - register printout routine
220 */
221static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
222{
223 int i = 0, j = 0;
224 char rname[16];
225 u32 regs[64];
226
227 switch (reginfo->ofs) {
228 case IXGBE_SRRCTL(0):
229 for (i = 0; i < 64; i++)
230 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
231 break;
232 case IXGBE_DCA_RXCTRL(0):
233 for (i = 0; i < 64; i++)
234 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
235 break;
236 case IXGBE_RDLEN(0):
237 for (i = 0; i < 64; i++)
238 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
239 break;
240 case IXGBE_RDH(0):
241 for (i = 0; i < 64; i++)
242 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
243 break;
244 case IXGBE_RDT(0):
245 for (i = 0; i < 64; i++)
246 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
247 break;
248 case IXGBE_RXDCTL(0):
249 for (i = 0; i < 64; i++)
250 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
251 break;
252 case IXGBE_RDBAL(0):
253 for (i = 0; i < 64; i++)
254 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
255 break;
256 case IXGBE_RDBAH(0):
257 for (i = 0; i < 64; i++)
258 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
259 break;
260 case IXGBE_TDBAL(0):
261 for (i = 0; i < 64; i++)
262 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
263 break;
264 case IXGBE_TDBAH(0):
265 for (i = 0; i < 64; i++)
266 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
267 break;
268 case IXGBE_TDLEN(0):
269 for (i = 0; i < 64; i++)
270 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
271 break;
272 case IXGBE_TDH(0):
273 for (i = 0; i < 64; i++)
274 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
275 break;
276 case IXGBE_TDT(0):
277 for (i = 0; i < 64; i++)
278 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
279 break;
280 case IXGBE_TXDCTL(0):
281 for (i = 0; i < 64; i++)
282 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
283 break;
284 default:
285 printk(KERN_INFO "%-15s %08x\n", reginfo->name,
286 IXGBE_READ_REG(hw, reginfo->ofs));
287 return;
288 }
289
290 for (i = 0; i < 8; i++) {
291 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
292 printk(KERN_ERR "%-15s ", rname);
293 for (j = 0; j < 8; j++)
294 printk(KERN_CONT "%08x ", regs[i*8+j]);
295 printk(KERN_CONT "\n");
296 }
297
298}
299
300/*
301 * ixgbe_dump - Print registers, tx-rings and rx-rings
302 */
303static void ixgbe_dump(struct ixgbe_adapter *adapter)
304{
305 struct net_device *netdev = adapter->netdev;
306 struct ixgbe_hw *hw = &adapter->hw;
307 struct ixgbe_reg_info *reginfo;
308 int n = 0;
309 struct ixgbe_ring *tx_ring;
310 struct ixgbe_tx_buffer *tx_buffer_info;
311 union ixgbe_adv_tx_desc *tx_desc;
312 struct my_u0 { u64 a; u64 b; } *u0;
313 struct ixgbe_ring *rx_ring;
314 union ixgbe_adv_rx_desc *rx_desc;
315 struct ixgbe_rx_buffer *rx_buffer_info;
316 u32 staterr;
317 int i = 0;
318
319 if (!netif_msg_hw(adapter))
320 return;
321
322 /* Print netdevice Info */
323 if (netdev) {
324 dev_info(&adapter->pdev->dev, "Net device Info\n");
325 printk(KERN_INFO "Device Name state "
326 "trans_start last_rx\n");
327 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
328 netdev->name,
329 netdev->state,
330 netdev->trans_start,
331 netdev->last_rx);
332 }
333
334 /* Print Registers */
335 dev_info(&adapter->pdev->dev, "Register Dump\n");
336 printk(KERN_INFO " Register Name Value\n");
337 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
338 reginfo->name; reginfo++) {
339 ixgbe_regdump(hw, reginfo);
340 }
341
342 /* Print TX Ring Summary */
343 if (!netdev || !netif_running(netdev))
344 goto exit;
345
346 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
347 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ] "
348 "leng ntw timestamp\n");
349 for (n = 0; n < adapter->num_tx_queues; n++) {
350 tx_ring = adapter->tx_ring[n];
351 tx_buffer_info =
352 &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
353 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
354 n, tx_ring->next_to_use, tx_ring->next_to_clean,
355 (u64)tx_buffer_info->dma,
356 tx_buffer_info->length,
357 tx_buffer_info->next_to_watch,
358 (u64)tx_buffer_info->time_stamp);
359 }
360
361 /* Print TX Rings */
362 if (!netif_msg_tx_done(adapter))
363 goto rx_ring_summary;
364
365 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
366
367 /* Transmit Descriptor Formats
368 *
369 * Advanced Transmit Descriptor
370 * +--------------------------------------------------------------+
371 * 0 | Buffer Address [63:0] |
372 * +--------------------------------------------------------------+
373 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
374 * +--------------------------------------------------------------+
375 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
376 */
377
378 for (n = 0; n < adapter->num_tx_queues; n++) {
379 tx_ring = adapter->tx_ring[n];
380 printk(KERN_INFO "------------------------------------\n");
381 printk(KERN_INFO "TX QUEUE INDEX = %d\n", tx_ring->queue_index);
382 printk(KERN_INFO "------------------------------------\n");
383 printk(KERN_INFO "T [desc] [address 63:0 ] "
384 "[PlPOIdStDDt Ln] [bi->dma ] "
385 "leng ntw timestamp bi->skb\n");
386
387 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
388 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
389 tx_buffer_info = &tx_ring->tx_buffer_info[i];
390 u0 = (struct my_u0 *)tx_desc;
391 printk(KERN_INFO "T [0x%03X] %016llX %016llX %016llX"
392 " %04X %3X %016llX %p", i,
393 le64_to_cpu(u0->a),
394 le64_to_cpu(u0->b),
395 (u64)tx_buffer_info->dma,
396 tx_buffer_info->length,
397 tx_buffer_info->next_to_watch,
398 (u64)tx_buffer_info->time_stamp,
399 tx_buffer_info->skb);
400 if (i == tx_ring->next_to_use &&
401 i == tx_ring->next_to_clean)
402 printk(KERN_CONT " NTC/U\n");
403 else if (i == tx_ring->next_to_use)
404 printk(KERN_CONT " NTU\n");
405 else if (i == tx_ring->next_to_clean)
406 printk(KERN_CONT " NTC\n");
407 else
408 printk(KERN_CONT "\n");
409
410 if (netif_msg_pktdata(adapter) &&
411 tx_buffer_info->dma != 0)
412 print_hex_dump(KERN_INFO, "",
413 DUMP_PREFIX_ADDRESS, 16, 1,
414 phys_to_virt(tx_buffer_info->dma),
415 tx_buffer_info->length, true);
416 }
417 }
418
419 /* Print RX Rings Summary */
420rx_ring_summary:
421 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
422 printk(KERN_INFO "Queue [NTU] [NTC]\n");
423 for (n = 0; n < adapter->num_rx_queues; n++) {
424 rx_ring = adapter->rx_ring[n];
425 printk(KERN_INFO "%5d %5X %5X\n", n,
426 rx_ring->next_to_use, rx_ring->next_to_clean);
427 }
428
429 /* Print RX Rings */
430 if (!netif_msg_rx_status(adapter))
431 goto exit;
432
433 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
434
435 /* Advanced Receive Descriptor (Read) Format
436 * 63 1 0
437 * +-----------------------------------------------------+
438 * 0 | Packet Buffer Address [63:1] |A0/NSE|
439 * +----------------------------------------------+------+
440 * 8 | Header Buffer Address [63:1] | DD |
441 * +-----------------------------------------------------+
442 *
443 *
444 * Advanced Receive Descriptor (Write-Back) Format
445 *
446 * 63 48 47 32 31 30 21 20 16 15 4 3 0
447 * +------------------------------------------------------+
448 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
449 * | Checksum Ident | | | | Type | Type |
450 * +------------------------------------------------------+
451 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
452 * +------------------------------------------------------+
453 * 63 48 47 32 31 20 19 0
454 */
455 for (n = 0; n < adapter->num_rx_queues; n++) {
456 rx_ring = adapter->rx_ring[n];
457 printk(KERN_INFO "------------------------------------\n");
458 printk(KERN_INFO "RX QUEUE INDEX = %d\n", rx_ring->queue_index);
459 printk(KERN_INFO "------------------------------------\n");
460 printk(KERN_INFO "R [desc] [ PktBuf A0] "
461 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
462 "<-- Adv Rx Read format\n");
463 printk(KERN_INFO "RWB[desc] [PcsmIpSHl PtRs] "
464 "[vl er S cks ln] ---------------- [bi->skb] "
465 "<-- Adv Rx Write-Back format\n");
466
467 for (i = 0; i < rx_ring->count; i++) {
468 rx_buffer_info = &rx_ring->rx_buffer_info[i];
469 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
470 u0 = (struct my_u0 *)rx_desc;
471 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
472 if (staterr & IXGBE_RXD_STAT_DD) {
473 /* Descriptor Done */
474 printk(KERN_INFO "RWB[0x%03X] %016llX "
475 "%016llX ---------------- %p", i,
476 le64_to_cpu(u0->a),
477 le64_to_cpu(u0->b),
478 rx_buffer_info->skb);
479 } else {
480 printk(KERN_INFO "R [0x%03X] %016llX "
481 "%016llX %016llX %p", i,
482 le64_to_cpu(u0->a),
483 le64_to_cpu(u0->b),
484 (u64)rx_buffer_info->dma,
485 rx_buffer_info->skb);
486
487 if (netif_msg_pktdata(adapter)) {
488 print_hex_dump(KERN_INFO, "",
489 DUMP_PREFIX_ADDRESS, 16, 1,
490 phys_to_virt(rx_buffer_info->dma),
491 rx_ring->rx_buf_len, true);
492
493 if (rx_ring->rx_buf_len
494 < IXGBE_RXBUFFER_2048)
495 print_hex_dump(KERN_INFO, "",
496 DUMP_PREFIX_ADDRESS, 16, 1,
497 phys_to_virt(
498 rx_buffer_info->page_dma +
499 rx_buffer_info->page_offset
500 ),
501 PAGE_SIZE/2, true);
502 }
503 }
504
505 if (i == rx_ring->next_to_use)
506 printk(KERN_CONT " NTU\n");
507 else if (i == rx_ring->next_to_clean)
508 printk(KERN_CONT " NTC\n");
509 else
510 printk(KERN_CONT "\n");
511
512 }
513 }
514
515exit:
516 return;
517}
518
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -0800519static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
520{
521 u32 ctrl_ext;
522
523 /* Let firmware take over control of h/w */
524 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
525 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700526 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -0800527}
528
529static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
530{
531 u32 ctrl_ext;
532
533 /* Let firmware know the driver has taken over */
534 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
535 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700536 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -0800537}
Auke Kok9a799d72007-09-15 14:07:45 -0700538
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000539/*
540 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
541 * @adapter: pointer to adapter struct
542 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
543 * @queue: queue to map the corresponding interrupt to
544 * @msix_vector: the vector to map to the corresponding queue
545 *
546 */
547static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
548 u8 queue, u8 msix_vector)
Auke Kok9a799d72007-09-15 14:07:45 -0700549{
550 u32 ivar, index;
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000551 struct ixgbe_hw *hw = &adapter->hw;
552 switch (hw->mac.type) {
553 case ixgbe_mac_82598EB:
554 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
555 if (direction == -1)
556 direction = 0;
557 index = (((direction * 64) + queue) >> 2) & 0x1F;
558 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
559 ivar &= ~(0xFF << (8 * (queue & 0x3)));
560 ivar |= (msix_vector << (8 * (queue & 0x3)));
561 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
562 break;
563 case ixgbe_mac_82599EB:
564 if (direction == -1) {
565 /* other causes */
566 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
567 index = ((queue & 1) * 8);
568 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
569 ivar &= ~(0xFF << index);
570 ivar |= (msix_vector << index);
571 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
572 break;
573 } else {
574 /* tx or rx causes */
575 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
576 index = ((16 * (queue & 1)) + (8 * direction));
577 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
578 ivar &= ~(0xFF << index);
579 ivar |= (msix_vector << index);
580 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
581 break;
582 }
583 default:
584 break;
585 }
Auke Kok9a799d72007-09-15 14:07:45 -0700586}
587
Alexander Duyckfe49f042009-06-04 16:00:09 +0000588static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
589 u64 qmask)
590{
591 u32 mask;
592
593 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
594 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
595 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
596 } else {
597 mask = (qmask & 0xFFFFFFFF);
598 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
599 mask = (qmask >> 32);
600 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
601 }
602}
603
Auke Kok9a799d72007-09-15 14:07:45 -0700604static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700605 struct ixgbe_tx_buffer
606 *tx_buffer_info)
Auke Kok9a799d72007-09-15 14:07:45 -0700607{
Alexander Duycke5a43542009-12-02 16:46:56 +0000608 if (tx_buffer_info->dma) {
609 if (tx_buffer_info->mapped_as_page)
Nick Nunley1b507732010-04-27 13:10:27 +0000610 dma_unmap_page(&adapter->pdev->dev,
Alexander Duycke5a43542009-12-02 16:46:56 +0000611 tx_buffer_info->dma,
612 tx_buffer_info->length,
Nick Nunley1b507732010-04-27 13:10:27 +0000613 DMA_TO_DEVICE);
Alexander Duycke5a43542009-12-02 16:46:56 +0000614 else
Nick Nunley1b507732010-04-27 13:10:27 +0000615 dma_unmap_single(&adapter->pdev->dev,
Alexander Duycke5a43542009-12-02 16:46:56 +0000616 tx_buffer_info->dma,
617 tx_buffer_info->length,
Nick Nunley1b507732010-04-27 13:10:27 +0000618 DMA_TO_DEVICE);
Alexander Duycke5a43542009-12-02 16:46:56 +0000619 tx_buffer_info->dma = 0;
620 }
Auke Kok9a799d72007-09-15 14:07:45 -0700621 if (tx_buffer_info->skb) {
622 dev_kfree_skb_any(tx_buffer_info->skb);
623 tx_buffer_info->skb = NULL;
624 }
Alexander Duyck44df32c2009-03-31 21:34:23 +0000625 tx_buffer_info->time_stamp = 0;
Auke Kok9a799d72007-09-15 14:07:45 -0700626 /* tx_buffer_info must be completely set up in the transmit path */
627}
628
Yi Zou26f23d82009-11-06 12:56:00 +0000629/**
John Fastabend7483d9d2010-05-18 16:00:10 +0000630 * ixgbe_tx_xon_state - check the tx ring xon state
Yi Zou26f23d82009-11-06 12:56:00 +0000631 * @adapter: the ixgbe adapter
632 * @tx_ring: the corresponding tx_ring
633 *
634 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
635 * corresponding TC of this tx_ring when checking TFCS.
636 *
John Fastabend7483d9d2010-05-18 16:00:10 +0000637 * Returns : true if in xon state (currently not paused)
Yi Zou26f23d82009-11-06 12:56:00 +0000638 */
John Fastabend7483d9d2010-05-18 16:00:10 +0000639static inline bool ixgbe_tx_xon_state(struct ixgbe_adapter *adapter,
Yi Zou26f23d82009-11-06 12:56:00 +0000640 struct ixgbe_ring *tx_ring)
641{
Yi Zou26f23d82009-11-06 12:56:00 +0000642 u32 txoff = IXGBE_TFCS_TXOFF;
643
644#ifdef CONFIG_IXGBE_DCB
John Fastabendca739482010-06-03 17:03:45 +0000645 if (adapter->dcb_cfg.pfc_mode_enable) {
Jaswinder Singh Rajput30b768322009-11-20 04:02:27 +0000646 int tc;
Yi Zou26f23d82009-11-06 12:56:00 +0000647 int reg_idx = tx_ring->reg_idx;
648 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
649
PJ Waskiewicz6837e892010-01-06 17:50:29 +0000650 switch (adapter->hw.mac.type) {
651 case ixgbe_mac_82598EB:
Yi Zou26f23d82009-11-06 12:56:00 +0000652 tc = reg_idx >> 2;
653 txoff = IXGBE_TFCS_TXOFF0;
PJ Waskiewicz6837e892010-01-06 17:50:29 +0000654 break;
655 case ixgbe_mac_82599EB:
Yi Zou26f23d82009-11-06 12:56:00 +0000656 tc = 0;
657 txoff = IXGBE_TFCS_TXOFF;
658 if (dcb_i == 8) {
659 /* TC0, TC1 */
660 tc = reg_idx >> 5;
661 if (tc == 2) /* TC2, TC3 */
662 tc += (reg_idx - 64) >> 4;
663 else if (tc == 3) /* TC4, TC5, TC6, TC7 */
664 tc += 1 + ((reg_idx - 96) >> 3);
665 } else if (dcb_i == 4) {
666 /* TC0, TC1 */
667 tc = reg_idx >> 6;
668 if (tc == 1) {
669 tc += (reg_idx - 64) >> 5;
670 if (tc == 2) /* TC2, TC3 */
671 tc += (reg_idx - 96) >> 4;
672 }
673 }
PJ Waskiewicz6837e892010-01-06 17:50:29 +0000674 break;
675 default:
676 tc = 0;
Yi Zou26f23d82009-11-06 12:56:00 +0000677 }
678 txoff <<= tc;
679 }
680#endif
681 return IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & txoff;
682}
683
Auke Kok9a799d72007-09-15 14:07:45 -0700684static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700685 struct ixgbe_ring *tx_ring,
686 unsigned int eop)
Auke Kok9a799d72007-09-15 14:07:45 -0700687{
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700688 struct ixgbe_hw *hw = &adapter->hw;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700689
Auke Kok9a799d72007-09-15 14:07:45 -0700690 /* Detect a transmit hang in hardware, this serializes the
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700691 * check with the clearing of time_stamp and movement of eop */
Auke Kok9a799d72007-09-15 14:07:45 -0700692 adapter->detect_tx_hung = false;
Alexander Duyck44df32c2009-03-31 21:34:23 +0000693 if (tx_ring->tx_buffer_info[eop].time_stamp &&
Auke Kok9a799d72007-09-15 14:07:45 -0700694 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
John Fastabend7483d9d2010-05-18 16:00:10 +0000695 ixgbe_tx_xon_state(adapter, tx_ring)) {
Auke Kok9a799d72007-09-15 14:07:45 -0700696 /* detected Tx unit hang */
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700697 union ixgbe_adv_tx_desc *tx_desc;
698 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
Emil Tantilov396e7992010-07-01 20:05:12 +0000699 e_err(drv, "Detected Tx Unit Hang\n"
Emil Tantilov849c4542010-06-03 16:53:41 +0000700 " Tx Queue <%d>\n"
701 " TDH, TDT <%x>, <%x>\n"
702 " next_to_use <%x>\n"
703 " next_to_clean <%x>\n"
704 "tx_buffer_info[next_to_clean]\n"
705 " time_stamp <%lx>\n"
706 " jiffies <%lx>\n",
707 tx_ring->queue_index,
708 IXGBE_READ_REG(hw, tx_ring->head),
709 IXGBE_READ_REG(hw, tx_ring->tail),
710 tx_ring->next_to_use, eop,
711 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
Auke Kok9a799d72007-09-15 14:07:45 -0700712 return true;
713 }
714
715 return false;
716}
717
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700718#define IXGBE_MAX_TXD_PWR 14
719#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800720
721/* Tx Descriptors needed, worst case */
722#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
723 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
724#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700725 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800726
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700727static void ixgbe_tx_timeout(struct net_device *netdev);
728
Auke Kok9a799d72007-09-15 14:07:45 -0700729/**
730 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
Alexander Duyckfe49f042009-06-04 16:00:09 +0000731 * @q_vector: structure containing interrupt and ring information
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700732 * @tx_ring: tx ring to clean
Auke Kok9a799d72007-09-15 14:07:45 -0700733 **/
Alexander Duyckfe49f042009-06-04 16:00:09 +0000734static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700735 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -0700736{
Alexander Duyckfe49f042009-06-04 16:00:09 +0000737 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700738 struct net_device *netdev = adapter->netdev;
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800739 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
740 struct ixgbe_tx_buffer *tx_buffer_info;
741 unsigned int i, eop, count = 0;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700742 unsigned int total_bytes = 0, total_packets = 0;
Auke Kok9a799d72007-09-15 14:07:45 -0700743
744 i = tx_ring->next_to_clean;
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800745 eop = tx_ring->tx_buffer_info[i].next_to_watch;
746 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
747
748 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +0000749 (count < tx_ring->work_limit)) {
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800750 bool cleaned = false;
Jeff Kirsher2d0bb1c2010-08-08 16:02:31 +0000751 rmb(); /* read buffer_info after eop_desc */
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800752 for ( ; !cleaned; count++) {
753 struct sk_buff *skb;
Auke Kok9a799d72007-09-15 14:07:45 -0700754 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
755 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800756 cleaned = (i == eop);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700757 skb = tx_buffer_info->skb;
Auke Kok9a799d72007-09-15 14:07:45 -0700758
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800759 if (cleaned && skb) {
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800760 unsigned int segs, bytecount;
Yi Zou3d8fd382009-06-08 14:38:44 +0000761 unsigned int hlen = skb_headlen(skb);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700762
763 /* gso_segs is currently only valid for tcp */
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800764 segs = skb_shinfo(skb)->gso_segs ?: 1;
Yi Zou3d8fd382009-06-08 14:38:44 +0000765#ifdef IXGBE_FCOE
766 /* adjust for FCoE Sequence Offload */
767 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
768 && (skb->protocol == htons(ETH_P_FCOE)) &&
769 skb_is_gso(skb)) {
770 hlen = skb_transport_offset(skb) +
771 sizeof(struct fc_frame_header) +
772 sizeof(struct fcoe_crc_eof);
773 segs = DIV_ROUND_UP(skb->len - hlen,
774 skb_shinfo(skb)->gso_size);
775 }
776#endif /* IXGBE_FCOE */
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800777 /* multiply data chunks by size of headers */
Yi Zou3d8fd382009-06-08 14:38:44 +0000778 bytecount = ((segs - 1) * hlen) + skb->len;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700779 total_packets += segs;
780 total_bytes += bytecount;
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800781 }
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700782
Auke Kok9a799d72007-09-15 14:07:45 -0700783 ixgbe_unmap_and_free_tx_resource(adapter,
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700784 tx_buffer_info);
Auke Kok9a799d72007-09-15 14:07:45 -0700785
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800786 tx_desc->wb.status = 0;
787
Auke Kok9a799d72007-09-15 14:07:45 -0700788 i++;
789 if (i == tx_ring->count)
790 i = 0;
791 }
792
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800793 eop = tx_ring->tx_buffer_info[i].next_to_watch;
794 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
795 }
796
Auke Kok9a799d72007-09-15 14:07:45 -0700797 tx_ring->next_to_clean = i;
798
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800799#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700800 if (unlikely(count && netif_carrier_ok(netdev) &&
801 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800802 /* Make sure that anybody stopping the queue after this
803 * sees the new next_to_clean.
804 */
805 smp_mb();
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -0800806 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
807 !test_bit(__IXGBE_DOWN, &adapter->state)) {
808 netif_wake_subqueue(netdev, tx_ring->queue_index);
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +0000809 ++tx_ring->restart_queue;
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -0800810 }
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800811 }
Auke Kok9a799d72007-09-15 14:07:45 -0700812
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700813 if (adapter->detect_tx_hung) {
814 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
815 /* schedule immediate reset if we believe we hung */
Emil Tantilov396e7992010-07-01 20:05:12 +0000816 e_info(probe, "tx hang %d detected, resetting "
817 "adapter\n", adapter->tx_timeout_count + 1);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700818 ixgbe_tx_timeout(adapter->netdev);
819 }
820 }
Auke Kok9a799d72007-09-15 14:07:45 -0700821
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700822 /* re-arm the interrupt */
Alexander Duyckfe49f042009-06-04 16:00:09 +0000823 if (count >= tx_ring->work_limit)
824 ixgbe_irq_rearm_queues(adapter, ((u64)1 << q_vector->v_idx));
Auke Kok9a799d72007-09-15 14:07:45 -0700825
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700826 tx_ring->total_bytes += total_bytes;
827 tx_ring->total_packets += total_packets;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700828 tx_ring->stats.packets += total_packets;
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800829 tx_ring->stats.bytes += total_bytes;
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +0000830 return (count < tx_ring->work_limit);
Auke Kok9a799d72007-09-15 14:07:45 -0700831}
832
Jeff Garzik5dd2d332008-10-16 05:09:31 -0400833#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800834static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700835 struct ixgbe_ring *rx_ring)
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800836{
837 u32 rxctrl;
838 int cpu = get_cpu();
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000839 int q = rx_ring->reg_idx;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800840
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700841 if (rx_ring->cpu != cpu) {
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800842 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000843 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
844 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
845 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
846 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
847 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599;
848 rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
849 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599);
850 }
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800851 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
852 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
Don Skidmore15005a32009-01-19 16:54:13 -0800853 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
854 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000855 IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800856 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700857 rx_ring->cpu = cpu;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800858 }
859 put_cpu();
860}
861
862static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700863 struct ixgbe_ring *tx_ring)
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800864{
865 u32 txctrl;
866 int cpu = get_cpu();
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000867 int q = tx_ring->reg_idx;
Don Skidmoreee5f7842009-11-06 12:56:20 +0000868 struct ixgbe_hw *hw = &adapter->hw;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800869
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700870 if (tx_ring->cpu != cpu) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000871 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
Don Skidmoreee5f7842009-11-06 12:56:20 +0000872 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q));
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000873 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
874 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
Don Skidmoreee5f7842009-11-06 12:56:20 +0000875 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
876 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl);
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000877 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
Don Skidmoreee5f7842009-11-06 12:56:20 +0000878 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q));
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000879 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
880 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
Don Skidmoreee5f7842009-11-06 12:56:20 +0000881 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599);
882 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
883 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl);
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000884 }
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700885 tx_ring->cpu = cpu;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800886 }
887 put_cpu();
888}
889
890static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
891{
892 int i;
893
894 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
895 return;
896
Alexander Duycke35ec122009-05-21 13:07:12 +0000897 /* always use CB2 mode, difference is masked in the CB driver */
898 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
899
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800900 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000901 adapter->tx_ring[i]->cpu = -1;
902 ixgbe_update_tx_dca(adapter, adapter->tx_ring[i]);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800903 }
904 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000905 adapter->rx_ring[i]->cpu = -1;
906 ixgbe_update_rx_dca(adapter, adapter->rx_ring[i]);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800907 }
908}
909
910static int __ixgbe_notify_dca(struct device *dev, void *data)
911{
912 struct net_device *netdev = dev_get_drvdata(dev);
913 struct ixgbe_adapter *adapter = netdev_priv(netdev);
914 unsigned long event = *(unsigned long *)data;
915
916 switch (event) {
917 case DCA_PROVIDER_ADD:
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -0700918 /* if we're already enabled, don't do it again */
919 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
920 break;
Denis V. Lunev652f0932008-03-27 14:39:17 +0300921 if (dca_add_requester(dev) == 0) {
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -0700922 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800923 ixgbe_setup_dca(adapter);
924 break;
925 }
926 /* Fall Through since DCA is disabled. */
927 case DCA_PROVIDER_REMOVE:
928 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
929 dca_remove_requester(dev);
930 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
931 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
932 }
933 break;
934 }
935
Denis V. Lunev652f0932008-03-27 14:39:17 +0300936 return 0;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800937}
938
Jeff Garzik5dd2d332008-10-16 05:09:31 -0400939#endif /* CONFIG_IXGBE_DCA */
Auke Kok9a799d72007-09-15 14:07:45 -0700940/**
941 * ixgbe_receive_skb - Send a completed packet up the stack
942 * @adapter: board private structure
943 * @skb: packet to send up
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700944 * @status: hardware indication of status of receive
945 * @rx_ring: rx descriptor ring (for a specific queue) to setup
946 * @rx_desc: rx descriptor
Auke Kok9a799d72007-09-15 14:07:45 -0700947 **/
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800948static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700949 struct sk_buff *skb, u8 status,
Alexander Duyckfdaff1c2009-05-06 10:43:47 +0000950 struct ixgbe_ring *ring,
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700951 union ixgbe_adv_rx_desc *rx_desc)
Auke Kok9a799d72007-09-15 14:07:45 -0700952{
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800953 struct ixgbe_adapter *adapter = q_vector->adapter;
954 struct napi_struct *napi = &q_vector->napi;
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700955 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
956 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
Auke Kok9a799d72007-09-15 14:07:45 -0700957
Alexander Duyck182ff8d2009-04-27 22:35:33 +0000958 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
Lucy Liu8a62bab2009-08-13 14:09:38 +0000959 if (adapter->vlgrp && is_vlan && (tag & VLAN_VID_MASK))
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800960 vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
Auke Kok9a799d72007-09-15 14:07:45 -0700961 else
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800962 napi_gro_receive(napi, skb);
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700963 } else {
Lucy Liu8a62bab2009-08-13 14:09:38 +0000964 if (adapter->vlgrp && is_vlan && (tag & VLAN_VID_MASK))
Alexander Duyck182ff8d2009-04-27 22:35:33 +0000965 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
966 else
967 netif_rx(skb);
Auke Kok9a799d72007-09-15 14:07:45 -0700968 }
969}
970
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800971/**
972 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
973 * @adapter: address of board private structure
974 * @status_err: hardware indication of status of receive
975 * @skb: skb currently being received and modified
976 **/
Auke Kok9a799d72007-09-15 14:07:45 -0700977static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
Don Skidmore8bae1b22009-07-23 18:00:39 +0000978 union ixgbe_adv_rx_desc *rx_desc,
979 struct sk_buff *skb)
Auke Kok9a799d72007-09-15 14:07:45 -0700980{
Don Skidmore8bae1b22009-07-23 18:00:39 +0000981 u32 status_err = le32_to_cpu(rx_desc->wb.upper.status_error);
982
Auke Kok9a799d72007-09-15 14:07:45 -0700983 skb->ip_summed = CHECKSUM_NONE;
984
Jesse Brandeburg712744b2008-08-26 04:26:56 -0700985 /* Rx csum disabled */
986 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
Auke Kok9a799d72007-09-15 14:07:45 -0700987 return;
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800988
989 /* if IP and error */
990 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
991 (status_err & IXGBE_RXDADV_ERR_IPE)) {
Auke Kok9a799d72007-09-15 14:07:45 -0700992 adapter->hw_csum_rx_error++;
993 return;
994 }
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800995
996 if (!(status_err & IXGBE_RXD_STAT_L4CS))
997 return;
998
999 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
Don Skidmore8bae1b22009-07-23 18:00:39 +00001000 u16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1001
1002 /*
1003 * 82599 errata, UDP frames with a 0 checksum can be marked as
1004 * checksum errors.
1005 */
1006 if ((pkt_info & IXGBE_RXDADV_PKTTYPE_UDP) &&
1007 (adapter->hw.mac.type == ixgbe_mac_82599EB))
1008 return;
1009
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -08001010 adapter->hw_csum_rx_error++;
1011 return;
1012 }
1013
Auke Kok9a799d72007-09-15 14:07:45 -07001014 /* It must be a TCP or UDP packet with a valid checksum */
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -08001015 skb->ip_summed = CHECKSUM_UNNECESSARY;
Auke Kok9a799d72007-09-15 14:07:45 -07001016}
1017
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001018static inline void ixgbe_release_rx_desc(struct ixgbe_hw *hw,
1019 struct ixgbe_ring *rx_ring, u32 val)
1020{
1021 /*
1022 * Force memory writes to complete before letting h/w
1023 * know there are new descriptors to fetch. (Only
1024 * applicable for weak-ordered memory model archs,
1025 * such as IA-64).
1026 */
1027 wmb();
1028 IXGBE_WRITE_REG(hw, IXGBE_RDT(rx_ring->reg_idx), val);
1029}
1030
Auke Kok9a799d72007-09-15 14:07:45 -07001031/**
1032 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
1033 * @adapter: address of board private structure
1034 **/
1035static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001036 struct ixgbe_ring *rx_ring,
1037 int cleaned_count)
Auke Kok9a799d72007-09-15 14:07:45 -07001038{
Alexander Duyckd716a7d2010-08-19 13:33:41 +00001039 struct net_device *netdev = adapter->netdev;
Auke Kok9a799d72007-09-15 14:07:45 -07001040 struct pci_dev *pdev = adapter->pdev;
1041 union ixgbe_adv_rx_desc *rx_desc;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001042 struct ixgbe_rx_buffer *bi;
Auke Kok9a799d72007-09-15 14:07:45 -07001043 unsigned int i;
Alexander Duyckd716a7d2010-08-19 13:33:41 +00001044 unsigned int bufsz = rx_ring->rx_buf_len;
Auke Kok9a799d72007-09-15 14:07:45 -07001045
1046 i = rx_ring->next_to_use;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001047 bi = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -07001048
1049 while (cleaned_count--) {
1050 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
1051
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07001052 if (!bi->page_dma &&
Yi Zou6e455b892009-08-06 13:05:44 +00001053 (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED)) {
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001054 if (!bi->page) {
Alexander Duyckd716a7d2010-08-19 13:33:41 +00001055 bi->page = netdev_alloc_page(netdev);
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07001056 if (!bi->page) {
1057 adapter->alloc_rx_page_failed++;
1058 goto no_buffers;
1059 }
1060 bi->page_offset = 0;
1061 } else {
1062 /* use a half page if we're re-using */
1063 bi->page_offset ^= (PAGE_SIZE / 2);
Auke Kok9a799d72007-09-15 14:07:45 -07001064 }
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07001065
Nick Nunley1b507732010-04-27 13:10:27 +00001066 bi->page_dma = dma_map_page(&pdev->dev, bi->page,
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07001067 bi->page_offset,
1068 (PAGE_SIZE / 2),
Nick Nunley1b507732010-04-27 13:10:27 +00001069 DMA_FROM_DEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -07001070 }
1071
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001072 if (!bi->skb) {
Alexander Duyckd716a7d2010-08-19 13:33:41 +00001073 struct sk_buff *skb = netdev_alloc_skb_ip_align(netdev,
1074 bufsz);
1075 bi->skb = skb;
Auke Kok9a799d72007-09-15 14:07:45 -07001076
1077 if (!skb) {
1078 adapter->alloc_rx_buff_failed++;
1079 goto no_buffers;
1080 }
Alexander Duyckd716a7d2010-08-19 13:33:41 +00001081 /* initialize queue mapping */
1082 skb_record_rx_queue(skb, rx_ring->queue_index);
1083 }
Auke Kok9a799d72007-09-15 14:07:45 -07001084
Alexander Duyckd716a7d2010-08-19 13:33:41 +00001085 if (!bi->dma) {
1086 bi->dma = dma_map_single(&pdev->dev,
1087 bi->skb->data,
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +00001088 rx_ring->rx_buf_len,
Nick Nunley1b507732010-04-27 13:10:27 +00001089 DMA_FROM_DEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -07001090 }
1091 /* Refresh the desc even if buffer_addrs didn't change because
1092 * each write-back erases this info. */
Yi Zou6e455b892009-08-06 13:05:44 +00001093 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001094 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
1095 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
Auke Kok9a799d72007-09-15 14:07:45 -07001096 } else {
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001097 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
Auke Kok9a799d72007-09-15 14:07:45 -07001098 }
1099
1100 i++;
1101 if (i == rx_ring->count)
1102 i = 0;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001103 bi = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -07001104 }
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001105
Auke Kok9a799d72007-09-15 14:07:45 -07001106no_buffers:
1107 if (rx_ring->next_to_use != i) {
1108 rx_ring->next_to_use = i;
1109 if (i-- == 0)
1110 i = (rx_ring->count - 1);
1111
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001112 ixgbe_release_rx_desc(&adapter->hw, rx_ring, i);
Auke Kok9a799d72007-09-15 14:07:45 -07001113 }
1114}
1115
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001116static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
1117{
1118 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1119}
1120
1121static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
1122{
1123 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1124}
1125
Alexander Duyckf8212f92009-04-27 22:42:37 +00001126static inline u32 ixgbe_get_rsc_count(union ixgbe_adv_rx_desc *rx_desc)
1127{
1128 return (le32_to_cpu(rx_desc->wb.lower.lo_dword.data) &
1129 IXGBE_RXDADV_RSCCNT_MASK) >>
1130 IXGBE_RXDADV_RSCCNT_SHIFT;
1131}
1132
1133/**
1134 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
1135 * @skb: pointer to the last skb in the rsc queue
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001136 * @count: pointer to number of packets coalesced in this context
Alexander Duyckf8212f92009-04-27 22:42:37 +00001137 *
1138 * This function changes a queue full of hw rsc buffers into a completed
1139 * packet. It uses the ->prev pointers to find the first packet and then
1140 * turns it into the frag list owner.
1141 **/
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001142static inline struct sk_buff *ixgbe_transform_rsc_queue(struct sk_buff *skb,
1143 u64 *count)
Alexander Duyckf8212f92009-04-27 22:42:37 +00001144{
1145 unsigned int frag_list_size = 0;
1146
1147 while (skb->prev) {
1148 struct sk_buff *prev = skb->prev;
1149 frag_list_size += skb->len;
1150 skb->prev = NULL;
1151 skb = prev;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001152 *count += 1;
Alexander Duyckf8212f92009-04-27 22:42:37 +00001153 }
1154
1155 skb_shinfo(skb)->frag_list = skb->next;
1156 skb->next = NULL;
1157 skb->len += frag_list_size;
1158 skb->data_len += frag_list_size;
1159 skb->truesize += frag_list_size;
1160 return skb;
1161}
1162
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001163struct ixgbe_rsc_cb {
1164 dma_addr_t dma;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001165 bool delay_unmap;
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001166};
1167
1168#define IXGBE_RSC_CB(skb) ((struct ixgbe_rsc_cb *)(skb)->cb)
1169
Herbert Xu78b6f4c2009-01-18 21:49:45 -08001170static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001171 struct ixgbe_ring *rx_ring,
1172 int *work_done, int work_to_do)
Auke Kok9a799d72007-09-15 14:07:45 -07001173{
Herbert Xu78b6f4c2009-01-18 21:49:45 -08001174 struct ixgbe_adapter *adapter = q_vector->adapter;
Ajit Khaparde2d86f132009-10-07 02:43:49 +00001175 struct net_device *netdev = adapter->netdev;
Auke Kok9a799d72007-09-15 14:07:45 -07001176 struct pci_dev *pdev = adapter->pdev;
1177 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
1178 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
1179 struct sk_buff *skb;
Alexander Duyckf8212f92009-04-27 22:42:37 +00001180 unsigned int i, rsc_count = 0;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001181 u32 len, staterr;
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07001182 u16 hdr_info;
1183 bool cleaned = false;
Auke Kok9a799d72007-09-15 14:07:45 -07001184 int cleaned_count = 0;
Ayyappan Veeraiyand2f4fbe2008-02-01 15:59:19 -08001185 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
Yi Zou3d8fd382009-06-08 14:38:44 +00001186#ifdef IXGBE_FCOE
1187 int ddp_bytes = 0;
1188#endif /* IXGBE_FCOE */
Auke Kok9a799d72007-09-15 14:07:45 -07001189
1190 i = rx_ring->next_to_clean;
Auke Kok9a799d72007-09-15 14:07:45 -07001191 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
1192 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1193 rx_buffer_info = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -07001194
1195 while (staterr & IXGBE_RXD_STAT_DD) {
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001196 u32 upper_len = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07001197 if (*work_done >= work_to_do)
1198 break;
1199 (*work_done)++;
1200
Milton Miller3c945e52010-02-19 17:44:42 +00001201 rmb(); /* read descriptor and rx_buffer_info after status DD */
Yi Zou6e455b892009-08-06 13:05:44 +00001202 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001203 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
1204 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07001205 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07001206 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
Shannon Nelson0b746e02010-05-18 16:00:03 +00001207 if ((len > IXGBE_RX_HDR_SIZE) ||
1208 (upper_len && !(hdr_info & IXGBE_RXDADV_SPH)))
1209 len = IXGBE_RX_HDR_SIZE;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001210 } else {
Auke Kok9a799d72007-09-15 14:07:45 -07001211 len = le16_to_cpu(rx_desc->wb.upper.length);
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001212 }
Auke Kok9a799d72007-09-15 14:07:45 -07001213
1214 cleaned = true;
1215 skb = rx_buffer_info->skb;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00001216 prefetch(skb->data);
Auke Kok9a799d72007-09-15 14:07:45 -07001217 rx_buffer_info->skb = NULL;
1218
Alexander Duyck21fa4e62009-06-04 15:59:49 +00001219 if (rx_buffer_info->dma) {
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001220 if ((adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
1221 (!(staterr & IXGBE_RXD_STAT_EOP)) &&
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001222 (!(skb->prev))) {
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001223 /*
1224 * When HWRSC is enabled, delay unmapping
1225 * of the first packet. It carries the
1226 * header information, HW may still
1227 * access the header after the writeback.
1228 * Only unmap it when EOP is reached
1229 */
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001230 IXGBE_RSC_CB(skb)->delay_unmap = true;
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001231 IXGBE_RSC_CB(skb)->dma = rx_buffer_info->dma;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001232 } else {
Nick Nunley1b507732010-04-27 13:10:27 +00001233 dma_unmap_single(&pdev->dev,
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001234 rx_buffer_info->dma,
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001235 rx_ring->rx_buf_len,
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001236 DMA_FROM_DEVICE);
1237 }
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +00001238 rx_buffer_info->dma = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07001239 skb_put(skb, len);
1240 }
1241
1242 if (upper_len) {
Nick Nunley1b507732010-04-27 13:10:27 +00001243 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1244 PAGE_SIZE / 2, DMA_FROM_DEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -07001245 rx_buffer_info->page_dma = 0;
1246 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07001247 rx_buffer_info->page,
1248 rx_buffer_info->page_offset,
1249 upper_len);
1250
1251 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
1252 (page_count(rx_buffer_info->page) != 1))
1253 rx_buffer_info->page = NULL;
1254 else
1255 get_page(rx_buffer_info->page);
Auke Kok9a799d72007-09-15 14:07:45 -07001256
1257 skb->len += upper_len;
1258 skb->data_len += upper_len;
1259 skb->truesize += upper_len;
1260 }
1261
1262 i++;
1263 if (i == rx_ring->count)
1264 i = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07001265
1266 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
1267 prefetch(next_rxd);
Auke Kok9a799d72007-09-15 14:07:45 -07001268 cleaned_count++;
Alexander Duyckf8212f92009-04-27 22:42:37 +00001269
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00001270 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
Alexander Duyckf8212f92009-04-27 22:42:37 +00001271 rsc_count = ixgbe_get_rsc_count(rx_desc);
1272
1273 if (rsc_count) {
1274 u32 nextp = (staterr & IXGBE_RXDADV_NEXTP_MASK) >>
1275 IXGBE_RXDADV_NEXTP_SHIFT;
1276 next_buffer = &rx_ring->rx_buffer_info[nextp];
Alexander Duyckf8212f92009-04-27 22:42:37 +00001277 } else {
1278 next_buffer = &rx_ring->rx_buffer_info[i];
1279 }
1280
Auke Kok9a799d72007-09-15 14:07:45 -07001281 if (staterr & IXGBE_RXD_STAT_EOP) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00001282 if (skb->prev)
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001283 skb = ixgbe_transform_rsc_queue(skb, &(rx_ring->rsc_count));
1284 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001285 if (IXGBE_RSC_CB(skb)->delay_unmap) {
Nick Nunley1b507732010-04-27 13:10:27 +00001286 dma_unmap_single(&pdev->dev,
1287 IXGBE_RSC_CB(skb)->dma,
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001288 rx_ring->rx_buf_len,
Nick Nunley1b507732010-04-27 13:10:27 +00001289 DMA_FROM_DEVICE);
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00001290 IXGBE_RSC_CB(skb)->dma = 0;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001291 IXGBE_RSC_CB(skb)->delay_unmap = false;
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00001292 }
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001293 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED)
1294 rx_ring->rsc_count += skb_shinfo(skb)->nr_frags;
1295 else
1296 rx_ring->rsc_count++;
1297 rx_ring->rsc_flush++;
1298 }
Auke Kok9a799d72007-09-15 14:07:45 -07001299 rx_ring->stats.packets++;
1300 rx_ring->stats.bytes += skb->len;
1301 } else {
Yi Zou6e455b892009-08-06 13:05:44 +00001302 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00001303 rx_buffer_info->skb = next_buffer->skb;
1304 rx_buffer_info->dma = next_buffer->dma;
1305 next_buffer->skb = skb;
1306 next_buffer->dma = 0;
1307 } else {
1308 skb->next = next_buffer->skb;
1309 skb->next->prev = skb;
1310 }
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00001311 rx_ring->non_eop_descs++;
Auke Kok9a799d72007-09-15 14:07:45 -07001312 goto next_desc;
1313 }
1314
1315 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
1316 dev_kfree_skb_irq(skb);
1317 goto next_desc;
1318 }
1319
Don Skidmore8bae1b22009-07-23 18:00:39 +00001320 ixgbe_rx_checksum(adapter, rx_desc, skb);
Ayyappan Veeraiyand2f4fbe2008-02-01 15:59:19 -08001321
1322 /* probably a little skewed due to removing CRC */
1323 total_rx_bytes += skb->len;
1324 total_rx_packets++;
1325
Jesse Brandeburg74ce8dd2008-09-11 20:03:23 -07001326 skb->protocol = eth_type_trans(skb, adapter->netdev);
Yi Zou332d4a72009-05-13 13:11:53 +00001327#ifdef IXGBE_FCOE
1328 /* if ddp, not passing to ULD unless for FCP_RSP or error */
Yi Zou3d8fd382009-06-08 14:38:44 +00001329 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
1330 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
1331 if (!ddp_bytes)
Yi Zou332d4a72009-05-13 13:11:53 +00001332 goto next_desc;
Yi Zou3d8fd382009-06-08 14:38:44 +00001333 }
Yi Zou332d4a72009-05-13 13:11:53 +00001334#endif /* IXGBE_FCOE */
Alexander Duyckfdaff1c2009-05-06 10:43:47 +00001335 ixgbe_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
Auke Kok9a799d72007-09-15 14:07:45 -07001336
1337next_desc:
1338 rx_desc->wb.upper.status_error = 0;
1339
1340 /* return some buffers to hardware, one at a time is too slow */
1341 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
1342 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
1343 cleaned_count = 0;
1344 }
1345
1346 /* use prefetched values */
1347 rx_desc = next_rxd;
Alexander Duyckf8212f92009-04-27 22:42:37 +00001348 rx_buffer_info = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -07001349
1350 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07001351 }
1352
Auke Kok9a799d72007-09-15 14:07:45 -07001353 rx_ring->next_to_clean = i;
1354 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
1355
1356 if (cleaned_count)
1357 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
1358
Yi Zou3d8fd382009-06-08 14:38:44 +00001359#ifdef IXGBE_FCOE
1360 /* include DDPed FCoE data */
1361 if (ddp_bytes > 0) {
1362 unsigned int mss;
1363
1364 mss = adapter->netdev->mtu - sizeof(struct fcoe_hdr) -
1365 sizeof(struct fc_frame_header) -
1366 sizeof(struct fcoe_crc_eof);
1367 if (mss > 512)
1368 mss &= ~511;
1369 total_rx_bytes += ddp_bytes;
1370 total_rx_packets += DIV_ROUND_UP(ddp_bytes, mss);
1371 }
1372#endif /* IXGBE_FCOE */
1373
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001374 rx_ring->total_packets += total_rx_packets;
1375 rx_ring->total_bytes += total_rx_bytes;
Ajit Khaparde2d86f132009-10-07 02:43:49 +00001376 netdev->stats.rx_bytes += total_rx_bytes;
1377 netdev->stats.rx_packets += total_rx_packets;
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001378
Auke Kok9a799d72007-09-15 14:07:45 -07001379 return cleaned;
1380}
1381
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001382static int ixgbe_clean_rxonly(struct napi_struct *, int);
Auke Kok9a799d72007-09-15 14:07:45 -07001383/**
1384 * ixgbe_configure_msix - Configure MSI-X hardware
1385 * @adapter: board private structure
1386 *
1387 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1388 * interrupts.
1389 **/
1390static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1391{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001392 struct ixgbe_q_vector *q_vector;
1393 int i, j, q_vectors, v_idx, r_idx;
1394 u32 mask;
Auke Kok9a799d72007-09-15 14:07:45 -07001395
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001396 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1397
Jesse Brandeburg4df10462009-03-13 22:15:31 +00001398 /*
1399 * Populate the IVAR table and set the ITR values to the
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001400 * corresponding register.
1401 */
1402 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00001403 q_vector = adapter->q_vector[v_idx];
Akinobu Mita984b3f52010-03-05 13:41:37 -08001404 /* XXX for_each_set_bit(...) */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001405 r_idx = find_first_bit(q_vector->rxr_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001406 adapter->num_rx_queues);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001407
1408 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001409 j = adapter->rx_ring[r_idx]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001410 ixgbe_set_ivar(adapter, 0, j, v_idx);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001411 r_idx = find_next_bit(q_vector->rxr_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001412 adapter->num_rx_queues,
1413 r_idx + 1);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001414 }
1415 r_idx = find_first_bit(q_vector->txr_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001416 adapter->num_tx_queues);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001417
1418 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001419 j = adapter->tx_ring[r_idx]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001420 ixgbe_set_ivar(adapter, 1, j, v_idx);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001421 r_idx = find_next_bit(q_vector->txr_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001422 adapter->num_tx_queues,
1423 r_idx + 1);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001424 }
1425
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001426 if (q_vector->txr_count && !q_vector->rxr_count)
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001427 /* tx only */
1428 q_vector->eitr = adapter->tx_eitr_param;
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001429 else if (q_vector->rxr_count)
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001430 /* rx or mixed */
1431 q_vector->eitr = adapter->rx_eitr_param;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001432
Alexander Duyckfe49f042009-06-04 16:00:09 +00001433 ixgbe_write_eitr(q_vector);
Auke Kok9a799d72007-09-15 14:07:45 -07001434 }
1435
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001436 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
1437 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
1438 v_idx);
1439 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
1440 ixgbe_set_ivar(adapter, -1, 1, v_idx);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001441 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
Auke Kok9a799d72007-09-15 14:07:45 -07001442
Jesse Brandeburg41fb9242008-09-11 19:55:58 -07001443 /* set up to autoclear timer, and the vectors */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001444 mask = IXGBE_EIMS_ENABLE_MASK;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00001445 if (adapter->num_vfs)
1446 mask &= ~(IXGBE_EIMS_OTHER |
1447 IXGBE_EIMS_MAILBOX |
1448 IXGBE_EIMS_LSC);
1449 else
1450 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001451 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
Auke Kok9a799d72007-09-15 14:07:45 -07001452}
1453
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001454enum latency_range {
1455 lowest_latency = 0,
1456 low_latency = 1,
1457 bulk_latency = 2,
1458 latency_invalid = 255
1459};
1460
1461/**
1462 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1463 * @adapter: pointer to adapter
1464 * @eitr: eitr setting (ints per sec) to give last timeslice
1465 * @itr_setting: current throttle rate in ints/second
1466 * @packets: the number of packets during this measurement interval
1467 * @bytes: the number of bytes during this measurement interval
1468 *
1469 * Stores a new ITR value based on packets and byte
1470 * counts during the last interrupt. The advantage of per interrupt
1471 * computation is faster updates and more accurate ITR for the current
1472 * traffic pattern. Constants in this function were computed
1473 * based on theoretical maximum wire speed and thresholds were set based
1474 * on testing data as well as attempting to minimize response time
1475 * while increasing bulk throughput.
1476 * this functionality is controlled by the InterruptThrottleRate module
1477 * parameter (see ixgbe_param.c)
1478 **/
1479static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001480 u32 eitr, u8 itr_setting,
1481 int packets, int bytes)
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001482{
1483 unsigned int retval = itr_setting;
1484 u32 timepassed_us;
1485 u64 bytes_perint;
1486
1487 if (packets == 0)
1488 goto update_itr_done;
1489
1490
1491 /* simple throttlerate management
1492 * 0-20MB/s lowest (100000 ints/s)
1493 * 20-100MB/s low (20000 ints/s)
1494 * 100-1249MB/s bulk (8000 ints/s)
1495 */
1496 /* what was last interrupt timeslice? */
1497 timepassed_us = 1000000/eitr;
1498 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1499
1500 switch (itr_setting) {
1501 case lowest_latency:
1502 if (bytes_perint > adapter->eitr_low)
1503 retval = low_latency;
1504 break;
1505 case low_latency:
1506 if (bytes_perint > adapter->eitr_high)
1507 retval = bulk_latency;
1508 else if (bytes_perint <= adapter->eitr_low)
1509 retval = lowest_latency;
1510 break;
1511 case bulk_latency:
1512 if (bytes_perint <= adapter->eitr_high)
1513 retval = low_latency;
1514 break;
1515 }
1516
1517update_itr_done:
1518 return retval;
1519}
1520
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001521/**
1522 * ixgbe_write_eitr - write EITR register in hardware specific way
Alexander Duyckfe49f042009-06-04 16:00:09 +00001523 * @q_vector: structure containing interrupt and ring information
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001524 *
1525 * This function is made to be called by ethtool and by the driver
1526 * when it needs to update EITR registers at runtime. Hardware
1527 * specific quirks/differences are taken care of here.
1528 */
Alexander Duyckfe49f042009-06-04 16:00:09 +00001529void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001530{
Alexander Duyckfe49f042009-06-04 16:00:09 +00001531 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001532 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001533 int v_idx = q_vector->v_idx;
1534 u32 itr_reg = EITR_INTS_PER_SEC_TO_REG(q_vector->eitr);
1535
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001536 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1537 /* must write high and low 16 bits to reset counter */
1538 itr_reg |= (itr_reg << 16);
1539 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1540 /*
Jesse Brandeburgf8d1dca2010-04-27 01:37:20 +00001541 * 82599 can support a value of zero, so allow it for
1542 * max interrupt rate, but there is an errata where it can
1543 * not be zero with RSC
1544 */
1545 if (itr_reg == 8 &&
1546 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
1547 itr_reg = 0;
1548
1549 /*
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001550 * set the WDIS bit to not clear the timer bits and cause an
1551 * immediate assertion of the interrupt
1552 */
1553 itr_reg |= IXGBE_EITR_CNT_WDIS;
1554 }
1555 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
1556}
1557
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001558static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
1559{
1560 struct ixgbe_adapter *adapter = q_vector->adapter;
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001561 u32 new_itr;
1562 u8 current_itr, ret_itr;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001563 int i, r_idx;
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001564 struct ixgbe_ring *rx_ring, *tx_ring;
1565
1566 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1567 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001568 tx_ring = adapter->tx_ring[r_idx];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001569 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001570 q_vector->tx_itr,
1571 tx_ring->total_packets,
1572 tx_ring->total_bytes);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001573 /* if the result for this queue would decrease interrupt
1574 * rate for this vector then use that result */
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001575 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001576 q_vector->tx_itr - 1 : ret_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001577 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001578 r_idx + 1);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001579 }
1580
1581 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1582 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001583 rx_ring = adapter->rx_ring[r_idx];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001584 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001585 q_vector->rx_itr,
1586 rx_ring->total_packets,
1587 rx_ring->total_bytes);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001588 /* if the result for this queue would decrease interrupt
1589 * rate for this vector then use that result */
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001590 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001591 q_vector->rx_itr - 1 : ret_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001592 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001593 r_idx + 1);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001594 }
1595
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001596 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001597
1598 switch (current_itr) {
1599 /* counts and packets in update_itr are dependent on these numbers */
1600 case lowest_latency:
1601 new_itr = 100000;
1602 break;
1603 case low_latency:
1604 new_itr = 20000; /* aka hwitr = ~200 */
1605 break;
1606 case bulk_latency:
1607 default:
1608 new_itr = 8000;
1609 break;
1610 }
1611
1612 if (new_itr != q_vector->eitr) {
Alexander Duyckfe49f042009-06-04 16:00:09 +00001613 /* do an exponential smoothing */
1614 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001615
1616 /* save the algorithm value here, not the smoothed one */
1617 q_vector->eitr = new_itr;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001618
1619 ixgbe_write_eitr(q_vector);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001620 }
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001621}
1622
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001623/**
1624 * ixgbe_check_overtemp_task - worker thread to check over tempurature
1625 * @work: pointer to work_struct containing our data
1626 **/
1627static void ixgbe_check_overtemp_task(struct work_struct *work)
1628{
1629 struct ixgbe_adapter *adapter = container_of(work,
1630 struct ixgbe_adapter,
1631 check_overtemp_task);
1632 struct ixgbe_hw *hw = &adapter->hw;
1633 u32 eicr = adapter->interrupt_event;
1634
1635 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
1636 switch (hw->device_id) {
1637 case IXGBE_DEV_ID_82599_T3_LOM: {
1638 u32 autoneg;
1639 bool link_up = false;
1640
1641 if (hw->mac.ops.check_link)
1642 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
1643
1644 if (((eicr & IXGBE_EICR_GPI_SDP0) && (!link_up)) ||
1645 (eicr & IXGBE_EICR_LSC))
1646 /* Check if this is due to overtemp */
1647 if (hw->phy.ops.check_overtemp(hw) == IXGBE_ERR_OVERTEMP)
1648 break;
1649 }
1650 return;
1651 default:
1652 if (!(eicr & IXGBE_EICR_GPI_SDP0))
1653 return;
1654 break;
1655 }
Emil Tantilov396e7992010-07-01 20:05:12 +00001656 e_crit(drv, "Network adapter has been stopped because it has "
1657 "over heated. Restart the computer. If the problem "
Emil Tantilov849c4542010-06-03 16:53:41 +00001658 "persists, power off the system and replace the "
1659 "adapter\n");
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001660 /* write to clear the interrupt */
1661 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0);
1662 }
1663}
1664
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07001665static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
1666{
1667 struct ixgbe_hw *hw = &adapter->hw;
1668
1669 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
1670 (eicr & IXGBE_EICR_GPI_SDP1)) {
Emil Tantilov396e7992010-07-01 20:05:12 +00001671 e_crit(probe, "Fan has stopped, replace the adapter\n");
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07001672 /* write to clear the interrupt */
1673 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1674 }
1675}
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001676
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001677static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
1678{
1679 struct ixgbe_hw *hw = &adapter->hw;
1680
1681 if (eicr & IXGBE_EICR_GPI_SDP1) {
1682 /* Clear the interrupt */
1683 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1684 schedule_work(&adapter->multispeed_fiber_task);
1685 } else if (eicr & IXGBE_EICR_GPI_SDP2) {
1686 /* Clear the interrupt */
1687 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
1688 schedule_work(&adapter->sfp_config_module_task);
1689 } else {
1690 /* Interrupt isn't for us... */
1691 return;
1692 }
1693}
1694
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001695static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
1696{
1697 struct ixgbe_hw *hw = &adapter->hw;
1698
1699 adapter->lsc_int++;
1700 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1701 adapter->link_check_timeout = jiffies;
1702 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1703 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
Nelson, Shannon8a0717f2009-11-12 18:47:11 +00001704 IXGBE_WRITE_FLUSH(hw);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001705 schedule_work(&adapter->watchdog_task);
1706 }
1707}
1708
Auke Kok9a799d72007-09-15 14:07:45 -07001709static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
1710{
1711 struct net_device *netdev = data;
1712 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1713 struct ixgbe_hw *hw = &adapter->hw;
Don Skidmore54037502009-02-21 15:42:56 -08001714 u32 eicr;
1715
1716 /*
1717 * Workaround for Silicon errata. Use clear-by-write instead
1718 * of clear-by-read. Reading with EICS will return the
1719 * interrupt causes without clearing, which later be done
1720 * with the write to EICR.
1721 */
1722 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
1723 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
Auke Kok9a799d72007-09-15 14:07:45 -07001724
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001725 if (eicr & IXGBE_EICR_LSC)
1726 ixgbe_check_lsc(adapter);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08001727
Greg Rose1cdd1ec2010-01-09 02:26:46 +00001728 if (eicr & IXGBE_EICR_MAILBOX)
1729 ixgbe_msg_task(adapter);
1730
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001731 if (hw->mac.type == ixgbe_mac_82598EB)
1732 ixgbe_check_fan_failure(adapter, eicr);
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07001733
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001734 if (hw->mac.type == ixgbe_mac_82599EB) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001735 ixgbe_check_sfp_event(adapter, eicr);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001736 adapter->interrupt_event = eicr;
1737 if ((adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
1738 ((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)))
1739 schedule_work(&adapter->check_overtemp_task);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001740
1741 /* Handle Flow Director Full threshold interrupt */
1742 if (eicr & IXGBE_EICR_FLOW_DIR) {
1743 int i;
1744 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_FLOW_DIR);
1745 /* Disable transmits before FDIR Re-initialization */
1746 netif_tx_stop_all_queues(netdev);
1747 for (i = 0; i < adapter->num_tx_queues; i++) {
1748 struct ixgbe_ring *tx_ring =
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001749 adapter->tx_ring[i];
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001750 if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE,
1751 &tx_ring->reinit_state))
1752 schedule_work(&adapter->fdir_reinit_task);
1753 }
1754 }
1755 }
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08001756 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1757 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
Auke Kok9a799d72007-09-15 14:07:45 -07001758
1759 return IRQ_HANDLED;
1760}
1761
Alexander Duyckfe49f042009-06-04 16:00:09 +00001762static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
1763 u64 qmask)
1764{
1765 u32 mask;
1766
1767 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1768 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
1769 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1770 } else {
1771 mask = (qmask & 0xFFFFFFFF);
1772 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(0), mask);
1773 mask = (qmask >> 32);
1774 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1), mask);
1775 }
1776 /* skip the flush */
1777}
1778
1779static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
1780 u64 qmask)
1781{
1782 u32 mask;
1783
1784 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1785 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
1786 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, mask);
1787 } else {
1788 mask = (qmask & 0xFFFFFFFF);
1789 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), mask);
1790 mask = (qmask >> 32);
1791 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), mask);
1792 }
1793 /* skip the flush */
1794}
1795
Auke Kok9a799d72007-09-15 14:07:45 -07001796static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
1797{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001798 struct ixgbe_q_vector *q_vector = data;
1799 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001800 struct ixgbe_ring *tx_ring;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001801 int i, r_idx;
Auke Kok9a799d72007-09-15 14:07:45 -07001802
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001803 if (!q_vector->txr_count)
1804 return IRQ_HANDLED;
1805
1806 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1807 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001808 tx_ring = adapter->tx_ring[r_idx];
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001809 tx_ring->total_bytes = 0;
1810 tx_ring->total_packets = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001811 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001812 r_idx + 1);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001813 }
1814
Jesse Brandeburg9b471442009-12-03 11:33:54 +00001815 /* EIAM disabled interrupts (on this vector) for us */
Alexander Duyck91281fd2009-06-04 16:00:27 +00001816 napi_schedule(&q_vector->napi);
1817
Auke Kok9a799d72007-09-15 14:07:45 -07001818 return IRQ_HANDLED;
1819}
1820
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001821/**
1822 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1823 * @irq: unused
1824 * @data: pointer to our q_vector struct for this interrupt vector
1825 **/
Auke Kok9a799d72007-09-15 14:07:45 -07001826static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
1827{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001828 struct ixgbe_q_vector *q_vector = data;
1829 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001830 struct ixgbe_ring *rx_ring;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001831 int r_idx;
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001832 int i;
Auke Kok9a799d72007-09-15 14:07:45 -07001833
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001834 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001835 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001836 rx_ring = adapter->rx_ring[r_idx];
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001837 rx_ring->total_bytes = 0;
1838 rx_ring->total_packets = 0;
1839 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1840 r_idx + 1);
1841 }
1842
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001843 if (!q_vector->rxr_count)
1844 return IRQ_HANDLED;
1845
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001846 /* disable interrupts on this vector only */
Jesse Brandeburg9b471442009-12-03 11:33:54 +00001847 /* EIAM disabled interrupts (on this vector) for us */
Ben Hutchings288379f2009-01-19 16:43:59 -08001848 napi_schedule(&q_vector->napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001849
Auke Kok9a799d72007-09-15 14:07:45 -07001850 return IRQ_HANDLED;
1851}
1852
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001853static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1854{
Alexander Duyck91281fd2009-06-04 16:00:27 +00001855 struct ixgbe_q_vector *q_vector = data;
1856 struct ixgbe_adapter *adapter = q_vector->adapter;
1857 struct ixgbe_ring *ring;
1858 int r_idx;
1859 int i;
1860
1861 if (!q_vector->txr_count && !q_vector->rxr_count)
1862 return IRQ_HANDLED;
1863
1864 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1865 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001866 ring = adapter->tx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001867 ring->total_bytes = 0;
1868 ring->total_packets = 0;
1869 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1870 r_idx + 1);
1871 }
1872
1873 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1874 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001875 ring = adapter->rx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001876 ring->total_bytes = 0;
1877 ring->total_packets = 0;
1878 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1879 r_idx + 1);
1880 }
1881
Jesse Brandeburg9b471442009-12-03 11:33:54 +00001882 /* EIAM disabled interrupts (on this vector) for us */
Alexander Duyck91281fd2009-06-04 16:00:27 +00001883 napi_schedule(&q_vector->napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001884
1885 return IRQ_HANDLED;
1886}
1887
1888/**
1889 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1890 * @napi: napi struct with our devices info in it
1891 * @budget: amount of work driver is allowed to do this pass, in packets
1892 *
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001893 * This function is optimized for cleaning one queue only on a single
1894 * q_vector!!!
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001895 **/
Auke Kok9a799d72007-09-15 14:07:45 -07001896static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1897{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001898 struct ixgbe_q_vector *q_vector =
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001899 container_of(napi, struct ixgbe_q_vector, napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001900 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001901 struct ixgbe_ring *rx_ring = NULL;
Auke Kok9a799d72007-09-15 14:07:45 -07001902 int work_done = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001903 long r_idx;
Auke Kok9a799d72007-09-15 14:07:45 -07001904
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001905 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001906 rx_ring = adapter->rx_ring[r_idx];
Jeff Garzik5dd2d332008-10-16 05:09:31 -04001907#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08001908 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001909 ixgbe_update_rx_dca(adapter, rx_ring);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08001910#endif
Auke Kok9a799d72007-09-15 14:07:45 -07001911
Herbert Xu78b6f4c2009-01-18 21:49:45 -08001912 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
Auke Kok9a799d72007-09-15 14:07:45 -07001913
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001914 /* If all Rx work done, exit the polling mode */
1915 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08001916 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001917 if (adapter->rx_itr_setting & 1)
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001918 ixgbe_set_itr_msix(q_vector);
Auke Kok9a799d72007-09-15 14:07:45 -07001919 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Alexander Duyckfe49f042009-06-04 16:00:09 +00001920 ixgbe_irq_enable_queues(adapter,
1921 ((u64)1 << q_vector->v_idx));
Auke Kok9a799d72007-09-15 14:07:45 -07001922 }
1923
1924 return work_done;
1925}
1926
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001927/**
Alexander Duyck91281fd2009-06-04 16:00:27 +00001928 * ixgbe_clean_rxtx_many - msix (aka one shot) rx clean routine
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001929 * @napi: napi struct with our devices info in it
1930 * @budget: amount of work driver is allowed to do this pass, in packets
1931 *
1932 * This function will clean more than one rx queue associated with a
1933 * q_vector.
1934 **/
Alexander Duyck91281fd2009-06-04 16:00:27 +00001935static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget)
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001936{
1937 struct ixgbe_q_vector *q_vector =
1938 container_of(napi, struct ixgbe_q_vector, napi);
1939 struct ixgbe_adapter *adapter = q_vector->adapter;
Alexander Duyck91281fd2009-06-04 16:00:27 +00001940 struct ixgbe_ring *ring = NULL;
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001941 int work_done = 0, i;
1942 long r_idx;
Alexander Duyck91281fd2009-06-04 16:00:27 +00001943 bool tx_clean_complete = true;
1944
1945 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1946 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001947 ring = adapter->tx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001948#ifdef CONFIG_IXGBE_DCA
1949 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1950 ixgbe_update_tx_dca(adapter, ring);
1951#endif
1952 tx_clean_complete &= ixgbe_clean_tx_irq(q_vector, ring);
1953 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1954 r_idx + 1);
1955 }
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001956
1957 /* attempt to distribute budget to each queue fairly, but don't allow
1958 * the budget to go below 1 because we'll exit polling */
1959 budget /= (q_vector->rxr_count ?: 1);
1960 budget = max(budget, 1);
1961 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1962 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001963 ring = adapter->rx_ring[r_idx];
Jeff Garzik5dd2d332008-10-16 05:09:31 -04001964#ifdef CONFIG_IXGBE_DCA
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001965 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
Alexander Duyck91281fd2009-06-04 16:00:27 +00001966 ixgbe_update_rx_dca(adapter, ring);
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001967#endif
Alexander Duyck91281fd2009-06-04 16:00:27 +00001968 ixgbe_clean_rx_irq(q_vector, ring, &work_done, budget);
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001969 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1970 r_idx + 1);
1971 }
1972
1973 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001974 ring = adapter->rx_ring[r_idx];
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001975 /* If all Rx work done, exit the polling mode */
Jesse Brandeburg7f821872008-09-11 20:00:16 -07001976 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08001977 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001978 if (adapter->rx_itr_setting & 1)
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001979 ixgbe_set_itr_msix(q_vector);
1980 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Alexander Duyckfe49f042009-06-04 16:00:09 +00001981 ixgbe_irq_enable_queues(adapter,
1982 ((u64)1 << q_vector->v_idx));
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001983 return 0;
1984 }
1985
1986 return work_done;
1987}
Alexander Duyck91281fd2009-06-04 16:00:27 +00001988
1989/**
1990 * ixgbe_clean_txonly - msix (aka one shot) tx clean routine
1991 * @napi: napi struct with our devices info in it
1992 * @budget: amount of work driver is allowed to do this pass, in packets
1993 *
1994 * This function is optimized for cleaning one queue only on a single
1995 * q_vector!!!
1996 **/
1997static int ixgbe_clean_txonly(struct napi_struct *napi, int budget)
1998{
1999 struct ixgbe_q_vector *q_vector =
2000 container_of(napi, struct ixgbe_q_vector, napi);
2001 struct ixgbe_adapter *adapter = q_vector->adapter;
2002 struct ixgbe_ring *tx_ring = NULL;
2003 int work_done = 0;
2004 long r_idx;
2005
2006 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002007 tx_ring = adapter->tx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00002008#ifdef CONFIG_IXGBE_DCA
2009 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2010 ixgbe_update_tx_dca(adapter, tx_ring);
2011#endif
2012
2013 if (!ixgbe_clean_tx_irq(q_vector, tx_ring))
2014 work_done = budget;
2015
Nelson, Shannonf7554a22009-09-18 09:46:06 +00002016 /* If all Tx work done, exit the polling mode */
Alexander Duyck91281fd2009-06-04 16:00:27 +00002017 if (work_done < budget) {
2018 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00002019 if (adapter->tx_itr_setting & 1)
Alexander Duyck91281fd2009-06-04 16:00:27 +00002020 ixgbe_set_itr_msix(q_vector);
2021 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2022 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2023 }
2024
2025 return work_done;
2026}
2027
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002028static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07002029 int r_idx)
Auke Kok9a799d72007-09-15 14:07:45 -07002030{
Alexander Duyck7a921c92009-05-06 10:43:28 +00002031 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
2032
2033 set_bit(r_idx, q_vector->rxr_idx);
2034 q_vector->rxr_count++;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002035}
Auke Kok9a799d72007-09-15 14:07:45 -07002036
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002037static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
Alexander Duyck7a921c92009-05-06 10:43:28 +00002038 int t_idx)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002039{
Alexander Duyck7a921c92009-05-06 10:43:28 +00002040 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
2041
2042 set_bit(t_idx, q_vector->txr_idx);
2043 q_vector->txr_count++;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002044}
Auke Kok9a799d72007-09-15 14:07:45 -07002045
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002046/**
2047 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
2048 * @adapter: board private structure to initialize
2049 * @vectors: allotted vector count for descriptor rings
2050 *
2051 * This function maps descriptor rings to the queue-specific vectors
2052 * we were allotted through the MSI-X enabling code. Ideally, we'd have
2053 * one vector per ring/queue, but on a constrained vector budget, we
2054 * group the rings as "efficiently" as possible. You would add new
2055 * mapping configurations in here.
2056 **/
2057static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07002058 int vectors)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002059{
2060 int v_start = 0;
2061 int rxr_idx = 0, txr_idx = 0;
2062 int rxr_remaining = adapter->num_rx_queues;
2063 int txr_remaining = adapter->num_tx_queues;
2064 int i, j;
2065 int rqpv, tqpv;
2066 int err = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07002067
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002068 /* No mapping required if MSI-X is disabled. */
2069 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
Auke Kok9a799d72007-09-15 14:07:45 -07002070 goto out;
2071
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002072 /*
2073 * The ideal configuration...
2074 * We have enough vectors to map one per queue.
2075 */
2076 if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
2077 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
2078 map_vector_to_rxq(adapter, v_start, rxr_idx);
2079
2080 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
2081 map_vector_to_txq(adapter, v_start, txr_idx);
2082
2083 goto out;
2084 }
2085
2086 /*
2087 * If we don't have enough vectors for a 1-to-1
2088 * mapping, we'll have to group them so there are
2089 * multiple queues per vector.
2090 */
2091 /* Re-adjusting *qpv takes care of the remainder. */
2092 for (i = v_start; i < vectors; i++) {
2093 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
2094 for (j = 0; j < rqpv; j++) {
2095 map_vector_to_rxq(adapter, i, rxr_idx);
2096 rxr_idx++;
2097 rxr_remaining--;
Auke Kok9a799d72007-09-15 14:07:45 -07002098 }
Auke Kok9a799d72007-09-15 14:07:45 -07002099 }
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002100 for (i = v_start; i < vectors; i++) {
2101 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
2102 for (j = 0; j < tqpv; j++) {
2103 map_vector_to_txq(adapter, i, txr_idx);
2104 txr_idx++;
2105 txr_remaining--;
Auke Kok9a799d72007-09-15 14:07:45 -07002106 }
Auke Kok9a799d72007-09-15 14:07:45 -07002107 }
2108
Auke Kok9a799d72007-09-15 14:07:45 -07002109out:
Auke Kok9a799d72007-09-15 14:07:45 -07002110 return err;
2111}
2112
2113/**
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002114 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2115 * @adapter: board private structure
2116 *
2117 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2118 * interrupts from the kernel.
2119 **/
2120static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2121{
2122 struct net_device *netdev = adapter->netdev;
2123 irqreturn_t (*handler)(int, void *);
2124 int i, vector, q_vectors, err;
Robert Olssoncb13fc22008-11-25 16:43:52 -08002125 int ri=0, ti=0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002126
2127 /* Decrement for Other and TCP Timer vectors */
2128 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2129
2130 /* Map the Tx/Rx rings to the vectors we were allotted. */
2131 err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
2132 if (err)
2133 goto out;
2134
2135#define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07002136 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
2137 &ixgbe_msix_clean_many)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002138 for (vector = 0; vector < q_vectors; vector++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00002139 handler = SET_HANDLER(adapter->q_vector[vector]);
Robert Olssoncb13fc22008-11-25 16:43:52 -08002140
2141 if(handler == &ixgbe_msix_clean_rx) {
2142 sprintf(adapter->name[vector], "%s-%s-%d",
2143 netdev->name, "rx", ri++);
2144 }
2145 else if(handler == &ixgbe_msix_clean_tx) {
2146 sprintf(adapter->name[vector], "%s-%s-%d",
2147 netdev->name, "tx", ti++);
2148 }
2149 else
2150 sprintf(adapter->name[vector], "%s-%s-%d",
2151 netdev->name, "TxRx", vector);
2152
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002153 err = request_irq(adapter->msix_entries[vector].vector,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07002154 handler, 0, adapter->name[vector],
Alexander Duyck7a921c92009-05-06 10:43:28 +00002155 adapter->q_vector[vector]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002156 if (err) {
Emil Tantilov396e7992010-07-01 20:05:12 +00002157 e_err(probe, "request_irq failed for MSIX interrupt "
Emil Tantilov849c4542010-06-03 16:53:41 +00002158 "Error: %d\n", err);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002159 goto free_queue_irqs;
2160 }
2161 }
2162
2163 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
2164 err = request_irq(adapter->msix_entries[vector].vector,
Joe Perchesa0607fd2009-11-18 23:29:17 -08002165 ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002166 if (err) {
Emil Tantilov396e7992010-07-01 20:05:12 +00002167 e_err(probe, "request_irq for msix_lsc failed: %d\n", err);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002168 goto free_queue_irqs;
2169 }
2170
2171 return 0;
2172
2173free_queue_irqs:
2174 for (i = vector - 1; i >= 0; i--)
2175 free_irq(adapter->msix_entries[--vector].vector,
Alexander Duyck7a921c92009-05-06 10:43:28 +00002176 adapter->q_vector[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002177 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2178 pci_disable_msix(adapter->pdev);
2179 kfree(adapter->msix_entries);
2180 adapter->msix_entries = NULL;
2181out:
2182 return err;
2183}
2184
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002185static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
2186{
Alexander Duyck7a921c92009-05-06 10:43:28 +00002187 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002188 u8 current_itr;
2189 u32 new_itr = q_vector->eitr;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002190 struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
2191 struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002192
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07002193 q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07002194 q_vector->tx_itr,
2195 tx_ring->total_packets,
2196 tx_ring->total_bytes);
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07002197 q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07002198 q_vector->rx_itr,
2199 rx_ring->total_packets,
2200 rx_ring->total_bytes);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002201
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07002202 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002203
2204 switch (current_itr) {
2205 /* counts and packets in update_itr are dependent on these numbers */
2206 case lowest_latency:
2207 new_itr = 100000;
2208 break;
2209 case low_latency:
2210 new_itr = 20000; /* aka hwitr = ~200 */
2211 break;
2212 case bulk_latency:
2213 new_itr = 8000;
2214 break;
2215 default:
2216 break;
2217 }
2218
2219 if (new_itr != q_vector->eitr) {
Alexander Duyckfe49f042009-06-04 16:00:09 +00002220 /* do an exponential smoothing */
2221 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
Jesse Brandeburg509ee932009-03-13 22:13:28 +00002222
2223 /* save the algorithm value here, not the smoothed one */
2224 q_vector->eitr = new_itr;
Alexander Duyckfe49f042009-06-04 16:00:09 +00002225
2226 ixgbe_write_eitr(q_vector);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002227 }
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002228}
2229
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002230/**
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002231 * ixgbe_irq_enable - Enable default interrupt generation settings
2232 * @adapter: board private structure
2233 **/
2234static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
2235{
2236 u32 mask;
Nelson, Shannon835462f2009-04-27 22:42:54 +00002237
2238 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07002239 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2240 mask |= IXGBE_EIMS_GPI_SDP0;
David S. Miller6ab33d52008-11-20 16:44:00 -08002241 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2242 mask |= IXGBE_EIMS_GPI_SDP1;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002243 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002244 mask |= IXGBE_EIMS_ECC;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002245 mask |= IXGBE_EIMS_GPI_SDP1;
2246 mask |= IXGBE_EIMS_GPI_SDP2;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002247 if (adapter->num_vfs)
2248 mask |= IXGBE_EIMS_MAILBOX;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002249 }
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00002250 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
2251 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
2252 mask |= IXGBE_EIMS_FLOW_DIR;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002253
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002254 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
Nelson, Shannon835462f2009-04-27 22:42:54 +00002255 ixgbe_irq_enable_queues(adapter, ~0);
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002256 IXGBE_WRITE_FLUSH(&adapter->hw);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002257
2258 if (adapter->num_vfs > 32) {
2259 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2260 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2261 }
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002262}
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002263
2264/**
2265 * ixgbe_intr - legacy mode Interrupt Handler
Auke Kok9a799d72007-09-15 14:07:45 -07002266 * @irq: interrupt number
2267 * @data: pointer to a network interface device structure
Auke Kok9a799d72007-09-15 14:07:45 -07002268 **/
2269static irqreturn_t ixgbe_intr(int irq, void *data)
2270{
2271 struct net_device *netdev = data;
2272 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2273 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck7a921c92009-05-06 10:43:28 +00002274 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
Auke Kok9a799d72007-09-15 14:07:45 -07002275 u32 eicr;
2276
Don Skidmore54037502009-02-21 15:42:56 -08002277 /*
2278 * Workaround for silicon errata. Mask the interrupts
2279 * before the read of EICR.
2280 */
2281 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2282
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002283 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2284 * therefore no explict interrupt disable is necessary */
2285 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
Jesse Brandeburgf47cf662008-09-11 19:56:14 -07002286 if (!eicr) {
2287 /* shared interrupt alert!
2288 * make sure interrupts are enabled because the read will
2289 * have disabled interrupts due to EIAM */
2290 ixgbe_irq_enable(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07002291 return IRQ_NONE; /* Not our interrupt */
Jesse Brandeburgf47cf662008-09-11 19:56:14 -07002292 }
Auke Kok9a799d72007-09-15 14:07:45 -07002293
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07002294 if (eicr & IXGBE_EICR_LSC)
2295 ixgbe_check_lsc(adapter);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002296
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002297 if (hw->mac.type == ixgbe_mac_82599EB)
2298 ixgbe_check_sfp_event(adapter, eicr);
2299
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07002300 ixgbe_check_fan_failure(adapter, eicr);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07002301 if ((adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2302 ((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)))
2303 schedule_work(&adapter->check_overtemp_task);
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07002304
Alexander Duyck7a921c92009-05-06 10:43:28 +00002305 if (napi_schedule_prep(&(q_vector->napi))) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002306 adapter->tx_ring[0]->total_packets = 0;
2307 adapter->tx_ring[0]->total_bytes = 0;
2308 adapter->rx_ring[0]->total_packets = 0;
2309 adapter->rx_ring[0]->total_bytes = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002310 /* would disable interrupts here but EIAM disabled it */
Alexander Duyck7a921c92009-05-06 10:43:28 +00002311 __napi_schedule(&(q_vector->napi));
Auke Kok9a799d72007-09-15 14:07:45 -07002312 }
2313
2314 return IRQ_HANDLED;
2315}
2316
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002317static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
2318{
2319 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2320
2321 for (i = 0; i < q_vectors; i++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00002322 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002323 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
2324 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
2325 q_vector->rxr_count = 0;
2326 q_vector->txr_count = 0;
2327 }
2328}
2329
Auke Kok9a799d72007-09-15 14:07:45 -07002330/**
2331 * ixgbe_request_irq - initialize interrupts
2332 * @adapter: board private structure
2333 *
2334 * Attempts to configure interrupts using the best available
2335 * capabilities of the hardware and kernel.
2336 **/
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002337static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
Auke Kok9a799d72007-09-15 14:07:45 -07002338{
2339 struct net_device *netdev = adapter->netdev;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002340 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07002341
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002342 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2343 err = ixgbe_request_msix_irqs(adapter);
2344 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
Joe Perchesa0607fd2009-11-18 23:29:17 -08002345 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07002346 netdev->name, netdev);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002347 } else {
Joe Perchesa0607fd2009-11-18 23:29:17 -08002348 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07002349 netdev->name, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07002350 }
2351
Auke Kok9a799d72007-09-15 14:07:45 -07002352 if (err)
Emil Tantilov396e7992010-07-01 20:05:12 +00002353 e_err(probe, "request_irq failed, Error %d\n", err);
Auke Kok9a799d72007-09-15 14:07:45 -07002354
Auke Kok9a799d72007-09-15 14:07:45 -07002355 return err;
2356}
2357
2358static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2359{
2360 struct net_device *netdev = adapter->netdev;
2361
2362 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002363 int i, q_vectors;
Auke Kok9a799d72007-09-15 14:07:45 -07002364
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002365 q_vectors = adapter->num_msix_vectors;
2366
2367 i = q_vectors - 1;
Auke Kok9a799d72007-09-15 14:07:45 -07002368 free_irq(adapter->msix_entries[i].vector, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07002369
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002370 i--;
2371 for (; i >= 0; i--) {
2372 free_irq(adapter->msix_entries[i].vector,
Alexander Duyck7a921c92009-05-06 10:43:28 +00002373 adapter->q_vector[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002374 }
2375
2376 ixgbe_reset_q_vectors(adapter);
2377 } else {
2378 free_irq(adapter->pdev->irq, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07002379 }
2380}
2381
2382/**
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00002383 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2384 * @adapter: board private structure
2385 **/
2386static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2387{
Nelson, Shannon835462f2009-04-27 22:42:54 +00002388 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2389 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2390 } else {
2391 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2392 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00002393 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002394 if (adapter->num_vfs > 32)
2395 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00002396 }
2397 IXGBE_WRITE_FLUSH(&adapter->hw);
2398 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2399 int i;
2400 for (i = 0; i < adapter->num_msix_vectors; i++)
2401 synchronize_irq(adapter->msix_entries[i].vector);
2402 } else {
2403 synchronize_irq(adapter->pdev->irq);
2404 }
2405}
2406
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00002407/**
Auke Kok9a799d72007-09-15 14:07:45 -07002408 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2409 *
2410 **/
2411static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2412{
Auke Kok9a799d72007-09-15 14:07:45 -07002413 struct ixgbe_hw *hw = &adapter->hw;
2414
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002415 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
Nelson, Shannonf7554a22009-09-18 09:46:06 +00002416 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr_param));
Auke Kok9a799d72007-09-15 14:07:45 -07002417
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002418 ixgbe_set_ivar(adapter, 0, 0, 0);
2419 ixgbe_set_ivar(adapter, 1, 0, 0);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002420
2421 map_vector_to_rxq(adapter, 0, 0);
2422 map_vector_to_txq(adapter, 0, 0);
2423
Emil Tantilov396e7992010-07-01 20:05:12 +00002424 e_info(hw, "Legacy interrupt IVAR setup done\n");
Auke Kok9a799d72007-09-15 14:07:45 -07002425}
2426
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002427/**
2428 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2429 * @adapter: board private structure
2430 * @ring: structure containing ring specific data
2431 *
2432 * Configure the Tx descriptor ring after a reset.
2433 **/
2434 static void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2435 struct ixgbe_ring *ring)
2436{
2437 struct ixgbe_hw *hw = &adapter->hw;
2438 u64 tdba = ring->dma;
2439 u16 reg_idx = ring->reg_idx;
2440
2441 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2442 (tdba & DMA_BIT_MASK(32)));
2443 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2444 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2445 ring->count * sizeof(union ixgbe_adv_tx_desc));
2446 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2447 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2448 ring->head = IXGBE_TDH(reg_idx);
2449 ring->tail = IXGBE_TDT(reg_idx);
2450
2451}
2452
Alexander Duyck120ff942010-08-19 13:34:50 +00002453static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
2454{
2455 struct ixgbe_hw *hw = &adapter->hw;
2456 u32 rttdcs;
2457 u32 mask;
2458
2459 if (hw->mac.type == ixgbe_mac_82598EB)
2460 return;
2461
2462 /* disable the arbiter while setting MTQC */
2463 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2464 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2465 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2466
2467 /* set transmit pool layout */
2468 mask = (IXGBE_FLAG_SRIOV_ENABLED | IXGBE_FLAG_DCB_ENABLED);
2469 switch (adapter->flags & mask) {
2470
2471 case (IXGBE_FLAG_SRIOV_ENABLED):
2472 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2473 (IXGBE_MTQC_VT_ENA | IXGBE_MTQC_64VF));
2474 break;
2475
2476 case (IXGBE_FLAG_DCB_ENABLED):
2477 /* We enable 8 traffic classes, DCB only */
2478 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2479 (IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ));
2480 break;
2481
2482 default:
2483 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB);
2484 break;
2485 }
2486
2487 /* re-enable the arbiter */
2488 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2489 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2490}
2491
Auke Kok9a799d72007-09-15 14:07:45 -07002492/**
Jesse Brandeburg3a581072008-08-26 04:27:08 -07002493 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
Auke Kok9a799d72007-09-15 14:07:45 -07002494 * @adapter: board private structure
2495 *
2496 * Configure the Tx unit of the MAC after a reset.
2497 **/
2498static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2499{
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002500 u32 i;
Auke Kok9a799d72007-09-15 14:07:45 -07002501
2502 /* Setup the HW Tx Head and Tail descriptor pointers */
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002503 for (i = 0; i < adapter->num_tx_queues; i++)
2504 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
Don Skidmoreee5f7842009-11-06 12:56:20 +00002505
Alexander Duyck120ff942010-08-19 13:34:50 +00002506 ixgbe_setup_mtqc(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07002507}
2508
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002509#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
Auke Kok9a799d72007-09-15 14:07:45 -07002510
Yi Zoua6616b42009-08-06 13:05:23 +00002511static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
2512 struct ixgbe_ring *rx_ring)
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002513{
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002514 u32 srrctl;
Yi Zoua6616b42009-08-06 13:05:23 +00002515 int index;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002516 struct ixgbe_ring_feature *feature = adapter->ring_feature;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002517
Yi Zoua6616b42009-08-06 13:05:23 +00002518 index = rx_ring->reg_idx;
2519 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2520 unsigned long mask;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002521 mask = (unsigned long) feature[RING_F_RSS].mask;
Alexander Duyck3be1adf2008-08-30 00:29:10 -07002522 index = index & mask;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002523 }
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002524 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
2525
2526 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
2527 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
2528
Alexander Duyckafafd5b2009-05-07 10:38:56 +00002529 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
2530 IXGBE_SRRCTL_BSIZEHDR_MASK;
2531
Yi Zou6e455b892009-08-06 13:05:44 +00002532 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Alexander Duyckafafd5b2009-05-07 10:38:56 +00002533#if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
2534 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2535#else
2536 srrctl |= (PAGE_SIZE / 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2537#endif
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002538 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002539 } else {
Alexander Duyckafafd5b2009-05-07 10:38:56 +00002540 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
2541 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002542 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002543 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002544
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002545 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
2546}
2547
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002548static u32 ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
2549{
2550 u32 mrqc = 0;
2551 int mask;
2552
2553 if (!(adapter->hw.mac.type == ixgbe_mac_82599EB))
2554 return mrqc;
2555
2556 mask = adapter->flags & (IXGBE_FLAG_RSS_ENABLED
2557#ifdef CONFIG_IXGBE_DCB
2558 | IXGBE_FLAG_DCB_ENABLED
2559#endif
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002560 | IXGBE_FLAG_SRIOV_ENABLED
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002561 );
2562
2563 switch (mask) {
2564 case (IXGBE_FLAG_RSS_ENABLED):
2565 mrqc = IXGBE_MRQC_RSSEN;
2566 break;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002567 case (IXGBE_FLAG_SRIOV_ENABLED):
2568 mrqc = IXGBE_MRQC_VMDQEN;
2569 break;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002570#ifdef CONFIG_IXGBE_DCB
2571 case (IXGBE_FLAG_DCB_ENABLED):
2572 mrqc = IXGBE_MRQC_RT8TCEN;
2573 break;
2574#endif /* CONFIG_IXGBE_DCB */
2575 default:
2576 break;
2577 }
2578
2579 return mrqc;
2580}
2581
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07002582/**
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002583 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2584 * @adapter: address of board private structure
2585 * @index: index of ring to set
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002586 **/
Mallikarjuna R Chilakalaedd2ea52009-11-23 10:45:11 -08002587static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, int index)
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002588{
2589 struct ixgbe_ring *rx_ring;
2590 struct ixgbe_hw *hw = &adapter->hw;
2591 int j;
2592 u32 rscctrl;
Mallikarjuna R Chilakalaedd2ea52009-11-23 10:45:11 -08002593 int rx_buf_len;
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002594
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002595 rx_ring = adapter->rx_ring[index];
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002596 j = rx_ring->reg_idx;
Mallikarjuna R Chilakalaedd2ea52009-11-23 10:45:11 -08002597 rx_buf_len = rx_ring->rx_buf_len;
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002598 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(j));
2599 rscctrl |= IXGBE_RSCCTL_RSCEN;
2600 /*
2601 * we must limit the number of descriptors so that the
2602 * total size of max desc * buf_len is not greater
2603 * than 65535
2604 */
2605 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
2606#if (MAX_SKB_FRAGS > 16)
2607 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2608#elif (MAX_SKB_FRAGS > 8)
2609 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2610#elif (MAX_SKB_FRAGS > 4)
2611 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2612#else
2613 rscctrl |= IXGBE_RSCCTL_MAXDESC_1;
2614#endif
2615 } else {
2616 if (rx_buf_len < IXGBE_RXBUFFER_4096)
2617 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2618 else if (rx_buf_len < IXGBE_RXBUFFER_8192)
2619 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2620 else
2621 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2622 }
2623 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(j), rscctrl);
2624}
2625
2626/**
Jesse Brandeburg3a581072008-08-26 04:27:08 -07002627 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
Auke Kok9a799d72007-09-15 14:07:45 -07002628 * @adapter: board private structure
2629 *
2630 * Configure the Rx unit of the MAC after a reset.
2631 **/
2632static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2633{
2634 u64 rdba;
2635 struct ixgbe_hw *hw = &adapter->hw;
Yi Zoua6616b42009-08-06 13:05:23 +00002636 struct ixgbe_ring *rx_ring;
Auke Kok9a799d72007-09-15 14:07:45 -07002637 struct net_device *netdev = adapter->netdev;
2638 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002639 int i, j;
Auke Kok9a799d72007-09-15 14:07:45 -07002640 u32 rdlen, rxctrl, rxcsum;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002641 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2642 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2643 0x6A3E67EA, 0x14364D17, 0x3BED200D};
Auke Kok9a799d72007-09-15 14:07:45 -07002644 u32 fctrl, hlreg0;
Jesse Brandeburg509ee932009-03-13 22:13:28 +00002645 u32 reta = 0, mrqc = 0;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002646 u32 rdrxctl;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002647 int rx_buf_len;
Auke Kok9a799d72007-09-15 14:07:45 -07002648
2649 /* Decide whether to use packet split mode or not */
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002650 /* Do not use packet split if we're in SR-IOV Mode */
2651 if (!adapter->num_vfs)
2652 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
Auke Kok9a799d72007-09-15 14:07:45 -07002653
2654 /* Set the RX buffer length according to the mode */
2655 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002656 rx_buf_len = IXGBE_RX_HDR_SIZE;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002657 if (hw->mac.type == ixgbe_mac_82599EB) {
2658 /* PSRTYPE must be initialized in 82599 */
2659 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
2660 IXGBE_PSRTYPE_UDPHDR |
2661 IXGBE_PSRTYPE_IPV4HDR |
Yi Zoudfa12f02009-05-07 10:39:35 +00002662 IXGBE_PSRTYPE_IPV6HDR |
2663 IXGBE_PSRTYPE_L2HDR;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002664 IXGBE_WRITE_REG(hw,
2665 IXGBE_PSRTYPE(adapter->num_vfs),
2666 psrtype);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002667 }
Auke Kok9a799d72007-09-15 14:07:45 -07002668 } else {
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00002669 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
Alexander Duyckf8212f92009-04-27 22:42:37 +00002670 (netdev->mtu <= ETH_DATA_LEN))
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002671 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
Auke Kok9a799d72007-09-15 14:07:45 -07002672 else
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002673 rx_buf_len = ALIGN(max_frame, 1024);
Auke Kok9a799d72007-09-15 14:07:45 -07002674 }
2675
2676 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2677 fctrl |= IXGBE_FCTRL_BAM;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002678 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002679 fctrl |= IXGBE_FCTRL_PMCF;
Auke Kok9a799d72007-09-15 14:07:45 -07002680 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
2681
2682 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
2683 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2684 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
2685 else
2686 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
Yi Zou63f39bd2009-05-17 12:34:35 +00002687#ifdef IXGBE_FCOE
Yi Zouf34c5c82009-08-14 12:42:17 +00002688 if (netdev->features & NETIF_F_FCOE_MTU)
Yi Zou63f39bd2009-05-17 12:34:35 +00002689 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
2690#endif
Auke Kok9a799d72007-09-15 14:07:45 -07002691 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
2692
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002693 rdlen = adapter->rx_ring[0]->count * sizeof(union ixgbe_adv_rx_desc);
Auke Kok9a799d72007-09-15 14:07:45 -07002694 /* disable receives while setting up the descriptors */
2695 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2696 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2697
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002698 /*
2699 * Setup the HW Rx Head and Tail Descriptor Pointers and
2700 * the Base and Length of the Rx Descriptor Ring
2701 */
Auke Kok9a799d72007-09-15 14:07:45 -07002702 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002703 rx_ring = adapter->rx_ring[i];
Yi Zoua6616b42009-08-06 13:05:23 +00002704 rdba = rx_ring->dma;
2705 j = rx_ring->reg_idx;
Yang Hongyang284901a2009-04-06 19:01:15 -07002706 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_BIT_MASK(32)));
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002707 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
2708 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
2709 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
2710 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
Yi Zoua6616b42009-08-06 13:05:23 +00002711 rx_ring->head = IXGBE_RDH(j);
2712 rx_ring->tail = IXGBE_RDT(j);
2713 rx_ring->rx_buf_len = rx_buf_len;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002714
Yi Zou6e455b892009-08-06 13:05:44 +00002715 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)
2716 rx_ring->flags |= IXGBE_RING_RX_PS_ENABLED;
Peter P Waskiewicz Jr1b3ff022009-09-14 07:47:27 +00002717 else
2718 rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002719
Yi Zou63f39bd2009-05-17 12:34:35 +00002720#ifdef IXGBE_FCOE
Yi Zouf34c5c82009-08-14 12:42:17 +00002721 if (netdev->features & NETIF_F_FCOE_MTU) {
Yi Zou63f39bd2009-05-17 12:34:35 +00002722 struct ixgbe_ring_feature *f;
2723 f = &adapter->ring_feature[RING_F_FCOE];
Yi Zou6e455b892009-08-06 13:05:44 +00002724 if ((i >= f->mask) && (i < f->mask + f->indices)) {
2725 rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED;
2726 if (rx_buf_len < IXGBE_FCOE_JUMBO_FRAME_SIZE)
2727 rx_ring->rx_buf_len =
2728 IXGBE_FCOE_JUMBO_FRAME_SIZE;
2729 }
Yi Zou63f39bd2009-05-17 12:34:35 +00002730 }
2731
2732#endif /* IXGBE_FCOE */
Yi Zoua6616b42009-08-06 13:05:23 +00002733 ixgbe_configure_srrctl(adapter, rx_ring);
Auke Kok9a799d72007-09-15 14:07:45 -07002734 }
2735
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002736 if (hw->mac.type == ixgbe_mac_82598EB) {
2737 /*
2738 * For VMDq support of different descriptor types or
2739 * buffer sizes through the use of multiple SRRCTL
2740 * registers, RDRXCTL.MVMEN must be set to 1
2741 *
2742 * also, the manual doesn't mention it clearly but DCA hints
2743 * will only use queue 0's tags unless this bit is set. Side
2744 * effects of setting this bit are only that SRRCTL must be
2745 * fully programmed [0..15]
2746 */
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002747 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2748 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
2749 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
Alexander Duyck2f90b862008-11-20 20:52:10 -08002750 }
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07002751
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002752 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2753 u32 vt_reg_bits;
2754 u32 reg_offset, vf_shift;
2755 u32 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
2756 vt_reg_bits = IXGBE_VMD_CTL_VMDQ_EN
2757 | IXGBE_VT_CTL_REPLEN;
2758 vt_reg_bits |= (adapter->num_vfs <<
2759 IXGBE_VT_CTL_POOL_SHIFT);
2760 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl | vt_reg_bits);
2761 IXGBE_WRITE_REG(hw, IXGBE_MRQC, 0);
2762
2763 vf_shift = adapter->num_vfs % 32;
2764 reg_offset = adapter->num_vfs / 32;
2765 IXGBE_WRITE_REG(hw, IXGBE_VFRE(0), 0);
2766 IXGBE_WRITE_REG(hw, IXGBE_VFRE(1), 0);
2767 IXGBE_WRITE_REG(hw, IXGBE_VFTE(0), 0);
2768 IXGBE_WRITE_REG(hw, IXGBE_VFTE(1), 0);
2769 /* Enable only the PF's pool for Tx/Rx */
2770 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (1 << vf_shift));
2771 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (1 << vf_shift));
2772 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
Greg Rosef0412772010-05-04 22:11:46 +00002773 ixgbe_set_vmolr(hw, adapter->num_vfs, true);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002774 }
2775
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002776 /* Program MRQC for the distribution of queues */
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002777 mrqc = ixgbe_setup_mrqc(adapter);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002778
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002779 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Auke Kok9a799d72007-09-15 14:07:45 -07002780 /* Fill out redirection table */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002781 for (i = 0, j = 0; i < 128; i++, j++) {
2782 if (j == adapter->ring_feature[RING_F_RSS].indices)
2783 j = 0;
2784 /* reta = 4-byte sliding window of
2785 * 0x00..(indices-1)(indices-1)00..etc. */
2786 reta = (reta << 8) | (j * 0x11);
2787 if ((i & 3) == 3)
2788 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
Auke Kok9a799d72007-09-15 14:07:45 -07002789 }
2790
2791 /* Fill out hash function seeds */
2792 for (i = 0; i < 10; i++)
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002793 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07002794
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002795 if (hw->mac.type == ixgbe_mac_82598EB)
2796 mrqc |= IXGBE_MRQC_RSSEN;
Auke Kok9a799d72007-09-15 14:07:45 -07002797 /* Perform hash on these packet types */
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002798 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2799 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002800 | IXGBE_MRQC_RSS_FIELD_IPV6
Alexander Duyckd6ea7c92010-07-19 13:59:27 +00002801 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
Auke Kok9a799d72007-09-15 14:07:45 -07002802 }
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002803 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002804
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002805 if (adapter->num_vfs) {
2806 u32 reg;
2807
2808 /* Map PF MAC address in RAR Entry 0 to first pool
2809 * following VFs */
2810 hw->mac.ops.set_vmdq(hw, 0, adapter->num_vfs);
2811
2812 /* Set up VF register offsets for selected VT Mode, i.e.
2813 * 64 VFs for SR-IOV */
2814 reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
2815 reg |= IXGBE_GCR_EXT_SRIOV;
2816 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, reg);
2817 }
2818
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002819 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2820
2821 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
2822 adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
2823 /* Disable indicating checksum in descriptor, enables
2824 * RSS hash */
2825 rxcsum |= IXGBE_RXCSUM_PCSD;
2826 }
2827 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
2828 /* Enable IPv4 payload checksum for UDP fragments
2829 * if PCSD is not set */
2830 rxcsum |= IXGBE_RXCSUM_IPPCSE;
2831 }
2832
2833 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002834
2835 if (hw->mac.type == ixgbe_mac_82599EB) {
2836 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2837 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
Alexander Duyckf8212f92009-04-27 22:42:37 +00002838 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002839 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2840 }
Alexander Duyckf8212f92009-04-27 22:42:37 +00002841
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00002842 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00002843 /* Enable 82599 HW-RSC */
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002844 for (i = 0; i < adapter->num_rx_queues; i++)
Mallikarjuna R Chilakalaedd2ea52009-11-23 10:45:11 -08002845 ixgbe_configure_rscctl(adapter, i);
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002846
Alexander Duyckf8212f92009-04-27 22:42:37 +00002847 /* Disable RSC for ACK packets */
2848 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
2849 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
2850 }
Auke Kok9a799d72007-09-15 14:07:45 -07002851}
2852
Auke Kok9a799d72007-09-15 14:07:45 -07002853static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2854{
2855 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07002856 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose1ada1b12010-01-22 22:45:43 +00002857 int pool_ndx = adapter->num_vfs;
Auke Kok9a799d72007-09-15 14:07:45 -07002858
2859 /* add VID to filter table */
Greg Rose1ada1b12010-01-22 22:45:43 +00002860 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, true);
Auke Kok9a799d72007-09-15 14:07:45 -07002861}
2862
2863static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2864{
2865 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07002866 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose1ada1b12010-01-22 22:45:43 +00002867 int pool_ndx = adapter->num_vfs;
Auke Kok9a799d72007-09-15 14:07:45 -07002868
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08002869 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2870 ixgbe_irq_disable(adapter);
2871
Auke Kok9a799d72007-09-15 14:07:45 -07002872 vlan_group_set_device(adapter->vlgrp, vid, NULL);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08002873
2874 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2875 ixgbe_irq_enable(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07002876
2877 /* remove VID from filter table */
Greg Rose1ada1b12010-01-22 22:45:43 +00002878 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, false);
Auke Kok9a799d72007-09-15 14:07:45 -07002879}
2880
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07002881/**
2882 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
2883 * @adapter: driver data
2884 */
2885static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
2886{
2887 struct ixgbe_hw *hw = &adapter->hw;
2888 u32 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2889 int i, j;
2890
2891 switch (hw->mac.type) {
2892 case ixgbe_mac_82598EB:
Yi Zou38e0bd92010-05-18 16:00:08 +00002893 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
2894#ifdef CONFIG_IXGBE_DCB
2895 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
2896 vlnctrl &= ~IXGBE_VLNCTRL_VME;
2897#endif
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07002898 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2899 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2900 break;
2901 case ixgbe_mac_82599EB:
2902 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
2903 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2904 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
Yi Zou38e0bd92010-05-18 16:00:08 +00002905#ifdef CONFIG_IXGBE_DCB
2906 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
2907 break;
2908#endif
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07002909 for (i = 0; i < adapter->num_rx_queues; i++) {
2910 j = adapter->rx_ring[i]->reg_idx;
2911 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2912 vlnctrl &= ~IXGBE_RXDCTL_VME;
2913 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
2914 }
2915 break;
2916 default:
2917 break;
2918 }
2919}
2920
2921/**
2922 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
2923 * @adapter: driver data
2924 */
2925static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
2926{
2927 struct ixgbe_hw *hw = &adapter->hw;
2928 u32 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2929 int i, j;
2930
2931 switch (hw->mac.type) {
2932 case ixgbe_mac_82598EB:
2933 vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
2934 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2935 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2936 break;
2937 case ixgbe_mac_82599EB:
2938 vlnctrl |= IXGBE_VLNCTRL_VFE;
2939 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2940 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2941 for (i = 0; i < adapter->num_rx_queues; i++) {
2942 j = adapter->rx_ring[i]->reg_idx;
2943 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2944 vlnctrl |= IXGBE_RXDCTL_VME;
2945 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
2946 }
2947 break;
2948 default:
2949 break;
2950 }
2951}
2952
Don Skidmore068c89b2009-01-19 16:54:36 -08002953static void ixgbe_vlan_rx_register(struct net_device *netdev,
2954 struct vlan_group *grp)
2955{
2956 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Don Skidmore068c89b2009-01-19 16:54:36 -08002957
2958 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2959 ixgbe_irq_disable(adapter);
2960 adapter->vlgrp = grp;
2961
2962 /*
2963 * For a DCB driver, always enable VLAN tag stripping so we can
2964 * still receive traffic from a DCB-enabled host even if we're
2965 * not in DCB mode.
2966 */
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07002967 ixgbe_vlan_filter_enable(adapter);
Alexander Duyckdc63d372009-11-23 06:32:57 +00002968
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002969 ixgbe_vlan_rx_add_vid(netdev, 0);
Don Skidmore068c89b2009-01-19 16:54:36 -08002970
2971 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2972 ixgbe_irq_enable(adapter);
2973}
2974
Auke Kok9a799d72007-09-15 14:07:45 -07002975static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
2976{
2977 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2978
2979 if (adapter->vlgrp) {
2980 u16 vid;
2981 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2982 if (!vlan_group_get_device(adapter->vlgrp, vid))
2983 continue;
2984 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
2985 }
2986 }
2987}
2988
2989/**
Alexander Duyck28500622010-06-15 09:25:48 +00002990 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
2991 * @netdev: network interface device structure
2992 *
2993 * Writes unicast address list to the RAR table.
2994 * Returns: -ENOMEM on failure/insufficient address space
2995 * 0 on no addresses written
2996 * X on writing X addresses to the RAR table
2997 **/
2998static int ixgbe_write_uc_addr_list(struct net_device *netdev)
2999{
3000 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3001 struct ixgbe_hw *hw = &adapter->hw;
3002 unsigned int vfn = adapter->num_vfs;
3003 unsigned int rar_entries = hw->mac.num_rar_entries - (vfn + 1);
3004 int count = 0;
3005
3006 /* return ENOMEM indicating insufficient memory for addresses */
3007 if (netdev_uc_count(netdev) > rar_entries)
3008 return -ENOMEM;
3009
3010 if (!netdev_uc_empty(netdev) && rar_entries) {
3011 struct netdev_hw_addr *ha;
3012 /* return error if we do not support writing to RAR table */
3013 if (!hw->mac.ops.set_rar)
3014 return -ENOMEM;
3015
3016 netdev_for_each_uc_addr(ha, netdev) {
3017 if (!rar_entries)
3018 break;
3019 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3020 vfn, IXGBE_RAH_AV);
3021 count++;
3022 }
3023 }
3024 /* write the addresses in reverse order to avoid write combining */
3025 for (; rar_entries > 0 ; rar_entries--)
3026 hw->mac.ops.clear_rar(hw, rar_entries);
3027
3028 return count;
3029}
3030
3031/**
Christopher Leech2c5645c2008-08-26 04:27:02 -07003032 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
Auke Kok9a799d72007-09-15 14:07:45 -07003033 * @netdev: network interface device structure
3034 *
Christopher Leech2c5645c2008-08-26 04:27:02 -07003035 * The set_rx_method entry point is called whenever the unicast/multicast
3036 * address list or the network interface flags are updated. This routine is
3037 * responsible for configuring the hardware for proper unicast, multicast and
3038 * promiscuous mode.
Auke Kok9a799d72007-09-15 14:07:45 -07003039 **/
Greg Rose7f870472010-01-09 02:25:29 +00003040void ixgbe_set_rx_mode(struct net_device *netdev)
Auke Kok9a799d72007-09-15 14:07:45 -07003041{
3042 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3043 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck28500622010-06-15 09:25:48 +00003044 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3045 int count;
Auke Kok9a799d72007-09-15 14:07:45 -07003046
3047 /* Check for Promiscuous and All Multicast modes */
3048
3049 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3050
Alexander Duyck28500622010-06-15 09:25:48 +00003051 /* clear the bits we are changing the status of */
3052 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3053
Auke Kok9a799d72007-09-15 14:07:45 -07003054 if (netdev->flags & IFF_PROMISC) {
Emil Tantilove433ea12010-05-13 17:33:00 +00003055 hw->addr_ctrl.user_set_promisc = true;
Auke Kok9a799d72007-09-15 14:07:45 -07003056 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
Alexander Duyck28500622010-06-15 09:25:48 +00003057 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003058 /* don't hardware filter vlans in promisc mode */
3059 ixgbe_vlan_filter_disable(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003060 } else {
Patrick McHardy746b9f02008-07-16 20:15:45 -07003061 if (netdev->flags & IFF_ALLMULTI) {
3062 fctrl |= IXGBE_FCTRL_MPE;
Alexander Duyck28500622010-06-15 09:25:48 +00003063 vmolr |= IXGBE_VMOLR_MPE;
3064 } else {
3065 /*
3066 * Write addresses to the MTA, if the attempt fails
3067 * then we should just turn on promiscous mode so
3068 * that we can at least receive multicast traffic
3069 */
3070 hw->mac.ops.update_mc_addr_list(hw, netdev);
3071 vmolr |= IXGBE_VMOLR_ROMPE;
Patrick McHardy746b9f02008-07-16 20:15:45 -07003072 }
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003073 ixgbe_vlan_filter_enable(adapter);
Emil Tantilove433ea12010-05-13 17:33:00 +00003074 hw->addr_ctrl.user_set_promisc = false;
Alexander Duyck28500622010-06-15 09:25:48 +00003075 /*
3076 * Write addresses to available RAR registers, if there is not
3077 * sufficient space to store all the addresses then enable
3078 * unicast promiscous mode
3079 */
3080 count = ixgbe_write_uc_addr_list(netdev);
3081 if (count < 0) {
3082 fctrl |= IXGBE_FCTRL_UPE;
3083 vmolr |= IXGBE_VMOLR_ROPE;
3084 }
3085 }
3086
3087 if (adapter->num_vfs) {
3088 ixgbe_restore_vf_multicasts(adapter);
3089 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(adapter->num_vfs)) &
3090 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3091 IXGBE_VMOLR_ROPE);
3092 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(adapter->num_vfs), vmolr);
Auke Kok9a799d72007-09-15 14:07:45 -07003093 }
3094
3095 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
Auke Kok9a799d72007-09-15 14:07:45 -07003096}
3097
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003098static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3099{
3100 int q_idx;
3101 struct ixgbe_q_vector *q_vector;
3102 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3103
3104 /* legacy and MSI only use one vector */
3105 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3106 q_vectors = 1;
3107
3108 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
Jesse Brandeburgf0848272008-09-11 19:59:42 -07003109 struct napi_struct *napi;
Alexander Duyck7a921c92009-05-06 10:43:28 +00003110 q_vector = adapter->q_vector[q_idx];
Jesse Brandeburgf0848272008-09-11 19:59:42 -07003111 napi = &q_vector->napi;
Alexander Duyck91281fd2009-06-04 16:00:27 +00003112 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3113 if (!q_vector->rxr_count || !q_vector->txr_count) {
3114 if (q_vector->txr_count == 1)
3115 napi->poll = &ixgbe_clean_txonly;
3116 else if (q_vector->rxr_count == 1)
3117 napi->poll = &ixgbe_clean_rxonly;
3118 }
3119 }
Jesse Brandeburgf0848272008-09-11 19:59:42 -07003120
3121 napi_enable(napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003122 }
3123}
3124
3125static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3126{
3127 int q_idx;
3128 struct ixgbe_q_vector *q_vector;
3129 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3130
3131 /* legacy and MSI only use one vector */
3132 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3133 q_vectors = 1;
3134
3135 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00003136 q_vector = adapter->q_vector[q_idx];
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003137 napi_disable(&q_vector->napi);
3138 }
3139}
3140
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08003141#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08003142/*
3143 * ixgbe_configure_dcb - Configure DCB hardware
3144 * @adapter: ixgbe adapter struct
3145 *
3146 * This is called by the driver on open to configure the DCB hardware.
3147 * This is also called by the gennetlink interface when reconfiguring
3148 * the DCB state.
3149 */
3150static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
3151{
3152 struct ixgbe_hw *hw = &adapter->hw;
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003153 u32 txdctl;
Alexander Duyck2f90b862008-11-20 20:52:10 -08003154 int i, j;
3155
Alexander Duyck67ebd792010-08-19 13:34:04 +00003156 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
3157 if (hw->mac.type == ixgbe_mac_82598EB)
3158 netif_set_gso_max_size(adapter->netdev, 65536);
3159 return;
3160 }
3161
3162 if (hw->mac.type == ixgbe_mac_82598EB)
3163 netif_set_gso_max_size(adapter->netdev, 32768);
3164
Alexander Duyck2f90b862008-11-20 20:52:10 -08003165 ixgbe_dcb_check_config(&adapter->dcb_cfg);
3166 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
3167 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
3168
3169 /* reconfigure the hardware */
3170 ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
3171
3172 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003173 j = adapter->tx_ring[i]->reg_idx;
Alexander Duyck2f90b862008-11-20 20:52:10 -08003174 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3175 /* PThresh workaround for Tx hang with DFP enabled. */
3176 txdctl |= 32;
3177 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
3178 }
3179 /* Enable VLAN tag insert/strip */
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003180 ixgbe_vlan_filter_enable(adapter);
3181
Alexander Duyck2f90b862008-11-20 20:52:10 -08003182 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
3183}
3184
3185#endif
Auke Kok9a799d72007-09-15 14:07:45 -07003186static void ixgbe_configure(struct ixgbe_adapter *adapter)
3187{
3188 struct net_device *netdev = adapter->netdev;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003189 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07003190 int i;
3191
Christopher Leech2c5645c2008-08-26 04:27:02 -07003192 ixgbe_set_rx_mode(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07003193
3194 ixgbe_restore_vlan(adapter);
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08003195#ifdef CONFIG_IXGBE_DCB
Alexander Duyck67ebd792010-08-19 13:34:04 +00003196 ixgbe_configure_dcb(adapter);
Alexander Duyck2f90b862008-11-20 20:52:10 -08003197#endif
Auke Kok9a799d72007-09-15 14:07:45 -07003198
Yi Zoueacd73f2009-05-13 13:11:06 +00003199#ifdef IXGBE_FCOE
3200 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
3201 ixgbe_configure_fcoe(adapter);
3202
3203#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003204 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3205 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003206 adapter->tx_ring[i]->atr_sample_rate =
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003207 adapter->atr_sample_rate;
3208 ixgbe_init_fdir_signature_82599(hw, adapter->fdir_pballoc);
3209 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
3210 ixgbe_init_fdir_perfect_82599(hw, adapter->fdir_pballoc);
3211 }
3212
Auke Kok9a799d72007-09-15 14:07:45 -07003213 ixgbe_configure_tx(adapter);
3214 ixgbe_configure_rx(adapter);
3215 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003216 ixgbe_alloc_rx_buffers(adapter, adapter->rx_ring[i],
3217 (adapter->rx_ring[i]->count - 1));
Auke Kok9a799d72007-09-15 14:07:45 -07003218}
3219
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003220static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3221{
3222 switch (hw->phy.type) {
3223 case ixgbe_phy_sfp_avago:
3224 case ixgbe_phy_sfp_ftl:
3225 case ixgbe_phy_sfp_intel:
3226 case ixgbe_phy_sfp_unknown:
Don Skidmoreea0a04d2010-05-18 16:00:13 +00003227 case ixgbe_phy_sfp_passive_tyco:
3228 case ixgbe_phy_sfp_passive_unknown:
3229 case ixgbe_phy_sfp_active_unknown:
3230 case ixgbe_phy_sfp_ftl_active:
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003231 return true;
3232 default:
3233 return false;
3234 }
3235}
3236
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003237/**
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003238 * ixgbe_sfp_link_config - set up SFP+ link
3239 * @adapter: pointer to private adapter struct
3240 **/
3241static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
3242{
3243 struct ixgbe_hw *hw = &adapter->hw;
3244
3245 if (hw->phy.multispeed_fiber) {
3246 /*
3247 * In multispeed fiber setups, the device may not have
3248 * had a physical connection when the driver loaded.
3249 * If that's the case, the initial link configuration
3250 * couldn't get the MAC into 10G or 1G mode, so we'll
3251 * never have a link status change interrupt fire.
3252 * We need to try and force an autonegotiation
3253 * session, then bring up link.
3254 */
3255 hw->mac.ops.setup_sfp(hw);
3256 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
3257 schedule_work(&adapter->multispeed_fiber_task);
3258 } else {
3259 /*
3260 * Direct Attach Cu and non-multispeed fiber modules
3261 * still need to be configured properly prior to
3262 * attempting link.
3263 */
3264 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_MOD_TASK))
3265 schedule_work(&adapter->sfp_config_module_task);
3266 }
3267}
3268
3269/**
3270 * ixgbe_non_sfp_link_config - set up non-SFP+ link
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003271 * @hw: pointer to private hardware struct
3272 *
3273 * Returns 0 on success, negative on failure
3274 **/
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003275static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003276{
3277 u32 autoneg;
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00003278 bool negotiation, link_up = false;
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003279 u32 ret = IXGBE_ERR_LINK_SETUP;
3280
3281 if (hw->mac.ops.check_link)
3282 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3283
3284 if (ret)
3285 goto link_cfg_out;
3286
3287 if (hw->mac.ops.get_link_capabilities)
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00003288 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003289 if (ret)
3290 goto link_cfg_out;
3291
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00003292 if (hw->mac.ops.setup_link)
3293 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003294link_cfg_out:
3295 return ret;
3296}
3297
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003298#define IXGBE_MAX_RX_DESC_POLL 10
3299static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3300 int rxr)
3301{
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003302 int j = adapter->rx_ring[rxr]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003303 int k;
3304
3305 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
3306 if (IXGBE_READ_REG(&adapter->hw,
3307 IXGBE_RXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
3308 break;
3309 else
3310 msleep(1);
3311 }
3312 if (k >= IXGBE_MAX_RX_DESC_POLL) {
Emil Tantilov396e7992010-07-01 20:05:12 +00003313 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
Emil Tantilov849c4542010-06-03 16:53:41 +00003314 "the polling period\n", rxr);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003315 }
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003316 ixgbe_release_rx_desc(&adapter->hw, adapter->rx_ring[rxr],
3317 (adapter->rx_ring[rxr]->count - 1));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003318}
3319
Auke Kok9a799d72007-09-15 14:07:45 -07003320static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
3321{
3322 struct net_device *netdev = adapter->netdev;
Auke Kok9a799d72007-09-15 14:07:45 -07003323 struct ixgbe_hw *hw = &adapter->hw;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003324 int i, j = 0;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003325 int num_rx_rings = adapter->num_rx_queues;
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003326 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07003327 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003328 u32 txdctl, rxdctl, mhadd;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003329 u32 dmatxctl;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003330 u32 gpie;
Greg Rosec9205692010-01-22 22:46:22 +00003331 u32 ctrl_ext;
Auke Kok9a799d72007-09-15 14:07:45 -07003332
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08003333 ixgbe_get_hw_control(adapter);
3334
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003335 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
3336 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
Auke Kok9a799d72007-09-15 14:07:45 -07003337 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3338 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003339 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
Auke Kok9a799d72007-09-15 14:07:45 -07003340 } else {
3341 /* MSI only */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003342 gpie = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07003343 }
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003344 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3345 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
3346 gpie |= IXGBE_GPIE_VTMODE_64;
3347 }
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003348 /* XXX: to interrupt immediately for EICS writes, enable this */
3349 /* gpie |= IXGBE_GPIE_EIMEN; */
3350 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3351 }
3352
Jesse Brandeburg9b471442009-12-03 11:33:54 +00003353 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3354 /*
3355 * use EIAM to auto-mask when MSI-X interrupt is asserted
3356 * this saves a register write for every interrupt
3357 */
3358 switch (hw->mac.type) {
3359 case ixgbe_mac_82598EB:
3360 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3361 break;
3362 default:
3363 case ixgbe_mac_82599EB:
3364 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3365 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3366 break;
3367 }
3368 } else {
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003369 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3370 * specifically only auto mask tx and rx interrupts */
3371 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
Auke Kok9a799d72007-09-15 14:07:45 -07003372 }
3373
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07003374 /* Enable Thermal over heat sensor interrupt */
3375 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
3376 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
3377 gpie |= IXGBE_SDP0_GPIEN;
3378 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3379 }
3380
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07003381 /* Enable fan failure interrupt if media type is copper */
3382 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
3383 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
3384 gpie |= IXGBE_SDP1_GPIEN;
3385 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3386 }
3387
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003388 if (hw->mac.type == ixgbe_mac_82599EB) {
3389 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
3390 gpie |= IXGBE_SDP1_GPIEN;
3391 gpie |= IXGBE_SDP2_GPIEN;
3392 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3393 }
3394
Yi Zou63f39bd2009-05-17 12:34:35 +00003395#ifdef IXGBE_FCOE
3396 /* adjust max frame to be able to do baby jumbo for FCoE */
Yi Zouf34c5c82009-08-14 12:42:17 +00003397 if ((netdev->features & NETIF_F_FCOE_MTU) &&
Yi Zou63f39bd2009-05-17 12:34:35 +00003398 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3399 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3400
3401#endif /* IXGBE_FCOE */
Auke Kok9a799d72007-09-15 14:07:45 -07003402 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
Auke Kok9a799d72007-09-15 14:07:45 -07003403 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3404 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3405 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3406
3407 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3408 }
3409
Alexander Duyck179b4092010-08-19 13:34:27 +00003410 if (hw->mac.type == ixgbe_mac_82599EB) {
3411 /* DMATXCTL.EN must be set after all Tx queue config is done */
3412 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3413 dmatxctl |= IXGBE_DMATXCTL_TE;
3414 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3415 }
Auke Kok9a799d72007-09-15 14:07:45 -07003416 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003417 j = adapter->tx_ring[i]->reg_idx;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003418 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
Jesse Brandeburgef021192010-04-27 01:37:41 +00003419 if (adapter->rx_itr_setting == 0) {
3420 /* cannot set wthresh when itr==0 */
3421 txdctl &= ~0x007F0000;
3422 } else {
3423 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
3424 txdctl |= (8 << 16);
3425 }
Auke Kok9a799d72007-09-15 14:07:45 -07003426 txdctl |= IXGBE_TXDCTL_ENABLE;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003427 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003428 if (hw->mac.type == ixgbe_mac_82599EB) {
3429 int wait_loop = 10;
3430 /* poll for Tx Enable ready */
3431 do {
3432 msleep(1);
3433 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3434 } while (--wait_loop &&
3435 !(txdctl & IXGBE_TXDCTL_ENABLE));
3436 if (!wait_loop)
Emil Tantilov396e7992010-07-01 20:05:12 +00003437 e_err(drv, "Could not enable Tx Queue %d\n", j);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003438 }
Auke Kok9a799d72007-09-15 14:07:45 -07003439 }
3440
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003441 for (i = 0; i < num_rx_rings; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003442 j = adapter->rx_ring[i]->reg_idx;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003443 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3444 /* enable PTHRESH=32 descriptors (half the internal cache)
3445 * and HTHRESH=0 descriptors (to minimize latency on fetch),
3446 * this also removes a pesky rx_no_buffer_count increment */
3447 rxdctl |= 0x0020;
Auke Kok9a799d72007-09-15 14:07:45 -07003448 rxdctl |= IXGBE_RXDCTL_ENABLE;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003449 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003450 if (hw->mac.type == ixgbe_mac_82599EB)
3451 ixgbe_rx_desc_queue_enable(adapter, i);
Auke Kok9a799d72007-09-15 14:07:45 -07003452 }
3453 /* enable all receives */
3454 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003455 if (hw->mac.type == ixgbe_mac_82598EB)
3456 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
3457 else
3458 rxdctl |= IXGBE_RXCTRL_RXEN;
3459 hw->mac.ops.enable_rx_dma(hw, rxdctl);
Auke Kok9a799d72007-09-15 14:07:45 -07003460
3461 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3462 ixgbe_configure_msix(adapter);
3463 else
3464 ixgbe_configure_msi_and_legacy(adapter);
3465
Peter Waskiewicz61fac742010-04-27 00:38:15 +00003466 /* enable the optics */
3467 if (hw->phy.multispeed_fiber)
3468 hw->mac.ops.enable_tx_laser(hw);
3469
Auke Kok9a799d72007-09-15 14:07:45 -07003470 clear_bit(__IXGBE_DOWN, &adapter->state);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003471 ixgbe_napi_enable_all(adapter);
3472
3473 /* clear any pending interrupts, may auto mask */
3474 IXGBE_READ_REG(hw, IXGBE_EICR);
3475
Auke Kok9a799d72007-09-15 14:07:45 -07003476 ixgbe_irq_enable(adapter);
3477
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003478 /*
Don Skidmorebf069c92009-05-07 10:39:54 +00003479 * If this adapter has a fan, check to see if we had a failure
3480 * before we enabled the interrupt.
3481 */
3482 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
3483 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
3484 if (esdp & IXGBE_ESDP_SDP1)
Emil Tantilov396e7992010-07-01 20:05:12 +00003485 e_crit(drv, "Fan has stopped, replace the adapter\n");
Don Skidmorebf069c92009-05-07 10:39:54 +00003486 }
3487
3488 /*
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003489 * For hot-pluggable SFP+ devices, a new SFP+ module may have
Don Skidmore19343de2009-07-02 12:50:31 +00003490 * arrived before interrupts were enabled but after probe. Such
3491 * devices wouldn't have their type identified yet. We need to
3492 * kick off the SFP+ module setup first, then try to bring up link.
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003493 * If we're not hot-pluggable SFP+, we just need to configure link
3494 * and bring it up.
3495 */
Don Skidmore19343de2009-07-02 12:50:31 +00003496 if (hw->phy.type == ixgbe_phy_unknown) {
3497 err = hw->phy.ops.identify(hw);
3498 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Don Skidmore5da43c12009-07-02 12:50:52 +00003499 /*
3500 * Take the device down and schedule the sfp tasklet
3501 * which will unregister_netdev and log it.
3502 */
Don Skidmore19343de2009-07-02 12:50:31 +00003503 ixgbe_down(adapter);
Don Skidmore5da43c12009-07-02 12:50:52 +00003504 schedule_work(&adapter->sfp_config_module_task);
Don Skidmore19343de2009-07-02 12:50:31 +00003505 return err;
3506 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003507 }
3508
3509 if (ixgbe_is_sfp(hw)) {
3510 ixgbe_sfp_link_config(adapter);
3511 } else {
3512 err = ixgbe_non_sfp_link_config(hw);
3513 if (err)
Emil Tantilov396e7992010-07-01 20:05:12 +00003514 e_err(probe, "link_config FAILED %d\n", err);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003515 }
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003516
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003517 for (i = 0; i < adapter->num_tx_queues; i++)
3518 set_bit(__IXGBE_FDIR_INIT_DONE,
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003519 &(adapter->tx_ring[i]->reinit_state));
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003520
Peter P Waskiewicz Jr1da100b2009-01-19 16:55:03 -08003521 /* enable transmits */
3522 netif_tx_start_all_queues(netdev);
3523
Auke Kok9a799d72007-09-15 14:07:45 -07003524 /* bring the link up in the watchdog, this could race with our first
3525 * link up interrupt but shouldn't be a problem */
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07003526 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
3527 adapter->link_check_timeout = jiffies;
Auke Kok9a799d72007-09-15 14:07:45 -07003528 mod_timer(&adapter->watchdog_timer, jiffies);
Greg Rosec9205692010-01-22 22:46:22 +00003529
3530 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
3531 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
3532 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
3533 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
3534
Auke Kok9a799d72007-09-15 14:07:45 -07003535 return 0;
3536}
3537
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003538void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
3539{
3540 WARN_ON(in_interrupt());
3541 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
3542 msleep(1);
3543 ixgbe_down(adapter);
Greg Rose5809a1a2010-03-24 09:36:08 +00003544 /*
3545 * If SR-IOV enabled then wait a bit before bringing the adapter
3546 * back up to give the VFs time to respond to the reset. The
3547 * two second wait is based upon the watchdog timer cycle in
3548 * the VF driver.
3549 */
3550 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3551 msleep(2000);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003552 ixgbe_up(adapter);
3553 clear_bit(__IXGBE_RESETTING, &adapter->state);
3554}
3555
Auke Kok9a799d72007-09-15 14:07:45 -07003556int ixgbe_up(struct ixgbe_adapter *adapter)
3557{
3558 /* hardware has been reset, we need to reload some things */
3559 ixgbe_configure(adapter);
3560
3561 return ixgbe_up_complete(adapter);
3562}
3563
3564void ixgbe_reset(struct ixgbe_adapter *adapter)
3565{
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07003566 struct ixgbe_hw *hw = &adapter->hw;
Don Skidmore8ca783a2009-05-26 20:40:47 -07003567 int err;
3568
3569 err = hw->mac.ops.init_hw(hw);
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003570 switch (err) {
3571 case 0:
3572 case IXGBE_ERR_SFP_NOT_PRESENT:
3573 break;
3574 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
Emil Tantilov849c4542010-06-03 16:53:41 +00003575 e_dev_err("master disable timed out\n");
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003576 break;
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00003577 case IXGBE_ERR_EEPROM_VERSION:
3578 /* We are running on a pre-production device, log a warning */
Emil Tantilov849c4542010-06-03 16:53:41 +00003579 e_dev_warn("This device is a pre-production adapter/LOM. "
3580 "Please be aware there may be issuesassociated with "
3581 "your hardware. If you are experiencing problems "
3582 "please contact your Intel or hardware "
3583 "representative who provided you with this "
3584 "hardware.\n");
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00003585 break;
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003586 default:
Emil Tantilov849c4542010-06-03 16:53:41 +00003587 e_dev_err("Hardware Error: %d\n", err);
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003588 }
Auke Kok9a799d72007-09-15 14:07:45 -07003589
3590 /* reprogram the RAR[0] in case user changed it. */
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003591 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
3592 IXGBE_RAH_AV);
Auke Kok9a799d72007-09-15 14:07:45 -07003593}
3594
Auke Kok9a799d72007-09-15 14:07:45 -07003595/**
3596 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
3597 * @adapter: board private structure
3598 * @rx_ring: ring to free buffers from
3599 **/
3600static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003601 struct ixgbe_ring *rx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07003602{
3603 struct pci_dev *pdev = adapter->pdev;
3604 unsigned long size;
3605 unsigned int i;
3606
3607 /* Free all the Rx ring sk_buffs */
3608
3609 for (i = 0; i < rx_ring->count; i++) {
3610 struct ixgbe_rx_buffer *rx_buffer_info;
3611
3612 rx_buffer_info = &rx_ring->rx_buffer_info[i];
3613 if (rx_buffer_info->dma) {
Nick Nunley1b507732010-04-27 13:10:27 +00003614 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003615 rx_ring->rx_buf_len,
Nick Nunley1b507732010-04-27 13:10:27 +00003616 DMA_FROM_DEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -07003617 rx_buffer_info->dma = 0;
3618 }
3619 if (rx_buffer_info->skb) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00003620 struct sk_buff *skb = rx_buffer_info->skb;
Auke Kok9a799d72007-09-15 14:07:45 -07003621 rx_buffer_info->skb = NULL;
Alexander Duyckf8212f92009-04-27 22:42:37 +00003622 do {
3623 struct sk_buff *this = skb;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00003624 if (IXGBE_RSC_CB(this)->delay_unmap) {
Nick Nunley1b507732010-04-27 13:10:27 +00003625 dma_unmap_single(&pdev->dev,
3626 IXGBE_RSC_CB(this)->dma,
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00003627 rx_ring->rx_buf_len,
Nick Nunley1b507732010-04-27 13:10:27 +00003628 DMA_FROM_DEVICE);
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00003629 IXGBE_RSC_CB(this)->dma = 0;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00003630 IXGBE_RSC_CB(skb)->delay_unmap = false;
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00003631 }
Alexander Duyckf8212f92009-04-27 22:42:37 +00003632 skb = skb->prev;
3633 dev_kfree_skb(this);
3634 } while (skb);
Auke Kok9a799d72007-09-15 14:07:45 -07003635 }
3636 if (!rx_buffer_info->page)
3637 continue;
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +00003638 if (rx_buffer_info->page_dma) {
Nick Nunley1b507732010-04-27 13:10:27 +00003639 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
3640 PAGE_SIZE / 2, DMA_FROM_DEVICE);
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +00003641 rx_buffer_info->page_dma = 0;
3642 }
Auke Kok9a799d72007-09-15 14:07:45 -07003643 put_page(rx_buffer_info->page);
3644 rx_buffer_info->page = NULL;
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07003645 rx_buffer_info->page_offset = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07003646 }
3647
3648 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
3649 memset(rx_ring->rx_buffer_info, 0, size);
3650
3651 /* Zero out the descriptor ring */
3652 memset(rx_ring->desc, 0, rx_ring->size);
3653
3654 rx_ring->next_to_clean = 0;
3655 rx_ring->next_to_use = 0;
3656
Jesse Brandeburg9891ca72009-03-13 22:14:50 +00003657 if (rx_ring->head)
3658 writel(0, adapter->hw.hw_addr + rx_ring->head);
3659 if (rx_ring->tail)
3660 writel(0, adapter->hw.hw_addr + rx_ring->tail);
Auke Kok9a799d72007-09-15 14:07:45 -07003661}
3662
3663/**
3664 * ixgbe_clean_tx_ring - Free Tx Buffers
3665 * @adapter: board private structure
3666 * @tx_ring: ring to be cleaned
3667 **/
3668static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003669 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07003670{
3671 struct ixgbe_tx_buffer *tx_buffer_info;
3672 unsigned long size;
3673 unsigned int i;
3674
3675 /* Free all the Tx ring sk_buffs */
3676
3677 for (i = 0; i < tx_ring->count; i++) {
3678 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3679 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3680 }
3681
3682 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
3683 memset(tx_ring->tx_buffer_info, 0, size);
3684
3685 /* Zero out the descriptor ring */
3686 memset(tx_ring->desc, 0, tx_ring->size);
3687
3688 tx_ring->next_to_use = 0;
3689 tx_ring->next_to_clean = 0;
3690
Jesse Brandeburg9891ca72009-03-13 22:14:50 +00003691 if (tx_ring->head)
3692 writel(0, adapter->hw.hw_addr + tx_ring->head);
3693 if (tx_ring->tail)
3694 writel(0, adapter->hw.hw_addr + tx_ring->tail);
Auke Kok9a799d72007-09-15 14:07:45 -07003695}
3696
3697/**
Auke Kok9a799d72007-09-15 14:07:45 -07003698 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
3699 * @adapter: board private structure
3700 **/
3701static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
3702{
3703 int i;
3704
3705 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003706 ixgbe_clean_rx_ring(adapter, adapter->rx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07003707}
3708
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003709/**
3710 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
3711 * @adapter: board private structure
3712 **/
3713static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
3714{
3715 int i;
3716
3717 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003718 ixgbe_clean_tx_ring(adapter, adapter->tx_ring[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003719}
3720
Auke Kok9a799d72007-09-15 14:07:45 -07003721void ixgbe_down(struct ixgbe_adapter *adapter)
3722{
3723 struct net_device *netdev = adapter->netdev;
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003724 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07003725 u32 rxctrl;
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003726 u32 txdctl;
3727 int i, j;
Auke Kok9a799d72007-09-15 14:07:45 -07003728
3729 /* signal that we are down to the interrupt handler */
3730 set_bit(__IXGBE_DOWN, &adapter->state);
3731
Greg Rose767081a2010-01-22 22:46:40 +00003732 /* disable receive for all VFs and wait one second */
3733 if (adapter->num_vfs) {
Greg Rose767081a2010-01-22 22:46:40 +00003734 /* ping all the active vfs to let them know we are going down */
3735 ixgbe_ping_all_vfs(adapter);
Greg Rose581d1aa2010-03-24 09:36:27 +00003736
Greg Rose767081a2010-01-22 22:46:40 +00003737 /* Disable all VFTE/VFRE TX/RX */
3738 ixgbe_disable_tx_rx(adapter);
Greg Rose581d1aa2010-03-24 09:36:27 +00003739
3740 /* Mark all the VFs as inactive */
3741 for (i = 0 ; i < adapter->num_vfs; i++)
3742 adapter->vfinfo[i].clear_to_send = 0;
Greg Rose767081a2010-01-22 22:46:40 +00003743 }
3744
Auke Kok9a799d72007-09-15 14:07:45 -07003745 /* disable receives */
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003746 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3747 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
Auke Kok9a799d72007-09-15 14:07:45 -07003748
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003749 IXGBE_WRITE_FLUSH(hw);
Auke Kok9a799d72007-09-15 14:07:45 -07003750 msleep(10);
3751
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003752 netif_tx_stop_all_queues(netdev);
3753
Don Skidmore0a1f87c2009-09-18 09:45:43 +00003754 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
3755 del_timer_sync(&adapter->sfp_timer);
Auke Kok9a799d72007-09-15 14:07:45 -07003756 del_timer_sync(&adapter->watchdog_timer);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07003757 cancel_work_sync(&adapter->watchdog_task);
Auke Kok9a799d72007-09-15 14:07:45 -07003758
John Fastabendc0dfb902010-04-27 02:13:39 +00003759 netif_carrier_off(netdev);
3760 netif_tx_disable(netdev);
3761
3762 ixgbe_irq_disable(adapter);
3763
3764 ixgbe_napi_disable_all(adapter);
3765
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003766 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3767 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3768 cancel_work_sync(&adapter->fdir_reinit_task);
3769
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07003770 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3771 cancel_work_sync(&adapter->check_overtemp_task);
3772
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003773 /* disable transmits in the hardware now that interrupts are off */
3774 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003775 j = adapter->tx_ring[i]->reg_idx;
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003776 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3777 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
3778 (txdctl & ~IXGBE_TXDCTL_ENABLE));
3779 }
PJ Waskiewicz88512532009-03-13 22:15:10 +00003780 /* Disable the Tx DMA engine on 82599 */
3781 if (hw->mac.type == ixgbe_mac_82599EB)
3782 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
3783 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
3784 ~IXGBE_DMATXCTL_TE));
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003785
John Fastabend9f756f02010-06-29 18:28:36 +00003786 /* power down the optics */
3787 if (hw->phy.multispeed_fiber)
3788 hw->mac.ops.disable_tx_laser(hw);
3789
Peter Waskiewicz9a713e72010-02-10 16:07:54 +00003790 /* clear n-tuple filters that are cached */
3791 ethtool_ntuple_flush(netdev);
3792
Paul Larson6f4a0e42008-06-24 17:00:56 -07003793 if (!pci_channel_offline(adapter->pdev))
3794 ixgbe_reset(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003795 ixgbe_clean_all_tx_rings(adapter);
3796 ixgbe_clean_all_rx_rings(adapter);
3797
Jeff Garzik5dd2d332008-10-16 05:09:31 -04003798#ifdef CONFIG_IXGBE_DCA
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -07003799 /* since we reset the hardware DCA settings were cleared */
Alexander Duycke35ec122009-05-21 13:07:12 +00003800 ixgbe_setup_dca(adapter);
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -07003801#endif
Auke Kok9a799d72007-09-15 14:07:45 -07003802}
3803
Auke Kok9a799d72007-09-15 14:07:45 -07003804/**
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003805 * ixgbe_poll - NAPI Rx polling callback
3806 * @napi: structure for representing this polling device
3807 * @budget: how many packets driver is allowed to clean
3808 *
3809 * This function is used for legacy and MSI, NAPI mode
Auke Kok9a799d72007-09-15 14:07:45 -07003810 **/
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003811static int ixgbe_poll(struct napi_struct *napi, int budget)
Auke Kok9a799d72007-09-15 14:07:45 -07003812{
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +00003813 struct ixgbe_q_vector *q_vector =
3814 container_of(napi, struct ixgbe_q_vector, napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003815 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +00003816 int tx_clean_complete, work_done = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07003817
Jeff Garzik5dd2d332008-10-16 05:09:31 -04003818#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08003819 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003820 ixgbe_update_tx_dca(adapter, adapter->tx_ring[0]);
3821 ixgbe_update_rx_dca(adapter, adapter->rx_ring[0]);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08003822 }
3823#endif
3824
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003825 tx_clean_complete = ixgbe_clean_tx_irq(q_vector, adapter->tx_ring[0]);
3826 ixgbe_clean_rx_irq(q_vector, adapter->rx_ring[0], &work_done, budget);
Auke Kok9a799d72007-09-15 14:07:45 -07003827
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +00003828 if (!tx_clean_complete)
David S. Millerd2c7ddd2008-01-15 22:43:24 -08003829 work_done = budget;
3830
David S. Miller53e52c72008-01-07 21:06:12 -08003831 /* If budget not fully consumed, exit the polling mode */
3832 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08003833 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00003834 if (adapter->rx_itr_setting & 1)
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08003835 ixgbe_set_itr(adapter);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003836 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Nelson, Shannon835462f2009-04-27 22:42:54 +00003837 ixgbe_irq_enable_queues(adapter, IXGBE_EIMS_RTX_QUEUE);
Auke Kok9a799d72007-09-15 14:07:45 -07003838 }
Auke Kok9a799d72007-09-15 14:07:45 -07003839 return work_done;
3840}
3841
3842/**
3843 * ixgbe_tx_timeout - Respond to a Tx Hang
3844 * @netdev: network interface device structure
3845 **/
3846static void ixgbe_tx_timeout(struct net_device *netdev)
3847{
3848 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3849
3850 /* Do the reset outside of interrupt context */
3851 schedule_work(&adapter->reset_task);
3852}
3853
3854static void ixgbe_reset_task(struct work_struct *work)
3855{
3856 struct ixgbe_adapter *adapter;
3857 adapter = container_of(work, struct ixgbe_adapter, reset_task);
3858
Alexander Duyck2f90b862008-11-20 20:52:10 -08003859 /* If we're already down or resetting, just bail */
3860 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
3861 test_bit(__IXGBE_RESETTING, &adapter->state))
3862 return;
3863
Auke Kok9a799d72007-09-15 14:07:45 -07003864 adapter->tx_timeout_count++;
3865
Taku Izumidcd79ae2010-04-27 14:39:53 +00003866 ixgbe_dump(adapter);
3867 netdev_err(adapter->netdev, "Reset adapter\n");
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003868 ixgbe_reinit_locked(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003869}
3870
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003871#ifdef CONFIG_IXGBE_DCB
3872static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003873{
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003874 bool ret = false;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003875 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_DCB];
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003876
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003877 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
3878 return ret;
3879
3880 f->mask = 0x7 << 3;
3881 adapter->num_rx_queues = f->indices;
3882 adapter->num_tx_queues = f->indices;
3883 ret = true;
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003884
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003885 return ret;
3886}
3887#endif
3888
Jesse Brandeburg4df10462009-03-13 22:15:31 +00003889/**
3890 * ixgbe_set_rss_queues: Allocate queues for RSS
3891 * @adapter: board private structure to initialize
3892 *
3893 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
3894 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
3895 *
3896 **/
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003897static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
3898{
3899 bool ret = false;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003900 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_RSS];
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003901
3902 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003903 f->mask = 0xF;
3904 adapter->num_rx_queues = f->indices;
3905 adapter->num_tx_queues = f->indices;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003906 ret = true;
3907 } else {
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003908 ret = false;
3909 }
3910
3911 return ret;
3912}
3913
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003914/**
3915 * ixgbe_set_fdir_queues: Allocate queues for Flow Director
3916 * @adapter: board private structure to initialize
3917 *
3918 * Flow Director is an advanced Rx filter, attempting to get Rx flows back
3919 * to the original CPU that initiated the Tx session. This runs in addition
3920 * to RSS, so if a packet doesn't match an FDIR filter, we can still spread the
3921 * Rx load across CPUs using RSS.
3922 *
3923 **/
3924static bool inline ixgbe_set_fdir_queues(struct ixgbe_adapter *adapter)
3925{
3926 bool ret = false;
3927 struct ixgbe_ring_feature *f_fdir = &adapter->ring_feature[RING_F_FDIR];
3928
3929 f_fdir->indices = min((int)num_online_cpus(), f_fdir->indices);
3930 f_fdir->mask = 0;
3931
3932 /* Flow Director must have RSS enabled */
3933 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED &&
3934 ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3935 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)))) {
3936 adapter->num_tx_queues = f_fdir->indices;
3937 adapter->num_rx_queues = f_fdir->indices;
3938 ret = true;
3939 } else {
3940 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
3941 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
3942 }
3943 return ret;
3944}
3945
Yi Zou0331a832009-05-17 12:33:52 +00003946#ifdef IXGBE_FCOE
3947/**
3948 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
3949 * @adapter: board private structure to initialize
3950 *
3951 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
3952 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
3953 * rx queues out of the max number of rx queues, instead, it is used as the
3954 * index of the first rx queue used by FCoE.
3955 *
3956 **/
3957static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
3958{
3959 bool ret = false;
3960 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
3961
3962 f->indices = min((int)num_online_cpus(), f->indices);
3963 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
Yi Zou8de8b2e2009-09-03 14:55:50 +00003964 adapter->num_rx_queues = 1;
3965 adapter->num_tx_queues = 1;
Yi Zou0331a832009-05-17 12:33:52 +00003966#ifdef CONFIG_IXGBE_DCB
3967 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
Emil Tantilov396e7992010-07-01 20:05:12 +00003968 e_info(probe, "FCoE enabled with DCB\n");
Yi Zou0331a832009-05-17 12:33:52 +00003969 ixgbe_set_dcb_queues(adapter);
3970 }
3971#endif
3972 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Emil Tantilov396e7992010-07-01 20:05:12 +00003973 e_info(probe, "FCoE enabled with RSS\n");
Yi Zou8faa2a72009-07-09 02:29:50 +00003974 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
3975 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
3976 ixgbe_set_fdir_queues(adapter);
3977 else
3978 ixgbe_set_rss_queues(adapter);
Yi Zou0331a832009-05-17 12:33:52 +00003979 }
3980 /* adding FCoE rx rings to the end */
3981 f->mask = adapter->num_rx_queues;
3982 adapter->num_rx_queues += f->indices;
Yi Zou8de8b2e2009-09-03 14:55:50 +00003983 adapter->num_tx_queues += f->indices;
Yi Zou0331a832009-05-17 12:33:52 +00003984
3985 ret = true;
3986 }
3987
3988 return ret;
3989}
3990
3991#endif /* IXGBE_FCOE */
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003992/**
3993 * ixgbe_set_sriov_queues: Allocate queues for IOV use
3994 * @adapter: board private structure to initialize
3995 *
3996 * IOV doesn't actually use anything, so just NAK the
3997 * request for now and let the other queue routines
3998 * figure out what to do.
3999 */
4000static inline bool ixgbe_set_sriov_queues(struct ixgbe_adapter *adapter)
4001{
4002 return false;
4003}
4004
Jesse Brandeburg4df10462009-03-13 22:15:31 +00004005/*
4006 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
4007 * @adapter: board private structure to initialize
4008 *
4009 * This is the top level queue allocation routine. The order here is very
4010 * important, starting with the "most" number of features turned on at once,
4011 * and ending with the smallest set of features. This way large combinations
4012 * can be allocated if they're turned on, and smaller combinations are the
4013 * fallthrough conditions.
4014 *
4015 **/
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004016static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
4017{
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004018 /* Start with base case */
4019 adapter->num_rx_queues = 1;
4020 adapter->num_tx_queues = 1;
4021 adapter->num_rx_pools = adapter->num_rx_queues;
4022 adapter->num_rx_queues_per_pool = 1;
4023
4024 if (ixgbe_set_sriov_queues(adapter))
4025 return;
4026
Yi Zou0331a832009-05-17 12:33:52 +00004027#ifdef IXGBE_FCOE
4028 if (ixgbe_set_fcoe_queues(adapter))
4029 goto done;
4030
4031#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004032#ifdef CONFIG_IXGBE_DCB
4033 if (ixgbe_set_dcb_queues(adapter))
Wu Fengguangaf22ab12009-04-14 21:54:07 -07004034 goto done;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004035
4036#endif
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004037 if (ixgbe_set_fdir_queues(adapter))
4038 goto done;
4039
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004040 if (ixgbe_set_rss_queues(adapter))
Wu Fengguangaf22ab12009-04-14 21:54:07 -07004041 goto done;
4042
4043 /* fallback to base case */
4044 adapter->num_rx_queues = 1;
4045 adapter->num_tx_queues = 1;
4046
4047done:
4048 /* Notify the stack of the (possibly) reduced Tx Queue count. */
John Fastabendf0796d52010-07-01 13:21:57 +00004049 netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
Jesse Brandeburgb9804972008-09-11 20:00:29 -07004050}
4051
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004052static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004053 int vectors)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004054{
4055 int err, vector_threshold;
4056
4057 /* We'll want at least 3 (vector_threshold):
4058 * 1) TxQ[0] Cleanup
4059 * 2) RxQ[0] Cleanup
4060 * 3) Other (Link Status Change, etc.)
4061 * 4) TCP Timer (optional)
4062 */
4063 vector_threshold = MIN_MSIX_COUNT;
4064
4065 /* The more we get, the more we will assign to Tx/Rx Cleanup
4066 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
4067 * Right now, we simply care about how many we'll get; we'll
4068 * set them up later while requesting irq's.
4069 */
4070 while (vectors >= vector_threshold) {
4071 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004072 vectors);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004073 if (!err) /* Success in acquiring all requested vectors. */
4074 break;
4075 else if (err < 0)
4076 vectors = 0; /* Nasty failure, quit now */
4077 else /* err == number of vectors we should try again with */
4078 vectors = err;
4079 }
4080
4081 if (vectors < vector_threshold) {
4082 /* Can't allocate enough MSI-X interrupts? Oh well.
4083 * This just means we'll go with either a single MSI
4084 * vector or fall back to legacy interrupts.
4085 */
Emil Tantilov849c4542010-06-03 16:53:41 +00004086 netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev,
4087 "Unable to allocate MSI-X interrupts\n");
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004088 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
4089 kfree(adapter->msix_entries);
4090 adapter->msix_entries = NULL;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004091 } else {
4092 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
Peter P Waskiewicz Jreb7f1392009-02-01 01:18:58 -08004093 /*
4094 * Adjust for only the vectors we'll use, which is minimum
4095 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
4096 * vectors we were allocated.
4097 */
4098 adapter->num_msix_vectors = min(vectors,
4099 adapter->max_msix_q_vectors + NON_Q_VECTORS);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004100 }
4101}
4102
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004103/**
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004104 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004105 * @adapter: board private structure to initialize
4106 *
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004107 * Cache the descriptor ring offsets for RSS to the assigned rings.
4108 *
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004109 **/
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004110static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004111{
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004112 int i;
4113 bool ret = false;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004114
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004115 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
4116 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004117 adapter->rx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004118 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004119 adapter->tx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004120 ret = true;
4121 } else {
4122 ret = false;
4123 }
4124
4125 return ret;
4126}
4127
4128#ifdef CONFIG_IXGBE_DCB
4129/**
4130 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
4131 * @adapter: board private structure to initialize
4132 *
4133 * Cache the descriptor ring offsets for DCB to the assigned rings.
4134 *
4135 **/
4136static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
4137{
4138 int i;
4139 bool ret = false;
4140 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
4141
4142 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
4143 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
Alexander Duyck2f90b862008-11-20 20:52:10 -08004144 /* the number of queues is assumed to be symmetric */
4145 for (i = 0; i < dcb_i; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004146 adapter->rx_ring[i]->reg_idx = i << 3;
4147 adapter->tx_ring[i]->reg_idx = i << 2;
Alexander Duyck2f90b862008-11-20 20:52:10 -08004148 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004149 ret = true;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004150 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004151 if (dcb_i == 8) {
4152 /*
4153 * Tx TC0 starts at: descriptor queue 0
4154 * Tx TC1 starts at: descriptor queue 32
4155 * Tx TC2 starts at: descriptor queue 64
4156 * Tx TC3 starts at: descriptor queue 80
4157 * Tx TC4 starts at: descriptor queue 96
4158 * Tx TC5 starts at: descriptor queue 104
4159 * Tx TC6 starts at: descriptor queue 112
4160 * Tx TC7 starts at: descriptor queue 120
4161 *
4162 * Rx TC0-TC7 are offset by 16 queues each
4163 */
4164 for (i = 0; i < 3; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004165 adapter->tx_ring[i]->reg_idx = i << 5;
4166 adapter->rx_ring[i]->reg_idx = i << 4;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004167 }
4168 for ( ; i < 5; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004169 adapter->tx_ring[i]->reg_idx =
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004170 ((i + 2) << 4);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004171 adapter->rx_ring[i]->reg_idx = i << 4;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004172 }
4173 for ( ; i < dcb_i; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004174 adapter->tx_ring[i]->reg_idx =
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004175 ((i + 8) << 3);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004176 adapter->rx_ring[i]->reg_idx = i << 4;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004177 }
4178
4179 ret = true;
4180 } else if (dcb_i == 4) {
4181 /*
4182 * Tx TC0 starts at: descriptor queue 0
4183 * Tx TC1 starts at: descriptor queue 64
4184 * Tx TC2 starts at: descriptor queue 96
4185 * Tx TC3 starts at: descriptor queue 112
4186 *
4187 * Rx TC0-TC3 are offset by 32 queues each
4188 */
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004189 adapter->tx_ring[0]->reg_idx = 0;
4190 adapter->tx_ring[1]->reg_idx = 64;
4191 adapter->tx_ring[2]->reg_idx = 96;
4192 adapter->tx_ring[3]->reg_idx = 112;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004193 for (i = 0 ; i < dcb_i; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004194 adapter->rx_ring[i]->reg_idx = i << 5;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004195
4196 ret = true;
4197 } else {
4198 ret = false;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004199 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004200 } else {
4201 ret = false;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004202 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004203 } else {
4204 ret = false;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004205 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004206
4207 return ret;
4208}
4209#endif
4210
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004211/**
4212 * ixgbe_cache_ring_fdir - Descriptor ring to register mapping for Flow Director
4213 * @adapter: board private structure to initialize
4214 *
4215 * Cache the descriptor ring offsets for Flow Director to the assigned rings.
4216 *
4217 **/
4218static bool inline ixgbe_cache_ring_fdir(struct ixgbe_adapter *adapter)
4219{
4220 int i;
4221 bool ret = false;
4222
4223 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED &&
4224 ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
4225 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))) {
4226 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004227 adapter->rx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004228 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004229 adapter->tx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004230 ret = true;
4231 }
4232
4233 return ret;
4234}
4235
Yi Zou0331a832009-05-17 12:33:52 +00004236#ifdef IXGBE_FCOE
4237/**
4238 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
4239 * @adapter: board private structure to initialize
4240 *
4241 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
4242 *
4243 */
4244static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
4245{
Yi Zou8de8b2e2009-09-03 14:55:50 +00004246 int i, fcoe_rx_i = 0, fcoe_tx_i = 0;
Yi Zou0331a832009-05-17 12:33:52 +00004247 bool ret = false;
4248 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
4249
4250 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
4251#ifdef CONFIG_IXGBE_DCB
4252 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
Yi Zou8de8b2e2009-09-03 14:55:50 +00004253 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
4254
Yi Zou0331a832009-05-17 12:33:52 +00004255 ixgbe_cache_ring_dcb(adapter);
Yi Zou8de8b2e2009-09-03 14:55:50 +00004256 /* find out queues in TC for FCoE */
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004257 fcoe_rx_i = adapter->rx_ring[fcoe->tc]->reg_idx + 1;
4258 fcoe_tx_i = adapter->tx_ring[fcoe->tc]->reg_idx + 1;
Yi Zou8de8b2e2009-09-03 14:55:50 +00004259 /*
4260 * In 82599, the number of Tx queues for each traffic
4261 * class for both 8-TC and 4-TC modes are:
4262 * TCs : TC0 TC1 TC2 TC3 TC4 TC5 TC6 TC7
4263 * 8 TCs: 32 32 16 16 8 8 8 8
4264 * 4 TCs: 64 64 32 32
4265 * We have max 8 queues for FCoE, where 8 the is
4266 * FCoE redirection table size. If TC for FCoE is
4267 * less than or equal to TC3, we have enough queues
4268 * to add max of 8 queues for FCoE, so we start FCoE
4269 * tx descriptor from the next one, i.e., reg_idx + 1.
4270 * If TC for FCoE is above TC3, implying 8 TC mode,
4271 * and we need 8 for FCoE, we have to take all queues
4272 * in that traffic class for FCoE.
4273 */
4274 if ((f->indices == IXGBE_FCRETA_SIZE) && (fcoe->tc > 3))
4275 fcoe_tx_i--;
Yi Zou0331a832009-05-17 12:33:52 +00004276 }
4277#endif /* CONFIG_IXGBE_DCB */
4278 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Yi Zou8faa2a72009-07-09 02:29:50 +00004279 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
4280 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
4281 ixgbe_cache_ring_fdir(adapter);
4282 else
4283 ixgbe_cache_ring_rss(adapter);
4284
Yi Zou8de8b2e2009-09-03 14:55:50 +00004285 fcoe_rx_i = f->mask;
4286 fcoe_tx_i = f->mask;
Yi Zou0331a832009-05-17 12:33:52 +00004287 }
Yi Zou8de8b2e2009-09-03 14:55:50 +00004288 for (i = 0; i < f->indices; i++, fcoe_rx_i++, fcoe_tx_i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004289 adapter->rx_ring[f->mask + i]->reg_idx = fcoe_rx_i;
4290 adapter->tx_ring[f->mask + i]->reg_idx = fcoe_tx_i;
Yi Zou8de8b2e2009-09-03 14:55:50 +00004291 }
Yi Zou0331a832009-05-17 12:33:52 +00004292 ret = true;
4293 }
4294 return ret;
4295}
4296
4297#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004298/**
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004299 * ixgbe_cache_ring_sriov - Descriptor ring to register mapping for sriov
4300 * @adapter: board private structure to initialize
4301 *
4302 * SR-IOV doesn't use any descriptor rings but changes the default if
4303 * no other mapping is used.
4304 *
4305 */
4306static inline bool ixgbe_cache_ring_sriov(struct ixgbe_adapter *adapter)
4307{
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004308 adapter->rx_ring[0]->reg_idx = adapter->num_vfs * 2;
4309 adapter->tx_ring[0]->reg_idx = adapter->num_vfs * 2;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004310 if (adapter->num_vfs)
4311 return true;
4312 else
4313 return false;
4314}
4315
4316/**
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004317 * ixgbe_cache_ring_register - Descriptor ring to register mapping
4318 * @adapter: board private structure to initialize
4319 *
4320 * Once we know the feature-set enabled for the device, we'll cache
4321 * the register offset the descriptor ring is assigned to.
4322 *
4323 * Note, the order the various feature calls is important. It must start with
4324 * the "most" features enabled at the same time, then trickle down to the
4325 * least amount of features turned on at once.
4326 **/
4327static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
4328{
4329 /* start with default case */
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004330 adapter->rx_ring[0]->reg_idx = 0;
4331 adapter->tx_ring[0]->reg_idx = 0;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004332
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004333 if (ixgbe_cache_ring_sriov(adapter))
4334 return;
4335
Yi Zou0331a832009-05-17 12:33:52 +00004336#ifdef IXGBE_FCOE
4337 if (ixgbe_cache_ring_fcoe(adapter))
4338 return;
4339
4340#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004341#ifdef CONFIG_IXGBE_DCB
4342 if (ixgbe_cache_ring_dcb(adapter))
4343 return;
4344
4345#endif
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004346 if (ixgbe_cache_ring_fdir(adapter))
4347 return;
4348
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004349 if (ixgbe_cache_ring_rss(adapter))
4350 return;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004351}
4352
Auke Kok9a799d72007-09-15 14:07:45 -07004353/**
4354 * ixgbe_alloc_queues - Allocate memory for all rings
4355 * @adapter: board private structure to initialize
4356 *
4357 * We allocate one ring per queue at run-time since we don't know the
Jesse Brandeburg4df10462009-03-13 22:15:31 +00004358 * number of queues at compile-time. The polling_netdev array is
4359 * intended for Multiqueue, but should work fine with a single queue.
Auke Kok9a799d72007-09-15 14:07:45 -07004360 **/
Alexander Duyck2f90b862008-11-20 20:52:10 -08004361static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
Auke Kok9a799d72007-09-15 14:07:45 -07004362{
4363 int i;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004364 int orig_node = adapter->node;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004365
4366 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004367 struct ixgbe_ring *ring = adapter->tx_ring[i];
4368 if (orig_node == -1) {
4369 int cur_node = next_online_node(adapter->node);
4370 if (cur_node == MAX_NUMNODES)
4371 cur_node = first_online_node;
4372 adapter->node = cur_node;
4373 }
4374 ring = kzalloc_node(sizeof(struct ixgbe_ring), GFP_KERNEL,
4375 adapter->node);
4376 if (!ring)
4377 ring = kzalloc(sizeof(struct ixgbe_ring), GFP_KERNEL);
4378 if (!ring)
4379 goto err_tx_ring_allocation;
4380 ring->count = adapter->tx_ring_count;
4381 ring->queue_index = i;
4382 ring->numa_node = adapter->node;
4383
4384 adapter->tx_ring[i] = ring;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004385 }
Jesse Brandeburgb9804972008-09-11 20:00:29 -07004386
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004387 /* Restore the adapter's original node */
4388 adapter->node = orig_node;
4389
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004390 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004391 struct ixgbe_ring *ring = adapter->rx_ring[i];
4392 if (orig_node == -1) {
4393 int cur_node = next_online_node(adapter->node);
4394 if (cur_node == MAX_NUMNODES)
4395 cur_node = first_online_node;
4396 adapter->node = cur_node;
4397 }
4398 ring = kzalloc_node(sizeof(struct ixgbe_ring), GFP_KERNEL,
4399 adapter->node);
4400 if (!ring)
4401 ring = kzalloc(sizeof(struct ixgbe_ring), GFP_KERNEL);
4402 if (!ring)
4403 goto err_rx_ring_allocation;
4404 ring->count = adapter->rx_ring_count;
4405 ring->queue_index = i;
4406 ring->numa_node = adapter->node;
4407
4408 adapter->rx_ring[i] = ring;
Auke Kok9a799d72007-09-15 14:07:45 -07004409 }
4410
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004411 /* Restore the adapter's original node */
4412 adapter->node = orig_node;
4413
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004414 ixgbe_cache_ring_register(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004415
4416 return 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004417
4418err_rx_ring_allocation:
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004419 for (i = 0; i < adapter->num_tx_queues; i++)
4420 kfree(adapter->tx_ring[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004421err_tx_ring_allocation:
4422 return -ENOMEM;
4423}
4424
4425/**
4426 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
4427 * @adapter: board private structure to initialize
4428 *
4429 * Attempt to configure the interrupts using the best available
4430 * capabilities of the hardware and the kernel.
4431 **/
Al Virofeea6a52008-11-27 15:34:07 -08004432static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004433{
PJ Waskiewicz8be0e462009-03-31 21:34:05 +00004434 struct ixgbe_hw *hw = &adapter->hw;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004435 int err = 0;
4436 int vector, v_budget;
4437
4438 /*
4439 * It's easy to be greedy for MSI-X vectors, but it really
4440 * doesn't do us much good if we have a lot more vectors
4441 * than CPU's. So let's be conservative and only ask for
PJ Waskiewicz342bde12009-11-12 23:50:43 +00004442 * (roughly) the same number of vectors as there are CPU's.
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004443 */
4444 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
PJ Waskiewicz342bde12009-11-12 23:50:43 +00004445 (int)num_online_cpus()) + NON_Q_VECTORS;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004446
4447 /*
4448 * At the same time, hardware can only support a maximum of
PJ Waskiewicz8be0e462009-03-31 21:34:05 +00004449 * hw.mac->max_msix_vectors vectors. With features
4450 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
4451 * descriptor queues supported by our device. Thus, we cap it off in
4452 * those rare cases where the cpu count also exceeds our vector limit.
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004453 */
PJ Waskiewicz8be0e462009-03-31 21:34:05 +00004454 v_budget = min(v_budget, (int)hw->mac.max_msix_vectors);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004455
4456 /* A failure in MSI-X entry allocation isn't fatal, but it does
4457 * mean we disable MSI-X capabilities of the adapter. */
4458 adapter->msix_entries = kcalloc(v_budget,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004459 sizeof(struct msix_entry), GFP_KERNEL);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004460 if (adapter->msix_entries) {
4461 for (vector = 0; vector < v_budget; vector++)
4462 adapter->msix_entries[vector].entry = vector;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004463
Alexander Duyck7a921c92009-05-06 10:43:28 +00004464 ixgbe_acquire_msix_vectors(adapter, v_budget);
4465
4466 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4467 goto out;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004468 }
David S. Miller26d27842010-05-03 15:18:22 -07004469
Alexander Duyck7a921c92009-05-06 10:43:28 +00004470 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
4471 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004472 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
4473 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
4474 adapter->atr_sample_rate = 0;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004475 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4476 ixgbe_disable_sriov(adapter);
4477
Alexander Duyck7a921c92009-05-06 10:43:28 +00004478 ixgbe_set_num_queues(adapter);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004479
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004480 err = pci_enable_msi(adapter->pdev);
4481 if (!err) {
4482 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
4483 } else {
Emil Tantilov849c4542010-06-03 16:53:41 +00004484 netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev,
4485 "Unable to allocate MSI interrupt, "
4486 "falling back to legacy. Error: %d\n", err);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004487 /* reset err */
4488 err = 0;
4489 }
4490
4491out:
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004492 return err;
4493}
4494
Alexander Duyck7a921c92009-05-06 10:43:28 +00004495/**
4496 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
4497 * @adapter: board private structure to initialize
4498 *
4499 * We allocate one q_vector per queue interrupt. If allocation fails we
4500 * return -ENOMEM.
4501 **/
4502static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter)
4503{
4504 int q_idx, num_q_vectors;
4505 struct ixgbe_q_vector *q_vector;
4506 int napi_vectors;
4507 int (*poll)(struct napi_struct *, int);
4508
4509 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4510 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
4511 napi_vectors = adapter->num_rx_queues;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004512 poll = &ixgbe_clean_rxtx_many;
Alexander Duyck7a921c92009-05-06 10:43:28 +00004513 } else {
4514 num_q_vectors = 1;
4515 napi_vectors = 1;
4516 poll = &ixgbe_poll;
4517 }
4518
4519 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004520 q_vector = kzalloc_node(sizeof(struct ixgbe_q_vector),
4521 GFP_KERNEL, adapter->node);
4522 if (!q_vector)
4523 q_vector = kzalloc(sizeof(struct ixgbe_q_vector),
4524 GFP_KERNEL);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004525 if (!q_vector)
4526 goto err_out;
4527 q_vector->adapter = adapter;
Nelson, Shannonf7554a22009-09-18 09:46:06 +00004528 if (q_vector->txr_count && !q_vector->rxr_count)
4529 q_vector->eitr = adapter->tx_eitr_param;
4530 else
4531 q_vector->eitr = adapter->rx_eitr_param;
Alexander Duyckfe49f042009-06-04 16:00:09 +00004532 q_vector->v_idx = q_idx;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004533 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004534 adapter->q_vector[q_idx] = q_vector;
4535 }
4536
4537 return 0;
4538
4539err_out:
4540 while (q_idx) {
4541 q_idx--;
4542 q_vector = adapter->q_vector[q_idx];
4543 netif_napi_del(&q_vector->napi);
4544 kfree(q_vector);
4545 adapter->q_vector[q_idx] = NULL;
4546 }
4547 return -ENOMEM;
4548}
4549
4550/**
4551 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
4552 * @adapter: board private structure to initialize
4553 *
4554 * This function frees the memory allocated to the q_vectors. In addition if
4555 * NAPI is enabled it will delete any references to the NAPI struct prior
4556 * to freeing the q_vector.
4557 **/
4558static void ixgbe_free_q_vectors(struct ixgbe_adapter *adapter)
4559{
4560 int q_idx, num_q_vectors;
Alexander Duyck7a921c92009-05-06 10:43:28 +00004561
Alexander Duyck91281fd2009-06-04 16:00:27 +00004562 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
Alexander Duyck7a921c92009-05-06 10:43:28 +00004563 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004564 else
Alexander Duyck7a921c92009-05-06 10:43:28 +00004565 num_q_vectors = 1;
Alexander Duyck7a921c92009-05-06 10:43:28 +00004566
4567 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
4568 struct ixgbe_q_vector *q_vector = adapter->q_vector[q_idx];
Alexander Duyck7a921c92009-05-06 10:43:28 +00004569 adapter->q_vector[q_idx] = NULL;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004570 netif_napi_del(&q_vector->napi);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004571 kfree(q_vector);
4572 }
4573}
4574
Don Skidmore7b25cdb2009-08-25 04:47:32 +00004575static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004576{
4577 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4578 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
4579 pci_disable_msix(adapter->pdev);
4580 kfree(adapter->msix_entries);
4581 adapter->msix_entries = NULL;
4582 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
4583 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
4584 pci_disable_msi(adapter->pdev);
4585 }
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004586}
4587
4588/**
4589 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
4590 * @adapter: board private structure to initialize
4591 *
4592 * We determine which interrupt scheme to use based on...
4593 * - Kernel support (MSI, MSI-X)
4594 * - which can be user-defined (via MODULE_PARAM)
4595 * - Hardware queue count (num_*_queues)
4596 * - defined by miscellaneous hardware support/features (RSS, etc.)
4597 **/
Alexander Duyck2f90b862008-11-20 20:52:10 -08004598int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004599{
4600 int err;
4601
4602 /* Number of supported queues */
4603 ixgbe_set_num_queues(adapter);
4604
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004605 err = ixgbe_set_interrupt_capability(adapter);
4606 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004607 e_dev_err("Unable to setup interrupt capabilities\n");
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004608 goto err_set_interrupt;
4609 }
4610
Alexander Duyck7a921c92009-05-06 10:43:28 +00004611 err = ixgbe_alloc_q_vectors(adapter);
4612 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004613 e_dev_err("Unable to allocate memory for queue vectors\n");
Alexander Duyck7a921c92009-05-06 10:43:28 +00004614 goto err_alloc_q_vectors;
4615 }
4616
4617 err = ixgbe_alloc_queues(adapter);
4618 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004619 e_dev_err("Unable to allocate memory for queues\n");
Alexander Duyck7a921c92009-05-06 10:43:28 +00004620 goto err_alloc_queues;
4621 }
4622
Emil Tantilov849c4542010-06-03 16:53:41 +00004623 e_dev_info("Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
Emil Tantilov396e7992010-07-01 20:05:12 +00004624 (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled",
4625 adapter->num_rx_queues, adapter->num_tx_queues);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004626
4627 set_bit(__IXGBE_DOWN, &adapter->state);
4628
4629 return 0;
4630
Alexander Duyck7a921c92009-05-06 10:43:28 +00004631err_alloc_queues:
4632 ixgbe_free_q_vectors(adapter);
4633err_alloc_q_vectors:
4634 ixgbe_reset_interrupt_capability(adapter);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004635err_set_interrupt:
Alexander Duyck7a921c92009-05-06 10:43:28 +00004636 return err;
4637}
4638
4639/**
4640 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
4641 * @adapter: board private structure to clear interrupt scheme on
4642 *
4643 * We go through and clear interrupt specific resources and reset the structure
4644 * to pre-load conditions
4645 **/
4646void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter)
4647{
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004648 int i;
4649
4650 for (i = 0; i < adapter->num_tx_queues; i++) {
4651 kfree(adapter->tx_ring[i]);
4652 adapter->tx_ring[i] = NULL;
4653 }
4654 for (i = 0; i < adapter->num_rx_queues; i++) {
4655 kfree(adapter->rx_ring[i]);
4656 adapter->rx_ring[i] = NULL;
4657 }
Alexander Duyck7a921c92009-05-06 10:43:28 +00004658
4659 ixgbe_free_q_vectors(adapter);
4660 ixgbe_reset_interrupt_capability(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004661}
4662
4663/**
Donald Skidmorec4900be2008-11-20 21:11:42 -08004664 * ixgbe_sfp_timer - worker thread to find a missing module
4665 * @data: pointer to our adapter struct
4666 **/
4667static void ixgbe_sfp_timer(unsigned long data)
4668{
4669 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
4670
Jesse Brandeburg4df10462009-03-13 22:15:31 +00004671 /*
4672 * Do the sfp_timer outside of interrupt context due to the
Donald Skidmorec4900be2008-11-20 21:11:42 -08004673 * delays that sfp+ detection requires
4674 */
4675 schedule_work(&adapter->sfp_task);
4676}
4677
4678/**
4679 * ixgbe_sfp_task - worker thread to find a missing module
4680 * @work: pointer to work_struct containing our data
4681 **/
4682static void ixgbe_sfp_task(struct work_struct *work)
4683{
4684 struct ixgbe_adapter *adapter = container_of(work,
4685 struct ixgbe_adapter,
4686 sfp_task);
4687 struct ixgbe_hw *hw = &adapter->hw;
4688
4689 if ((hw->phy.type == ixgbe_phy_nl) &&
4690 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
4691 s32 ret = hw->phy.ops.identify_sfp(hw);
Don Skidmore63d6e1d2009-07-02 12:50:12 +00004692 if (ret == IXGBE_ERR_SFP_NOT_PRESENT)
Donald Skidmorec4900be2008-11-20 21:11:42 -08004693 goto reschedule;
4694 ret = hw->phy.ops.reset(hw);
4695 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004696 e_dev_err("failed to initialize because an unsupported "
4697 "SFP+ module type was detected.\n");
4698 e_dev_err("Reload the driver after installing a "
4699 "supported module.\n");
Donald Skidmorec4900be2008-11-20 21:11:42 -08004700 unregister_netdev(adapter->netdev);
4701 } else {
Emil Tantilov396e7992010-07-01 20:05:12 +00004702 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
Donald Skidmorec4900be2008-11-20 21:11:42 -08004703 }
4704 /* don't need this routine any more */
4705 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4706 }
4707 return;
4708reschedule:
4709 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
4710 mod_timer(&adapter->sfp_timer,
4711 round_jiffies(jiffies + (2 * HZ)));
4712}
4713
4714/**
Auke Kok9a799d72007-09-15 14:07:45 -07004715 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4716 * @adapter: board private structure to initialize
4717 *
4718 * ixgbe_sw_init initializes the Adapter private data structure.
4719 * Fields are initialized based on PCI device information and
4720 * OS network device settings (MTU size).
4721 **/
4722static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4723{
4724 struct ixgbe_hw *hw = &adapter->hw;
4725 struct pci_dev *pdev = adapter->pdev;
Peter Waskiewicz9a713e72010-02-10 16:07:54 +00004726 struct net_device *dev = adapter->netdev;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004727 unsigned int rss;
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08004728#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08004729 int j;
4730 struct tc_configuration *tc;
4731#endif
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004732
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07004733 /* PCI config space info */
4734
4735 hw->vendor_id = pdev->vendor;
4736 hw->device_id = pdev->device;
4737 hw->revision_id = pdev->revision;
4738 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4739 hw->subsystem_device_id = pdev->subsystem_device;
4740
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004741 /* Set capability flags */
4742 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
4743 adapter->ring_feature[RING_F_RSS].indices = rss;
4744 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
Alexander Duyck2f90b862008-11-20 20:52:10 -08004745 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
Don Skidmorebf069c92009-05-07 10:39:54 +00004746 if (hw->mac.type == ixgbe_mac_82598EB) {
4747 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4748 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004749 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
Don Skidmorebf069c92009-05-07 10:39:54 +00004750 } else if (hw->mac.type == ixgbe_mac_82599EB) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004751 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00004752 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4753 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07004754 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4755 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
Peter Waskiewicz9a713e72010-02-10 16:07:54 +00004756 if (dev->features & NETIF_F_NTUPLE) {
4757 /* Flow Director perfect filter enabled */
4758 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
4759 adapter->atr_sample_rate = 0;
4760 spin_lock_init(&adapter->fdir_perfect_lock);
4761 } else {
4762 /* Flow Director hash filters enabled */
4763 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
4764 adapter->atr_sample_rate = 20;
4765 }
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004766 adapter->ring_feature[RING_F_FDIR].indices =
4767 IXGBE_MAX_FDIR_INDICES;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004768 adapter->fdir_pballoc = 0;
Yi Zoueacd73f2009-05-13 13:11:06 +00004769#ifdef IXGBE_FCOE
Yi Zou0d551582009-07-22 14:07:12 +00004770 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4771 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4772 adapter->ring_feature[RING_F_FCOE].indices = 0;
Yi Zou61a0f422009-12-03 11:32:22 +00004773#ifdef CONFIG_IXGBE_DCB
Yi Zou6ee16522009-08-31 12:34:28 +00004774 /* Default traffic class to use for FCoE */
4775 adapter->fcoe.tc = IXGBE_FCOE_DEFTC;
John Fastabend56075a92010-07-26 20:41:31 +00004776 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
Yi Zou61a0f422009-12-03 11:32:22 +00004777#endif
Yi Zoueacd73f2009-05-13 13:11:06 +00004778#endif /* IXGBE_FCOE */
Alexander Duyckf8212f92009-04-27 22:42:37 +00004779 }
Alexander Duyck2f90b862008-11-20 20:52:10 -08004780
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08004781#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08004782 /* Configure DCB traffic classes */
4783 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4784 tc = &adapter->dcb_cfg.tc_config[j];
4785 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4786 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4787 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4788 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4789 tc->dcb_pfc = pfc_disabled;
4790 }
4791 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4792 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4793 adapter->dcb_cfg.rx_pba_cfg = pba_equal;
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00004794 adapter->dcb_cfg.pfc_mode_enable = false;
Alexander Duyck2f90b862008-11-20 20:52:10 -08004795 adapter->dcb_cfg.round_robin_enable = false;
4796 adapter->dcb_set_bitmap = 0x00;
4797 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
4798 adapter->ring_feature[RING_F_DCB].indices);
4799
4800#endif
Auke Kok9a799d72007-09-15 14:07:45 -07004801
4802 /* default flow control settings */
Don Skidmorecd7664f2009-03-31 21:33:44 +00004803 hw->fc.requested_mode = ixgbe_fc_full;
Don Skidmore71fd5702009-03-31 21:35:05 +00004804 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00004805#ifdef CONFIG_DCB
4806 adapter->last_lfc_mode = hw->fc.current_mode;
4807#endif
Jesse Brandeburg2b9ade92008-08-26 04:27:10 -07004808 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
4809 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
4810 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4811 hw->fc.send_xon = true;
Don Skidmore71fd5702009-03-31 21:35:05 +00004812 hw->fc.disable_fc_autoneg = false;
Auke Kok9a799d72007-09-15 14:07:45 -07004813
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07004814 /* enable itr by default in dynamic mode */
Nelson, Shannonf7554a22009-09-18 09:46:06 +00004815 adapter->rx_itr_setting = 1;
4816 adapter->rx_eitr_param = 20000;
4817 adapter->tx_itr_setting = 1;
4818 adapter->tx_eitr_param = 10000;
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07004819
4820 /* set defaults for eitr in MegaBytes */
4821 adapter->eitr_low = 10;
4822 adapter->eitr_high = 20;
4823
4824 /* set default ring sizes */
4825 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4826 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4827
Auke Kok9a799d72007-09-15 14:07:45 -07004828 /* initialize eeprom parameters */
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07004829 if (ixgbe_init_eeprom_params_generic(hw)) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004830 e_dev_err("EEPROM initialization failed\n");
Auke Kok9a799d72007-09-15 14:07:45 -07004831 return -EIO;
4832 }
4833
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004834 /* enable rx csum by default */
Auke Kok9a799d72007-09-15 14:07:45 -07004835 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
4836
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004837 /* get assigned NUMA node */
4838 adapter->node = dev_to_node(&pdev->dev);
4839
Auke Kok9a799d72007-09-15 14:07:45 -07004840 set_bit(__IXGBE_DOWN, &adapter->state);
4841
4842 return 0;
4843}
4844
4845/**
4846 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4847 * @adapter: board private structure
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004848 * @tx_ring: tx descriptor ring (for a specific queue) to setup
Auke Kok9a799d72007-09-15 14:07:45 -07004849 *
4850 * Return 0 on success, negative on failure
4851 **/
4852int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004853 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07004854{
4855 struct pci_dev *pdev = adapter->pdev;
4856 int size;
4857
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004858 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004859 tx_ring->tx_buffer_info = vmalloc_node(size, tx_ring->numa_node);
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004860 if (!tx_ring->tx_buffer_info)
4861 tx_ring->tx_buffer_info = vmalloc(size);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004862 if (!tx_ring->tx_buffer_info)
4863 goto err;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004864 memset(tx_ring->tx_buffer_info, 0, size);
Auke Kok9a799d72007-09-15 14:07:45 -07004865
4866 /* round up to nearest 4K */
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -08004867 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004868 tx_ring->size = ALIGN(tx_ring->size, 4096);
Auke Kok9a799d72007-09-15 14:07:45 -07004869
Nick Nunley1b507732010-04-27 13:10:27 +00004870 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
4871 &tx_ring->dma, GFP_KERNEL);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004872 if (!tx_ring->desc)
4873 goto err;
Auke Kok9a799d72007-09-15 14:07:45 -07004874
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004875 tx_ring->next_to_use = 0;
4876 tx_ring->next_to_clean = 0;
4877 tx_ring->work_limit = tx_ring->count;
Auke Kok9a799d72007-09-15 14:07:45 -07004878 return 0;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004879
4880err:
4881 vfree(tx_ring->tx_buffer_info);
4882 tx_ring->tx_buffer_info = NULL;
Emil Tantilov396e7992010-07-01 20:05:12 +00004883 e_err(probe, "Unable to allocate memory for the Tx descriptor ring\n");
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004884 return -ENOMEM;
Auke Kok9a799d72007-09-15 14:07:45 -07004885}
4886
4887/**
Alexander Duyck69888672008-09-11 20:05:39 -07004888 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4889 * @adapter: board private structure
4890 *
4891 * If this function returns with an error, then it's possible one or
4892 * more of the rings is populated (while the rest are not). It is the
4893 * callers duty to clean those orphaned rings.
4894 *
4895 * Return 0 on success, negative on failure
4896 **/
4897static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4898{
4899 int i, err = 0;
4900
4901 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004902 err = ixgbe_setup_tx_resources(adapter, adapter->tx_ring[i]);
Alexander Duyck69888672008-09-11 20:05:39 -07004903 if (!err)
4904 continue;
Emil Tantilov396e7992010-07-01 20:05:12 +00004905 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
Alexander Duyck69888672008-09-11 20:05:39 -07004906 break;
4907 }
4908
4909 return err;
4910}
4911
4912/**
Auke Kok9a799d72007-09-15 14:07:45 -07004913 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4914 * @adapter: board private structure
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004915 * @rx_ring: rx descriptor ring (for a specific queue) to setup
Auke Kok9a799d72007-09-15 14:07:45 -07004916 *
4917 * Returns 0 on success, negative on failure
4918 **/
4919int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004920 struct ixgbe_ring *rx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07004921{
4922 struct pci_dev *pdev = adapter->pdev;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004923 int size;
Auke Kok9a799d72007-09-15 14:07:45 -07004924
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004925 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004926 rx_ring->rx_buffer_info = vmalloc_node(size, adapter->node);
4927 if (!rx_ring->rx_buffer_info)
4928 rx_ring->rx_buffer_info = vmalloc(size);
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004929 if (!rx_ring->rx_buffer_info) {
Emil Tantilov396e7992010-07-01 20:05:12 +00004930 e_err(probe, "vmalloc allocation failed for the Rx "
4931 "descriptor ring\n");
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07004932 goto alloc_failed;
Auke Kok9a799d72007-09-15 14:07:45 -07004933 }
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004934 memset(rx_ring->rx_buffer_info, 0, size);
Auke Kok9a799d72007-09-15 14:07:45 -07004935
Auke Kok9a799d72007-09-15 14:07:45 -07004936 /* Round up to nearest 4K */
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004937 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4938 rx_ring->size = ALIGN(rx_ring->size, 4096);
Auke Kok9a799d72007-09-15 14:07:45 -07004939
Nick Nunley1b507732010-04-27 13:10:27 +00004940 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
4941 &rx_ring->dma, GFP_KERNEL);
Auke Kok9a799d72007-09-15 14:07:45 -07004942
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004943 if (!rx_ring->desc) {
Emil Tantilov396e7992010-07-01 20:05:12 +00004944 e_err(probe, "Memory allocation failed for the Rx "
4945 "descriptor ring\n");
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004946 vfree(rx_ring->rx_buffer_info);
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07004947 goto alloc_failed;
Auke Kok9a799d72007-09-15 14:07:45 -07004948 }
4949
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004950 rx_ring->next_to_clean = 0;
4951 rx_ring->next_to_use = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07004952
4953 return 0;
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07004954
4955alloc_failed:
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07004956 return -ENOMEM;
Auke Kok9a799d72007-09-15 14:07:45 -07004957}
4958
4959/**
Alexander Duyck69888672008-09-11 20:05:39 -07004960 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4961 * @adapter: board private structure
4962 *
4963 * If this function returns with an error, then it's possible one or
4964 * more of the rings is populated (while the rest are not). It is the
4965 * callers duty to clean those orphaned rings.
4966 *
4967 * Return 0 on success, negative on failure
4968 **/
4969
4970static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4971{
4972 int i, err = 0;
4973
4974 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004975 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
Alexander Duyck69888672008-09-11 20:05:39 -07004976 if (!err)
4977 continue;
Emil Tantilov396e7992010-07-01 20:05:12 +00004978 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
Alexander Duyck69888672008-09-11 20:05:39 -07004979 break;
4980 }
4981
4982 return err;
4983}
4984
4985/**
Auke Kok9a799d72007-09-15 14:07:45 -07004986 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4987 * @adapter: board private structure
4988 * @tx_ring: Tx descriptor ring for a specific queue
4989 *
4990 * Free all transmit software resources
4991 **/
Jesse Brandeburgc431f972008-09-11 19:59:16 -07004992void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
4993 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07004994{
4995 struct pci_dev *pdev = adapter->pdev;
4996
4997 ixgbe_clean_tx_ring(adapter, tx_ring);
4998
4999 vfree(tx_ring->tx_buffer_info);
5000 tx_ring->tx_buffer_info = NULL;
5001
Nick Nunley1b507732010-04-27 13:10:27 +00005002 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
5003 tx_ring->dma);
Auke Kok9a799d72007-09-15 14:07:45 -07005004
5005 tx_ring->desc = NULL;
5006}
5007
5008/**
5009 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5010 * @adapter: board private structure
5011 *
5012 * Free all transmit software resources
5013 **/
5014static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5015{
5016 int i;
5017
5018 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005019 if (adapter->tx_ring[i]->desc)
5020 ixgbe_free_tx_resources(adapter, adapter->tx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07005021}
5022
5023/**
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005024 * ixgbe_free_rx_resources - Free Rx Resources
Auke Kok9a799d72007-09-15 14:07:45 -07005025 * @adapter: board private structure
5026 * @rx_ring: ring to clean the resources from
5027 *
5028 * Free all receive software resources
5029 **/
Jesse Brandeburgc431f972008-09-11 19:59:16 -07005030void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
5031 struct ixgbe_ring *rx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07005032{
5033 struct pci_dev *pdev = adapter->pdev;
5034
5035 ixgbe_clean_rx_ring(adapter, rx_ring);
5036
5037 vfree(rx_ring->rx_buffer_info);
5038 rx_ring->rx_buffer_info = NULL;
5039
Nick Nunley1b507732010-04-27 13:10:27 +00005040 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
5041 rx_ring->dma);
Auke Kok9a799d72007-09-15 14:07:45 -07005042
5043 rx_ring->desc = NULL;
5044}
5045
5046/**
5047 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5048 * @adapter: board private structure
5049 *
5050 * Free all receive software resources
5051 **/
5052static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5053{
5054 int i;
5055
5056 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005057 if (adapter->rx_ring[i]->desc)
5058 ixgbe_free_rx_resources(adapter, adapter->rx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07005059}
5060
5061/**
Auke Kok9a799d72007-09-15 14:07:45 -07005062 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5063 * @netdev: network interface device structure
5064 * @new_mtu: new value for maximum frame size
5065 *
5066 * Returns 0 on success, negative on failure
5067 **/
5068static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5069{
5070 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5071 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5072
Jesse Brandeburg42c783c2008-09-11 19:56:28 -07005073 /* MTU < 68 is an error and causes problems on some kernels */
5074 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
Auke Kok9a799d72007-09-15 14:07:45 -07005075 return -EINVAL;
5076
Emil Tantilov396e7992010-07-01 20:05:12 +00005077 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08005078 /* must set new MTU before calling down or up */
Auke Kok9a799d72007-09-15 14:07:45 -07005079 netdev->mtu = new_mtu;
5080
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08005081 if (netif_running(netdev))
5082 ixgbe_reinit_locked(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005083
5084 return 0;
5085}
5086
5087/**
5088 * ixgbe_open - Called when a network interface is made active
5089 * @netdev: network interface device structure
5090 *
5091 * Returns 0 on success, negative value on failure
5092 *
5093 * The open entry point is called when a network interface is made
5094 * active by the system (IFF_UP). At this point all resources needed
5095 * for transmit and receive operations are allocated, the interrupt
5096 * handler is registered with the OS, the watchdog timer is started,
5097 * and the stack is notified that the interface is ready.
5098 **/
5099static int ixgbe_open(struct net_device *netdev)
5100{
5101 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5102 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07005103
Auke Kok4bebfaa2008-02-11 09:26:01 -08005104 /* disallow open during test */
5105 if (test_bit(__IXGBE_TESTING, &adapter->state))
5106 return -EBUSY;
5107
Jesse Brandeburg54386462009-04-17 20:44:27 +00005108 netif_carrier_off(netdev);
5109
Auke Kok9a799d72007-09-15 14:07:45 -07005110 /* allocate transmit descriptors */
5111 err = ixgbe_setup_all_tx_resources(adapter);
5112 if (err)
5113 goto err_setup_tx;
5114
Auke Kok9a799d72007-09-15 14:07:45 -07005115 /* allocate receive descriptors */
5116 err = ixgbe_setup_all_rx_resources(adapter);
5117 if (err)
5118 goto err_setup_rx;
5119
5120 ixgbe_configure(adapter);
5121
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08005122 err = ixgbe_request_irq(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005123 if (err)
5124 goto err_req_irq;
5125
Auke Kok9a799d72007-09-15 14:07:45 -07005126 err = ixgbe_up_complete(adapter);
5127 if (err)
5128 goto err_up;
5129
Jeff Kirsherd55b53f2008-07-18 04:33:03 -07005130 netif_tx_start_all_queues(netdev);
5131
Auke Kok9a799d72007-09-15 14:07:45 -07005132 return 0;
5133
5134err_up:
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08005135 ixgbe_release_hw_control(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005136 ixgbe_free_irq(adapter);
5137err_req_irq:
Auke Kok9a799d72007-09-15 14:07:45 -07005138err_setup_rx:
Mallikarjuna R Chilakalaa20a1192009-03-31 21:34:44 +00005139 ixgbe_free_all_rx_resources(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005140err_setup_tx:
Mallikarjuna R Chilakalaa20a1192009-03-31 21:34:44 +00005141 ixgbe_free_all_tx_resources(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005142 ixgbe_reset(adapter);
5143
5144 return err;
5145}
5146
5147/**
5148 * ixgbe_close - Disables a network interface
5149 * @netdev: network interface device structure
5150 *
5151 * Returns 0, this is not allowed to fail
5152 *
5153 * The close entry point is called when an interface is de-activated
5154 * by the OS. The hardware is still under the drivers control, but
5155 * needs to be disabled. A global MAC reset is issued to stop the
5156 * hardware, and all transmit and receive resources are freed.
5157 **/
5158static int ixgbe_close(struct net_device *netdev)
5159{
5160 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07005161
5162 ixgbe_down(adapter);
5163 ixgbe_free_irq(adapter);
5164
5165 ixgbe_free_all_tx_resources(adapter);
5166 ixgbe_free_all_rx_resources(adapter);
5167
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08005168 ixgbe_release_hw_control(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005169
5170 return 0;
5171}
5172
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005173#ifdef CONFIG_PM
5174static int ixgbe_resume(struct pci_dev *pdev)
5175{
5176 struct net_device *netdev = pci_get_drvdata(pdev);
5177 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5178 u32 err;
5179
5180 pci_set_power_state(pdev, PCI_D0);
5181 pci_restore_state(pdev);
Don Skidmore656ab812009-12-23 21:19:19 -08005182 /*
5183 * pci_restore_state clears dev->state_saved so call
5184 * pci_save_state to restore it.
5185 */
5186 pci_save_state(pdev);
gouji-new9ce77662009-05-06 10:44:45 +00005187
5188 err = pci_enable_device_mem(pdev);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005189 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00005190 e_dev_err("Cannot enable PCI device from suspend\n");
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005191 return err;
5192 }
5193 pci_set_master(pdev);
5194
Don Skidmoredd4d8ca2009-04-29 00:22:31 -07005195 pci_wake_from_d3(pdev, false);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005196
5197 err = ixgbe_init_interrupt_scheme(adapter);
5198 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00005199 e_dev_err("Cannot initialize interrupts for device\n");
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005200 return err;
5201 }
5202
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005203 ixgbe_reset(adapter);
5204
Waskiewicz Jr, Peter P495dce12009-04-23 11:15:18 +00005205 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5206
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005207 if (netif_running(netdev)) {
5208 err = ixgbe_open(adapter->netdev);
5209 if (err)
5210 return err;
5211 }
5212
5213 netif_device_attach(netdev);
5214
5215 return 0;
5216}
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005217#endif /* CONFIG_PM */
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00005218
5219static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005220{
5221 struct net_device *netdev = pci_get_drvdata(pdev);
5222 struct ixgbe_adapter *adapter = netdev_priv(netdev);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005223 struct ixgbe_hw *hw = &adapter->hw;
5224 u32 ctrl, fctrl;
5225 u32 wufc = adapter->wol;
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005226#ifdef CONFIG_PM
5227 int retval = 0;
5228#endif
5229
5230 netif_device_detach(netdev);
5231
5232 if (netif_running(netdev)) {
5233 ixgbe_down(adapter);
5234 ixgbe_free_irq(adapter);
5235 ixgbe_free_all_tx_resources(adapter);
5236 ixgbe_free_all_rx_resources(adapter);
5237 }
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005238
5239#ifdef CONFIG_PM
5240 retval = pci_save_state(pdev);
5241 if (retval)
5242 return retval;
Jesse Brandeburg4df10462009-03-13 22:15:31 +00005243
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005244#endif
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005245 if (wufc) {
5246 ixgbe_set_rx_mode(netdev);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005247
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005248 /* turn on all-multi mode if wake on multicast is enabled */
5249 if (wufc & IXGBE_WUFC_MC) {
5250 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5251 fctrl |= IXGBE_FCTRL_MPE;
5252 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5253 }
5254
5255 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5256 ctrl |= IXGBE_CTRL_GIO_DIS;
5257 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5258
5259 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5260 } else {
5261 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5262 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5263 }
5264
Don Skidmoredd4d8ca2009-04-29 00:22:31 -07005265 if (wufc && hw->mac.type == ixgbe_mac_82599EB)
5266 pci_wake_from_d3(pdev, true);
5267 else
5268 pci_wake_from_d3(pdev, false);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005269
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00005270 *enable_wake = !!wufc;
5271
Andy Gospodarekfa378132010-06-29 18:28:12 +00005272 ixgbe_clear_interrupt_scheme(adapter);
5273
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005274 ixgbe_release_hw_control(adapter);
5275
5276 pci_disable_device(pdev);
5277
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005278 return 0;
5279}
5280
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00005281#ifdef CONFIG_PM
5282static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5283{
5284 int retval;
5285 bool wake;
5286
5287 retval = __ixgbe_shutdown(pdev, &wake);
5288 if (retval)
5289 return retval;
5290
5291 if (wake) {
5292 pci_prepare_to_sleep(pdev);
5293 } else {
5294 pci_wake_from_d3(pdev, false);
5295 pci_set_power_state(pdev, PCI_D3hot);
5296 }
5297
5298 return 0;
5299}
5300#endif /* CONFIG_PM */
5301
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005302static void ixgbe_shutdown(struct pci_dev *pdev)
5303{
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00005304 bool wake;
5305
5306 __ixgbe_shutdown(pdev, &wake);
5307
5308 if (system_state == SYSTEM_POWER_OFF) {
5309 pci_wake_from_d3(pdev, wake);
5310 pci_set_power_state(pdev, PCI_D3hot);
5311 }
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005312}
5313
5314/**
Auke Kok9a799d72007-09-15 14:07:45 -07005315 * ixgbe_update_stats - Update the board statistics counters.
5316 * @adapter: board private structure
5317 **/
5318void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5319{
Ajit Khaparde2d86f132009-10-07 02:43:49 +00005320 struct net_device *netdev = adapter->netdev;
Auke Kok9a799d72007-09-15 14:07:45 -07005321 struct ixgbe_hw *hw = &adapter->hw;
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005322 u64 total_mpc = 0;
5323 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
Mallikarjuna R Chilakalaeb985f02009-12-15 11:56:59 +00005324 u64 non_eop_descs = 0, restart_queue = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07005325
Don Skidmored08935c2010-06-11 13:20:29 +00005326 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5327 test_bit(__IXGBE_RESETTING, &adapter->state))
5328 return;
5329
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00005330 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00005331 u64 rsc_count = 0;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00005332 u64 rsc_flush = 0;
PJ Waskiewiczd51019a2009-03-13 22:12:48 +00005333 for (i = 0; i < 16; i++)
5334 adapter->hw_rx_no_dma_resources +=
5335 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00005336 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005337 rsc_count += adapter->rx_ring[i]->rsc_count;
5338 rsc_flush += adapter->rx_ring[i]->rsc_flush;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00005339 }
5340 adapter->rsc_total_count = rsc_count;
5341 adapter->rsc_total_flush = rsc_flush;
PJ Waskiewiczd51019a2009-03-13 22:12:48 +00005342 }
5343
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00005344 /* gather some stats to the adapter struct that are per queue */
5345 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005346 restart_queue += adapter->tx_ring[i]->restart_queue;
Mallikarjuna R Chilakalaeb985f02009-12-15 11:56:59 +00005347 adapter->restart_queue = restart_queue;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00005348
5349 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005350 non_eop_descs += adapter->rx_ring[i]->non_eop_descs;
Mallikarjuna R Chilakalaeb985f02009-12-15 11:56:59 +00005351 adapter->non_eop_descs = non_eop_descs;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00005352
Auke Kok9a799d72007-09-15 14:07:45 -07005353 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005354 for (i = 0; i < 8; i++) {
5355 /* for packet buffers not used, the register should read 0 */
5356 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5357 missed_rx += mpc;
5358 adapter->stats.mpc[i] += mpc;
5359 total_mpc += adapter->stats.mpc[i];
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005360 if (hw->mac.type == ixgbe_mac_82598EB)
5361 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
Alexander Duyck2f90b862008-11-20 20:52:10 -08005362 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5363 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5364 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5365 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005366 if (hw->mac.type == ixgbe_mac_82599EB) {
5367 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
5368 IXGBE_PXONRXCNT(i));
5369 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
5370 IXGBE_PXOFFRXCNT(i));
5371 adapter->stats.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005372 } else {
5373 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
5374 IXGBE_PXONRXC(i));
5375 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
5376 IXGBE_PXOFFRXC(i));
5377 }
Alexander Duyck2f90b862008-11-20 20:52:10 -08005378 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
5379 IXGBE_PXONTXC(i));
Alexander Duyck2f90b862008-11-20 20:52:10 -08005380 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005381 IXGBE_PXOFFTXC(i));
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005382 }
5383 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5384 /* work around hardware counting issue */
5385 adapter->stats.gprc -= missed_rx;
Auke Kok9a799d72007-09-15 14:07:45 -07005386
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005387 /* 82598 hardware only has a 32 bit counter in the high register */
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005388 if (hw->mac.type == ixgbe_mac_82599EB) {
Ben Greearaad71912009-09-30 12:08:16 +00005389 u64 tmp;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005390 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
Ben Greearaad71912009-09-30 12:08:16 +00005391 tmp = IXGBE_READ_REG(hw, IXGBE_GORCH) & 0xF; /* 4 high bits of GORC */
5392 adapter->stats.gorc += (tmp << 32);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005393 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
Ben Greearaad71912009-09-30 12:08:16 +00005394 tmp = IXGBE_READ_REG(hw, IXGBE_GOTCH) & 0xF; /* 4 high bits of GOTC */
5395 adapter->stats.gotc += (tmp << 32);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005396 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5397 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5398 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5399 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005400 adapter->stats.fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5401 adapter->stats.fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
Yi Zou6d455222009-05-13 13:12:16 +00005402#ifdef IXGBE_FCOE
5403 adapter->stats.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5404 adapter->stats.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5405 adapter->stats.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5406 adapter->stats.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5407 adapter->stats.fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5408 adapter->stats.fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5409#endif /* IXGBE_FCOE */
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005410 } else {
5411 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5412 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
5413 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5414 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5415 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5416 }
Auke Kok9a799d72007-09-15 14:07:45 -07005417 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5418 adapter->stats.bprc += bprc;
5419 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005420 if (hw->mac.type == ixgbe_mac_82598EB)
5421 adapter->stats.mprc -= bprc;
Auke Kok9a799d72007-09-15 14:07:45 -07005422 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5423 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5424 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5425 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5426 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5427 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5428 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
Auke Kok9a799d72007-09-15 14:07:45 -07005429 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005430 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5431 adapter->stats.lxontxc += lxon;
5432 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5433 adapter->stats.lxofftxc += lxoff;
Auke Kok9a799d72007-09-15 14:07:45 -07005434 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5435 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005436 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5437 /*
5438 * 82598 errata - tx of flow control packets is included in tx counters
5439 */
5440 xon_off_tot = lxon + lxoff;
5441 adapter->stats.gptc -= xon_off_tot;
5442 adapter->stats.mptc -= xon_off_tot;
5443 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
Auke Kok9a799d72007-09-15 14:07:45 -07005444 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5445 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5446 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
Auke Kok9a799d72007-09-15 14:07:45 -07005447 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5448 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005449 adapter->stats.ptc64 -= xon_off_tot;
Auke Kok9a799d72007-09-15 14:07:45 -07005450 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5451 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5452 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5453 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5454 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
Auke Kok9a799d72007-09-15 14:07:45 -07005455 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5456
5457 /* Fill out the OS statistics structure */
Ajit Khaparde2d86f132009-10-07 02:43:49 +00005458 netdev->stats.multicast = adapter->stats.mprc;
Auke Kok9a799d72007-09-15 14:07:45 -07005459
5460 /* Rx Errors */
Ajit Khaparde2d86f132009-10-07 02:43:49 +00005461 netdev->stats.rx_errors = adapter->stats.crcerrs +
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005462 adapter->stats.rlec;
Ajit Khaparde2d86f132009-10-07 02:43:49 +00005463 netdev->stats.rx_dropped = 0;
5464 netdev->stats.rx_length_errors = adapter->stats.rlec;
5465 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
5466 netdev->stats.rx_missed_errors = total_mpc;
Auke Kok9a799d72007-09-15 14:07:45 -07005467}
5468
5469/**
5470 * ixgbe_watchdog - Timer Call-back
5471 * @data: pointer to adapter cast into an unsigned long
5472 **/
5473static void ixgbe_watchdog(unsigned long data)
5474{
5475 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005476 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyckfe49f042009-06-04 16:00:09 +00005477 u64 eics = 0;
5478 int i;
Auke Kok9a799d72007-09-15 14:07:45 -07005479
Alexander Duyckfe49f042009-06-04 16:00:09 +00005480 /*
5481 * Do the watchdog outside of interrupt context due to the lovely
5482 * delays that some of the newer hardware requires
5483 */
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00005484
Alexander Duyckfe49f042009-06-04 16:00:09 +00005485 if (test_bit(__IXGBE_DOWN, &adapter->state))
5486 goto watchdog_short_circuit;
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00005487
Alexander Duyckfe49f042009-06-04 16:00:09 +00005488 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5489 /*
5490 * for legacy and MSI interrupts don't set any bits
5491 * that are enabled for EIAM, because this operation
5492 * would set *both* EIMS and EICS for any bit in EIAM
5493 */
5494 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5495 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5496 goto watchdog_reschedule;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005497 }
5498
Alexander Duyckfe49f042009-06-04 16:00:09 +00005499 /* get one bit for every active tx/rx interrupt vector */
5500 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
5501 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5502 if (qv->rxr_count || qv->txr_count)
5503 eics |= ((u64)1 << i);
5504 }
5505
5506 /* Cause software interrupt to ensure rx rings are cleaned */
5507 ixgbe_irq_rearm_queues(adapter, eics);
5508
5509watchdog_reschedule:
5510 /* Reset the timer */
5511 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
5512
5513watchdog_short_circuit:
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005514 schedule_work(&adapter->watchdog_task);
5515}
5516
5517/**
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005518 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
5519 * @work: pointer to work_struct containing our data
5520 **/
5521static void ixgbe_multispeed_fiber_task(struct work_struct *work)
5522{
5523 struct ixgbe_adapter *adapter = container_of(work,
5524 struct ixgbe_adapter,
5525 multispeed_fiber_task);
5526 struct ixgbe_hw *hw = &adapter->hw;
5527 u32 autoneg;
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00005528 bool negotiation;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005529
5530 adapter->flags |= IXGBE_FLAG_IN_SFP_LINK_TASK;
Mallikarjuna R Chilakalaa1f25322009-06-30 11:44:36 +00005531 autoneg = hw->phy.autoneg_advertised;
5532 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00005533 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
Mallikarjuna R Chilakala1097cd12010-03-18 14:34:52 +00005534 hw->mac.autotry_restart = false;
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00005535 if (hw->mac.ops.setup_link)
5536 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005537 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5538 adapter->flags &= ~IXGBE_FLAG_IN_SFP_LINK_TASK;
5539}
5540
5541/**
5542 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
5543 * @work: pointer to work_struct containing our data
5544 **/
5545static void ixgbe_sfp_config_module_task(struct work_struct *work)
5546{
5547 struct ixgbe_adapter *adapter = container_of(work,
5548 struct ixgbe_adapter,
5549 sfp_config_module_task);
5550 struct ixgbe_hw *hw = &adapter->hw;
5551 u32 err;
5552
5553 adapter->flags |= IXGBE_FLAG_IN_SFP_MOD_TASK;
Don Skidmore63d6e1d2009-07-02 12:50:12 +00005554
5555 /* Time for electrical oscillations to settle down */
5556 msleep(100);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005557 err = hw->phy.ops.identify_sfp(hw);
Don Skidmore63d6e1d2009-07-02 12:50:12 +00005558
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005559 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Emil Tantilov849c4542010-06-03 16:53:41 +00005560 e_dev_err("failed to initialize because an unsupported SFP+ "
5561 "module type was detected.\n");
5562 e_dev_err("Reload the driver after installing a supported "
5563 "module.\n");
Don Skidmore63d6e1d2009-07-02 12:50:12 +00005564 unregister_netdev(adapter->netdev);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005565 return;
5566 }
5567 hw->mac.ops.setup_sfp(hw);
5568
Tony Breeds8d1c3c02009-04-09 22:29:10 +00005569 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005570 /* This will also work for DA Twinax connections */
5571 schedule_work(&adapter->multispeed_fiber_task);
5572 adapter->flags &= ~IXGBE_FLAG_IN_SFP_MOD_TASK;
5573}
5574
5575/**
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005576 * ixgbe_fdir_reinit_task - worker thread to reinit FDIR filter table
5577 * @work: pointer to work_struct containing our data
5578 **/
5579static void ixgbe_fdir_reinit_task(struct work_struct *work)
5580{
5581 struct ixgbe_adapter *adapter = container_of(work,
5582 struct ixgbe_adapter,
5583 fdir_reinit_task);
5584 struct ixgbe_hw *hw = &adapter->hw;
5585 int i;
5586
5587 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5588 for (i = 0; i < adapter->num_tx_queues; i++)
5589 set_bit(__IXGBE_FDIR_INIT_DONE,
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005590 &(adapter->tx_ring[i]->reinit_state));
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005591 } else {
Emil Tantilov396e7992010-07-01 20:05:12 +00005592 e_err(probe, "failed to finish FDIR re-initialization, "
Emil Tantilov849c4542010-06-03 16:53:41 +00005593 "ignored adding FDIR ATR filters\n");
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005594 }
5595 /* Done FDIR Re-initialization, enable transmits */
5596 netif_tx_start_all_queues(adapter->netdev);
5597}
5598
John Fastabend10eec952010-02-03 14:23:32 +00005599static DEFINE_MUTEX(ixgbe_watchdog_lock);
5600
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005601/**
Alexander Duyck69888672008-09-11 20:05:39 -07005602 * ixgbe_watchdog_task - worker thread to bring link up
5603 * @work: pointer to work_struct containing our data
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005604 **/
5605static void ixgbe_watchdog_task(struct work_struct *work)
5606{
5607 struct ixgbe_adapter *adapter = container_of(work,
5608 struct ixgbe_adapter,
5609 watchdog_task);
5610 struct net_device *netdev = adapter->netdev;
5611 struct ixgbe_hw *hw = &adapter->hw;
John Fastabend10eec952010-02-03 14:23:32 +00005612 u32 link_speed;
5613 bool link_up;
Nelson, Shannonbc59fcd2009-04-27 22:43:12 +00005614 int i;
5615 struct ixgbe_ring *tx_ring;
5616 int some_tx_pending = 0;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005617
John Fastabend10eec952010-02-03 14:23:32 +00005618 mutex_lock(&ixgbe_watchdog_lock);
5619
5620 link_up = adapter->link_up;
5621 link_speed = adapter->link_speed;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005622
5623 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
5624 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005625 if (link_up) {
5626#ifdef CONFIG_DCB
5627 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
5628 for (i = 0; i < MAX_TRAFFIC_CLASS; i++)
Mallikarjuna R Chilakala620fa032009-06-04 11:11:13 +00005629 hw->mac.ops.fc_enable(hw, i);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005630 } else {
Mallikarjuna R Chilakala620fa032009-06-04 11:11:13 +00005631 hw->mac.ops.fc_enable(hw, 0);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005632 }
5633#else
Mallikarjuna R Chilakala620fa032009-06-04 11:11:13 +00005634 hw->mac.ops.fc_enable(hw, 0);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005635#endif
5636 }
5637
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005638 if (link_up ||
5639 time_after(jiffies, (adapter->link_check_timeout +
5640 IXGBE_TRY_LINK_TIMEOUT))) {
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005641 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005642 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005643 }
5644 adapter->link_up = link_up;
5645 adapter->link_speed = link_speed;
5646 }
Auke Kok9a799d72007-09-15 14:07:45 -07005647
5648 if (link_up) {
5649 if (!netif_carrier_ok(netdev)) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005650 bool flow_rx, flow_tx;
5651
5652 if (hw->mac.type == ixgbe_mac_82599EB) {
5653 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5654 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
Peter P Waskiewicz Jr078788b2009-07-16 15:50:32 +00005655 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5656 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005657 } else {
5658 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5659 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
Peter P Waskiewicz Jr078788b2009-07-16 15:50:32 +00005660 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5661 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005662 }
5663
Emil Tantilov396e7992010-07-01 20:05:12 +00005664 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
Jeff Kirshera46e5342008-11-27 00:22:21 -08005665 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
Emil Tantilov849c4542010-06-03 16:53:41 +00005666 "10 Gbps" :
5667 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5668 "1 Gbps" : "unknown speed")),
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005669 ((flow_rx && flow_tx) ? "RX/TX" :
Emil Tantilov849c4542010-06-03 16:53:41 +00005670 (flow_rx ? "RX" :
5671 (flow_tx ? "TX" : "None"))));
Auke Kok9a799d72007-09-15 14:07:45 -07005672
5673 netif_carrier_on(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07005674 } else {
5675 /* Force detection of hung controller */
5676 adapter->detect_tx_hung = true;
5677 }
5678 } else {
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005679 adapter->link_up = false;
5680 adapter->link_speed = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07005681 if (netif_carrier_ok(netdev)) {
Emil Tantilov396e7992010-07-01 20:05:12 +00005682 e_info(drv, "NIC Link is Down\n");
Auke Kok9a799d72007-09-15 14:07:45 -07005683 netif_carrier_off(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07005684 }
5685 }
5686
Nelson, Shannonbc59fcd2009-04-27 22:43:12 +00005687 if (!netif_carrier_ok(netdev)) {
5688 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005689 tx_ring = adapter->tx_ring[i];
Nelson, Shannonbc59fcd2009-04-27 22:43:12 +00005690 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5691 some_tx_pending = 1;
5692 break;
5693 }
5694 }
5695
5696 if (some_tx_pending) {
5697 /* We've lost link, so the controller stops DMA,
5698 * but we've got queued Tx work that's never going
5699 * to get done, so reset controller to flush Tx.
5700 * (Do the reset outside of interrupt context).
5701 */
5702 schedule_work(&adapter->reset_task);
5703 }
5704 }
5705
Auke Kok9a799d72007-09-15 14:07:45 -07005706 ixgbe_update_stats(adapter);
John Fastabend10eec952010-02-03 14:23:32 +00005707 mutex_unlock(&ixgbe_watchdog_lock);
Auke Kok9a799d72007-09-15 14:07:45 -07005708}
5709
Auke Kok9a799d72007-09-15 14:07:45 -07005710static int ixgbe_tso(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005711 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
5712 u32 tx_flags, u8 *hdr_len)
Auke Kok9a799d72007-09-15 14:07:45 -07005713{
5714 struct ixgbe_adv_tx_context_desc *context_desc;
5715 unsigned int i;
5716 int err;
5717 struct ixgbe_tx_buffer *tx_buffer_info;
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005718 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
5719 u32 mss_l4len_idx, l4len;
Auke Kok9a799d72007-09-15 14:07:45 -07005720
5721 if (skb_is_gso(skb)) {
5722 if (skb_header_cloned(skb)) {
5723 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5724 if (err)
5725 return err;
5726 }
5727 l4len = tcp_hdrlen(skb);
5728 *hdr_len += l4len;
5729
Al Viro8327d002007-12-10 18:54:12 +00005730 if (skb->protocol == htons(ETH_P_IP)) {
Auke Kok9a799d72007-09-15 14:07:45 -07005731 struct iphdr *iph = ip_hdr(skb);
5732 iph->tot_len = 0;
5733 iph->check = 0;
5734 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005735 iph->daddr, 0,
5736 IPPROTO_TCP,
5737 0);
Sridhar Samudrala8e1e8a42010-01-23 02:02:21 -08005738 } else if (skb_is_gso_v6(skb)) {
Auke Kok9a799d72007-09-15 14:07:45 -07005739 ipv6_hdr(skb)->payload_len = 0;
5740 tcp_hdr(skb)->check =
5741 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005742 &ipv6_hdr(skb)->daddr,
5743 0, IPPROTO_TCP, 0);
Auke Kok9a799d72007-09-15 14:07:45 -07005744 }
5745
5746 i = tx_ring->next_to_use;
5747
5748 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5749 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
5750
5751 /* VLAN MACLEN IPLEN */
5752 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
5753 vlan_macip_lens |=
5754 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
5755 vlan_macip_lens |= ((skb_network_offset(skb)) <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005756 IXGBE_ADVTXD_MACLEN_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005757 *hdr_len += skb_network_offset(skb);
5758 vlan_macip_lens |=
5759 (skb_transport_header(skb) - skb_network_header(skb));
5760 *hdr_len +=
5761 (skb_transport_header(skb) - skb_network_header(skb));
5762 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5763 context_desc->seqnum_seed = 0;
5764
5765 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005766 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005767 IXGBE_ADVTXD_DTYP_CTXT);
Auke Kok9a799d72007-09-15 14:07:45 -07005768
Al Viro8327d002007-12-10 18:54:12 +00005769 if (skb->protocol == htons(ETH_P_IP))
Auke Kok9a799d72007-09-15 14:07:45 -07005770 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
5771 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5772 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
5773
5774 /* MSS L4LEN IDX */
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005775 mss_l4len_idx =
Auke Kok9a799d72007-09-15 14:07:45 -07005776 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
5777 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
PJ Waskiewicz4eeae6f2008-08-26 04:27:30 -07005778 /* use index 1 for TSO */
5779 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005780 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5781
5782 tx_buffer_info->time_stamp = jiffies;
5783 tx_buffer_info->next_to_watch = i;
5784
5785 i++;
5786 if (i == tx_ring->count)
5787 i = 0;
5788 tx_ring->next_to_use = i;
5789
5790 return true;
5791 }
5792 return false;
5793}
5794
5795static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005796 struct ixgbe_ring *tx_ring,
5797 struct sk_buff *skb, u32 tx_flags)
Auke Kok9a799d72007-09-15 14:07:45 -07005798{
5799 struct ixgbe_adv_tx_context_desc *context_desc;
5800 unsigned int i;
5801 struct ixgbe_tx_buffer *tx_buffer_info;
5802 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
5803
5804 if (skb->ip_summed == CHECKSUM_PARTIAL ||
5805 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
5806 i = tx_ring->next_to_use;
5807 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5808 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
5809
5810 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
5811 vlan_macip_lens |=
5812 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
5813 vlan_macip_lens |= (skb_network_offset(skb) <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005814 IXGBE_ADVTXD_MACLEN_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005815 if (skb->ip_summed == CHECKSUM_PARTIAL)
5816 vlan_macip_lens |= (skb_transport_header(skb) -
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005817 skb_network_header(skb));
Auke Kok9a799d72007-09-15 14:07:45 -07005818
5819 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5820 context_desc->seqnum_seed = 0;
5821
5822 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005823 IXGBE_ADVTXD_DTYP_CTXT);
Auke Kok9a799d72007-09-15 14:07:45 -07005824
5825 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Gurucharan Shettyca553982009-12-15 13:00:31 +00005826 __be16 protocol;
5827
5828 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) {
5829 const struct vlan_ethhdr *vhdr =
5830 (const struct vlan_ethhdr *)skb->data;
5831
5832 protocol = vhdr->h_vlan_encapsulated_proto;
5833 } else {
5834 protocol = skb->protocol;
5835 }
5836
5837 switch (protocol) {
Harvey Harrison09640e62009-02-01 00:45:17 -08005838 case cpu_to_be16(ETH_P_IP):
Auke Kok9a799d72007-09-15 14:07:45 -07005839 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
Auke Kok41825d72008-02-12 15:20:33 -08005840 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5841 type_tucmd_mlhl |=
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005842 IXGBE_ADVTXD_TUCMD_L4T_TCP;
Jesse Brandeburg45a5ead2009-04-27 22:36:35 +00005843 else if (ip_hdr(skb)->protocol == IPPROTO_SCTP)
5844 type_tucmd_mlhl |=
5845 IXGBE_ADVTXD_TUCMD_L4T_SCTP;
Auke Kok41825d72008-02-12 15:20:33 -08005846 break;
Harvey Harrison09640e62009-02-01 00:45:17 -08005847 case cpu_to_be16(ETH_P_IPV6):
Auke Kok41825d72008-02-12 15:20:33 -08005848 /* XXX what about other V6 headers?? */
5849 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5850 type_tucmd_mlhl |=
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005851 IXGBE_ADVTXD_TUCMD_L4T_TCP;
Jesse Brandeburg45a5ead2009-04-27 22:36:35 +00005852 else if (ipv6_hdr(skb)->nexthdr == IPPROTO_SCTP)
5853 type_tucmd_mlhl |=
5854 IXGBE_ADVTXD_TUCMD_L4T_SCTP;
Auke Kok41825d72008-02-12 15:20:33 -08005855 break;
Auke Kok41825d72008-02-12 15:20:33 -08005856 default:
5857 if (unlikely(net_ratelimit())) {
Emil Tantilov396e7992010-07-01 20:05:12 +00005858 e_warn(probe, "partial checksum "
5859 "but proto=%x!\n",
5860 skb->protocol);
Auke Kok41825d72008-02-12 15:20:33 -08005861 }
5862 break;
5863 }
Auke Kok9a799d72007-09-15 14:07:45 -07005864 }
5865
5866 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
PJ Waskiewicz4eeae6f2008-08-26 04:27:30 -07005867 /* use index zero for tx checksum offload */
Auke Kok9a799d72007-09-15 14:07:45 -07005868 context_desc->mss_l4len_idx = 0;
5869
5870 tx_buffer_info->time_stamp = jiffies;
5871 tx_buffer_info->next_to_watch = i;
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005872
Auke Kok9a799d72007-09-15 14:07:45 -07005873 i++;
5874 if (i == tx_ring->count)
5875 i = 0;
5876 tx_ring->next_to_use = i;
5877
5878 return true;
5879 }
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005880
Auke Kok9a799d72007-09-15 14:07:45 -07005881 return false;
5882}
5883
5884static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005885 struct ixgbe_ring *tx_ring,
Yi Zoueacd73f2009-05-13 13:11:06 +00005886 struct sk_buff *skb, u32 tx_flags,
5887 unsigned int first)
Auke Kok9a799d72007-09-15 14:07:45 -07005888{
Alexander Duycke5a43542009-12-02 16:46:56 +00005889 struct pci_dev *pdev = adapter->pdev;
Auke Kok9a799d72007-09-15 14:07:45 -07005890 struct ixgbe_tx_buffer *tx_buffer_info;
Yi Zoueacd73f2009-05-13 13:11:06 +00005891 unsigned int len;
5892 unsigned int total = skb->len;
Auke Kok9a799d72007-09-15 14:07:45 -07005893 unsigned int offset = 0, size, count = 0, i;
5894 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
5895 unsigned int f;
Auke Kok9a799d72007-09-15 14:07:45 -07005896
5897 i = tx_ring->next_to_use;
5898
Yi Zoueacd73f2009-05-13 13:11:06 +00005899 if (tx_flags & IXGBE_TX_FLAGS_FCOE)
5900 /* excluding fcoe_crc_eof for FCoE */
5901 total -= sizeof(struct fcoe_crc_eof);
5902
5903 len = min(skb_headlen(skb), total);
Auke Kok9a799d72007-09-15 14:07:45 -07005904 while (len) {
5905 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5906 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
5907
5908 tx_buffer_info->length = size;
Alexander Duycke5a43542009-12-02 16:46:56 +00005909 tx_buffer_info->mapped_as_page = false;
Nick Nunley1b507732010-04-27 13:10:27 +00005910 tx_buffer_info->dma = dma_map_single(&pdev->dev,
Alexander Duycke5a43542009-12-02 16:46:56 +00005911 skb->data + offset,
Nick Nunley1b507732010-04-27 13:10:27 +00005912 size, DMA_TO_DEVICE);
5913 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
Alexander Duycke5a43542009-12-02 16:46:56 +00005914 goto dma_error;
Auke Kok9a799d72007-09-15 14:07:45 -07005915 tx_buffer_info->time_stamp = jiffies;
5916 tx_buffer_info->next_to_watch = i;
5917
5918 len -= size;
Yi Zoueacd73f2009-05-13 13:11:06 +00005919 total -= size;
Auke Kok9a799d72007-09-15 14:07:45 -07005920 offset += size;
5921 count++;
Alexander Duyck44df32c2009-03-31 21:34:23 +00005922
5923 if (len) {
5924 i++;
5925 if (i == tx_ring->count)
5926 i = 0;
5927 }
Auke Kok9a799d72007-09-15 14:07:45 -07005928 }
5929
5930 for (f = 0; f < nr_frags; f++) {
5931 struct skb_frag_struct *frag;
5932
5933 frag = &skb_shinfo(skb)->frags[f];
Yi Zoueacd73f2009-05-13 13:11:06 +00005934 len = min((unsigned int)frag->size, total);
Alexander Duycke5a43542009-12-02 16:46:56 +00005935 offset = frag->page_offset;
Auke Kok9a799d72007-09-15 14:07:45 -07005936
5937 while (len) {
Alexander Duyck44df32c2009-03-31 21:34:23 +00005938 i++;
5939 if (i == tx_ring->count)
5940 i = 0;
5941
Auke Kok9a799d72007-09-15 14:07:45 -07005942 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5943 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
5944
5945 tx_buffer_info->length = size;
Nick Nunley1b507732010-04-27 13:10:27 +00005946 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev,
Alexander Duycke5a43542009-12-02 16:46:56 +00005947 frag->page,
5948 offset, size,
Nick Nunley1b507732010-04-27 13:10:27 +00005949 DMA_TO_DEVICE);
Alexander Duycke5a43542009-12-02 16:46:56 +00005950 tx_buffer_info->mapped_as_page = true;
Nick Nunley1b507732010-04-27 13:10:27 +00005951 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
Alexander Duycke5a43542009-12-02 16:46:56 +00005952 goto dma_error;
Auke Kok9a799d72007-09-15 14:07:45 -07005953 tx_buffer_info->time_stamp = jiffies;
5954 tx_buffer_info->next_to_watch = i;
5955
5956 len -= size;
Yi Zoueacd73f2009-05-13 13:11:06 +00005957 total -= size;
Auke Kok9a799d72007-09-15 14:07:45 -07005958 offset += size;
5959 count++;
Auke Kok9a799d72007-09-15 14:07:45 -07005960 }
Yi Zoueacd73f2009-05-13 13:11:06 +00005961 if (total == 0)
5962 break;
Auke Kok9a799d72007-09-15 14:07:45 -07005963 }
Alexander Duyck44df32c2009-03-31 21:34:23 +00005964
Auke Kok9a799d72007-09-15 14:07:45 -07005965 tx_ring->tx_buffer_info[i].skb = skb;
5966 tx_ring->tx_buffer_info[first].next_to_watch = i;
5967
5968 return count;
Alexander Duycke5a43542009-12-02 16:46:56 +00005969
5970dma_error:
Emil Tantilov849c4542010-06-03 16:53:41 +00005971 e_dev_err("TX DMA map failed\n");
Alexander Duycke5a43542009-12-02 16:46:56 +00005972
5973 /* clear timestamp and dma mappings for failed tx_buffer_info map */
5974 tx_buffer_info->dma = 0;
5975 tx_buffer_info->time_stamp = 0;
5976 tx_buffer_info->next_to_watch = 0;
Roel Kluinc1fa3472010-01-19 14:21:45 +00005977 if (count)
5978 count--;
Alexander Duycke5a43542009-12-02 16:46:56 +00005979
5980 /* clear timestamp and dma mappings for remaining portion of packet */
Roel Kluinc1fa3472010-01-19 14:21:45 +00005981 while (count--) {
5982 if (i==0)
Alexander Duycke5a43542009-12-02 16:46:56 +00005983 i += tx_ring->count;
Roel Kluinc1fa3472010-01-19 14:21:45 +00005984 i--;
Alexander Duycke5a43542009-12-02 16:46:56 +00005985 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5986 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
5987 }
5988
Anton Blancharde44d38e2010-02-03 13:12:51 +00005989 return 0;
Auke Kok9a799d72007-09-15 14:07:45 -07005990}
5991
5992static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005993 struct ixgbe_ring *tx_ring,
5994 int tx_flags, int count, u32 paylen, u8 hdr_len)
Auke Kok9a799d72007-09-15 14:07:45 -07005995{
5996 union ixgbe_adv_tx_desc *tx_desc = NULL;
5997 struct ixgbe_tx_buffer *tx_buffer_info;
5998 u32 olinfo_status = 0, cmd_type_len = 0;
5999 unsigned int i;
6000 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
6001
6002 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
6003
6004 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
6005
6006 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
6007 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
6008
6009 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
6010 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
6011
6012 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006013 IXGBE_ADVTXD_POPTS_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07006014
PJ Waskiewicz4eeae6f2008-08-26 04:27:30 -07006015 /* use index 1 context for tso */
6016 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07006017 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
6018 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006019 IXGBE_ADVTXD_POPTS_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07006020
6021 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
6022 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006023 IXGBE_ADVTXD_POPTS_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07006024
Yi Zoueacd73f2009-05-13 13:11:06 +00006025 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6026 olinfo_status |= IXGBE_ADVTXD_CC;
6027 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
6028 if (tx_flags & IXGBE_TX_FLAGS_FSO)
6029 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
6030 }
6031
Auke Kok9a799d72007-09-15 14:07:45 -07006032 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
6033
6034 i = tx_ring->next_to_use;
6035 while (count--) {
6036 tx_buffer_info = &tx_ring->tx_buffer_info[i];
6037 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
6038 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
6039 tx_desc->read.cmd_type_len =
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006040 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
Auke Kok9a799d72007-09-15 14:07:45 -07006041 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
Auke Kok9a799d72007-09-15 14:07:45 -07006042 i++;
6043 if (i == tx_ring->count)
6044 i = 0;
6045 }
6046
6047 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
6048
6049 /*
6050 * Force memory writes to complete before letting h/w
6051 * know there are new descriptors to fetch. (Only
6052 * applicable for weak-ordered memory model archs,
6053 * such as IA-64).
6054 */
6055 wmb();
6056
6057 tx_ring->next_to_use = i;
6058 writel(i, adapter->hw.hw_addr + tx_ring->tail);
6059}
6060
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006061static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb,
6062 int queue, u32 tx_flags)
6063{
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006064 struct ixgbe_atr_input atr_input;
6065 struct tcphdr *th;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006066 struct iphdr *iph = ip_hdr(skb);
6067 struct ethhdr *eth = (struct ethhdr *)skb->data;
6068 u16 vlan_id, src_port, dst_port, flex_bytes;
6069 u32 src_ipv4_addr, dst_ipv4_addr;
6070 u8 l4type = 0;
6071
Guillaume Gaudonvilled3ead242010-06-29 18:29:00 +00006072 /* Right now, we support IPv4 only */
6073 if (skb->protocol != htons(ETH_P_IP))
6074 return;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006075 /* check if we're UDP or TCP */
6076 if (iph->protocol == IPPROTO_TCP) {
6077 th = tcp_hdr(skb);
6078 src_port = th->source;
6079 dst_port = th->dest;
6080 l4type |= IXGBE_ATR_L4TYPE_TCP;
6081 /* l4type IPv4 type is 0, no need to assign */
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006082 } else {
6083 /* Unsupported L4 header, just bail here */
6084 return;
6085 }
6086
6087 memset(&atr_input, 0, sizeof(struct ixgbe_atr_input));
6088
6089 vlan_id = (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK) >>
6090 IXGBE_TX_FLAGS_VLAN_SHIFT;
6091 src_ipv4_addr = iph->saddr;
6092 dst_ipv4_addr = iph->daddr;
6093 flex_bytes = eth->h_proto;
6094
6095 ixgbe_atr_set_vlan_id_82599(&atr_input, vlan_id);
6096 ixgbe_atr_set_src_port_82599(&atr_input, dst_port);
6097 ixgbe_atr_set_dst_port_82599(&atr_input, src_port);
6098 ixgbe_atr_set_flex_byte_82599(&atr_input, flex_bytes);
6099 ixgbe_atr_set_l4type_82599(&atr_input, l4type);
6100 /* src and dst are inverted, think how the receiver sees them */
6101 ixgbe_atr_set_src_ipv4_82599(&atr_input, dst_ipv4_addr);
6102 ixgbe_atr_set_dst_ipv4_82599(&atr_input, src_ipv4_addr);
6103
6104 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6105 ixgbe_fdir_add_signature_filter_82599(&adapter->hw, &atr_input, queue);
6106}
6107
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006108static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006109 struct ixgbe_ring *tx_ring, int size)
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006110{
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -08006111 netif_stop_subqueue(netdev, tx_ring->queue_index);
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006112 /* Herbert's original patch had:
6113 * smp_mb__after_netif_stop_queue();
6114 * but since that doesn't exist yet, just open code it. */
6115 smp_mb();
6116
6117 /* We need to check again in a case another CPU has just
6118 * made room available. */
6119 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
6120 return -EBUSY;
6121
6122 /* A reprieve! - use start_queue because it doesn't call schedule */
Jesse Brandeburgaf721662008-09-11 19:54:23 -07006123 netif_start_subqueue(netdev, tx_ring->queue_index);
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00006124 ++tx_ring->restart_queue;
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006125 return 0;
6126}
6127
6128static int ixgbe_maybe_stop_tx(struct net_device *netdev,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006129 struct ixgbe_ring *tx_ring, int size)
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006130{
6131 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
6132 return 0;
6133 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
6134}
6135
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07006136static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
6137{
6138 struct ixgbe_adapter *adapter = netdev_priv(dev);
Yi Zou5f715822009-12-03 11:32:44 +00006139 int txq = smp_processor_id();
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07006140
John Fastabend56075a92010-07-26 20:41:31 +00006141#ifdef IXGBE_FCOE
6142 if ((skb->protocol == htons(ETH_P_FCOE)) ||
6143 (skb->protocol == htons(ETH_P_FIP))) {
6144 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
6145 txq &= (adapter->ring_feature[RING_F_FCOE].indices - 1);
6146 txq += adapter->ring_feature[RING_F_FCOE].mask;
6147 return txq;
John Fastabend4bc091d2010-08-08 15:46:15 +00006148#ifdef CONFIG_IXGBE_DCB
John Fastabend56075a92010-07-26 20:41:31 +00006149 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
6150 txq = adapter->fcoe.up;
6151 return txq;
John Fastabend4bc091d2010-08-08 15:46:15 +00006152#endif
John Fastabend56075a92010-07-26 20:41:31 +00006153 }
6154 }
6155#endif
6156
Krishna Kumarfdd3d632010-02-03 13:13:10 +00006157 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
6158 while (unlikely(txq >= dev->real_num_tx_queues))
6159 txq -= dev->real_num_tx_queues;
Yi Zou5f715822009-12-03 11:32:44 +00006160 return txq;
Krishna Kumarfdd3d632010-02-03 13:13:10 +00006161 }
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006162
John Fastabend2ea186a2010-02-27 03:28:24 -08006163 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
6164 if (skb->priority == TC_PRIO_CONTROL)
6165 txq = adapter->ring_feature[RING_F_DCB].indices-1;
6166 else
6167 txq = (skb->vlan_tci & IXGBE_TX_FLAGS_VLAN_PRIO_MASK)
6168 >> 13;
6169 return txq;
6170 }
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07006171
6172 return skb_tx_hash(dev, skb);
6173}
6174
Stephen Hemminger3b29a562009-08-31 19:50:55 +00006175static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
6176 struct net_device *netdev)
Auke Kok9a799d72007-09-15 14:07:45 -07006177{
6178 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6179 struct ixgbe_ring *tx_ring;
Eric Dumazet60d51132009-12-08 07:22:03 +00006180 struct netdev_queue *txq;
Auke Kok9a799d72007-09-15 14:07:45 -07006181 unsigned int first;
6182 unsigned int tx_flags = 0;
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -08006183 u8 hdr_len = 0;
Yi Zou5f715822009-12-03 11:32:44 +00006184 int tso;
Auke Kok9a799d72007-09-15 14:07:45 -07006185 int count = 0;
6186 unsigned int f;
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07006187
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07006188 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
6189 tx_flags |= vlan_tx_tag_get(skb);
Alexander Duyck2f90b862008-11-20 20:52:10 -08006190 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
6191 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
Yi Zou5f715822009-12-03 11:32:44 +00006192 tx_flags |= ((skb->queue_mapping & 0x7) << 13);
Alexander Duyck2f90b862008-11-20 20:52:10 -08006193 }
6194 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
6195 tx_flags |= IXGBE_TX_FLAGS_VLAN;
John Fastabend33c66bd2010-05-18 16:00:11 +00006196 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED &&
6197 skb->priority != TC_PRIO_CONTROL) {
John Fastabend2ea186a2010-02-27 03:28:24 -08006198 tx_flags |= ((skb->queue_mapping & 0x7) << 13);
6199 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
6200 tx_flags |= IXGBE_TX_FLAGS_VLAN;
Auke Kok9a799d72007-09-15 14:07:45 -07006201 }
Yi Zoueacd73f2009-05-13 13:11:06 +00006202
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00006203 tx_ring = adapter->tx_ring[skb->queue_mapping];
Lucy Liu60127862009-07-22 14:07:33 +00006204
Yi Zou09ad1cc2009-09-03 14:56:10 +00006205#ifdef IXGBE_FCOE
John Fastabend56075a92010-07-26 20:41:31 +00006206 /* for FCoE with DCB, we force the priority to what
6207 * was specified by the switch */
6208 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED &&
6209 (skb->protocol == htons(ETH_P_FCOE) ||
6210 skb->protocol == htons(ETH_P_FIP))) {
John Fastabend4bc091d2010-08-08 15:46:15 +00006211#ifdef CONFIG_IXGBE_DCB
6212 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
6213 tx_flags &= ~(IXGBE_TX_FLAGS_VLAN_PRIO_MASK
6214 << IXGBE_TX_FLAGS_VLAN_SHIFT);
6215 tx_flags |= ((adapter->fcoe.up << 13)
6216 << IXGBE_TX_FLAGS_VLAN_SHIFT);
6217 }
6218#endif
Robert Loveca77cd52010-03-24 12:45:00 +00006219 /* flag for FCoE offloads */
6220 if (skb->protocol == htons(ETH_P_FCOE))
6221 tx_flags |= IXGBE_TX_FLAGS_FCOE;
Yi Zou09ad1cc2009-09-03 14:56:10 +00006222 }
Robert Loveca77cd52010-03-24 12:45:00 +00006223#endif
6224
Yi Zoueacd73f2009-05-13 13:11:06 +00006225 /* four things can cause us to need a context descriptor */
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07006226 if (skb_is_gso(skb) ||
6227 (skb->ip_summed == CHECKSUM_PARTIAL) ||
Yi Zoueacd73f2009-05-13 13:11:06 +00006228 (tx_flags & IXGBE_TX_FLAGS_VLAN) ||
6229 (tx_flags & IXGBE_TX_FLAGS_FCOE))
Auke Kok9a799d72007-09-15 14:07:45 -07006230 count++;
6231
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07006232 count += TXD_USE_COUNT(skb_headlen(skb));
6233 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
Auke Kok9a799d72007-09-15 14:07:45 -07006234 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6235
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006236 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
Auke Kok9a799d72007-09-15 14:07:45 -07006237 adapter->tx_busy++;
Auke Kok9a799d72007-09-15 14:07:45 -07006238 return NETDEV_TX_BUSY;
6239 }
Auke Kok9a799d72007-09-15 14:07:45 -07006240
Auke Kok9a799d72007-09-15 14:07:45 -07006241 first = tx_ring->next_to_use;
Yi Zoueacd73f2009-05-13 13:11:06 +00006242 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6243#ifdef IXGBE_FCOE
6244 /* setup tx offload for FCoE */
6245 tso = ixgbe_fso(adapter, tx_ring, skb, tx_flags, &hdr_len);
6246 if (tso < 0) {
6247 dev_kfree_skb_any(skb);
6248 return NETDEV_TX_OK;
6249 }
6250 if (tso)
6251 tx_flags |= IXGBE_TX_FLAGS_FSO;
6252#endif /* IXGBE_FCOE */
6253 } else {
6254 if (skb->protocol == htons(ETH_P_IP))
6255 tx_flags |= IXGBE_TX_FLAGS_IPV4;
6256 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
6257 if (tso < 0) {
6258 dev_kfree_skb_any(skb);
6259 return NETDEV_TX_OK;
6260 }
6261
6262 if (tso)
6263 tx_flags |= IXGBE_TX_FLAGS_TSO;
6264 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
6265 (skb->ip_summed == CHECKSUM_PARTIAL))
6266 tx_flags |= IXGBE_TX_FLAGS_CSUM;
Auke Kok9a799d72007-09-15 14:07:45 -07006267 }
6268
Yi Zoueacd73f2009-05-13 13:11:06 +00006269 count = ixgbe_tx_map(adapter, tx_ring, skb, tx_flags, first);
Alexander Duyck44df32c2009-03-31 21:34:23 +00006270 if (count) {
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006271 /* add the ATR filter if ATR is on */
6272 if (tx_ring->atr_sample_rate) {
6273 ++tx_ring->atr_count;
6274 if ((tx_ring->atr_count >= tx_ring->atr_sample_rate) &&
6275 test_bit(__IXGBE_FDIR_INIT_DONE,
6276 &tx_ring->reinit_state)) {
6277 ixgbe_atr(adapter, skb, tx_ring->queue_index,
6278 tx_flags);
6279 tx_ring->atr_count = 0;
6280 }
6281 }
Eric Dumazet60d51132009-12-08 07:22:03 +00006282 txq = netdev_get_tx_queue(netdev, tx_ring->queue_index);
6283 txq->tx_bytes += skb->len;
6284 txq->tx_packets++;
Alexander Duyck44df32c2009-03-31 21:34:23 +00006285 ixgbe_tx_queue(adapter, tx_ring, tx_flags, count, skb->len,
6286 hdr_len);
Alexander Duyck44df32c2009-03-31 21:34:23 +00006287 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
Auke Kok9a799d72007-09-15 14:07:45 -07006288
Alexander Duyck44df32c2009-03-31 21:34:23 +00006289 } else {
6290 dev_kfree_skb_any(skb);
6291 tx_ring->tx_buffer_info[first].time_stamp = 0;
6292 tx_ring->next_to_use = first;
6293 }
Auke Kok9a799d72007-09-15 14:07:45 -07006294
6295 return NETDEV_TX_OK;
6296}
6297
6298/**
Auke Kok9a799d72007-09-15 14:07:45 -07006299 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6300 * @netdev: network interface device structure
6301 * @p: pointer to an address structure
6302 *
6303 * Returns 0 on success, negative on failure
6304 **/
6305static int ixgbe_set_mac(struct net_device *netdev, void *p)
6306{
6307 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006308 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07006309 struct sockaddr *addr = p;
6310
6311 if (!is_valid_ether_addr(addr->sa_data))
6312 return -EADDRNOTAVAIL;
6313
6314 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006315 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
Auke Kok9a799d72007-09-15 14:07:45 -07006316
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006317 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
6318 IXGBE_RAH_AV);
Auke Kok9a799d72007-09-15 14:07:45 -07006319
6320 return 0;
6321}
6322
Ben Hutchings6b73e102009-04-29 08:08:58 +00006323static int
6324ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
6325{
6326 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6327 struct ixgbe_hw *hw = &adapter->hw;
6328 u16 value;
6329 int rc;
6330
6331 if (prtad != hw->phy.mdio.prtad)
6332 return -EINVAL;
6333 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6334 if (!rc)
6335 rc = value;
6336 return rc;
6337}
6338
6339static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
6340 u16 addr, u16 value)
6341{
6342 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6343 struct ixgbe_hw *hw = &adapter->hw;
6344
6345 if (prtad != hw->phy.mdio.prtad)
6346 return -EINVAL;
6347 return hw->phy.ops.write_reg(hw, addr, devad, value);
6348}
6349
6350static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
6351{
6352 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6353
6354 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6355}
6356
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006357/**
6358 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
Jiri Pirko31278e72009-06-17 01:12:19 +00006359 * netdev->dev_addrs
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006360 * @netdev: network interface device structure
6361 *
6362 * Returns non-zero on failure
6363 **/
6364static int ixgbe_add_sanmac_netdev(struct net_device *dev)
6365{
6366 int err = 0;
6367 struct ixgbe_adapter *adapter = netdev_priv(dev);
6368 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6369
6370 if (is_valid_ether_addr(mac->san_addr)) {
6371 rtnl_lock();
6372 err = dev_addr_add(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6373 rtnl_unlock();
6374 }
6375 return err;
6376}
6377
6378/**
6379 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
Jiri Pirko31278e72009-06-17 01:12:19 +00006380 * netdev->dev_addrs
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006381 * @netdev: network interface device structure
6382 *
6383 * Returns non-zero on failure
6384 **/
6385static int ixgbe_del_sanmac_netdev(struct net_device *dev)
6386{
6387 int err = 0;
6388 struct ixgbe_adapter *adapter = netdev_priv(dev);
6389 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6390
6391 if (is_valid_ether_addr(mac->san_addr)) {
6392 rtnl_lock();
6393 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6394 rtnl_unlock();
6395 }
6396 return err;
6397}
6398
Auke Kok9a799d72007-09-15 14:07:45 -07006399#ifdef CONFIG_NET_POLL_CONTROLLER
6400/*
6401 * Polling 'interrupt' - used by things like netconsole to send skbs
6402 * without having to re-enable interrupts. It's not called while
6403 * the interrupt routine is executing.
6404 */
6405static void ixgbe_netpoll(struct net_device *netdev)
6406{
6407 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewicz Jr8f9a7162009-07-30 12:25:09 +00006408 int i;
Auke Kok9a799d72007-09-15 14:07:45 -07006409
Alexander Duyck1a647bd2010-01-13 01:49:13 +00006410 /* if interface is down do nothing */
6411 if (test_bit(__IXGBE_DOWN, &adapter->state))
6412 return;
6413
Auke Kok9a799d72007-09-15 14:07:45 -07006414 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
Peter P Waskiewicz Jr8f9a7162009-07-30 12:25:09 +00006415 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
6416 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
6417 for (i = 0; i < num_q_vectors; i++) {
6418 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
6419 ixgbe_msix_clean_many(0, q_vector);
6420 }
6421 } else {
6422 ixgbe_intr(adapter->pdev->irq, netdev);
6423 }
Auke Kok9a799d72007-09-15 14:07:45 -07006424 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
Auke Kok9a799d72007-09-15 14:07:45 -07006425}
6426#endif
6427
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006428static const struct net_device_ops ixgbe_netdev_ops = {
6429 .ndo_open = ixgbe_open,
6430 .ndo_stop = ixgbe_close,
Stephen Hemminger00829822008-11-20 20:14:53 -08006431 .ndo_start_xmit = ixgbe_xmit_frame,
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07006432 .ndo_select_queue = ixgbe_select_queue,
Chris Leeche90d4002009-03-10 16:00:24 +00006433 .ndo_set_rx_mode = ixgbe_set_rx_mode,
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006434 .ndo_set_multicast_list = ixgbe_set_rx_mode,
6435 .ndo_validate_addr = eth_validate_addr,
6436 .ndo_set_mac_address = ixgbe_set_mac,
6437 .ndo_change_mtu = ixgbe_change_mtu,
6438 .ndo_tx_timeout = ixgbe_tx_timeout,
6439 .ndo_vlan_rx_register = ixgbe_vlan_rx_register,
6440 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
6441 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
Ben Hutchings6b73e102009-04-29 08:08:58 +00006442 .ndo_do_ioctl = ixgbe_ioctl,
Greg Rose7f016482010-05-04 22:12:06 +00006443 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
6444 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
6445 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
6446 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006447#ifdef CONFIG_NET_POLL_CONTROLLER
6448 .ndo_poll_controller = ixgbe_netpoll,
6449#endif
Yi Zou332d4a72009-05-13 13:11:53 +00006450#ifdef IXGBE_FCOE
6451 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
6452 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
Yi Zou8450ff82009-08-31 12:32:14 +00006453 .ndo_fcoe_enable = ixgbe_fcoe_enable,
6454 .ndo_fcoe_disable = ixgbe_fcoe_disable,
Yi Zou61a1fa12009-10-28 18:24:56 +00006455 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
Yi Zou332d4a72009-05-13 13:11:53 +00006456#endif /* IXGBE_FCOE */
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006457};
6458
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006459static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,
6460 const struct ixgbe_info *ii)
6461{
6462#ifdef CONFIG_PCI_IOV
6463 struct ixgbe_hw *hw = &adapter->hw;
6464 int err;
6465
6466 if (hw->mac.type != ixgbe_mac_82599EB || !max_vfs)
6467 return;
6468
6469 /* The 82599 supports up to 64 VFs per physical function
6470 * but this implementation limits allocation to 63 so that
6471 * basic networking resources are still available to the
6472 * physical function
6473 */
6474 adapter->num_vfs = (max_vfs > 63) ? 63 : max_vfs;
6475 adapter->flags |= IXGBE_FLAG_SRIOV_ENABLED;
6476 err = pci_enable_sriov(adapter->pdev, adapter->num_vfs);
6477 if (err) {
Emil Tantilov396e7992010-07-01 20:05:12 +00006478 e_err(probe, "Failed to enable PCI sriov: %d\n", err);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006479 goto err_novfs;
6480 }
6481 /* If call to enable VFs succeeded then allocate memory
6482 * for per VF control structures.
6483 */
6484 adapter->vfinfo =
6485 kcalloc(adapter->num_vfs,
6486 sizeof(struct vf_data_storage), GFP_KERNEL);
6487 if (adapter->vfinfo) {
6488 /* Now that we're sure SR-IOV is enabled
6489 * and memory allocated set up the mailbox parameters
6490 */
6491 ixgbe_init_mbx_params_pf(hw);
6492 memcpy(&hw->mbx.ops, ii->mbx_ops,
6493 sizeof(hw->mbx.ops));
6494
6495 /* Disable RSC when in SR-IOV mode */
6496 adapter->flags2 &= ~(IXGBE_FLAG2_RSC_CAPABLE |
6497 IXGBE_FLAG2_RSC_ENABLED);
6498 return;
6499 }
6500
6501 /* Oh oh */
Emil Tantilov396e7992010-07-01 20:05:12 +00006502 e_err(probe, "Unable to allocate memory for VF Data Storage - "
6503 "SRIOV disabled\n");
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006504 pci_disable_sriov(adapter->pdev);
6505
6506err_novfs:
6507 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
6508 adapter->num_vfs = 0;
6509#endif /* CONFIG_PCI_IOV */
6510}
6511
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006512/**
Auke Kok9a799d72007-09-15 14:07:45 -07006513 * ixgbe_probe - Device Initialization Routine
6514 * @pdev: PCI device information struct
6515 * @ent: entry in ixgbe_pci_tbl
6516 *
6517 * Returns 0 on success, negative on failure
6518 *
6519 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6520 * The OS initialization, configuring of the adapter private structure,
6521 * and a hardware reset occur.
6522 **/
6523static int __devinit ixgbe_probe(struct pci_dev *pdev,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006524 const struct pci_device_id *ent)
Auke Kok9a799d72007-09-15 14:07:45 -07006525{
6526 struct net_device *netdev;
6527 struct ixgbe_adapter *adapter = NULL;
6528 struct ixgbe_hw *hw;
6529 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
Auke Kok9a799d72007-09-15 14:07:45 -07006530 static int cards_found;
6531 int i, err, pci_using_dac;
John Fastabendc85a2612010-02-25 23:15:21 +00006532 unsigned int indices = num_possible_cpus();
Yi Zoueacd73f2009-05-13 13:11:06 +00006533#ifdef IXGBE_FCOE
6534 u16 device_caps;
6535#endif
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006536 u32 part_num, eec;
Auke Kok9a799d72007-09-15 14:07:45 -07006537
Andy Gospodarekbded64a2010-07-21 06:40:31 +00006538 /* Catch broken hardware that put the wrong VF device ID in
6539 * the PCIe SR-IOV capability.
6540 */
6541 if (pdev->is_virtfn) {
6542 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
6543 pci_name(pdev), pdev->vendor, pdev->device);
6544 return -EINVAL;
6545 }
6546
gouji-new9ce77662009-05-06 10:44:45 +00006547 err = pci_enable_device_mem(pdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006548 if (err)
6549 return err;
6550
Nick Nunley1b507732010-04-27 13:10:27 +00006551 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
6552 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
Auke Kok9a799d72007-09-15 14:07:45 -07006553 pci_using_dac = 1;
6554 } else {
Nick Nunley1b507732010-04-27 13:10:27 +00006555 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
Auke Kok9a799d72007-09-15 14:07:45 -07006556 if (err) {
Nick Nunley1b507732010-04-27 13:10:27 +00006557 err = dma_set_coherent_mask(&pdev->dev,
6558 DMA_BIT_MASK(32));
Auke Kok9a799d72007-09-15 14:07:45 -07006559 if (err) {
Dan Carpenterb8bc0422010-07-27 00:05:56 +00006560 dev_err(&pdev->dev,
6561 "No usable DMA configuration, aborting\n");
Auke Kok9a799d72007-09-15 14:07:45 -07006562 goto err_dma;
6563 }
6564 }
6565 pci_using_dac = 0;
6566 }
6567
gouji-new9ce77662009-05-06 10:44:45 +00006568 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
6569 IORESOURCE_MEM), ixgbe_driver_name);
Auke Kok9a799d72007-09-15 14:07:45 -07006570 if (err) {
Dan Carpenterb8bc0422010-07-27 00:05:56 +00006571 dev_err(&pdev->dev,
6572 "pci_request_selected_regions failed 0x%x\n", err);
Auke Kok9a799d72007-09-15 14:07:45 -07006573 goto err_pci_reg;
6574 }
6575
Frans Pop19d5afd2009-10-02 10:04:12 -07006576 pci_enable_pcie_error_reporting(pdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006577
Auke Kok9a799d72007-09-15 14:07:45 -07006578 pci_set_master(pdev);
Wendy Xiongfb3b27b2008-04-23 11:09:24 -07006579 pci_save_state(pdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006580
John Fastabendc85a2612010-02-25 23:15:21 +00006581 if (ii->mac == ixgbe_mac_82598EB)
6582 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
6583 else
6584 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
6585
6586 indices = max_t(unsigned int, indices, IXGBE_MAX_DCB_INDICES);
6587#ifdef IXGBE_FCOE
6588 indices += min_t(unsigned int, num_possible_cpus(),
6589 IXGBE_MAX_FCOE_INDICES);
6590#endif
John Fastabendc85a2612010-02-25 23:15:21 +00006591 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
Auke Kok9a799d72007-09-15 14:07:45 -07006592 if (!netdev) {
6593 err = -ENOMEM;
6594 goto err_alloc_etherdev;
6595 }
6596
Auke Kok9a799d72007-09-15 14:07:45 -07006597 SET_NETDEV_DEV(netdev, &pdev->dev);
6598
6599 pci_set_drvdata(pdev, netdev);
6600 adapter = netdev_priv(netdev);
6601
6602 adapter->netdev = netdev;
6603 adapter->pdev = pdev;
6604 hw = &adapter->hw;
6605 hw->back = adapter;
6606 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
6607
Jeff Kirsher05857982008-09-11 19:57:00 -07006608 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
6609 pci_resource_len(pdev, 0));
Auke Kok9a799d72007-09-15 14:07:45 -07006610 if (!hw->hw_addr) {
6611 err = -EIO;
6612 goto err_ioremap;
6613 }
6614
6615 for (i = 1; i <= 5; i++) {
6616 if (pci_resource_len(pdev, i) == 0)
6617 continue;
6618 }
6619
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006620 netdev->netdev_ops = &ixgbe_netdev_ops;
Auke Kok9a799d72007-09-15 14:07:45 -07006621 ixgbe_set_ethtool_ops(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006622 netdev->watchdog_timeo = 5 * HZ;
Auke Kok9a799d72007-09-15 14:07:45 -07006623 strcpy(netdev->name, pci_name(pdev));
6624
Auke Kok9a799d72007-09-15 14:07:45 -07006625 adapter->bd_number = cards_found;
6626
Auke Kok9a799d72007-09-15 14:07:45 -07006627 /* Setup hw api */
6628 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006629 hw->mac.type = ii->mac;
Auke Kok9a799d72007-09-15 14:07:45 -07006630
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006631 /* EEPROM */
6632 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
6633 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
6634 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
6635 if (!(eec & (1 << 8)))
6636 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
6637
6638 /* PHY */
6639 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
Donald Skidmorec4900be2008-11-20 21:11:42 -08006640 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
Ben Hutchings6b73e102009-04-29 08:08:58 +00006641 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
6642 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
6643 hw->phy.mdio.mmds = 0;
6644 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
6645 hw->phy.mdio.dev = netdev;
6646 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
6647 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
Donald Skidmorec4900be2008-11-20 21:11:42 -08006648
6649 /* set up this timer and work struct before calling get_invariants
6650 * which might start the timer
6651 */
6652 init_timer(&adapter->sfp_timer);
6653 adapter->sfp_timer.function = &ixgbe_sfp_timer;
6654 adapter->sfp_timer.data = (unsigned long) adapter;
6655
6656 INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006657
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006658 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
6659 INIT_WORK(&adapter->multispeed_fiber_task, ixgbe_multispeed_fiber_task);
6660
6661 /* a new SFP+ module arrival, called from GPI SDP2 context */
6662 INIT_WORK(&adapter->sfp_config_module_task,
6663 ixgbe_sfp_config_module_task);
6664
Don Skidmore8ca783a2009-05-26 20:40:47 -07006665 ii->get_invariants(hw);
Auke Kok9a799d72007-09-15 14:07:45 -07006666
6667 /* setup the private structure */
6668 err = ixgbe_sw_init(adapter);
6669 if (err)
6670 goto err_sw_init;
6671
Don Skidmoree86bff02010-02-11 04:14:08 +00006672 /* Make it possible the adapter to be woken up via WOL */
6673 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
6674 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6675
Don Skidmorebf069c92009-05-07 10:39:54 +00006676 /*
6677 * If there is a fan on this device and it has failed log the
6678 * failure.
6679 */
6680 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
6681 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
6682 if (esdp & IXGBE_ESDP_SDP1)
Emil Tantilov396e7992010-07-01 20:05:12 +00006683 e_crit(probe, "Fan has stopped, replace the adapter\n");
Don Skidmorebf069c92009-05-07 10:39:54 +00006684 }
6685
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006686 /* reset_hw fills in the perm_addr as well */
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07006687 hw->phy.reset_if_overtemp = true;
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006688 err = hw->mac.ops.reset_hw(hw);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07006689 hw->phy.reset_if_overtemp = false;
Don Skidmore8ca783a2009-05-26 20:40:47 -07006690 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
6691 hw->mac.type == ixgbe_mac_82598EB) {
6692 /*
6693 * Start a kernel thread to watch for a module to arrive.
6694 * Only do this for 82598, since 82599 will generate
6695 * interrupts on module arrival.
6696 */
6697 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
6698 mod_timer(&adapter->sfp_timer,
6699 round_jiffies(jiffies + (2 * HZ)));
6700 err = 0;
6701 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006702 e_dev_err("failed to initialize because an unsupported SFP+ "
6703 "module type was detected.\n");
6704 e_dev_err("Reload the driver after installing a supported "
6705 "module.\n");
PJ Waskiewicz04f165e2009-04-09 22:27:57 +00006706 goto err_sw_init;
6707 } else if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006708 e_dev_err("HW Init failed: %d\n", err);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006709 goto err_sw_init;
6710 }
6711
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006712 ixgbe_probe_vf(adapter, ii);
6713
Emil Tantilov396e7992010-07-01 20:05:12 +00006714 netdev->features = NETIF_F_SG |
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006715 NETIF_F_IP_CSUM |
6716 NETIF_F_HW_VLAN_TX |
6717 NETIF_F_HW_VLAN_RX |
6718 NETIF_F_HW_VLAN_FILTER;
Auke Kok9a799d72007-09-15 14:07:45 -07006719
Jesse Brandeburge9990a92008-08-26 04:27:24 -07006720 netdev->features |= NETIF_F_IPV6_CSUM;
Auke Kok9a799d72007-09-15 14:07:45 -07006721 netdev->features |= NETIF_F_TSO;
Auke Kok9a799d72007-09-15 14:07:45 -07006722 netdev->features |= NETIF_F_TSO6;
Herbert Xu78b6f4c2009-01-18 21:49:45 -08006723 netdev->features |= NETIF_F_GRO;
Jeff Kirsherad31c402008-06-05 04:05:30 -07006724
Jesse Brandeburg45a5ead2009-04-27 22:36:35 +00006725 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
6726 netdev->features |= NETIF_F_SCTP_CSUM;
6727
Jeff Kirsherad31c402008-06-05 04:05:30 -07006728 netdev->vlan_features |= NETIF_F_TSO;
6729 netdev->vlan_features |= NETIF_F_TSO6;
Jesse Brandeburg22f32b7a52008-08-26 04:27:18 -07006730 netdev->vlan_features |= NETIF_F_IP_CSUM;
Alexander Duyckcd1da502009-08-25 04:47:50 +00006731 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
Jeff Kirsherad31c402008-06-05 04:05:30 -07006732 netdev->vlan_features |= NETIF_F_SG;
6733
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006734 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6735 adapter->flags &= ~(IXGBE_FLAG_RSS_ENABLED |
6736 IXGBE_FLAG_DCB_ENABLED);
Alexander Duyck2f90b862008-11-20 20:52:10 -08006737 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
6738 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
6739
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08006740#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08006741 netdev->dcbnl_ops = &dcbnl_ops;
6742#endif
6743
Yi Zoueacd73f2009-05-13 13:11:06 +00006744#ifdef IXGBE_FCOE
Yi Zou0d551582009-07-22 14:07:12 +00006745 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
Yi Zoueacd73f2009-05-13 13:11:06 +00006746 if (hw->mac.ops.get_device_caps) {
6747 hw->mac.ops.get_device_caps(hw, &device_caps);
Yi Zou0d551582009-07-22 14:07:12 +00006748 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
6749 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
Yi Zoueacd73f2009-05-13 13:11:06 +00006750 }
6751 }
Yi Zou5e09d7f2010-07-19 13:59:52 +00006752 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
6753 netdev->vlan_features |= NETIF_F_FCOE_CRC;
6754 netdev->vlan_features |= NETIF_F_FSO;
6755 netdev->vlan_features |= NETIF_F_FCOE_MTU;
6756 }
Yi Zoueacd73f2009-05-13 13:11:06 +00006757#endif /* IXGBE_FCOE */
Auke Kok9a799d72007-09-15 14:07:45 -07006758 if (pci_using_dac)
6759 netdev->features |= NETIF_F_HIGHDMA;
6760
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00006761 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
Alexander Duyckf8212f92009-04-27 22:42:37 +00006762 netdev->features |= NETIF_F_LRO;
6763
Auke Kok9a799d72007-09-15 14:07:45 -07006764 /* make sure the EEPROM is good */
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006765 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006766 e_dev_err("The EEPROM Checksum Is Not Valid\n");
Auke Kok9a799d72007-09-15 14:07:45 -07006767 err = -EIO;
6768 goto err_eeprom;
6769 }
6770
6771 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
6772 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
6773
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006774 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006775 e_dev_err("invalid MAC address\n");
Auke Kok9a799d72007-09-15 14:07:45 -07006776 err = -EIO;
6777 goto err_eeprom;
6778 }
6779
Peter Waskiewicz61fac742010-04-27 00:38:15 +00006780 /* power down the optics */
6781 if (hw->phy.multispeed_fiber)
6782 hw->mac.ops.disable_tx_laser(hw);
6783
Auke Kok9a799d72007-09-15 14:07:45 -07006784 init_timer(&adapter->watchdog_timer);
6785 adapter->watchdog_timer.function = &ixgbe_watchdog;
6786 adapter->watchdog_timer.data = (unsigned long)adapter;
6787
6788 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07006789 INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
Auke Kok9a799d72007-09-15 14:07:45 -07006790
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006791 err = ixgbe_init_interrupt_scheme(adapter);
6792 if (err)
6793 goto err_sw_init;
Auke Kok9a799d72007-09-15 14:07:45 -07006794
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006795 switch (pdev->device) {
6796 case IXGBE_DEV_ID_82599_KX4:
Waskiewicz Jr, Peter P495dce12009-04-23 11:15:18 +00006797 adapter->wol = (IXGBE_WUFC_MAG | IXGBE_WUFC_EX |
6798 IXGBE_WUFC_MC | IXGBE_WUFC_BC);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006799 break;
6800 default:
6801 adapter->wol = 0;
6802 break;
6803 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006804 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
6805
PJ Waskiewicz04f165e2009-04-09 22:27:57 +00006806 /* pick up the PCI bus settings for reporting later */
6807 hw->mac.ops.get_bus_info(hw);
6808
Auke Kok9a799d72007-09-15 14:07:45 -07006809 /* print bus type/speed/width info */
Emil Tantilov849c4542010-06-03 16:53:41 +00006810 e_dev_info("(PCI Express:%s:%s) %pM\n",
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006811 ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s":
6812 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5Gb/s":"Unknown"),
6813 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" :
6814 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" :
6815 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" :
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006816 "Unknown"),
Johannes Berg7c510e42008-10-27 17:47:26 -07006817 netdev->dev_addr);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006818 ixgbe_read_pba_num_generic(hw, &part_num);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006819 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
Emil Tantilov849c4542010-06-03 16:53:41 +00006820 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, "
6821 "PBA No: %06x-%03x\n",
6822 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
6823 (part_num >> 8), (part_num & 0xff));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006824 else
Emil Tantilov849c4542010-06-03 16:53:41 +00006825 e_dev_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
6826 hw->mac.type, hw->phy.type,
6827 (part_num >> 8), (part_num & 0xff));
Auke Kok9a799d72007-09-15 14:07:45 -07006828
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006829 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006830 e_dev_warn("PCI-Express bandwidth available for this card is "
6831 "not sufficient for optimal performance.\n");
6832 e_dev_warn("For optimal performance a x8 PCI-Express slot "
6833 "is required.\n");
Auke Kok0c254d82008-02-11 09:25:56 -08006834 }
6835
Peter P Waskiewicz Jr34b03682009-02-05 23:54:42 -08006836 /* save off EEPROM version number */
6837 hw->eeprom.ops.read(hw, 0x29, &adapter->eeprom_version);
6838
Auke Kok9a799d72007-09-15 14:07:45 -07006839 /* reset the hardware with the new settings */
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00006840 err = hw->mac.ops.start_hw(hw);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006841
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00006842 if (err == IXGBE_ERR_EEPROM_VERSION) {
6843 /* We are running on a pre-production device, log a warning */
Emil Tantilov849c4542010-06-03 16:53:41 +00006844 e_dev_warn("This device is a pre-production adapter/LOM. "
6845 "Please be aware there may be issues associated "
6846 "with your hardware. If you are experiencing "
6847 "problems please contact your Intel or hardware "
6848 "representative who provided you with this "
6849 "hardware.\n");
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00006850 }
Auke Kok9a799d72007-09-15 14:07:45 -07006851 strcpy(netdev->name, "eth%d");
6852 err = register_netdev(netdev);
6853 if (err)
6854 goto err_register;
6855
Jesse Brandeburg54386462009-04-17 20:44:27 +00006856 /* carrier off reporting is important to ethtool even BEFORE open */
6857 netif_carrier_off(netdev);
6858
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006859 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
6860 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
6861 INIT_WORK(&adapter->fdir_reinit_task, ixgbe_fdir_reinit_task);
6862
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07006863 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
6864 INIT_WORK(&adapter->check_overtemp_task, ixgbe_check_overtemp_task);
Jeff Garzik5dd2d332008-10-16 05:09:31 -04006865#ifdef CONFIG_IXGBE_DCA
Denis V. Lunev652f0932008-03-27 14:39:17 +03006866 if (dca_add_requester(&pdev->dev) == 0) {
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006867 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006868 ixgbe_setup_dca(adapter);
6869 }
6870#endif
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006871 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
Emil Tantilov396e7992010-07-01 20:05:12 +00006872 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006873 for (i = 0; i < adapter->num_vfs; i++)
6874 ixgbe_vf_configuration(pdev, (i | 0x10000000));
6875 }
6876
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006877 /* add san mac addr to netdev */
6878 ixgbe_add_sanmac_netdev(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006879
Emil Tantilov849c4542010-06-03 16:53:41 +00006880 e_dev_info("Intel(R) 10 Gigabit Network Connection\n");
Auke Kok9a799d72007-09-15 14:07:45 -07006881 cards_found++;
6882 return 0;
6883
6884err_register:
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08006885 ixgbe_release_hw_control(adapter);
Alexander Duyck7a921c92009-05-06 10:43:28 +00006886 ixgbe_clear_interrupt_scheme(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07006887err_sw_init:
6888err_eeprom:
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006889 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6890 ixgbe_disable_sriov(adapter);
Donald Skidmorec4900be2008-11-20 21:11:42 -08006891 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
6892 del_timer_sync(&adapter->sfp_timer);
6893 cancel_work_sync(&adapter->sfp_task);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006894 cancel_work_sync(&adapter->multispeed_fiber_task);
6895 cancel_work_sync(&adapter->sfp_config_module_task);
Auke Kok9a799d72007-09-15 14:07:45 -07006896 iounmap(hw->hw_addr);
6897err_ioremap:
6898 free_netdev(netdev);
6899err_alloc_etherdev:
gouji-new9ce77662009-05-06 10:44:45 +00006900 pci_release_selected_regions(pdev, pci_select_bars(pdev,
6901 IORESOURCE_MEM));
Auke Kok9a799d72007-09-15 14:07:45 -07006902err_pci_reg:
6903err_dma:
6904 pci_disable_device(pdev);
6905 return err;
6906}
6907
6908/**
6909 * ixgbe_remove - Device Removal Routine
6910 * @pdev: PCI device information struct
6911 *
6912 * ixgbe_remove is called by the PCI subsystem to alert the driver
6913 * that it should release a PCI device. The could be caused by a
6914 * Hot-Plug event, or because the driver is going to be removed from
6915 * memory.
6916 **/
6917static void __devexit ixgbe_remove(struct pci_dev *pdev)
6918{
6919 struct net_device *netdev = pci_get_drvdata(pdev);
6920 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6921
6922 set_bit(__IXGBE_DOWN, &adapter->state);
Donald Skidmorec4900be2008-11-20 21:11:42 -08006923 /* clear the module not found bit to make sure the worker won't
6924 * reschedule
6925 */
6926 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
Auke Kok9a799d72007-09-15 14:07:45 -07006927 del_timer_sync(&adapter->watchdog_timer);
6928
Donald Skidmorec4900be2008-11-20 21:11:42 -08006929 del_timer_sync(&adapter->sfp_timer);
6930 cancel_work_sync(&adapter->watchdog_task);
6931 cancel_work_sync(&adapter->sfp_task);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006932 cancel_work_sync(&adapter->multispeed_fiber_task);
6933 cancel_work_sync(&adapter->sfp_config_module_task);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006934 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
6935 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
6936 cancel_work_sync(&adapter->fdir_reinit_task);
Auke Kok9a799d72007-09-15 14:07:45 -07006937 flush_scheduled_work();
6938
Jeff Garzik5dd2d332008-10-16 05:09:31 -04006939#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006940 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
6941 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
6942 dca_remove_requester(&pdev->dev);
6943 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
6944 }
6945
6946#endif
Yi Zou332d4a72009-05-13 13:11:53 +00006947#ifdef IXGBE_FCOE
6948 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
6949 ixgbe_cleanup_fcoe(adapter);
6950
6951#endif /* IXGBE_FCOE */
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006952
6953 /* remove the added san mac */
6954 ixgbe_del_sanmac_netdev(netdev);
6955
Donald Skidmorec4900be2008-11-20 21:11:42 -08006956 if (netdev->reg_state == NETREG_REGISTERED)
6957 unregister_netdev(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006958
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006959 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6960 ixgbe_disable_sriov(adapter);
6961
Alexander Duyck7a921c92009-05-06 10:43:28 +00006962 ixgbe_clear_interrupt_scheme(adapter);
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08006963
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006964 ixgbe_release_hw_control(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07006965
6966 iounmap(adapter->hw.hw_addr);
gouji-new9ce77662009-05-06 10:44:45 +00006967 pci_release_selected_regions(pdev, pci_select_bars(pdev,
6968 IORESOURCE_MEM));
Auke Kok9a799d72007-09-15 14:07:45 -07006969
Emil Tantilov849c4542010-06-03 16:53:41 +00006970 e_dev_info("complete\n");
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006971
Auke Kok9a799d72007-09-15 14:07:45 -07006972 free_netdev(netdev);
6973
Frans Pop19d5afd2009-10-02 10:04:12 -07006974 pci_disable_pcie_error_reporting(pdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006975
Auke Kok9a799d72007-09-15 14:07:45 -07006976 pci_disable_device(pdev);
6977}
6978
6979/**
6980 * ixgbe_io_error_detected - called when PCI error is detected
6981 * @pdev: Pointer to PCI device
6982 * @state: The current pci connection state
6983 *
6984 * This function is called after a PCI bus error affecting
6985 * this device has been detected.
6986 */
6987static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006988 pci_channel_state_t state)
Auke Kok9a799d72007-09-15 14:07:45 -07006989{
6990 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen454d7c92008-11-12 23:37:49 -08006991 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006992
6993 netif_device_detach(netdev);
6994
Breno Leitao3044b8d2009-05-06 10:44:26 +00006995 if (state == pci_channel_io_perm_failure)
6996 return PCI_ERS_RESULT_DISCONNECT;
6997
Auke Kok9a799d72007-09-15 14:07:45 -07006998 if (netif_running(netdev))
6999 ixgbe_down(adapter);
7000 pci_disable_device(pdev);
7001
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07007002 /* Request a slot reset. */
Auke Kok9a799d72007-09-15 14:07:45 -07007003 return PCI_ERS_RESULT_NEED_RESET;
7004}
7005
7006/**
7007 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7008 * @pdev: Pointer to PCI device
7009 *
7010 * Restart the card from scratch, as if from a cold-boot.
7011 */
7012static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
7013{
7014 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen454d7c92008-11-12 23:37:49 -08007015 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007016 pci_ers_result_t result;
7017 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07007018
gouji-new9ce77662009-05-06 10:44:45 +00007019 if (pci_enable_device_mem(pdev)) {
Emil Tantilov396e7992010-07-01 20:05:12 +00007020 e_err(probe, "Cannot re-enable PCI device after reset.\n");
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007021 result = PCI_ERS_RESULT_DISCONNECT;
7022 } else {
7023 pci_set_master(pdev);
7024 pci_restore_state(pdev);
Breno Leitaoc0e1f682009-11-10 08:37:47 +00007025 pci_save_state(pdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007026
Don Skidmoredd4d8ca2009-04-29 00:22:31 -07007027 pci_wake_from_d3(pdev, false);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007028
7029 ixgbe_reset(adapter);
PJ Waskiewicz88512532009-03-13 22:15:10 +00007030 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007031 result = PCI_ERS_RESULT_RECOVERED;
Auke Kok9a799d72007-09-15 14:07:45 -07007032 }
Auke Kok9a799d72007-09-15 14:07:45 -07007033
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007034 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7035 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00007036 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7037 "failed 0x%0x\n", err);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007038 /* non-fatal, continue */
7039 }
Auke Kok9a799d72007-09-15 14:07:45 -07007040
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007041 return result;
Auke Kok9a799d72007-09-15 14:07:45 -07007042}
7043
7044/**
7045 * ixgbe_io_resume - called when traffic can start flowing again.
7046 * @pdev: Pointer to PCI device
7047 *
7048 * This callback is called when the error recovery driver tells us that
7049 * its OK to resume normal operation.
7050 */
7051static void ixgbe_io_resume(struct pci_dev *pdev)
7052{
7053 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen454d7c92008-11-12 23:37:49 -08007054 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07007055
7056 if (netif_running(netdev)) {
7057 if (ixgbe_up(adapter)) {
Emil Tantilov396e7992010-07-01 20:05:12 +00007058 e_info(probe, "ixgbe_up failed after reset\n");
Auke Kok9a799d72007-09-15 14:07:45 -07007059 return;
7060 }
7061 }
7062
7063 netif_device_attach(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07007064}
7065
7066static struct pci_error_handlers ixgbe_err_handler = {
7067 .error_detected = ixgbe_io_error_detected,
7068 .slot_reset = ixgbe_io_slot_reset,
7069 .resume = ixgbe_io_resume,
7070};
7071
7072static struct pci_driver ixgbe_driver = {
7073 .name = ixgbe_driver_name,
7074 .id_table = ixgbe_pci_tbl,
7075 .probe = ixgbe_probe,
7076 .remove = __devexit_p(ixgbe_remove),
7077#ifdef CONFIG_PM
7078 .suspend = ixgbe_suspend,
7079 .resume = ixgbe_resume,
7080#endif
7081 .shutdown = ixgbe_shutdown,
7082 .err_handler = &ixgbe_err_handler
7083};
7084
7085/**
7086 * ixgbe_init_module - Driver Registration Routine
7087 *
7088 * ixgbe_init_module is the first routine called when the driver is
7089 * loaded. All it does is register with the PCI subsystem.
7090 **/
7091static int __init ixgbe_init_module(void)
7092{
7093 int ret;
Emil Tantilov849c4542010-06-03 16:53:41 +00007094 pr_info("%s - version %s\n", ixgbe_driver_string,
7095 ixgbe_driver_version);
7096 pr_info("%s\n", ixgbe_copyright);
Auke Kok9a799d72007-09-15 14:07:45 -07007097
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007098#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007099 dca_register_notify(&dca_notifier);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007100#endif
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007101
Auke Kok9a799d72007-09-15 14:07:45 -07007102 ret = pci_register_driver(&ixgbe_driver);
7103 return ret;
7104}
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07007105
Auke Kok9a799d72007-09-15 14:07:45 -07007106module_init(ixgbe_init_module);
7107
7108/**
7109 * ixgbe_exit_module - Driver Exit Cleanup Routine
7110 *
7111 * ixgbe_exit_module is called just before the driver is removed
7112 * from memory.
7113 **/
7114static void __exit ixgbe_exit_module(void)
7115{
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007116#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007117 dca_unregister_notify(&dca_notifier);
7118#endif
Auke Kok9a799d72007-09-15 14:07:45 -07007119 pci_unregister_driver(&ixgbe_driver);
7120}
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007121
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007122#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007123static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07007124 void *p)
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007125{
7126 int ret_val;
7127
7128 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07007129 __ixgbe_notify_dca);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007130
7131 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7132}
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007133
Alexander Duyckb4533682009-03-31 21:32:42 +00007134#endif /* CONFIG_IXGBE_DCA */
Emil Tantilov849c4542010-06-03 16:53:41 +00007135
Alexander Duyckb4533682009-03-31 21:32:42 +00007136/**
Emil Tantilov849c4542010-06-03 16:53:41 +00007137 * ixgbe_get_hw_dev return device
Alexander Duyckb4533682009-03-31 21:32:42 +00007138 * used by hardware layer to print debugging information
7139 **/
Emil Tantilov849c4542010-06-03 16:53:41 +00007140struct net_device *ixgbe_get_hw_dev(struct ixgbe_hw *hw)
Alexander Duyckb4533682009-03-31 21:32:42 +00007141{
7142 struct ixgbe_adapter *adapter = hw->back;
Emil Tantilov849c4542010-06-03 16:53:41 +00007143 return adapter->netdev;
Alexander Duyckb4533682009-03-31 21:32:42 +00007144}
7145
Auke Kok9a799d72007-09-15 14:07:45 -07007146module_exit(ixgbe_exit_module);
7147
7148/* ixgbe_main.c */