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Thomas Petazzoni9ae6f742012-06-13 19:01:28 +02001/*
2 * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Lior Amsalem <alior@marvell.com>
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Ben Dooks <ben.dooks@codethink.co.uk>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 *
15 * This file contains the definitions that are common to the Armada
16 * 370 and Armada XP SoC.
17 */
18
19/include/ "skeleton.dtsi"
20
21/ {
22 model = "Marvell Armada 370 and XP SoC";
Thomas Petazzoni92ece1c2012-11-09 16:29:17 +010023 compatible = "marvell,armada-370-xp";
Thomas Petazzoni9ae6f742012-06-13 19:01:28 +020024
25 cpus {
26 cpu@0 {
27 compatible = "marvell,sheeva-v7";
28 };
29 };
30
Thomas Petazzoni9ae6f742012-06-13 19:01:28 +020031 soc {
32 #address-cells = <1>;
33 #size-cells = <1>;
34 compatible = "simple-bus";
35 interrupt-parent = <&mpic>;
Gregory CLEMENT82a68262013-04-12 16:29:08 +020036 ranges = <0 0xd0000000 0x100000>;
Thomas Petazzoni9ae6f742012-06-13 19:01:28 +020037
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020038 internal-regs {
39 compatible = "simple-bus";
40 #address-cells = <1>;
41 #size-cells = <1>;
42 ranges;
43
44 mpic: interrupt-controller@20000 {
Gregory CLEMENT82a68262013-04-12 16:29:08 +020045 compatible = "marvell,mpic";
46 #interrupt-cells = <1>;
47 #size-cells = <1>;
48 interrupt-controller;
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020049 };
Thomas Petazzonib18ea4d2013-04-12 16:29:07 +020050
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020051 coherency-fabric@20200 {
Gregory CLEMENT82a68262013-04-12 16:29:08 +020052 compatible = "marvell,coherency-fabric";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020053 reg = <0x20200 0xb0>, <0x21810 0x1c>;
54 };
Thomas Petazzonib18ea4d2013-04-12 16:29:07 +020055
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020056 serial@12000 {
Gregory CLEMENTb24212f2012-12-04 18:04:59 +010057 compatible = "snps,dw-apb-uart";
Gregory CLEMENT82a68262013-04-12 16:29:08 +020058 reg = <0x12000 0x100>;
Thomas Petazzoni9ae6f742012-06-13 19:01:28 +020059 reg-shift = <2>;
60 interrupts = <41>;
Heikki Krogeruse3661542013-03-06 11:23:33 +010061 reg-io-width = <1>;
Thomas Petazzoni9ae6f742012-06-13 19:01:28 +020062 status = "disabled";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020063 };
64 serial@12100 {
Gregory CLEMENTb24212f2012-12-04 18:04:59 +010065 compatible = "snps,dw-apb-uart";
Gregory CLEMENT82a68262013-04-12 16:29:08 +020066 reg = <0x12100 0x100>;
Thomas Petazzoni9ae6f742012-06-13 19:01:28 +020067 reg-shift = <2>;
68 interrupts = <42>;
Heikki Krogeruse3661542013-03-06 11:23:33 +010069 reg-io-width = <1>;
Thomas Petazzoni9ae6f742012-06-13 19:01:28 +020070 status = "disabled";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020071 };
Thomas Petazzoni9ae6f742012-06-13 19:01:28 +020072
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020073 timer@20300 {
74 compatible = "marvell,armada-370-xp-timer";
75 reg = <0x20300 0x30>, <0x21040 0x30>;
76 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
77 clocks = <&coreclk 2>;
78 };
Thomas Petazzoni5b40bae2012-09-11 14:27:30 +020079
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020080 sata@a0000 {
81 compatible = "marvell,orion-sata";
82 reg = <0xa0000 0x2400>;
83 interrupts = <55>;
84 clocks = <&gateclk 15>, <&gateclk 30>;
85 clock-names = "0", "1";
86 status = "disabled";
87 };
Gregory CLEMENTa6a6de12012-10-26 14:30:47 +020088
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020089 mdio {
90 #address-cells = <1>;
91 #size-cells = <0>;
92 compatible = "marvell,orion-mdio";
93 reg = <0x72004 0x4>;
94 };
Thomas Petazzoni323c1012012-09-04 15:06:43 +020095
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020096 ethernet@70000 {
Thomas Petazzoni323c1012012-09-04 15:06:43 +020097 compatible = "marvell,armada-370-neta";
Gregory CLEMENT82a68262013-04-12 16:29:08 +020098 reg = <0x70000 0x2500>;
Thomas Petazzoni323c1012012-09-04 15:06:43 +020099 interrupts = <8>;
Thomas Petazzoni4aa935a2012-11-19 14:18:09 +0100100 clocks = <&gateclk 4>;
Thomas Petazzoni323c1012012-09-04 15:06:43 +0200101 status = "disabled";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200102 };
Thomas Petazzoni323c1012012-09-04 15:06:43 +0200103
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200104 ethernet@74000 {
Thomas Petazzoni323c1012012-09-04 15:06:43 +0200105 compatible = "marvell,armada-370-neta";
Gregory CLEMENT82a68262013-04-12 16:29:08 +0200106 reg = <0x74000 0x2500>;
Thomas Petazzoni323c1012012-09-04 15:06:43 +0200107 interrupts = <10>;
Thomas Petazzoni4aa935a2012-11-19 14:18:09 +0100108 clocks = <&gateclk 3>;
Thomas Petazzoni323c1012012-09-04 15:06:43 +0200109 status = "disabled";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200110 };
Nobuhiro Iwamatsu539eb5b2012-10-30 19:41:23 +0900111
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200112 i2c0: i2c@11000 {
113 compatible = "marvell,mv64xxx-i2c";
114 reg = <0x11000 0x20>;
115 #address-cells = <1>;
116 #size-cells = <0>;
117 interrupts = <31>;
118 timeout-ms = <1000>;
119 clocks = <&coreclk 0>;
120 status = "disabled";
121 };
Nobuhiro Iwamatsu539eb5b2012-10-30 19:41:23 +0900122
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200123 i2c1: i2c@11100 {
124 compatible = "marvell,mv64xxx-i2c";
125 reg = <0x11100 0x20>;
126 #address-cells = <1>;
127 #size-cells = <0>;
128 interrupts = <32>;
129 timeout-ms = <1000>;
130 clocks = <&coreclk 0>;
131 status = "disabled";
132 };
Gregory CLEMENT0db98542012-12-12 10:06:24 +0100133
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200134 rtc@10300 {
135 compatible = "marvell,orion-rtc";
136 reg = <0x10300 0x20>;
137 interrupts = <50>;
138 };
Thomas Petazzoni42bb5312012-12-21 15:49:04 +0100139
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200140 mvsdio@d4000 {
141 compatible = "marvell,orion-sdio";
142 reg = <0xd4000 0x200>;
143 interrupts = <54>;
144 clocks = <&gateclk 17>;
145 status = "disabled";
146 };
Ezequiel Garciab2bb8062013-01-23 12:26:30 -0300147
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200148 usb@50000 {
149 compatible = "marvell,orion-ehci";
150 reg = <0x50000 0x500>;
151 interrupts = <45>;
152 status = "disabled";
153 };
Ezequiel Garciab2bb8062013-01-23 12:26:30 -0300154
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200155 usb@51000 {
156 compatible = "marvell,orion-ehci";
157 reg = <0x51000 0x500>;
158 interrupts = <46>;
159 status = "disabled";
160 };
Ezequiel Garciab2bb8062013-01-23 12:26:30 -0300161
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200162 spi0: spi@10600 {
163 compatible = "marvell,orion-spi";
164 reg = <0x10600 0x28>;
165 #address-cells = <1>;
166 #size-cells = <0>;
167 cell-index = <0>;
168 interrupts = <30>;
169 clocks = <&coreclk 0>;
170 status = "disabled";
171 };
Ezequiel Garciad5dc0352013-02-06 10:06:21 -0300172
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200173 spi1: spi@10680 {
174 compatible = "marvell,orion-spi";
175 reg = <0x10680 0x28>;
176 #address-cells = <1>;
177 #size-cells = <0>;
178 cell-index = <1>;
179 interrupts = <92>;
180 clocks = <&coreclk 0>;
181 status = "disabled";
182 };
Ezequiel Garcia3d76e1f2013-04-10 16:04:01 -0300183
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200184 devbus-bootcs@10400 {
185 compatible = "marvell,mvebu-devbus";
186 reg = <0x10400 0x8>;
187 #address-cells = <1>;
188 #size-cells = <1>;
189 clocks = <&coreclk 0>;
190 status = "disabled";
191 };
Ezequiel Garcia3d76e1f2013-04-10 16:04:01 -0300192
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200193 devbus-cs0@10408 {
194 compatible = "marvell,mvebu-devbus";
195 reg = <0x10408 0x8>;
196 #address-cells = <1>;
197 #size-cells = <1>;
198 clocks = <&coreclk 0>;
199 status = "disabled";
200 };
Ezequiel Garcia3d76e1f2013-04-10 16:04:01 -0300201
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200202 devbus-cs1@10410 {
203 compatible = "marvell,mvebu-devbus";
204 reg = <0x10410 0x8>;
205 #address-cells = <1>;
206 #size-cells = <1>;
207 clocks = <&coreclk 0>;
208 status = "disabled";
209 };
Ezequiel Garcia3d76e1f2013-04-10 16:04:01 -0300210
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200211 devbus-cs2@10418 {
212 compatible = "marvell,mvebu-devbus";
213 reg = <0x10418 0x8>;
214 #address-cells = <1>;
215 #size-cells = <1>;
216 clocks = <&coreclk 0>;
217 status = "disabled";
218 };
Ezequiel Garcia3d76e1f2013-04-10 16:04:01 -0300219
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200220 devbus-cs3@10420 {
221 compatible = "marvell,mvebu-devbus";
222 reg = <0x10420 0x8>;
223 #address-cells = <1>;
224 #size-cells = <1>;
225 clocks = <&coreclk 0>;
226 status = "disabled";
227 };
Ezequiel Garcia3d76e1f2013-04-10 16:04:01 -0300228 };
Thomas Petazzoni9ae6f742012-06-13 19:01:28 +0200229 };
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200230 };