| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * Copyright 2012 Freescale Semiconductor, Inc. | 
 | 3 |  * | 
 | 4 |  * The code contained herein is licensed under the GNU General Public | 
 | 5 |  * License. You may obtain a copy of the GNU General Public License | 
 | 6 |  * Version 2 or later at the following locations: | 
 | 7 |  * | 
 | 8 |  * http://www.opensource.org/licenses/gpl-license.html | 
 | 9 |  * http://www.gnu.org/copyleft/gpl.html | 
 | 10 |  */ | 
 | 11 |  | 
 | 12 | /include/ "skeleton.dtsi" | 
 | 13 |  | 
 | 14 | / { | 
 | 15 | 	interrupt-parent = <&icoll>; | 
 | 16 |  | 
| Shawn Guo | ce4c6f9 | 2012-05-04 14:32:35 +0800 | [diff] [blame] | 17 | 	aliases { | 
 | 18 | 		gpio0 = &gpio0; | 
 | 19 | 		gpio1 = &gpio1; | 
 | 20 | 		gpio2 = &gpio2; | 
| Shawn Guo | a450839 | 2012-06-28 11:45:00 +0800 | [diff] [blame] | 21 | 		serial0 = &auart0; | 
 | 22 | 		serial1 = &auart1; | 
| Shawn Guo | ce4c6f9 | 2012-05-04 14:32:35 +0800 | [diff] [blame] | 23 | 	}; | 
 | 24 |  | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 25 | 	cpus { | 
 | 26 | 		cpu@0 { | 
 | 27 | 			compatible = "arm,arm926ejs"; | 
 | 28 | 		}; | 
 | 29 | 	}; | 
 | 30 |  | 
 | 31 | 	apb@80000000 { | 
 | 32 | 		compatible = "simple-bus"; | 
 | 33 | 		#address-cells = <1>; | 
 | 34 | 		#size-cells = <1>; | 
 | 35 | 		reg = <0x80000000 0x80000>; | 
 | 36 | 		ranges; | 
 | 37 |  | 
 | 38 | 		apbh@80000000 { | 
 | 39 | 			compatible = "simple-bus"; | 
 | 40 | 			#address-cells = <1>; | 
 | 41 | 			#size-cells = <1>; | 
 | 42 | 			reg = <0x80000000 0x40000>; | 
 | 43 | 			ranges; | 
 | 44 |  | 
 | 45 | 			icoll: interrupt-controller@80000000 { | 
| Shawn Guo | 83a84ef | 2012-08-20 21:34:56 +0800 | [diff] [blame] | 46 | 				compatible = "fsl,imx23-icoll", "fsl,icoll"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 47 | 				interrupt-controller; | 
 | 48 | 				#interrupt-cells = <1>; | 
 | 49 | 				reg = <0x80000000 0x2000>; | 
 | 50 | 			}; | 
 | 51 |  | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 52 | 			dma_apbh: dma-apbh@80004000 { | 
| Dong Aisheng | 84f3570 | 2012-05-04 20:12:19 +0800 | [diff] [blame] | 53 | 				compatible = "fsl,imx23-dma-apbh"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 54 | 				reg = <0x80004000 0x2000>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 55 | 				interrupts = <0 14 20 0 | 
 | 56 | 					      13 13 13 13>; | 
 | 57 | 				interrupt-names = "empty", "ssp0", "ssp1", "empty", | 
 | 58 | 						  "gpmi0", "gpmi1", "gpmi2", "gpmi3"; | 
 | 59 | 				#dma-cells = <1>; | 
 | 60 | 				dma-channels = <8>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 61 | 				clocks = <&clks 15>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 62 | 			}; | 
 | 63 |  | 
 | 64 | 			ecc@80008000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 65 | 				reg = <0x80008000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 66 | 				status = "disabled"; | 
 | 67 | 			}; | 
 | 68 |  | 
| Marek Vasut | a217c46 | 2012-06-09 01:21:55 +0200 | [diff] [blame] | 69 | 			gpmi-nand@8000c000 { | 
| Huang Shijie | b9f25f8 | 2012-07-03 12:58:13 +0800 | [diff] [blame] | 70 | 				compatible = "fsl,imx23-gpmi-nand"; | 
 | 71 | 				#address-cells = <1>; | 
 | 72 | 				#size-cells = <1>; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 73 | 				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; | 
| Huang Shijie | b9f25f8 | 2012-07-03 12:58:13 +0800 | [diff] [blame] | 74 | 				reg-names = "gpmi-nand", "bch"; | 
 | 75 | 				interrupts = <13>, <56>; | 
 | 76 | 				interrupt-names = "gpmi-dma", "bch"; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 77 | 				clocks = <&clks 34>; | 
| Huang Shijie | b644255 | 2012-10-10 18:27:09 +0800 | [diff] [blame] | 78 | 				clock-names = "gpmi_io"; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 79 | 				dmas = <&dma_apbh 4>; | 
 | 80 | 				dma-names = "rx-tx"; | 
| Huang Shijie | b9f25f8 | 2012-07-03 12:58:13 +0800 | [diff] [blame] | 81 | 				fsl,gpmi-dma-channel = <4>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 82 | 				status = "disabled"; | 
 | 83 | 			}; | 
 | 84 |  | 
 | 85 | 			ssp0: ssp@80010000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 86 | 				reg = <0x80010000 0x2000>; | 
| Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 87 | 				interrupts = <15 14>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 88 | 				clocks = <&clks 33>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 89 | 				dmas = <&dma_apbh 1>; | 
 | 90 | 				dma-names = "rx-tx"; | 
| Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 91 | 				fsl,ssp-dma-channel = <1>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 92 | 				status = "disabled"; | 
 | 93 | 			}; | 
 | 94 |  | 
 | 95 | 			etm@80014000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 96 | 				reg = <0x80014000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 97 | 				status = "disabled"; | 
 | 98 | 			}; | 
 | 99 |  | 
 | 100 | 			pinctrl@80018000 { | 
 | 101 | 				#address-cells = <1>; | 
 | 102 | 				#size-cells = <0>; | 
| Shawn Guo | ce4c6f9 | 2012-05-04 14:32:35 +0800 | [diff] [blame] | 103 | 				compatible = "fsl,imx23-pinctrl", "simple-bus"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 104 | 				reg = <0x80018000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 105 |  | 
| Shawn Guo | ce4c6f9 | 2012-05-04 14:32:35 +0800 | [diff] [blame] | 106 | 				gpio0: gpio@0 { | 
 | 107 | 					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | 
 | 108 | 					interrupts = <16>; | 
 | 109 | 					gpio-controller; | 
 | 110 | 					#gpio-cells = <2>; | 
 | 111 | 					interrupt-controller; | 
 | 112 | 					#interrupt-cells = <2>; | 
 | 113 | 				}; | 
 | 114 |  | 
 | 115 | 				gpio1: gpio@1 { | 
 | 116 | 					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | 
 | 117 | 					interrupts = <17>; | 
 | 118 | 					gpio-controller; | 
 | 119 | 					#gpio-cells = <2>; | 
 | 120 | 					interrupt-controller; | 
 | 121 | 					#interrupt-cells = <2>; | 
 | 122 | 				}; | 
 | 123 |  | 
 | 124 | 				gpio2: gpio@2 { | 
 | 125 | 					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | 
 | 126 | 					interrupts = <18>; | 
 | 127 | 					gpio-controller; | 
 | 128 | 					#gpio-cells = <2>; | 
 | 129 | 					interrupt-controller; | 
 | 130 | 					#interrupt-cells = <2>; | 
 | 131 | 				}; | 
 | 132 |  | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 133 | 				duart_pins_a: duart@0 { | 
 | 134 | 					reg = <0>; | 
| Shawn Guo | f14da76 | 2012-06-28 11:44:57 +0800 | [diff] [blame] | 135 | 					fsl,pinmux-ids = < | 
 | 136 | 						0x11a2 /* MX23_PAD_PWM0__DUART_RX */ | 
 | 137 | 						0x11b2 /* MX23_PAD_PWM1__DUART_TX */ | 
 | 138 | 					>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 139 | 					fsl,drive-strength = <0>; | 
 | 140 | 					fsl,voltage = <1>; | 
 | 141 | 					fsl,pull-up = <0>; | 
 | 142 | 				}; | 
| Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 143 |  | 
| Shawn Guo | a450839 | 2012-06-28 11:45:00 +0800 | [diff] [blame] | 144 | 				auart0_pins_a: auart0@0 { | 
 | 145 | 					reg = <0>; | 
 | 146 | 					fsl,pinmux-ids = < | 
 | 147 | 						0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */ | 
 | 148 | 						0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */ | 
 | 149 | 						0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */ | 
 | 150 | 						0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */ | 
 | 151 | 					>; | 
 | 152 | 					fsl,drive-strength = <0>; | 
 | 153 | 					fsl,voltage = <1>; | 
 | 154 | 					fsl,pull-up = <0>; | 
 | 155 | 				}; | 
 | 156 |  | 
| Fabio Estevam | 98916a2 | 2012-07-30 16:33:44 -0300 | [diff] [blame] | 157 | 				auart0_2pins_a: auart0-2pins@0 { | 
 | 158 | 					reg = <0>; | 
 | 159 | 					fsl,pinmux-ids = < | 
 | 160 | 						0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */ | 
 | 161 | 						0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */ | 
 | 162 | 					>; | 
 | 163 | 					fsl,drive-strength = <0>; | 
 | 164 | 					fsl,voltage = <1>; | 
 | 165 | 					fsl,pull-up = <0>; | 
 | 166 | 				}; | 
 | 167 |  | 
| Huang Shijie | b9f25f8 | 2012-07-03 12:58:13 +0800 | [diff] [blame] | 168 | 				gpmi_pins_a: gpmi-nand@0 { | 
 | 169 | 					reg = <0>; | 
 | 170 | 					fsl,pinmux-ids = < | 
 | 171 | 						0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */ | 
 | 172 | 						0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */ | 
 | 173 | 						0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */ | 
 | 174 | 						0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */ | 
 | 175 | 						0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */ | 
 | 176 | 						0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */ | 
 | 177 | 						0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */ | 
 | 178 | 						0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */ | 
 | 179 | 						0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */ | 
 | 180 | 						0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */ | 
 | 181 | 						0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */ | 
 | 182 | 						0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */ | 
 | 183 | 						0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ | 
 | 184 | 						0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ | 
 | 185 | 						0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ | 
 | 186 | 						0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */ | 
 | 187 | 						0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N	*/ | 
 | 188 | 					>; | 
 | 189 | 					fsl,drive-strength = <0>; | 
 | 190 | 					fsl,voltage = <1>; | 
 | 191 | 					fsl,pull-up = <0>; | 
 | 192 | 				}; | 
 | 193 |  | 
 | 194 | 				gpmi_pins_fixup: gpmi-pins-fixup { | 
 | 195 | 					fsl,pinmux-ids = < | 
 | 196 | 						0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ | 
 | 197 | 						0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ | 
 | 198 | 						0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ | 
 | 199 | 					>; | 
 | 200 | 					fsl,drive-strength = <2>; | 
 | 201 | 				}; | 
 | 202 |  | 
| Shawn Guo | 72beaba | 2012-06-28 11:44:59 +0800 | [diff] [blame] | 203 | 				mmc0_4bit_pins_a: mmc0-4bit@0 { | 
 | 204 | 					reg = <0>; | 
 | 205 | 					fsl,pinmux-ids = < | 
 | 206 | 						0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ | 
 | 207 | 						0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ | 
 | 208 | 						0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ | 
 | 209 | 						0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ | 
 | 210 | 						0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ | 
| Shawn Guo | 72beaba | 2012-06-28 11:44:59 +0800 | [diff] [blame] | 211 | 						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | 
 | 212 | 					>; | 
 | 213 | 					fsl,drive-strength = <1>; | 
 | 214 | 					fsl,voltage = <1>; | 
 | 215 | 					fsl,pull-up = <1>; | 
 | 216 | 				}; | 
 | 217 |  | 
| Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 218 | 				mmc0_8bit_pins_a: mmc0-8bit@0 { | 
 | 219 | 					reg = <0>; | 
| Shawn Guo | f14da76 | 2012-06-28 11:44:57 +0800 | [diff] [blame] | 220 | 					fsl,pinmux-ids = < | 
 | 221 | 						0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ | 
 | 222 | 						0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ | 
 | 223 | 						0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ | 
 | 224 | 						0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ | 
 | 225 | 						0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */ | 
 | 226 | 						0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */ | 
 | 227 | 						0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */ | 
 | 228 | 						0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */ | 
 | 229 | 						0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ | 
 | 230 | 						0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | 
 | 231 | 						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | 
 | 232 | 					>; | 
| Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 233 | 					fsl,drive-strength = <1>; | 
 | 234 | 					fsl,voltage = <1>; | 
 | 235 | 					fsl,pull-up = <1>; | 
 | 236 | 				}; | 
 | 237 |  | 
 | 238 | 				mmc0_pins_fixup: mmc0-pins-fixup { | 
| Shawn Guo | f14da76 | 2012-06-28 11:44:57 +0800 | [diff] [blame] | 239 | 					fsl,pinmux-ids = < | 
 | 240 | 						0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | 
 | 241 | 						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | 
 | 242 | 					>; | 
| Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 243 | 					fsl,pull-up = <0>; | 
 | 244 | 				}; | 
| Shawn Guo | 52f7176 | 2012-06-28 11:45:06 +0800 | [diff] [blame] | 245 |  | 
 | 246 | 				pwm2_pins_a: pwm2@0 { | 
 | 247 | 					reg = <0>; | 
 | 248 | 					fsl,pinmux-ids = < | 
 | 249 | 						0x11c0 /* MX23_PAD_PWM2__PWM2 */ | 
 | 250 | 					>; | 
 | 251 | 					fsl,drive-strength = <0>; | 
 | 252 | 					fsl,voltage = <1>; | 
 | 253 | 					fsl,pull-up = <0>; | 
 | 254 | 				}; | 
| Shawn Guo | a915ee4 | 2012-06-28 11:45:07 +0800 | [diff] [blame] | 255 |  | 
 | 256 | 				lcdif_24bit_pins_a: lcdif-24bit@0 { | 
 | 257 | 					reg = <0>; | 
 | 258 | 					fsl,pinmux-ids = < | 
 | 259 | 						0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */ | 
 | 260 | 						0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */ | 
 | 261 | 						0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */ | 
 | 262 | 						0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */ | 
 | 263 | 						0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */ | 
 | 264 | 						0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */ | 
 | 265 | 						0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */ | 
 | 266 | 						0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */ | 
 | 267 | 						0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */ | 
 | 268 | 						0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */ | 
 | 269 | 						0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */ | 
 | 270 | 						0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */ | 
 | 271 | 						0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */ | 
 | 272 | 						0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */ | 
 | 273 | 						0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */ | 
 | 274 | 						0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */ | 
 | 275 | 						0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */ | 
 | 276 | 						0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */ | 
 | 277 | 						0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */ | 
 | 278 | 						0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */ | 
 | 279 | 						0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */ | 
 | 280 | 						0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */ | 
 | 281 | 						0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */ | 
 | 282 | 						0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */ | 
 | 283 | 						0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */ | 
 | 284 | 						0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */ | 
 | 285 | 						0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */ | 
 | 286 | 						0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */ | 
 | 287 | 					>; | 
 | 288 | 					fsl,drive-strength = <0>; | 
 | 289 | 					fsl,voltage = <1>; | 
 | 290 | 					fsl,pull-up = <0>; | 
 | 291 | 				}; | 
| Fadil Berisha | a048786 | 2012-11-17 16:52:32 -0500 | [diff] [blame] | 292 |  | 
 | 293 | 				spi2_pins_a: spi2@0 { | 
 | 294 | 					reg = <0>; | 
 | 295 | 					fsl,pinmux-ids = < | 
 | 296 | 						0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */ | 
 | 297 | 						0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */ | 
 | 298 | 						0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */ | 
 | 299 | 						0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */ | 
 | 300 | 					>; | 
 | 301 | 					fsl,drive-strength = <1>; | 
 | 302 | 					fsl,voltage = <1>; | 
 | 303 | 					fsl,pull-up = <1>; | 
 | 304 | 				}; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 305 | 			}; | 
 | 306 |  | 
 | 307 | 			digctl@8001c000 { | 
| Shawn Guo | 38d6590 | 2013-03-26 21:11:02 +0800 | [diff] [blame] | 308 | 				compatible = "fsl,imx23-digctl"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 309 | 				reg = <0x8001c000 2000>; | 
 | 310 | 				status = "disabled"; | 
 | 311 | 			}; | 
 | 312 |  | 
 | 313 | 			emi@80020000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 314 | 				reg = <0x80020000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 315 | 				status = "disabled"; | 
 | 316 | 			}; | 
 | 317 |  | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 318 | 			dma_apbx: dma-apbx@80024000 { | 
| Dong Aisheng | 84f3570 | 2012-05-04 20:12:19 +0800 | [diff] [blame] | 319 | 				compatible = "fsl,imx23-dma-apbx"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 320 | 				reg = <0x80024000 0x2000>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 321 | 				interrupts = <7 5 9 26 | 
 | 322 | 					      19 0 25 23 | 
 | 323 | 					      60 58 9 0 | 
 | 324 | 					      0 0 0 0>; | 
 | 325 | 				interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c", | 
 | 326 | 						  "saif0", "empty", "auart0-rx", "auart0-tx", | 
 | 327 | 						  "auart1-rx", "auart1-tx", "saif1", "empty", | 
 | 328 | 						  "empty", "empty", "empty", "empty"; | 
 | 329 | 				#dma-cells = <1>; | 
 | 330 | 				dma-channels = <16>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 331 | 				clocks = <&clks 16>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 332 | 			}; | 
 | 333 |  | 
 | 334 | 			dcp@80028000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 335 | 				reg = <0x80028000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 336 | 				status = "disabled"; | 
 | 337 | 			}; | 
 | 338 |  | 
 | 339 | 			pxp@8002a000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 340 | 				reg = <0x8002a000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 341 | 				status = "disabled"; | 
 | 342 | 			}; | 
 | 343 |  | 
 | 344 | 			ocotp@8002c000 { | 
| Shawn Guo | 69d75a0 | 2013-03-29 09:59:28 +0800 | [diff] [blame] | 345 | 				compatible = "fsl,ocotp"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 346 | 				reg = <0x8002c000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 347 | 				status = "disabled"; | 
 | 348 | 			}; | 
 | 349 |  | 
 | 350 | 			axi-ahb@8002e000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 351 | 				reg = <0x8002e000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 352 | 				status = "disabled"; | 
 | 353 | 			}; | 
 | 354 |  | 
 | 355 | 			lcdif@80030000 { | 
| Shawn Guo | a915ee4 | 2012-06-28 11:45:07 +0800 | [diff] [blame] | 356 | 				compatible = "fsl,imx23-lcdif"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 357 | 				reg = <0x80030000 2000>; | 
| Shawn Guo | a915ee4 | 2012-06-28 11:45:07 +0800 | [diff] [blame] | 358 | 				interrupts = <46 45>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 359 | 				clocks = <&clks 38>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 360 | 				status = "disabled"; | 
 | 361 | 			}; | 
 | 362 |  | 
 | 363 | 			ssp1: ssp@80034000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 364 | 				reg = <0x80034000 0x2000>; | 
| Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 365 | 				interrupts = <2 20>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 366 | 				clocks = <&clks 33>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 367 | 				dmas = <&dma_apbh 2>; | 
 | 368 | 				dma-names = "rx-tx"; | 
| Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 369 | 				fsl,ssp-dma-channel = <2>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 370 | 				status = "disabled"; | 
 | 371 | 			}; | 
 | 372 |  | 
 | 373 | 			tvenc@80038000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 374 | 				reg = <0x80038000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 375 | 				status = "disabled"; | 
 | 376 | 			}; | 
 | 377 |                 }; | 
 | 378 |  | 
 | 379 | 		apbx@80040000 { | 
 | 380 | 			compatible = "simple-bus"; | 
 | 381 | 			#address-cells = <1>; | 
 | 382 | 			#size-cells = <1>; | 
 | 383 | 			reg = <0x80040000 0x40000>; | 
 | 384 | 			ranges; | 
 | 385 |  | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 386 | 			clks: clkctrl@80040000 { | 
| Shawn Guo | 8f7cf88 | 2013-03-29 09:33:09 +0800 | [diff] [blame] | 387 | 				compatible = "fsl,imx23-clkctrl", "fsl,clkctrl"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 388 | 				reg = <0x80040000 0x2000>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 389 | 				#clock-cells = <1>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 390 | 			}; | 
 | 391 |  | 
 | 392 | 			saif0: saif@80042000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 393 | 				reg = <0x80042000 0x2000>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 394 | 				dmas = <&dma_apbx 4>; | 
 | 395 | 				dma-names = "rx-tx"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 396 | 				status = "disabled"; | 
 | 397 | 			}; | 
 | 398 |  | 
 | 399 | 			power@80044000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 400 | 				reg = <0x80044000 0x2000>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 401 | 				status = "disabled"; | 
 | 402 | 			}; | 
 | 403 |  | 
 | 404 | 			saif1: saif@80046000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 405 | 				reg = <0x80046000 0x2000>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 406 | 				dmas = <&dma_apbx 10>; | 
 | 407 | 				dma-names = "rx-tx"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 408 | 				status = "disabled"; | 
 | 409 | 			}; | 
 | 410 |  | 
 | 411 | 			audio-out@80048000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 412 | 				reg = <0x80048000 0x2000>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 413 | 				dmas = <&dma_apbx 1>; | 
 | 414 | 				dma-names = "tx"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 415 | 				status = "disabled"; | 
 | 416 | 			}; | 
 | 417 |  | 
 | 418 | 			audio-in@8004c000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 419 | 				reg = <0x8004c000 0x2000>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 420 | 				dmas = <&dma_apbx 0>; | 
 | 421 | 				dma-names = "rx"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 422 | 				status = "disabled"; | 
 | 423 | 			}; | 
 | 424 |  | 
 | 425 | 			lradc@80050000 { | 
| Marek Vasut | 1f45188 | 2013-01-21 20:05:00 +0000 | [diff] [blame] | 426 | 				compatible = "fsl,imx23-lradc"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 427 | 				reg = <0x80050000 0x2000>; | 
| Marek Vasut | 1f45188 | 2013-01-21 20:05:00 +0000 | [diff] [blame] | 428 | 				interrupts = <36 37 38 39 40 41 42 43 44>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 429 | 				status = "disabled"; | 
 | 430 | 			}; | 
 | 431 |  | 
 | 432 | 			spdif@80054000 { | 
 | 433 | 				reg = <0x80054000 2000>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 434 | 				dmas = <&dma_apbx 2>; | 
 | 435 | 				dma-names = "tx"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 436 | 				status = "disabled"; | 
 | 437 | 			}; | 
 | 438 |  | 
 | 439 | 			i2c@80058000 { | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 440 | 				reg = <0x80058000 0x2000>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 441 | 				dmas = <&dma_apbx 3>; | 
 | 442 | 				dma-names = "rx-tx"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 443 | 				status = "disabled"; | 
 | 444 | 			}; | 
 | 445 |  | 
 | 446 | 			rtc@8005c000 { | 
| Shawn Guo | f98c990 | 2012-06-28 11:45:05 +0800 | [diff] [blame] | 447 | 				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 448 | 				reg = <0x8005c000 0x2000>; | 
| Shawn Guo | f98c990 | 2012-06-28 11:45:05 +0800 | [diff] [blame] | 449 | 				interrupts = <22>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 450 | 			}; | 
 | 451 |  | 
| Shawn Guo | 52f7176 | 2012-06-28 11:45:06 +0800 | [diff] [blame] | 452 | 			pwm: pwm@80064000 { | 
 | 453 | 				compatible = "fsl,imx23-pwm"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 454 | 				reg = <0x80064000 0x2000>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 455 | 				clocks = <&clks 30>; | 
| Shawn Guo | 52f7176 | 2012-06-28 11:45:06 +0800 | [diff] [blame] | 456 | 				#pwm-cells = <2>; | 
 | 457 | 				fsl,pwm-number = <5>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 458 | 				status = "disabled"; | 
 | 459 | 			}; | 
 | 460 |  | 
 | 461 | 			timrot@80068000 { | 
| Shawn Guo | eeca6e6 | 2012-08-20 08:51:45 +0800 | [diff] [blame] | 462 | 				compatible = "fsl,imx23-timrot", "fsl,timrot"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 463 | 				reg = <0x80068000 0x2000>; | 
| Shawn Guo | eeca6e6 | 2012-08-20 08:51:45 +0800 | [diff] [blame] | 464 | 				interrupts = <28 29 30 31>; | 
| Shawn Guo | 2efb950 | 2013-03-25 22:57:14 +0800 | [diff] [blame] | 465 | 				clocks = <&clks 28>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 466 | 			}; | 
 | 467 |  | 
 | 468 | 			auart0: serial@8006c000 { | 
| Shawn Guo | a450839 | 2012-06-28 11:45:00 +0800 | [diff] [blame] | 469 | 				compatible = "fsl,imx23-auart"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 470 | 				reg = <0x8006c000 0x2000>; | 
| Shawn Guo | a450839 | 2012-06-28 11:45:00 +0800 | [diff] [blame] | 471 | 				interrupts = <24 25 23>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 472 | 				clocks = <&clks 32>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 473 | 				dmas = <&dma_apbx 6>, <&dma_apbx 7>; | 
 | 474 | 				dma-names = "rx", "tx"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 475 | 				status = "disabled"; | 
 | 476 | 			}; | 
 | 477 |  | 
 | 478 | 			auart1: serial@8006e000 { | 
| Shawn Guo | a450839 | 2012-06-28 11:45:00 +0800 | [diff] [blame] | 479 | 				compatible = "fsl,imx23-auart"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 480 | 				reg = <0x8006e000 0x2000>; | 
| Shawn Guo | a450839 | 2012-06-28 11:45:00 +0800 | [diff] [blame] | 481 | 				interrupts = <59 60 58>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 482 | 				clocks = <&clks 32>; | 
| Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 483 | 				dmas = <&dma_apbx 8>, <&dma_apbx 9>; | 
 | 484 | 				dma-names = "rx", "tx"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 485 | 				status = "disabled"; | 
 | 486 | 			}; | 
 | 487 |  | 
 | 488 | 			duart: serial@80070000 { | 
 | 489 | 				compatible = "arm,pl011", "arm,primecell"; | 
 | 490 | 				reg = <0x80070000 0x2000>; | 
 | 491 | 				interrupts = <0>; | 
| Shawn Guo | 53f9443 | 2012-08-22 21:36:30 +0800 | [diff] [blame] | 492 | 				clocks = <&clks 32>, <&clks 16>; | 
 | 493 | 				clock-names = "uart", "apb_pclk"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 494 | 				status = "disabled"; | 
 | 495 | 			}; | 
 | 496 |  | 
| Fabio Estevam | d6475317b | 2012-09-13 14:33:38 -0300 | [diff] [blame] | 497 | 			usbphy0: usbphy@8007c000 { | 
 | 498 | 				compatible = "fsl,imx23-usbphy"; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 499 | 				reg = <0x8007c000 0x2000>; | 
| Fabio Estevam | d6475317b | 2012-09-13 14:33:38 -0300 | [diff] [blame] | 500 | 				clocks = <&clks 41>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 501 | 				status = "disabled"; | 
 | 502 | 			}; | 
 | 503 | 		}; | 
 | 504 | 	}; | 
 | 505 |  | 
 | 506 | 	ahb@80080000 { | 
 | 507 | 		compatible = "simple-bus"; | 
 | 508 | 		#address-cells = <1>; | 
 | 509 | 		#size-cells = <1>; | 
 | 510 | 		reg = <0x80080000 0x80000>; | 
 | 511 | 		ranges; | 
 | 512 |  | 
| Fabio Estevam | d6475317b | 2012-09-13 14:33:38 -0300 | [diff] [blame] | 513 | 		usb0: usb@80080000 { | 
 | 514 | 			compatible = "fsl,imx23-usb", "fsl,imx27-usb"; | 
| Fabio Estevam | 640bf06 | 2012-07-30 21:29:18 -0300 | [diff] [blame] | 515 | 			reg = <0x80080000 0x40000>; | 
| Fabio Estevam | d6475317b | 2012-09-13 14:33:38 -0300 | [diff] [blame] | 516 | 			interrupts = <11>; | 
 | 517 | 			fsl,usbphy = <&usbphy0>; | 
 | 518 | 			clocks = <&clks 40>; | 
| Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 519 | 			status = "disabled"; | 
 | 520 | 		}; | 
 | 521 | 	}; | 
 | 522 | }; |