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review.evervolv.com / android_kernel_oneplus_msm8996 / 46b51d0835ef1e75dd48fe10c90f9c775301d9ee / . / arch / arm / boot / dts / omap2430.dtsi
blob: 054bc4439568a917a8d28c0c5ebbd5c6dffaf00c [file] [log] [blame]
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]1/*
2 * Device Tree Source for OMAP243x SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "omap2.dtsi"
12
13/ {
14 compatible = "ti,omap2430", "ti,omap2";
15
16 ocp {
Jon Hunter510c0ff2012-10-25 14:24:14 -0500[diff] [blame]17 counter32k: counter@49020000 {
18 compatible = "ti,omap-counter32k";
19 reg = <0x49020000 0x20>;
20 ti,hwmods = "counter_32k";
21 };
22
Tony Lindgren679e3312012-09-10 10:34:51 -0700[diff] [blame]23 omap2430_pmx: pinmux@49002030 {
24 compatible = "ti,omap2430-padconf", "pinctrl-single";
25 reg = <0x49002030 0x0154>;
26 #address-cells = <1>;
27 #size-cells = <0>;
28 pinctrl-single,register-width = <8>;
29 pinctrl-single,function-mask = <0x3f>;
30 };
31
Jon Hunter423182e2013-02-28 15:32:00 -0600[diff] [blame]32 gpio1: gpio@4900c000 {
33 compatible = "ti,omap2-gpio";
34 reg = <0x4900c000 0x200>;
35 interrupts = <29>;
36 ti,hwmods = "gpio1";
Jon Huntere4b9b9f2013-04-04 15:16:16 -0500[diff] [blame]37 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -0600[diff] [blame]38 #gpio-cells = <2>;
39 gpio-controller;
40 #interrupt-cells = <2>;
41 interrupt-controller;
42 };
43
44 gpio2: gpio@4900e000 {
45 compatible = "ti,omap2-gpio";
46 reg = <0x4900e000 0x200>;
47 interrupts = <30>;
48 ti,hwmods = "gpio2";
Jon Huntere4b9b9f2013-04-04 15:16:16 -0500[diff] [blame]49 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -0600[diff] [blame]50 #gpio-cells = <2>;
51 gpio-controller;
52 #interrupt-cells = <2>;
53 interrupt-controller;
54 };
55
56 gpio3: gpio@49010000 {
57 compatible = "ti,omap2-gpio";
58 reg = <0x49010000 0x200>;
59 interrupts = <31>;
60 ti,hwmods = "gpio3";
Jon Huntere4b9b9f2013-04-04 15:16:16 -0500[diff] [blame]61 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -0600[diff] [blame]62 #gpio-cells = <2>;
63 gpio-controller;
64 #interrupt-cells = <2>;
65 interrupt-controller;
66 };
67
68 gpio4: gpio@49012000 {
69 compatible = "ti,omap2-gpio";
70 reg = <0x49012000 0x200>;
71 interrupts = <32>;
72 ti,hwmods = "gpio4";
Jon Huntere4b9b9f2013-04-04 15:16:16 -0500[diff] [blame]73 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -0600[diff] [blame]74 #gpio-cells = <2>;
75 gpio-controller;
76 #interrupt-cells = <2>;
77 interrupt-controller;
78 };
79
80 gpio5: gpio@480b6000 {
81 compatible = "ti,omap2-gpio";
82 reg = <0x480b6000 0x200>;
83 interrupts = <33>;
84 ti,hwmods = "gpio5";
85 #gpio-cells = <2>;
86 gpio-controller;
87 #interrupt-cells = <2>;
88 interrupt-controller;
89 };
90
Jon Hunter1c7dbb52013-02-22 15:33:31 -0600[diff] [blame]91 gpmc: gpmc@6e000000 {
92 compatible = "ti,omap2430-gpmc";
93 reg = <0x6e000000 0x1000>;
94 #address-cells = <2>;
95 #size-cells = <1>;
96 interrupts = <20>;
97 gpmc,num-cs = <8>;
98 gpmc,num-waitpins = <4>;
99 ti,hwmods = "gpmc";
100 };
101
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]102 mcbsp1: mcbsp@48074000 {
103 compatible = "ti,omap2430-mcbsp";
104 reg = <0x48074000 0xff>;
105 reg-names = "mpu";
106 interrupts = <64>, /* OCP compliant interrupt */
107 <59>, /* TX interrupt */
108 <60>, /* RX interrupt */
109 <61>; /* RX overflow interrupt */
110 interrupt-names = "common", "tx", "rx", "rx_overflow";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]111 ti,buffer-size = <128>;
112 ti,hwmods = "mcbsp1";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100[diff] [blame]113 dmas = <&sdma 31>,
114 <&sdma 32>;
115 dma-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]116 };
117
118 mcbsp2: mcbsp@48076000 {
119 compatible = "ti,omap2430-mcbsp";
120 reg = <0x48076000 0xff>;
121 reg-names = "mpu";
122 interrupts = <16>, /* OCP compliant interrupt */
123 <62>, /* TX interrupt */
124 <63>; /* RX interrupt */
125 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]126 ti,buffer-size = <128>;
127 ti,hwmods = "mcbsp2";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100[diff] [blame]128 dmas = <&sdma 33>,
129 <&sdma 34>;
130 dma-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]131 };
132
133 mcbsp3: mcbsp@4808c000 {
134 compatible = "ti,omap2430-mcbsp";
135 reg = <0x4808c000 0xff>;
136 reg-names = "mpu";
137 interrupts = <17>, /* OCP compliant interrupt */
138 <89>, /* TX interrupt */
139 <90>; /* RX interrupt */
140 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]141 ti,buffer-size = <128>;
142 ti,hwmods = "mcbsp3";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100[diff] [blame]143 dmas = <&sdma 17>,
144 <&sdma 18>;
145 dma-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]146 };
147
148 mcbsp4: mcbsp@4808e000 {
149 compatible = "ti,omap2430-mcbsp";
150 reg = <0x4808e000 0xff>;
151 reg-names = "mpu";
152 interrupts = <18>, /* OCP compliant interrupt */
153 <54>, /* TX interrupt */
154 <55>; /* RX interrupt */
155 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]156 ti,buffer-size = <128>;
157 ti,hwmods = "mcbsp4";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100[diff] [blame]158 dmas = <&sdma 19>,
159 <&sdma 20>;
160 dma-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]161 };
162
163 mcbsp5: mcbsp@48096000 {
164 compatible = "ti,omap2430-mcbsp";
165 reg = <0x48096000 0xff>;
166 reg-names = "mpu";
167 interrupts = <19>, /* OCP compliant interrupt */
168 <81>, /* TX interrupt */
169 <82>; /* RX interrupt */
170 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]171 ti,buffer-size = <128>;
172 ti,hwmods = "mcbsp5";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100[diff] [blame]173 dmas = <&sdma 21>,
174 <&sdma 22>;
175 dma-names = "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]176 };
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]177
178 timer1: timer@49018000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame]179 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]180 reg = <0x49018000 0x400>;
181 interrupts = <37>;
182 ti,hwmods = "timer1";
183 ti,timer-alwon;
184 };
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300[diff] [blame]185 };
186};