blob: 3ffd987ad8b22c587ea9ef56e9edb0319baecf3c [file] [log] [blame]
Tomi Valkeinen562a0602011-04-21 19:53:59 +03001/* #define DEBUG */
2
3#include <linux/module.h>
4#include <linux/delay.h>
5#include <linux/slab.h>
6#include <linux/gpio.h>
7#include <linux/spi/spi.h>
8#include <linux/backlight.h>
9#include <linux/fb.h>
10
11#include <video/omapdss.h>
12#include <video/omap-panel-n8x0.h>
13
14#define BLIZZARD_REV_CODE 0x00
15#define BLIZZARD_CONFIG 0x02
16#define BLIZZARD_PLL_DIV 0x04
17#define BLIZZARD_PLL_LOCK_RANGE 0x06
18#define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08
19#define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a
20#define BLIZZARD_PLL_MODE 0x0c
21#define BLIZZARD_CLK_SRC 0x0e
22#define BLIZZARD_MEM_BANK0_ACTIVATE 0x10
23#define BLIZZARD_MEM_BANK0_STATUS 0x14
24#define BLIZZARD_PANEL_CONFIGURATION 0x28
25#define BLIZZARD_HDISP 0x2a
26#define BLIZZARD_HNDP 0x2c
27#define BLIZZARD_VDISP0 0x2e
28#define BLIZZARD_VDISP1 0x30
29#define BLIZZARD_VNDP 0x32
30#define BLIZZARD_HSW 0x34
31#define BLIZZARD_VSW 0x38
32#define BLIZZARD_DISPLAY_MODE 0x68
33#define BLIZZARD_INPUT_WIN_X_START_0 0x6c
34#define BLIZZARD_DATA_SOURCE_SELECT 0x8e
35#define BLIZZARD_DISP_MEM_DATA_PORT 0x90
36#define BLIZZARD_DISP_MEM_READ_ADDR0 0x92
37#define BLIZZARD_POWER_SAVE 0xE6
38#define BLIZZARD_NDISP_CTRL_STATUS 0xE8
39
40/* Data source select */
41/* For S1D13745 */
42#define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00
43#define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01
44#define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE 0x04
45#define BLIZZARD_SRC_DISABLE_OVERLAY 0x05
46/* For S1D13744 */
47#define BLIZZARD_SRC_WRITE_LCD 0x00
48#define BLIZZARD_SRC_BLT_LCD 0x06
49
50#define BLIZZARD_COLOR_RGB565 0x01
51#define BLIZZARD_COLOR_YUV420 0x09
52
53#define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */
54#define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */
55
56#define MIPID_CMD_READ_DISP_ID 0x04
57#define MIPID_CMD_READ_RED 0x06
58#define MIPID_CMD_READ_GREEN 0x07
59#define MIPID_CMD_READ_BLUE 0x08
60#define MIPID_CMD_READ_DISP_STATUS 0x09
61#define MIPID_CMD_RDDSDR 0x0F
62#define MIPID_CMD_SLEEP_IN 0x10
63#define MIPID_CMD_SLEEP_OUT 0x11
64#define MIPID_CMD_DISP_OFF 0x28
65#define MIPID_CMD_DISP_ON 0x29
66
67static struct panel_drv_data {
68 struct mutex lock;
69
70 struct omap_dss_device *dssdev;
71 struct spi_device *spidev;
72 struct backlight_device *bldev;
73
74 int blizzard_ver;
75} s_drv_data;
76
77
78static inline
79struct panel_n8x0_data *get_board_data(const struct omap_dss_device *dssdev)
80{
81 return dssdev->data;
82}
83
84static inline
85struct panel_drv_data *get_drv_data(const struct omap_dss_device *dssdev)
86{
87 return &s_drv_data;
88}
89
90
91static inline void blizzard_cmd(u8 cmd)
92{
93 omap_rfbi_write_command(&cmd, 1);
94}
95
96static inline void blizzard_write(u8 cmd, const u8 *buf, int len)
97{
98 omap_rfbi_write_command(&cmd, 1);
99 omap_rfbi_write_data(buf, len);
100}
101
102static inline void blizzard_read(u8 cmd, u8 *buf, int len)
103{
104 omap_rfbi_write_command(&cmd, 1);
105 omap_rfbi_read_data(buf, len);
106}
107
108static u8 blizzard_read_reg(u8 cmd)
109{
110 u8 data;
111 blizzard_read(cmd, &data, 1);
112 return data;
113}
114
115static void blizzard_ctrl_setup_update(struct omap_dss_device *dssdev,
116 int x, int y, int w, int h)
117{
118 struct panel_drv_data *ddata = get_drv_data(dssdev);
119 u8 tmp[18];
120 int x_end, y_end;
121
122 x_end = x + w - 1;
123 y_end = y + h - 1;
124
125 tmp[0] = x;
126 tmp[1] = x >> 8;
127 tmp[2] = y;
128 tmp[3] = y >> 8;
129 tmp[4] = x_end;
130 tmp[5] = x_end >> 8;
131 tmp[6] = y_end;
132 tmp[7] = y_end >> 8;
133
134 /* scaling? */
135 tmp[8] = x;
136 tmp[9] = x >> 8;
137 tmp[10] = y;
138 tmp[11] = y >> 8;
139 tmp[12] = x_end;
140 tmp[13] = x_end >> 8;
141 tmp[14] = y_end;
142 tmp[15] = y_end >> 8;
143
144 tmp[16] = BLIZZARD_COLOR_RGB565;
145
146 if (ddata->blizzard_ver == BLIZZARD_VERSION_S1D13745)
147 tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND;
148 else
149 tmp[17] = ddata->blizzard_ver == BLIZZARD_VERSION_S1D13744 ?
150 BLIZZARD_SRC_WRITE_LCD :
151 BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE;
152
Archit Tanejab02875b2012-08-13 15:26:49 +0530153 omapdss_rfbi_set_pixel_size(dssdev, 16);
Archit Taneja475989b2012-08-13 15:28:15 +0530154 omapdss_rfbi_set_data_lines(dssdev, 8);
Archit Tanejab02875b2012-08-13 15:26:49 +0530155
Archit Taneja475989b2012-08-13 15:28:15 +0530156 omap_rfbi_configure(dssdev);
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300157
158 blizzard_write(BLIZZARD_INPUT_WIN_X_START_0, tmp, 18);
159
Archit Tanejab02875b2012-08-13 15:26:49 +0530160 omapdss_rfbi_set_pixel_size(dssdev, 16);
Archit Taneja475989b2012-08-13 15:28:15 +0530161 omapdss_rfbi_set_data_lines(dssdev, 16);
Archit Tanejab02875b2012-08-13 15:26:49 +0530162
Archit Taneja475989b2012-08-13 15:28:15 +0530163 omap_rfbi_configure(dssdev);
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300164}
165
166static void mipid_transfer(struct spi_device *spi, int cmd, const u8 *wbuf,
167 int wlen, u8 *rbuf, int rlen)
168{
169 struct spi_message m;
170 struct spi_transfer *x, xfer[4];
171 u16 w;
172 int r;
173
174 spi_message_init(&m);
175
176 memset(xfer, 0, sizeof(xfer));
177 x = &xfer[0];
178
179 cmd &= 0xff;
180 x->tx_buf = &cmd;
181 x->bits_per_word = 9;
182 x->len = 2;
183 spi_message_add_tail(x, &m);
184
185 if (wlen) {
186 x++;
187 x->tx_buf = wbuf;
188 x->len = wlen;
189 x->bits_per_word = 9;
190 spi_message_add_tail(x, &m);
191 }
192
193 if (rlen) {
194 x++;
195 x->rx_buf = &w;
196 x->len = 1;
197 spi_message_add_tail(x, &m);
198
199 if (rlen > 1) {
200 /* Arrange for the extra clock before the first
201 * data bit.
202 */
203 x->bits_per_word = 9;
204 x->len = 2;
205
206 x++;
207 x->rx_buf = &rbuf[1];
208 x->len = rlen - 1;
209 spi_message_add_tail(x, &m);
210 }
211 }
212
213 r = spi_sync(spi, &m);
214 if (r < 0)
215 dev_dbg(&spi->dev, "spi_sync %d\n", r);
216
217 if (rlen)
218 rbuf[0] = w & 0xff;
219}
220
221static inline void mipid_cmd(struct spi_device *spi, int cmd)
222{
223 mipid_transfer(spi, cmd, NULL, 0, NULL, 0);
224}
225
226static inline void mipid_write(struct spi_device *spi,
227 int reg, const u8 *buf, int len)
228{
229 mipid_transfer(spi, reg, buf, len, NULL, 0);
230}
231
232static inline void mipid_read(struct spi_device *spi,
233 int reg, u8 *buf, int len)
234{
235 mipid_transfer(spi, reg, NULL, 0, buf, len);
236}
237
238static void set_data_lines(struct spi_device *spi, int data_lines)
239{
240 u16 par;
241
242 switch (data_lines) {
243 case 16:
244 par = 0x150;
245 break;
246 case 18:
247 par = 0x160;
248 break;
249 case 24:
250 par = 0x170;
251 break;
252 }
253
254 mipid_write(spi, 0x3a, (u8 *)&par, 2);
255}
256
257static void send_init_string(struct spi_device *spi)
258{
259 u16 initpar[] = { 0x0102, 0x0100, 0x0100 };
260 mipid_write(spi, 0xc2, (u8 *)initpar, sizeof(initpar));
261}
262
263static void send_display_on(struct spi_device *spi)
264{
265 mipid_cmd(spi, MIPID_CMD_DISP_ON);
266}
267
268static void send_display_off(struct spi_device *spi)
269{
270 mipid_cmd(spi, MIPID_CMD_DISP_OFF);
271}
272
273static void send_sleep_out(struct spi_device *spi)
274{
275 mipid_cmd(spi, MIPID_CMD_SLEEP_OUT);
276 msleep(120);
277}
278
279static void send_sleep_in(struct spi_device *spi)
280{
281 mipid_cmd(spi, MIPID_CMD_SLEEP_IN);
282 msleep(50);
283}
284
285static int n8x0_panel_power_on(struct omap_dss_device *dssdev)
286{
287 int r;
288 struct panel_n8x0_data *bdata = get_board_data(dssdev);
289 struct panel_drv_data *ddata = get_drv_data(dssdev);
290 struct spi_device *spi = ddata->spidev;
291 u8 rev, conf;
292 u8 display_id[3];
293 const char *panel_name;
294
295 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
296 return 0;
297
298 gpio_direction_output(bdata->ctrl_pwrdown, 1);
299
300 if (bdata->platform_enable) {
301 r = bdata->platform_enable(dssdev);
302 if (r)
303 goto err_plat_en;
304 }
305
Archit Taneja6ff9dd52012-08-13 15:12:10 +0530306 omapdss_rfbi_set_size(dssdev, dssdev->panel.timings.x_res,
307 dssdev->panel.timings.y_res);
Archit Tanejab02875b2012-08-13 15:26:49 +0530308 omapdss_rfbi_set_pixel_size(dssdev, dssdev->ctrl.pixel_size);
Archit Taneja475989b2012-08-13 15:28:15 +0530309 omapdss_rfbi_set_data_lines(dssdev, dssdev->phy.rfbi.data_lines);
Archit Taneja6ff9dd52012-08-13 15:12:10 +0530310
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300311 r = omapdss_rfbi_display_enable(dssdev);
312 if (r)
313 goto err_rfbi_en;
314
315 rev = blizzard_read_reg(BLIZZARD_REV_CODE);
316 conf = blizzard_read_reg(BLIZZARD_CONFIG);
317
318 switch (rev & 0xfc) {
319 case 0x9c:
320 ddata->blizzard_ver = BLIZZARD_VERSION_S1D13744;
321 dev_info(&dssdev->dev, "s1d13744 LCD controller rev %d "
322 "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
323 break;
324 case 0xa4:
325 ddata->blizzard_ver = BLIZZARD_VERSION_S1D13745;
326 dev_info(&dssdev->dev, "s1d13745 LCD controller rev %d "
327 "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
328 break;
329 default:
330 dev_err(&dssdev->dev, "invalid s1d1374x revision %02x\n", rev);
331 r = -ENODEV;
332 goto err_inv_chip;
333 }
334
335 /* panel */
336
337 gpio_direction_output(bdata->panel_reset, 1);
338
339 mipid_read(spi, MIPID_CMD_READ_DISP_ID, display_id, 3);
340 dev_dbg(&spi->dev, "MIPI display ID: %02x%02x%02x\n",
341 display_id[0], display_id[1], display_id[2]);
342
343 switch (display_id[0]) {
344 case 0x45:
345 panel_name = "lph8923";
346 break;
347 case 0x83:
348 panel_name = "ls041y3";
349 break;
350 default:
351 dev_err(&dssdev->dev, "invalid display ID 0x%x\n",
352 display_id[0]);
353 r = -ENODEV;
354 goto err_inv_panel;
355 }
356
357 dev_info(&dssdev->dev, "%s rev %02x LCD detected\n",
358 panel_name, display_id[1]);
359
360 send_sleep_out(spi);
361 send_init_string(spi);
362 set_data_lines(spi, 24);
363 send_display_on(spi);
364
365 return 0;
366
367err_inv_panel:
368 /*
369 * HACK: we should turn off the panel here, but there is some problem
370 * with the initialization sequence, and we fail to init the panel if we
371 * have turned it off
372 */
373 /* gpio_direction_output(bdata->panel_reset, 0); */
374err_inv_chip:
375 omapdss_rfbi_display_disable(dssdev);
376err_rfbi_en:
377 if (bdata->platform_disable)
378 bdata->platform_disable(dssdev);
379err_plat_en:
380 gpio_direction_output(bdata->ctrl_pwrdown, 0);
381 return r;
382}
383
384static void n8x0_panel_power_off(struct omap_dss_device *dssdev)
385{
386 struct panel_n8x0_data *bdata = get_board_data(dssdev);
387 struct panel_drv_data *ddata = get_drv_data(dssdev);
388 struct spi_device *spi = ddata->spidev;
389
390 if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
391 return;
392
393 send_display_off(spi);
394 send_sleep_in(spi);
395
396 if (bdata->platform_disable)
397 bdata->platform_disable(dssdev);
398
399 /*
400 * HACK: we should turn off the panel here, but there is some problem
401 * with the initialization sequence, and we fail to init the panel if we
402 * have turned it off
403 */
404 /* gpio_direction_output(bdata->panel_reset, 0); */
405 gpio_direction_output(bdata->ctrl_pwrdown, 0);
406 omapdss_rfbi_display_disable(dssdev);
407}
408
409static const struct rfbi_timings n8x0_panel_timings = {
410 .cs_on_time = 0,
411
412 .we_on_time = 9000,
413 .we_off_time = 18000,
414 .we_cycle_time = 36000,
415
416 .re_on_time = 9000,
417 .re_off_time = 27000,
418 .re_cycle_time = 36000,
419
420 .access_time = 27000,
421 .cs_off_time = 36000,
422
423 .cs_pulse_width = 0,
424};
425
426static int n8x0_bl_update_status(struct backlight_device *dev)
427{
428 struct omap_dss_device *dssdev = dev_get_drvdata(&dev->dev);
429 struct panel_n8x0_data *bdata = get_board_data(dssdev);
430 struct panel_drv_data *ddata = get_drv_data(dssdev);
431 int r;
432 int level;
433
434 mutex_lock(&ddata->lock);
435
436 if (dev->props.fb_blank == FB_BLANK_UNBLANK &&
437 dev->props.power == FB_BLANK_UNBLANK)
438 level = dev->props.brightness;
439 else
440 level = 0;
441
442 dev_dbg(&dssdev->dev, "update brightness to %d\n", level);
443
444 if (!bdata->set_backlight)
445 r = -EINVAL;
446 else
447 r = bdata->set_backlight(dssdev, level);
448
449 mutex_unlock(&ddata->lock);
450
451 return r;
452}
453
454static int n8x0_bl_get_intensity(struct backlight_device *dev)
455{
456 if (dev->props.fb_blank == FB_BLANK_UNBLANK &&
457 dev->props.power == FB_BLANK_UNBLANK)
458 return dev->props.brightness;
459
460 return 0;
461}
462
463static const struct backlight_ops n8x0_bl_ops = {
464 .get_brightness = n8x0_bl_get_intensity,
465 .update_status = n8x0_bl_update_status,
466};
467
468static int n8x0_panel_probe(struct omap_dss_device *dssdev)
469{
470 struct panel_n8x0_data *bdata = get_board_data(dssdev);
471 struct panel_drv_data *ddata;
472 struct backlight_device *bldev;
473 struct backlight_properties props;
474 int r;
475
476 dev_dbg(&dssdev->dev, "probe\n");
477
478 if (!bdata)
479 return -EINVAL;
480
481 s_drv_data.dssdev = dssdev;
482
483 ddata = &s_drv_data;
484
485 mutex_init(&ddata->lock);
486
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300487 dssdev->panel.timings.x_res = 800;
488 dssdev->panel.timings.y_res = 480;
489 dssdev->ctrl.pixel_size = 16;
490 dssdev->ctrl.rfbi_timings = n8x0_panel_timings;
491
492 memset(&props, 0, sizeof(props));
493 props.max_brightness = 127;
494 props.type = BACKLIGHT_PLATFORM;
495 bldev = backlight_device_register(dev_name(&dssdev->dev), &dssdev->dev,
496 dssdev, &n8x0_bl_ops, &props);
497 if (IS_ERR(bldev)) {
498 r = PTR_ERR(bldev);
499 dev_err(&dssdev->dev, "register backlight failed\n");
500 return r;
501 }
502
503 ddata->bldev = bldev;
504
505 bldev->props.fb_blank = FB_BLANK_UNBLANK;
506 bldev->props.power = FB_BLANK_UNBLANK;
507 bldev->props.brightness = 127;
508
509 n8x0_bl_update_status(bldev);
510
511 return 0;
512}
513
514static void n8x0_panel_remove(struct omap_dss_device *dssdev)
515{
516 struct panel_drv_data *ddata = get_drv_data(dssdev);
517 struct backlight_device *bldev;
518
519 dev_dbg(&dssdev->dev, "remove\n");
520
521 bldev = ddata->bldev;
522 bldev->props.power = FB_BLANK_POWERDOWN;
523 n8x0_bl_update_status(bldev);
524 backlight_device_unregister(bldev);
525
526 dev_set_drvdata(&dssdev->dev, NULL);
527}
528
529static int n8x0_panel_enable(struct omap_dss_device *dssdev)
530{
531 struct panel_drv_data *ddata = get_drv_data(dssdev);
532 int r;
533
534 dev_dbg(&dssdev->dev, "enable\n");
535
536 mutex_lock(&ddata->lock);
537
538 rfbi_bus_lock();
539
540 r = n8x0_panel_power_on(dssdev);
541
542 rfbi_bus_unlock();
543
544 if (r) {
545 mutex_unlock(&ddata->lock);
546 return r;
547 }
548
549 dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
550
551 mutex_unlock(&ddata->lock);
552
553 return 0;
554}
555
556static void n8x0_panel_disable(struct omap_dss_device *dssdev)
557{
558 struct panel_drv_data *ddata = get_drv_data(dssdev);
559
560 dev_dbg(&dssdev->dev, "disable\n");
561
562 mutex_lock(&ddata->lock);
563
564 rfbi_bus_lock();
565
566 n8x0_panel_power_off(dssdev);
567
568 rfbi_bus_unlock();
569
570 dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
571
572 mutex_unlock(&ddata->lock);
573}
574
575static int n8x0_panel_suspend(struct omap_dss_device *dssdev)
576{
577 struct panel_drv_data *ddata = get_drv_data(dssdev);
578
579 dev_dbg(&dssdev->dev, "suspend\n");
580
581 mutex_lock(&ddata->lock);
582
583 rfbi_bus_lock();
584
585 n8x0_panel_power_off(dssdev);
586
587 rfbi_bus_unlock();
588
589 dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
590
591 mutex_unlock(&ddata->lock);
592
593 return 0;
594}
595
596static int n8x0_panel_resume(struct omap_dss_device *dssdev)
597{
598 struct panel_drv_data *ddata = get_drv_data(dssdev);
599 int r;
600
601 dev_dbg(&dssdev->dev, "resume\n");
602
603 mutex_lock(&ddata->lock);
604
605 rfbi_bus_lock();
606
607 r = n8x0_panel_power_on(dssdev);
608
609 rfbi_bus_unlock();
610
611 if (r) {
612 mutex_unlock(&ddata->lock);
613 return r;
614 }
615
616 dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
617
618 mutex_unlock(&ddata->lock);
619
620 return 0;
621}
622
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300623static void n8x0_panel_get_resolution(struct omap_dss_device *dssdev,
624 u16 *xres, u16 *yres)
625{
626 *xres = dssdev->panel.timings.x_res;
627 *yres = dssdev->panel.timings.y_res;
628}
629
630static void update_done(void *data)
631{
632 rfbi_bus_unlock();
633}
634
635static int n8x0_panel_update(struct omap_dss_device *dssdev,
636 u16 x, u16 y, u16 w, u16 h)
637{
638 struct panel_drv_data *ddata = get_drv_data(dssdev);
Archit Taneja43eab862012-08-13 12:24:53 +0530639 u16 dw, dh;
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300640
641 dev_dbg(&dssdev->dev, "update\n");
642
Archit Taneja43eab862012-08-13 12:24:53 +0530643 dw = dssdev->panel.timings.x_res;
644 dh = dssdev->panel.timings.y_res;
645
646 if (x != 0 || y != 0 || w != dw || h != dh) {
647 dev_err(&dssdev->dev, "invaid update region %d, %d, %d, %d\n",
648 x, y, w, h);
649 return -EINVAL;
650 }
651
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300652 mutex_lock(&ddata->lock);
653 rfbi_bus_lock();
654
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300655 blizzard_ctrl_setup_update(dssdev, x, y, w, h);
656
Archit Taneja43eab862012-08-13 12:24:53 +0530657 omap_rfbi_update(dssdev, update_done, NULL);
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300658
659 mutex_unlock(&ddata->lock);
660
661 return 0;
662}
663
664static int n8x0_panel_sync(struct omap_dss_device *dssdev)
665{
666 struct panel_drv_data *ddata = get_drv_data(dssdev);
667
668 dev_dbg(&dssdev->dev, "sync\n");
669
670 mutex_lock(&ddata->lock);
671 rfbi_bus_lock();
672 rfbi_bus_unlock();
673 mutex_unlock(&ddata->lock);
674
675 return 0;
676}
677
678static struct omap_dss_driver n8x0_panel_driver = {
679 .probe = n8x0_panel_probe,
680 .remove = n8x0_panel_remove,
681
682 .enable = n8x0_panel_enable,
683 .disable = n8x0_panel_disable,
684 .suspend = n8x0_panel_suspend,
685 .resume = n8x0_panel_resume,
686
687 .update = n8x0_panel_update,
688 .sync = n8x0_panel_sync,
689
690 .get_resolution = n8x0_panel_get_resolution,
691 .get_recommended_bpp = omapdss_default_get_recommended_bpp,
692
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300693 .driver = {
694 .name = "n8x0_panel",
695 .owner = THIS_MODULE,
696 },
697};
698
699/* PANEL */
700
701static int mipid_spi_probe(struct spi_device *spi)
702{
703 dev_dbg(&spi->dev, "mipid_spi_probe\n");
704
705 spi->mode = SPI_MODE_0;
706
707 s_drv_data.spidev = spi;
708
709 return 0;
710}
711
712static int mipid_spi_remove(struct spi_device *spi)
713{
714 dev_dbg(&spi->dev, "mipid_spi_remove\n");
715 return 0;
716}
717
718static struct spi_driver mipid_spi_driver = {
719 .driver = {
720 .name = "lcd_mipid",
Tomi Valkeinen562a0602011-04-21 19:53:59 +0300721 .owner = THIS_MODULE,
722 },
723 .probe = mipid_spi_probe,
724 .remove = __devexit_p(mipid_spi_remove),
725};
726
727static int __init n8x0_panel_drv_init(void)
728{
729 int r;
730
731 r = spi_register_driver(&mipid_spi_driver);
732 if (r) {
733 pr_err("n8x0_panel: spi driver registration failed\n");
734 return r;
735 }
736
737 r = omap_dss_register_driver(&n8x0_panel_driver);
738 if (r) {
739 pr_err("n8x0_panel: dss driver registration failed\n");
740 spi_unregister_driver(&mipid_spi_driver);
741 return r;
742 }
743
744 return 0;
745}
746
747static void __exit n8x0_panel_drv_exit(void)
748{
749 spi_unregister_driver(&mipid_spi_driver);
750
751 omap_dss_unregister_driver(&n8x0_panel_driver);
752}
753
754module_init(n8x0_panel_drv_init);
755module_exit(n8x0_panel_drv_exit);
756MODULE_LICENSE("GPL");