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Dan Williams6f231dd2011-07-02 22:56:22 -07001/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
Dan Williams4b339812011-05-06 17:36:38 -070055#ifndef _ISCI_PHY_H_
Dan Williams6f231dd2011-07-02 22:56:22 -070056#define _ISCI_PHY_H_
57
Dave Jiangf2f30082011-05-04 15:02:02 -070058#include <scsi/sas.h>
Dan Williams6f231dd2011-07-02 22:56:22 -070059#include <scsi/libsas.h>
Dan Williamsd35bc1b2011-05-10 02:28:45 -070060#include "state_machine.h"
Dan Williamse2f8db52011-05-10 02:28:46 -070061#include "sas.h"
Dan Williamsd35bc1b2011-05-10 02:28:45 -070062
63/* This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
64 * before restarting the starting state machine. Technically, the old parallel
65 * ATA specification required up to 30 seconds for a device to issue its
66 * signature FIS as a result of a soft reset. Now we see that devices respond
67 * generally within 15 seconds, but we'll use 25 for now.
68 */
69#define SCIC_SDS_SIGNATURE_FIS_TIMEOUT 25000
70
71/* This is the timeout for the SATA OOB/SN because the hardware does not
72 * recognize a hot plug after OOB signal but before the SN signals. We need to
73 * make sure after a hotplug timeout if we have not received the speed event
74 * notification from the hardware that we restart the hardware OOB state
75 * machine.
76 */
77#define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT 250
78
79enum scic_sds_phy_protocol {
80 SCIC_SDS_PHY_PROTOCOL_UNKNOWN,
81 SCIC_SDS_PHY_PROTOCOL_SAS,
82 SCIC_SDS_PHY_PROTOCOL_SATA,
83 SCIC_SDS_MAX_PHY_PROTOCOLS
84};
85
86/**
87 * struct scic_sds_phy - This structure contains or references all of the data
88 * necessary to represent the core phy object and SCU harware protocol
89 * engine.
90 *
91 *
92 */
93struct scic_sds_phy {
94 /**
95 * This field contains the information for the base phy state machine.
96 */
97 struct sci_base_state_machine state_machine;
98
99 /**
100 * This field specifies the port object that owns/contains this phy.
101 */
102 struct scic_sds_port *owning_port;
103
104 /**
105 * This field indicates whether the phy supports 1.5 Gb/s, 3.0 Gb/s,
106 * or 6.0 Gb/s operation.
107 */
108 enum sas_linkrate max_negotiated_speed;
109
110 /**
111 * This member specifies the protocol being utilized on this phy. This
112 * field contains a legitamite value once the PHY has link trained with
113 * a remote phy.
114 */
115 enum scic_sds_phy_protocol protocol;
116
117 /**
118 * This field specifies the index with which this phy is associated (0-3).
119 */
120 u8 phy_index;
121
122 /**
123 * This member indicates if this particular PHY has received a BCN while
124 * it had no port assignement. This BCN will be reported once the phy is
125 * assigned to a port.
126 */
127 bool bcn_received_while_port_unassigned;
128
129 /**
130 * This field indicates if this PHY is currently in the process of
131 * link training (i.e. it has started OOB, but has yet to perform
132 * IAF exchange/Signature FIS reception).
133 */
134 bool is_in_link_training;
135
136 /**
137 * This field contains a reference to the timer utilized in detecting
138 * when a signature FIS timeout has occurred. The signature FIS is the
139 * first FIS sent by an attached SATA device after OOB/SN.
140 */
141 void *sata_timeout_timer;
142
143 const struct scic_sds_phy_state_handler *state_handlers;
144
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700145 /**
146 * This field is the pointer to the transport layer register for the SCU
147 * hardware.
148 */
149 struct scu_transport_layer_registers __iomem *transport_layer_registers;
150
151 /**
152 * This field points to the link layer register set within the SCU.
153 */
154 struct scu_link_layer_registers __iomem *link_layer_registers;
155
156};
157
Dan Williams6f231dd2011-07-02 22:56:22 -0700158
159struct isci_phy {
Dan Williams4b339812011-05-06 17:36:38 -0700160 struct scic_sds_phy sci;
Dan Williams6f231dd2011-07-02 22:56:22 -0700161 struct asd_sas_phy sas_phy;
Dan Williams6f231dd2011-07-02 22:56:22 -0700162 struct isci_port *isci_port;
163 u8 sas_addr[SAS_ADDR_SIZE];
164
165 union {
Dave Jiang4b7ebd02011-05-04 15:37:52 -0700166 struct sas_identify_frame iaf;
Dave Jiangf2f30082011-05-04 15:02:02 -0700167 struct dev_to_host_fis fis;
Dan Williams6f231dd2011-07-02 22:56:22 -0700168 } frame_rcvd;
169};
170
Dan Williams4b339812011-05-06 17:36:38 -0700171static inline struct isci_phy *to_isci_phy(struct asd_sas_phy *sas_phy)
172{
173 struct isci_phy *iphy = container_of(sas_phy, typeof(*iphy), sas_phy);
Dan Williams6f231dd2011-07-02 22:56:22 -0700174
Dan Williams4b339812011-05-06 17:36:38 -0700175 return iphy;
176}
Dan Williams6f231dd2011-07-02 22:56:22 -0700177
Dan Williams4b339812011-05-06 17:36:38 -0700178static inline struct isci_phy *sci_phy_to_iphy(struct scic_sds_phy *sci_phy)
179{
180 struct isci_phy *iphy = container_of(sci_phy, typeof(*iphy), sci);
181
182 return iphy;
183}
184
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700185struct scic_phy_cap {
186 union {
187 struct {
188 /*
189 * The SAS specification indicates the start bit shall
190 * always be set to
191 * 1. This implementation will have the start bit set
192 * to 0 if the PHY CAPABILITIES were either not
193 * received or speed negotiation failed.
194 */
195 u8 start:1;
196 u8 tx_ssc_type:1;
197 u8 res1:2;
198 u8 req_logical_linkrate:4;
199
200 u32 gen1_no_ssc:1;
201 u32 gen1_ssc:1;
202 u32 gen2_no_ssc:1;
203 u32 gen2_ssc:1;
204 u32 gen3_no_ssc:1;
205 u32 gen3_ssc:1;
206 u32 res2:17;
207 u32 parity:1;
208 };
209 u32 all;
210 };
211} __packed;
212
213/* this data structure reflects the link layer transmit identification reg */
214struct scic_phy_proto {
215 union {
216 struct {
217 u16 _r_a:1;
218 u16 smp_iport:1;
219 u16 stp_iport:1;
220 u16 ssp_iport:1;
221 u16 _r_b:4;
222 u16 _r_c:1;
223 u16 smp_tport:1;
224 u16 stp_tport:1;
225 u16 ssp_tport:1;
226 u16 _r_d:4;
227 };
228 u16 all;
229 };
230} __packed;
231
232
233/**
234 * struct scic_phy_properties - This structure defines the properties common to
235 * all phys that can be retrieved.
236 *
237 *
238 */
239struct scic_phy_properties {
240 /**
241 * This field specifies the port that currently contains the
242 * supplied phy. This field may be set to NULL
243 * if the phy is not currently contained in a port.
244 */
245 struct scic_sds_port *owning_port;
246
247 /**
248 * This field specifies the link rate at which the phy is
249 * currently operating.
250 */
251 enum sas_linkrate negotiated_link_rate;
252
253 /**
254 * This field specifies the index of the phy in relation to other
255 * phys within the controller. This index is zero relative.
256 */
257 u8 index;
258};
259
260/**
261 * struct scic_sas_phy_properties - This structure defines the properties,
262 * specific to a SAS phy, that can be retrieved.
263 *
264 *
265 */
266struct scic_sas_phy_properties {
267 /**
268 * This field delineates the Identify Address Frame received
269 * from the remote end point.
270 */
271 struct sas_identify_frame rcvd_iaf;
272
273 /**
274 * This field delineates the Phy capabilities structure received
275 * from the remote end point.
276 */
277 struct scic_phy_cap rcvd_cap;
278
279};
280
281/**
282 * struct scic_sata_phy_properties - This structure defines the properties,
283 * specific to a SATA phy, that can be retrieved.
284 *
285 *
286 */
287struct scic_sata_phy_properties {
288 /**
289 * This field delineates the signature FIS received from the
290 * attached target.
291 */
292 struct dev_to_host_fis signature_fis;
293
294 /**
295 * This field specifies to the user if a port selector is connected
296 * on the specified phy.
297 */
298 bool is_port_selector_present;
299
300};
301
302/**
303 * enum scic_phy_counter_id - This enumeration depicts the various pieces of
304 * optional information that can be retrieved for a specific phy.
305 *
306 *
307 */
308enum scic_phy_counter_id {
309 /**
310 * This PHY information field tracks the number of frames received.
311 */
312 SCIC_PHY_COUNTER_RECEIVED_FRAME,
313
314 /**
315 * This PHY information field tracks the number of frames transmitted.
316 */
317 SCIC_PHY_COUNTER_TRANSMITTED_FRAME,
318
319 /**
320 * This PHY information field tracks the number of DWORDs received.
321 */
322 SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD,
323
324 /**
325 * This PHY information field tracks the number of DWORDs transmitted.
326 */
327 SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD,
328
329 /**
330 * This PHY information field tracks the number of times DWORD
331 * synchronization was lost.
332 */
333 SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR,
334
335 /**
336 * This PHY information field tracks the number of received DWORDs with
337 * running disparity errors.
338 */
339 SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR,
340
341 /**
342 * This PHY information field tracks the number of received frames with a
343 * CRC error (not including short or truncated frames).
344 */
345 SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR,
346
347 /**
348 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
349 * primitives received.
350 */
351 SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT,
352
353 /**
354 * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
355 * primitives transmitted.
356 */
357 SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT,
358
359 /**
360 * This PHY information field tracks the number of times the inactivity
361 * timer for connections on the phy has been utilized.
362 */
363 SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED,
364
365 /**
366 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
367 * primitives received.
368 */
369 SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT,
370
371 /**
372 * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
373 * primitives transmitted.
374 */
375 SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT,
376
377 /**
378 * This PHY information field tracks the number of CREDIT BLOCKED
379 * primitives received.
380 * @note Depending on remote device implementation, credit blocks
381 * may occur regularly.
382 */
383 SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED,
384
385 /**
386 * This PHY information field contains the number of short frames
387 * received. A short frame is simply a frame smaller then what is
388 * allowed by either the SAS or SATA specification.
389 */
390 SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME,
391
392 /**
393 * This PHY information field contains the number of frames received after
394 * credit has been exhausted.
395 */
396 SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT,
397
398 /**
399 * This PHY information field contains the number of frames received after
400 * a DONE has been received.
401 */
402 SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE,
403
404 /**
405 * This PHY information field contains the number of times the phy
406 * failed to achieve DWORD synchronization during speed negotiation.
407 */
408 SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR
409};
410
411enum scic_sds_phy_states {
412 /**
413 * Simply the initial state for the base domain state machine.
414 */
415 SCI_BASE_PHY_STATE_INITIAL,
416
417 /**
418 * This state indicates that the phy has successfully been stopped.
419 * In this state no new IO operations are permitted on this phy.
420 * This state is entered from the INITIAL state.
421 * This state is entered from the STARTING state.
422 * This state is entered from the READY state.
423 * This state is entered from the RESETTING state.
424 */
425 SCI_BASE_PHY_STATE_STOPPED,
426
427 /**
428 * This state indicates that the phy is in the process of becomming
429 * ready. In this state no new IO operations are permitted on this phy.
430 * This state is entered from the STOPPED state.
431 * This state is entered from the READY state.
432 * This state is entered from the RESETTING state.
433 */
434 SCI_BASE_PHY_STATE_STARTING,
435
436 /**
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700437 * Initial state
438 */
439 SCIC_SDS_PHY_STARTING_SUBSTATE_INITIAL,
440
441 /**
442 * Wait state for the hardware OSSP event type notification
443 */
444 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_OSSP_EN,
445
446 /**
447 * Wait state for the PHY speed notification
448 */
449 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_SPEED_EN,
450
451 /**
452 * Wait state for the IAF Unsolicited frame notification
453 */
454 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_IAF_UF,
455
456 /**
457 * Wait state for the request to consume power
458 */
459 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_POWER,
460
461 /**
462 * Wait state for request to consume power
463 */
464 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_POWER,
465
466 /**
467 * Wait state for the SATA PHY notification
468 */
469 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_PHY_EN,
470
471 /**
472 * Wait for the SATA PHY speed notification
473 */
474 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_SPEED_EN,
475
476 /**
477 * Wait state for the SIGNATURE FIS unsolicited frame notification
478 */
479 SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SIG_FIS_UF,
480
481 /**
482 * Exit state for this state machine
483 */
484 SCIC_SDS_PHY_STARTING_SUBSTATE_FINAL,
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700485
Adam Gruchala4a33c522011-05-10 23:54:23 +0000486 /**
487 * This state indicates the the phy is now ready. Thus, the user
488 * is able to perform IO operations utilizing this phy as long as it
489 * is currently part of a valid port.
490 * This state is entered from the STARTING state.
491 */
492 SCI_BASE_PHY_STATE_READY,
493
494 /**
495 * This state indicates that the phy is in the process of being reset.
496 * In this state no new IO operations are permitted on this phy.
497 * This state is entered from the READY state.
498 */
499 SCI_BASE_PHY_STATE_RESETTING,
500
501 /**
502 * Simply the final state for the base phy state machine.
503 */
504 SCI_BASE_PHY_STATE_FINAL,
505};
Dan Williamsd35bc1b2011-05-10 02:28:45 -0700506
507
508typedef enum sci_status (*scic_sds_phy_handler_t)(struct scic_sds_phy *);
509typedef enum sci_status (*scic_sds_phy_event_handler_t)(struct scic_sds_phy *, u32);
510typedef enum sci_status (*scic_sds_phy_frame_handler_t)(struct scic_sds_phy *, u32);
511typedef enum sci_status (*scic_sds_phy_power_handler_t)(struct scic_sds_phy *);
512
513struct scic_sds_phy_state_handler {
514 /**
515 * The start_handler specifies the method invoked when there is an
516 * attempt to start a phy.
517 */
518 scic_sds_phy_handler_t start_handler;
519
520 /**
521 * The stop_handler specifies the method invoked when there is an
522 * attempt to stop a phy.
523 */
524 scic_sds_phy_handler_t stop_handler;
525
526 /**
527 * The reset_handler specifies the method invoked when there is an
528 * attempt to reset a phy.
529 */
530 scic_sds_phy_handler_t reset_handler;
531
532 /**
533 * The destruct_handler specifies the method invoked when attempting to
534 * destruct a phy.
535 */
536 scic_sds_phy_handler_t destruct_handler;
537
538 /**
539 * The state handler for unsolicited frames received from the SCU hardware.
540 */
541 scic_sds_phy_frame_handler_t frame_handler;
542
543 /**
544 * The state handler for events received from the SCU hardware.
545 */
546 scic_sds_phy_event_handler_t event_handler;
547
548 /**
549 * The state handler for staggered spinup.
550 */
551 scic_sds_phy_power_handler_t consume_power_handler;
552
553};
554
555/**
556 * scic_sds_phy_get_index() -
557 *
558 * This macro returns the phy index for the specified phy
559 */
560#define scic_sds_phy_get_index(phy) \
561 ((phy)->phy_index)
562
563/**
564 * scic_sds_phy_get_controller() - This macro returns the controller for this
565 * phy
566 *
567 *
568 */
569#define scic_sds_phy_get_controller(phy) \
570 (scic_sds_port_get_controller((phy)->owning_port))
571
572/**
573 * scic_sds_phy_set_state_handlers() - This macro sets the state handlers for
574 * this phy object
575 *
576 *
577 */
578#define scic_sds_phy_set_state_handlers(phy, handlers) \
579 ((phy)->state_handlers = (handlers))
580
581/**
582 * scic_sds_phy_set_base_state_handlers() -
583 *
584 * This macro set the base state handlers for the phy object.
585 */
586#define scic_sds_phy_set_base_state_handlers(phy, state_id) \
587 scic_sds_phy_set_state_handlers(\
588 (phy), \
589 &scic_sds_phy_state_handler_table[(state_id)] \
590 )
591
592void scic_sds_phy_construct(
593 struct scic_sds_phy *this_phy,
594 struct scic_sds_port *owning_port,
595 u8 phy_index);
596
597struct scic_sds_port *scic_sds_phy_get_port(
598 struct scic_sds_phy *this_phy);
599
600void scic_sds_phy_set_port(
601 struct scic_sds_phy *this_phy,
602 struct scic_sds_port *owning_port);
603
604enum sci_status scic_sds_phy_initialize(
605 struct scic_sds_phy *this_phy,
606 struct scu_transport_layer_registers __iomem *transport_layer_registers,
607 struct scu_link_layer_registers __iomem *link_layer_registers);
608
609enum sci_status scic_sds_phy_start(
610 struct scic_sds_phy *this_phy);
611
612enum sci_status scic_sds_phy_stop(
613 struct scic_sds_phy *this_phy);
614
615enum sci_status scic_sds_phy_reset(
616 struct scic_sds_phy *this_phy);
617
618void scic_sds_phy_resume(
619 struct scic_sds_phy *this_phy);
620
621void scic_sds_phy_setup_transport(
622 struct scic_sds_phy *this_phy,
623 u32 device_id);
624
625enum sci_status scic_sds_phy_event_handler(
626 struct scic_sds_phy *this_phy,
627 u32 event_code);
628
629enum sci_status scic_sds_phy_frame_handler(
630 struct scic_sds_phy *this_phy,
631 u32 frame_index);
632
633enum sci_status scic_sds_phy_consume_power_handler(
634 struct scic_sds_phy *this_phy);
635
636void scic_sds_phy_get_sas_address(
637 struct scic_sds_phy *this_phy,
638 struct sci_sas_address *sas_address);
639
640void scic_sds_phy_get_attached_sas_address(
641 struct scic_sds_phy *this_phy,
642 struct sci_sas_address *sas_address);
643
644struct scic_phy_proto;
645void scic_sds_phy_get_protocols(
646 struct scic_sds_phy *sci_phy,
647 struct scic_phy_proto *protocols);
648enum sas_linkrate sci_phy_linkrate(struct scic_sds_phy *sci_phy);
649
Dan Williamsce2b3262011-05-08 15:49:15 -0700650struct isci_host;
Dan Williams4b339812011-05-06 17:36:38 -0700651void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index);
652int isci_phy_control(struct asd_sas_phy *phy, enum phy_func func, void *buf);
Dan Williams6f231dd2011-07-02 22:56:22 -0700653
654#endif /* !defined(_ISCI_PHY_H_) */