| Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Include file for Marvell Armada XP family SoC |
| 3 | * |
| 4 | * Copyright (C) 2012 Marvell |
| 5 | * |
| 6 | * Lior Amsalem <alior@marvell.com> |
| 7 | * Gregory CLEMENT <gregory.clement@free-electrons.com> |
| 8 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| 9 | * Ben Dooks <ben.dooks@codethink.co.uk> |
| 10 | * |
| 11 | * This file is licensed under the terms of the GNU General Public |
| 12 | * License version 2. This program is licensed "as is" without any |
| 13 | * warranty of any kind, whether express or implied. |
| 14 | * |
| Thomas Petazzoni | 10b683c | 2012-08-02 17:13:47 +0200 | [diff] [blame] | 15 | * Contains definitions specific to the Armada XP SoC that are not |
| Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 16 | * common to all Armada SoCs. |
| 17 | */ |
| 18 | |
| 19 | /include/ "armada-370-xp.dtsi" |
| 20 | |
| 21 | / { |
| 22 | model = "Marvell Armada XP family SoC"; |
| 23 | compatible = "marvell,armadaxp", "marvell,armada-370-xp"; |
| 24 | |
| 25 | mpic: interrupt-controller@d0020000 { |
| 26 | reg = <0xd0020a00 0x1d0>, |
| 27 | <0xd0021870 0x58>; |
| 28 | }; |
| 29 | |
| 30 | soc { |
| 31 | serial@d0012200 { |
| 32 | compatible = "ns16550"; |
| 33 | reg = <0xd0012200 0x100>; |
| 34 | reg-shift = <2>; |
| 35 | interrupts = <43>; |
| 36 | status = "disabled"; |
| 37 | }; |
| 38 | serial@d0012300 { |
| 39 | compatible = "ns16550"; |
| 40 | reg = <0xd0012300 0x100>; |
| 41 | reg-shift = <2>; |
| 42 | interrupts = <44>; |
| 43 | status = "disabled"; |
| 44 | }; |
| 45 | |
| 46 | timer@d0020300 { |
| 47 | marvell,timer-25Mhz; |
| 48 | }; |
| 49 | |
| Gregory CLEMENT | 9d20278 | 2012-11-17 15:22:24 +0100 | [diff] [blame] | 50 | coreclk: mvebu-sar@d0018230 { |
| 51 | compatible = "marvell,armada-xp-core-clock"; |
| 52 | reg = <0xd0018230 0x08>; |
| 53 | #clock-cells = <1>; |
| 54 | }; |
| 55 | |
| 56 | cpuclk: clock-complex@d0018700 { |
| 57 | #clock-cells = <1>; |
| 58 | compatible = "marvell,armada-xp-cpu-clock"; |
| 59 | reg = <0xd0018700 0xA0>; |
| 60 | clocks = <&coreclk 1>; |
| 61 | }; |
| 62 | |
| 63 | gateclk: clock-gating-control@d0018220 { |
| 64 | compatible = "marvell,armada-xp-gating-clock"; |
| 65 | reg = <0xd0018220 0x4>; |
| 66 | clocks = <&coreclk 0>; |
| 67 | #clock-cells = <1>; |
| 68 | }; |
| 69 | |
| Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 70 | system-controller@d0018200 { |
| 71 | compatible = "marvell,armada-370-xp-system-controller"; |
| 72 | reg = <0xd0018200 0x500>; |
| 73 | }; |
| Thomas Petazzoni | 323c101 | 2012-09-04 15:06:43 +0200 | [diff] [blame] | 74 | |
| 75 | ethernet@d0030000 { |
| 76 | compatible = "marvell,armada-370-neta"; |
| 77 | reg = <0xd0030000 0x2500>; |
| 78 | interrupts = <12>; |
| Thomas Petazzoni | 4aa935a | 2012-11-19 14:18:09 +0100 | [diff] [blame^] | 79 | clocks = <&gateclk 2>; |
| Thomas Petazzoni | 323c101 | 2012-09-04 15:06:43 +0200 | [diff] [blame] | 80 | status = "disabled"; |
| 81 | }; |
| 82 | |
| 83 | ethernet@d0034000 { |
| 84 | compatible = "marvell,armada-370-neta"; |
| 85 | reg = <0xd0034000 0x2500>; |
| 86 | interrupts = <14>; |
| Thomas Petazzoni | 4aa935a | 2012-11-19 14:18:09 +0100 | [diff] [blame^] | 87 | clocks = <&gateclk 1>; |
| Thomas Petazzoni | 323c101 | 2012-09-04 15:06:43 +0200 | [diff] [blame] | 88 | status = "disabled"; |
| 89 | }; |
| Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 90 | }; |
| 91 | }; |