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review.evervolv.com / android_kernel_oneplus_msm8996 / 4c7a078f9003f31862f3a194dfa6a2dcf0937b39 / . / arch / arm / boot / dts / spear600.dtsi
blob: f74feeaab1e0efa6ef6fd9dec7b596f81f7ea0d9 [file] [log] [blame]
Stefan Roese9652e8b2012-03-16 14:03:23 +0100[diff] [blame]1/*
2 * Copyright 2012 Stefan Roese <sr@denx.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 compatible = "st,spear600";
16
17 cpus {
18 cpu@0 {
19 compatible = "arm,arm926ejs";
20 };
21 };
22
23 memory {
24 device_type = "memory";
25 reg = <0 0x40000000>;
26 };
27
28 ahb {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 compatible = "simple-bus";
32 ranges = <0xd0000000 0xd0000000 0x30000000>;
33
34 vic0: interrupt-controller@f1100000 {
35 compatible = "arm,pl190-vic";
36 interrupt-controller;
37 reg = <0xf1100000 0x1000>;
38 #interrupt-cells = <1>;
39 };
40
41 vic1: interrupt-controller@f1000000 {
42 compatible = "arm,pl190-vic";
43 interrupt-controller;
44 reg = <0xf1000000 0x1000>;
45 #interrupt-cells = <1>;
46 };
47
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530[diff] [blame]48 dma@fc400000 {
49 compatible = "arm,pl080", "arm,primecell";
50 reg = <0xfc400000 0x1000>;
51 interrupt-parent = <&vic1>;
52 interrupts = <10>;
53 status = "disabled";
54 };
55
Stefan Roese9652e8b2012-03-16 14:03:23 +0100[diff] [blame]56 gmac: ethernet@e0800000 {
57 compatible = "st,spear600-gmac";
58 reg = <0xe0800000 0x8000>;
59 interrupt-parent = <&vic1>;
60 interrupts = <24 23>;
61 interrupt-names = "macirq", "eth_wake_irq";
Deepak Sikri4c7a0782012-08-09 13:18:40 +0530[diff] [blame^]62 phy-mode = "gmii";
Stefan Roese9652e8b2012-03-16 14:03:23 +0100[diff] [blame]63 status = "disabled";
64 };
65
66 fsmc: flash@d1800000 {
67 compatible = "st,spear600-fsmc-nand";
68 #address-cells = <1>;
69 #size-cells = <1>;
70 reg = <0xd1800000 0x1000 /* FSMC Register */
71 0xd2000000 0x4000>; /* NAND Base */
72 reg-names = "fsmc_regs", "nand_data";
73 st,ale-off = <0x20000>;
74 st,cle-off = <0x10000>;
75 status = "disabled";
76 };
77
78 smi: flash@fc000000 {
79 compatible = "st,spear600-smi";
80 #address-cells = <1>;
81 #size-cells = <1>;
82 reg = <0xfc000000 0x1000>;
83 interrupt-parent = <&vic1>;
84 interrupts = <12>;
85 status = "disabled";
86 };
87
88 ehci@e1800000 {
89 compatible = "st,spear600-ehci", "usb-ehci";
90 reg = <0xe1800000 0x1000>;
91 interrupt-parent = <&vic1>;
92 interrupts = <27>;
93 status = "disabled";
94 };
95
96 ehci@e2000000 {
97 compatible = "st,spear600-ehci", "usb-ehci";
98 reg = <0xe2000000 0x1000>;
99 interrupt-parent = <&vic1>;
100 interrupts = <29>;
101 status = "disabled";
102 };
103
104 ohci@e1900000 {
105 compatible = "st,spear600-ohci", "usb-ohci";
106 reg = <0xe1900000 0x1000>;
107 interrupt-parent = <&vic1>;
108 interrupts = <26>;
109 status = "disabled";
110 };
111
112 ohci@e2100000 {
113 compatible = "st,spear600-ohci", "usb-ohci";
114 reg = <0xe2100000 0x1000>;
115 interrupt-parent = <&vic1>;
116 interrupts = <28>;
117 status = "disabled";
118 };
119
120 apb {
121 #address-cells = <1>;
122 #size-cells = <1>;
123 compatible = "simple-bus";
124 ranges = <0xd0000000 0xd0000000 0x30000000>;
125
126 serial@d0000000 {
127 compatible = "arm,pl011", "arm,primecell";
128 reg = <0xd0000000 0x1000>;
129 interrupt-parent = <&vic0>;
130 interrupts = <24>;
131 status = "disabled";
132 };
133
134 serial@d0080000 {
135 compatible = "arm,pl011", "arm,primecell";
136 reg = <0xd0080000 0x1000>;
137 interrupt-parent = <&vic0>;
138 interrupts = <25>;
139 status = "disabled";
140 };
141
142 /* local/cpu GPIO */
143 gpio0: gpio@f0100000 {
144 #gpio-cells = <2>;
145 compatible = "arm,pl061", "arm,primecell";
146 gpio-controller;
147 reg = <0xf0100000 0x1000>;
148 interrupt-parent = <&vic0>;
149 interrupts = <18>;
150 };
151
152 /* basic GPIO */
153 gpio1: gpio@fc980000 {
154 #gpio-cells = <2>;
155 compatible = "arm,pl061", "arm,primecell";
156 gpio-controller;
157 reg = <0xfc980000 0x1000>;
158 interrupt-parent = <&vic1>;
159 interrupts = <19>;
160 };
161
162 /* appl GPIO */
163 gpio2: gpio@d8100000 {
164 #gpio-cells = <2>;
165 compatible = "arm,pl061", "arm,primecell";
166 gpio-controller;
167 reg = <0xd8100000 0x1000>;
168 interrupt-parent = <&vic1>;
169 interrupts = <4>;
170 };
171
172 i2c@d0200000 {
173 #address-cells = <1>;
174 #size-cells = <0>;
175 compatible = "snps,designware-i2c";
176 reg = <0xd0200000 0x1000>;
177 interrupt-parent = <&vic0>;
178 interrupts = <28>;
179 status = "disabled";
180 };
Viresh Kumar30551c02012-04-21 13:15:37 +0530[diff] [blame]181
182 timer@f0000000 {
183 compatible = "st,spear-timer";
184 reg = <0xf0000000 0x400>;
Stefan Roese69c7e372012-05-11 10:41:01 +0200[diff] [blame]185 interrupt-parent = <&vic0>;
Viresh Kumar30551c02012-04-21 13:15:37 +0530[diff] [blame]186 interrupts = <16>;
187 };
Stefan Roese9652e8b2012-03-16 14:03:23 +0100[diff] [blame]188 };
189 };
190};