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review.evervolv.com / android_kernel_oneplus_msm8996 / 4da808c352c290d3f762933d44d4ab90c2fd65f3 / . / arch / sparc64 / kernel / etrap.S
blob: db7681017299185fa2b862d7b2d37259347957a3 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/* $Id: etrap.S,v 1.46 2002/02/09 19:49:30 davem Exp $
2 * etrap.S: Preparing for entry into the kernel on Sparc V9.
3 *
4 * Copyright (C) 1996, 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1997, 1998, 1999 Jakub Jelinek (jj@ultra.linux.cz)
6 */
7
8#include <linux/config.h>
9
10#include <asm/asi.h>
11#include <asm/pstate.h>
12#include <asm/ptrace.h>
13#include <asm/page.h>
14#include <asm/spitfire.h>
15#include <asm/head.h>
16#include <asm/processor.h>
17#include <asm/mmu.h>
18
19#define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-STACKFRAME_SZ)
20#define ETRAP_PSTATE1 (PSTATE_RMO | PSTATE_PRIV)
21#define ETRAP_PSTATE2 \
22 (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)
23
24/*
25 * On entry, %g7 is return address - 0x4.
26 * %g4 and %g5 will be preserved %l4 and %l5 respectively.
27 */
28
29 .text
30 .align 64
31 .globl etrap, etrap_irq, etraptl1
32etrap: rdpr %pil, %g2
33etrap_irq:
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]34 TRAP_LOAD_THREAD_REG
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]35 rdpr %tstate, %g1
36 sllx %g2, 20, %g3
37 andcc %g1, TSTATE_PRIV, %g0
38 or %g1, %g3, %g1
39 bne,pn %xcc, 1f
40 sub %sp, STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS, %g2
41 wrpr %g0, 7, %cleanwin
42
43 sethi %hi(TASK_REGOFF), %g2
44 sethi %hi(TSTATE_PEF), %g3
45 or %g2, %lo(TASK_REGOFF), %g2
46 and %g1, %g3, %g3
47 brnz,pn %g3, 1f
48 add %g6, %g2, %g2
49 wr %g0, 0, %fprs
501: rdpr %tpc, %g3
51
52 stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE]
53 rdpr %tnpc, %g1
54 stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC]
55 rd %y, %g3
56 stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC]
57 st %g3, [%g2 + STACKFRAME_SZ + PT_V9_Y]
58 save %g2, -STACK_BIAS, %sp ! Ordering here is critical
59 mov %g6, %l6
60
61 bne,pn %xcc, 3f
62 mov PRIMARY_CONTEXT, %l4
63 rdpr %canrestore, %g3
64 rdpr %wstate, %g2
65 wrpr %g0, 0, %canrestore
66 sll %g2, 3, %g2
67 mov 1, %l5
68 stb %l5, [%l6 + TI_FPDEPTH]
69
70 wrpr %g3, 0, %otherwin
71 wrpr %g2, 0, %wstate
David S. Miller0835ae02005-10-04 15:23:20 -0700[diff] [blame]72 sethi %hi(sparc64_kern_pri_context), %g2
73 ldx [%g2 + %lo(sparc64_kern_pri_context)], %g3
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]74 stxa %g3, [%l4] ASI_DMMU
David S. Miller4da808c2006-01-31 18:33:00 -0800[diff] [blame^]75 sethi %hi(KERNBASE), %l4
76 flush %l4
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]77 wr %g0, ASI_AIUS, %asi
782: wrpr %g0, 0x0, %tl
79 mov %g4, %l4
80 mov %g5, %l5
81
82 mov %g7, %l2
83 wrpr %g0, ETRAP_PSTATE1, %pstate
84 stx %g1, [%sp + PTREGS_OFF + PT_V9_G1]
85 stx %g2, [%sp + PTREGS_OFF + PT_V9_G2]
86 stx %g3, [%sp + PTREGS_OFF + PT_V9_G3]
87 stx %g4, [%sp + PTREGS_OFF + PT_V9_G4]
88 stx %g5, [%sp + PTREGS_OFF + PT_V9_G5]
89 stx %g6, [%sp + PTREGS_OFF + PT_V9_G6]
90
91 stx %g7, [%sp + PTREGS_OFF + PT_V9_G7]
92 stx %i0, [%sp + PTREGS_OFF + PT_V9_I0]
93 stx %i1, [%sp + PTREGS_OFF + PT_V9_I1]
94 stx %i2, [%sp + PTREGS_OFF + PT_V9_I2]
95 stx %i3, [%sp + PTREGS_OFF + PT_V9_I3]
96 stx %i4, [%sp + PTREGS_OFF + PT_V9_I4]
97 stx %i5, [%sp + PTREGS_OFF + PT_V9_I5]
98
99 stx %i6, [%sp + PTREGS_OFF + PT_V9_I6]
100 stx %i7, [%sp + PTREGS_OFF + PT_V9_I7]
101 wrpr %g0, ETRAP_PSTATE2, %pstate
102 mov %l6, %g6
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]103 LOAD_PER_CPU_BASE(%g4, %g3)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]104 jmpl %l2 + 0x4, %g0
105 ldx [%g6 + TI_TASK], %g4
106
1073: ldub [%l6 + TI_FPDEPTH], %l5
108 add %l6, TI_FPSAVED + 1, %l4
109 srl %l5, 1, %l3
110 add %l5, 2, %l5
111 stb %l5, [%l6 + TI_FPDEPTH]
112 ba,pt %xcc, 2b
113 stb %g0, [%l4 + %l3]
114 nop
115
116etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself.
117 * We place this right after pt_regs on the trap stack.
118 * The layout is:
119 * 0x00 TL1's TSTATE
120 * 0x08 TL1's TPC
121 * 0x10 TL1's TNPC
122 * 0x18 TL1's TT
123 * ...
124 * 0x58 TL4's TT
125 * 0x60 TL
126 */
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]127 TRAP_LOAD_THREAD_REG
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]128 sub %sp, ((4 * 8) * 4) + 8, %g2
129 rdpr %tl, %g1
130
131 wrpr %g0, 1, %tl
132 rdpr %tstate, %g3
133 stx %g3, [%g2 + STACK_BIAS + 0x00]
134 rdpr %tpc, %g3
135 stx %g3, [%g2 + STACK_BIAS + 0x08]
136 rdpr %tnpc, %g3
137 stx %g3, [%g2 + STACK_BIAS + 0x10]
138 rdpr %tt, %g3
139 stx %g3, [%g2 + STACK_BIAS + 0x18]
140
141 wrpr %g0, 2, %tl
142 rdpr %tstate, %g3
143 stx %g3, [%g2 + STACK_BIAS + 0x20]
144 rdpr %tpc, %g3
145 stx %g3, [%g2 + STACK_BIAS + 0x28]
146 rdpr %tnpc, %g3
147 stx %g3, [%g2 + STACK_BIAS + 0x30]
148 rdpr %tt, %g3
149 stx %g3, [%g2 + STACK_BIAS + 0x38]
150
151 wrpr %g0, 3, %tl
152 rdpr %tstate, %g3
153 stx %g3, [%g2 + STACK_BIAS + 0x40]
154 rdpr %tpc, %g3
155 stx %g3, [%g2 + STACK_BIAS + 0x48]
156 rdpr %tnpc, %g3
157 stx %g3, [%g2 + STACK_BIAS + 0x50]
158 rdpr %tt, %g3
159 stx %g3, [%g2 + STACK_BIAS + 0x58]
160
161 wrpr %g0, 4, %tl
162 rdpr %tstate, %g3
163 stx %g3, [%g2 + STACK_BIAS + 0x60]
164 rdpr %tpc, %g3
165 stx %g3, [%g2 + STACK_BIAS + 0x68]
166 rdpr %tnpc, %g3
167 stx %g3, [%g2 + STACK_BIAS + 0x70]
168 rdpr %tt, %g3
169 stx %g3, [%g2 + STACK_BIAS + 0x78]
170
171 wrpr %g1, %tl
172 stx %g1, [%g2 + STACK_BIAS + 0x80]
173
174 rdpr %tstate, %g1
175 sub %g2, STACKFRAME_SZ + TRACEREG_SZ - STACK_BIAS, %g2
176 ba,pt %xcc, 1b
177 andcc %g1, TSTATE_PRIV, %g0
178
179 .align 64
180 .globl scetrap
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]181scetrap:
182 TRAP_LOAD_THREAD_REG
183 rdpr %pil, %g2
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]184 rdpr %tstate, %g1
185 sllx %g2, 20, %g3
186 andcc %g1, TSTATE_PRIV, %g0
187 or %g1, %g3, %g1
188 bne,pn %xcc, 1f
189 sub %sp, (STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS), %g2
190 wrpr %g0, 7, %cleanwin
191
192 sllx %g1, 51, %g3
193 sethi %hi(TASK_REGOFF), %g2
194 or %g2, %lo(TASK_REGOFF), %g2
195 brlz,pn %g3, 1f
196 add %g6, %g2, %g2
197 wr %g0, 0, %fprs
1981: rdpr %tpc, %g3
199 stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE]
200
201 rdpr %tnpc, %g1
202 stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC]
203 stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC]
204 save %g2, -STACK_BIAS, %sp ! Ordering here is critical
205 mov %g6, %l6
206 bne,pn %xcc, 2f
207 mov ASI_P, %l7
208 rdpr %canrestore, %g3
209
210 rdpr %wstate, %g2
211 wrpr %g0, 0, %canrestore
212 sll %g2, 3, %g2
213 mov PRIMARY_CONTEXT, %l4
214 wrpr %g3, 0, %otherwin
215 wrpr %g2, 0, %wstate
David S. Miller0835ae02005-10-04 15:23:20 -0700[diff] [blame]216 sethi %hi(sparc64_kern_pri_context), %g2
217 ldx [%g2 + %lo(sparc64_kern_pri_context)], %g3
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]218 stxa %g3, [%l4] ASI_DMMU
David S. Miller4da808c2006-01-31 18:33:00 -0800[diff] [blame^]219 sethi %hi(KERNBASE), %l4
220 flush %l4
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]221
222 mov ASI_AIUS, %l7
2232: mov %g4, %l4
224 mov %g5, %l5
225 add %g7, 0x4, %l2
226 wrpr %g0, ETRAP_PSTATE1, %pstate
227 stx %g1, [%sp + PTREGS_OFF + PT_V9_G1]
228 stx %g2, [%sp + PTREGS_OFF + PT_V9_G2]
229 sllx %l7, 24, %l7
230
231 stx %g3, [%sp + PTREGS_OFF + PT_V9_G3]
232 rdpr %cwp, %l0
233 stx %g4, [%sp + PTREGS_OFF + PT_V9_G4]
234 stx %g5, [%sp + PTREGS_OFF + PT_V9_G5]
235 stx %g6, [%sp + PTREGS_OFF + PT_V9_G6]
236 stx %g7, [%sp + PTREGS_OFF + PT_V9_G7]
237 or %l7, %l0, %l7
238 sethi %hi(TSTATE_RMO | TSTATE_PEF), %l0
239
240 or %l7, %l0, %l7
241 wrpr %l2, %tnpc
242 wrpr %l7, (TSTATE_PRIV | TSTATE_IE), %tstate
243 stx %i0, [%sp + PTREGS_OFF + PT_V9_I0]
244 stx %i1, [%sp + PTREGS_OFF + PT_V9_I1]
245 stx %i2, [%sp + PTREGS_OFF + PT_V9_I2]
246 stx %i3, [%sp + PTREGS_OFF + PT_V9_I3]
247 stx %i4, [%sp + PTREGS_OFF + PT_V9_I4]
248
249 stx %i5, [%sp + PTREGS_OFF + PT_V9_I5]
250 stx %i6, [%sp + PTREGS_OFF + PT_V9_I6]
251 mov %l6, %g6
252 stx %i7, [%sp + PTREGS_OFF + PT_V9_I7]
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]253 LOAD_PER_CPU_BASE(%g4, %g3)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]254 ldx [%g6 + TI_TASK], %g4
255 done
256
257#undef TASK_REGOFF
258#undef ETRAP_PSTATE1