blob: 966858587e256dc4bbf0c2a74de52dad3961940e [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatre01f81622009-01-08 10:20:02 -08003 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
Winkler, Tomas759ef892008-12-09 11:28:58 -080022 * Intel Linux Wireless <ilw@linux.intel.com>
Zhu Yib481de92007-09-25 17:54:57 -070023 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
Zhu Yib481de92007-09-25 17:54:57 -070029#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/dma-mapping.h>
32#include <linux/delay.h>
33#include <linux/skbuff.h>
34#include <linux/netdevice.h>
35#include <linux/wireless.h>
36#include <net/mac80211.h>
Zhu Yib481de92007-09-25 17:54:57 -070037#include <linux/etherdevice.h>
Zhu Yi12342c42007-12-20 11:27:32 +080038#include <asm/unaligned.h>
Zhu Yib481de92007-09-25 17:54:57 -070039
Assaf Krauss6bc913b2008-03-11 16:17:18 -070040#include "iwl-eeprom.h"
Tomas Winkler3e0d4cb2008-04-24 11:55:38 -070041#include "iwl-dev.h"
Tomas Winklerfee12472008-04-03 16:05:21 -070042#include "iwl-core.h"
Tomas Winkler3395f6e2008-03-25 16:33:37 -070043#include "iwl-io.h"
Zhu Yib481de92007-09-25 17:54:57 -070044#include "iwl-helpers.h"
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -070045#include "iwl-calib.h"
Tomas Winkler5083e562008-05-29 16:35:15 +080046#include "iwl-sta.h"
Johannes Berge932a602009-10-02 13:44:03 -070047#include "iwl-agn-led.h"
Zhu Yib481de92007-09-25 17:54:57 -070048
Tomas Winkler630fe9b2008-06-12 09:47:08 +080049static int iwl4965_send_tx_power(struct iwl_priv *priv);
Reinette Chatre3d816c72009-08-07 15:41:37 -070050static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
Tomas Winkler630fe9b2008-06-12 09:47:08 +080051
Reinette Chatrea0987a82008-12-02 12:14:06 -080052/* Highest firmware API version supported */
53#define IWL4965_UCODE_API_MAX 2
54
55/* Lowest firmware API version supported */
56#define IWL4965_UCODE_API_MIN 2
57
58#define IWL4965_FW_PRE "iwlwifi-4965-"
59#define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
60#define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
Tomas Winklerd16dc482008-07-11 11:53:38 +080061
62
Assaf Krauss1ea87392008-03-18 14:57:50 -070063/* module parameters */
64static struct iwl_mod_params iwl4965_mod_params = {
Emmanuel Grumbach038669e2008-04-23 17:15:04 -070065 .num_of_queues = IWL49_NUM_QUEUES,
Tomas Winkler9f17b312008-07-11 11:53:35 +080066 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
Assaf Krauss1ea87392008-03-18 14:57:50 -070067 .amsdu_size_8K = 1,
Ester Kummer3a1081e2008-05-06 11:05:14 +080068 .restart_fw = 1,
Assaf Krauss1ea87392008-03-18 14:57:50 -070069 /* the rest are 0 by default */
70};
71
Tomas Winkler57aab752008-04-14 21:16:03 -070072/* check contents of special bootstrap uCode SRAM */
73static int iwl4965_verify_bsm(struct iwl_priv *priv)
74{
75 __le32 *image = priv->ucode_boot.v_addr;
76 u32 len = priv->ucode_boot.len;
77 u32 reg;
78 u32 val;
79
Tomas Winklere1623442009-01-27 14:27:56 -080080 IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
Tomas Winkler57aab752008-04-14 21:16:03 -070081
82 /* verify BSM SRAM contents */
83 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
84 for (reg = BSM_SRAM_LOWER_BOUND;
85 reg < BSM_SRAM_LOWER_BOUND + len;
86 reg += sizeof(u32), image++) {
87 val = iwl_read_prph(priv, reg);
88 if (val != le32_to_cpu(*image)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +080089 IWL_ERR(priv, "BSM uCode verification failed at "
Tomas Winkler57aab752008-04-14 21:16:03 -070090 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
91 BSM_SRAM_LOWER_BOUND,
92 reg - BSM_SRAM_LOWER_BOUND, len,
93 val, le32_to_cpu(*image));
94 return -EIO;
95 }
96 }
97
Tomas Winklere1623442009-01-27 14:27:56 -080098 IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
Tomas Winkler57aab752008-04-14 21:16:03 -070099
100 return 0;
101}
102
103/**
104 * iwl4965_load_bsm - Load bootstrap instructions
105 *
106 * BSM operation:
107 *
108 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
109 * in special SRAM that does not power down during RFKILL. When powering back
110 * up after power-saving sleeps (or during initial uCode load), the BSM loads
111 * the bootstrap program into the on-board processor, and starts it.
112 *
113 * The bootstrap program loads (via DMA) instructions and data for a new
114 * program from host DRAM locations indicated by the host driver in the
115 * BSM_DRAM_* registers. Once the new program is loaded, it starts
116 * automatically.
117 *
118 * When initializing the NIC, the host driver points the BSM to the
119 * "initialize" uCode image. This uCode sets up some internal data, then
120 * notifies host via "initialize alive" that it is complete.
121 *
122 * The host then replaces the BSM_DRAM_* pointer values to point to the
123 * normal runtime uCode instructions and a backup uCode data cache buffer
124 * (filled initially with starting data values for the on-board processor),
125 * then triggers the "initialize" uCode to load and launch the runtime uCode,
126 * which begins normal operation.
127 *
128 * When doing a power-save shutdown, runtime uCode saves data SRAM into
129 * the backup data cache in DRAM before SRAM is powered down.
130 *
131 * When powering back up, the BSM loads the bootstrap program. This reloads
132 * the runtime uCode instructions and the backup data cache into SRAM,
133 * and re-launches the runtime uCode from where it left off.
134 */
135static int iwl4965_load_bsm(struct iwl_priv *priv)
136{
137 __le32 *image = priv->ucode_boot.v_addr;
138 u32 len = priv->ucode_boot.len;
139 dma_addr_t pinst;
140 dma_addr_t pdata;
141 u32 inst_len;
142 u32 data_len;
143 int i;
144 u32 done;
145 u32 reg_offset;
146 int ret;
147
Tomas Winklere1623442009-01-27 14:27:56 -0800148 IWL_DEBUG_INFO(priv, "Begin load bsm\n");
Tomas Winkler57aab752008-04-14 21:16:03 -0700149
Reinette Chatrec03ea162009-08-07 15:41:44 -0700150 priv->ucode_type = UCODE_RT;
Ron Rindjunskyfe9b6b72008-05-29 16:35:06 +0800151
Tomas Winkler57aab752008-04-14 21:16:03 -0700152 /* make sure bootstrap program is no larger than BSM's SRAM size */
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800153 if (len > IWL49_MAX_BSM_SIZE)
Tomas Winkler57aab752008-04-14 21:16:03 -0700154 return -EINVAL;
155
156 /* Tell bootstrap uCode where to find the "Initialize" uCode
157 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
Tomas Winkler2d878892008-05-29 16:34:51 +0800158 * NOTE: iwl_init_alive_start() will replace these values,
Tomas Winkler57aab752008-04-14 21:16:03 -0700159 * after the "initialize" uCode has run, to point to
Tomas Winkler2d878892008-05-29 16:34:51 +0800160 * runtime/protocol instructions and backup data cache.
161 */
Tomas Winkler57aab752008-04-14 21:16:03 -0700162 pinst = priv->ucode_init.p_addr >> 4;
163 pdata = priv->ucode_init_data.p_addr >> 4;
164 inst_len = priv->ucode_init.len;
165 data_len = priv->ucode_init_data.len;
166
Tomas Winkler57aab752008-04-14 21:16:03 -0700167 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
168 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
169 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
170 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
171
172 /* Fill BSM memory with bootstrap instructions */
173 for (reg_offset = BSM_SRAM_LOWER_BOUND;
174 reg_offset < BSM_SRAM_LOWER_BOUND + len;
175 reg_offset += sizeof(u32), image++)
176 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
177
178 ret = iwl4965_verify_bsm(priv);
Mohamed Abbasa8b50a02009-05-22 11:01:47 -0700179 if (ret)
Tomas Winkler57aab752008-04-14 21:16:03 -0700180 return ret;
Tomas Winkler57aab752008-04-14 21:16:03 -0700181
182 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
183 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800184 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
Tomas Winkler57aab752008-04-14 21:16:03 -0700185 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
186
187 /* Load bootstrap code into instruction SRAM now,
188 * to prepare to load "initialize" uCode */
189 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
190
191 /* Wait for load of bootstrap uCode to finish */
192 for (i = 0; i < 100; i++) {
193 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
194 if (!(done & BSM_WR_CTRL_REG_BIT_START))
195 break;
196 udelay(10);
197 }
198 if (i < 100)
Tomas Winklere1623442009-01-27 14:27:56 -0800199 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
Tomas Winkler57aab752008-04-14 21:16:03 -0700200 else {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800201 IWL_ERR(priv, "BSM write did not complete!\n");
Tomas Winkler57aab752008-04-14 21:16:03 -0700202 return -EIO;
203 }
204
205 /* Enable future boot loads whenever power management unit triggers it
206 * (e.g. when powering back up after power-save shutdown) */
207 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
208
Tomas Winkler57aab752008-04-14 21:16:03 -0700209
210 return 0;
211}
212
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800213/**
214 * iwl4965_set_ucode_ptrs - Set uCode address location
215 *
216 * Tell initialization uCode where to find runtime uCode.
217 *
218 * BSM registers initially contain pointers to initialization uCode.
219 * We need to replace them to load runtime uCode inst and data,
220 * and to save runtime data when powering down.
221 */
222static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
223{
224 dma_addr_t pinst;
225 dma_addr_t pdata;
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800226 int ret = 0;
227
228 /* bits 35:4 for 4965 */
229 pinst = priv->ucode_code.p_addr >> 4;
230 pdata = priv->ucode_data_backup.p_addr >> 4;
231
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800232 /* Tell bootstrap uCode where to find image to load */
233 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
234 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
235 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
236 priv->ucode_data.len);
237
Tomas Winklera96a27f2008-10-23 23:48:56 -0700238 /* Inst byte count must be last to set up, bit 31 signals uCode
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800239 * that all new ptr/size info is in place */
240 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
241 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
Tomas Winklere1623442009-01-27 14:27:56 -0800242 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800243
244 return ret;
245}
246
247/**
248 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
249 *
250 * Called after REPLY_ALIVE notification received from "initialize" uCode.
251 *
252 * The 4965 "initialize" ALIVE reply contains calibration data for:
253 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
254 * (3945 does not contain this data).
255 *
256 * Tell "initialize" uCode to go ahead and load the runtime uCode.
257*/
258static void iwl4965_init_alive_start(struct iwl_priv *priv)
259{
260 /* Check alive response for "valid" sign from uCode */
261 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
262 /* We had an error bringing up the hardware, so take it
263 * all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800264 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800265 goto restart;
266 }
267
268 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
269 * This is a paranoid check, because we would not have gotten the
270 * "initialize" alive if code weren't properly loaded. */
271 if (iwl_verify_ucode(priv)) {
272 /* Runtime instruction load was bad;
273 * take it all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800274 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800275 goto restart;
276 }
277
278 /* Calculate temperature */
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +0800279 priv->temperature = iwl4965_hw_get_temperature(priv);
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800280
281 /* Send pointers to protocol/runtime uCode image ... init code will
282 * load and launch runtime uCode, which will send us another "Alive"
283 * notification. */
Tomas Winklere1623442009-01-27 14:27:56 -0800284 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800285 if (iwl4965_set_ucode_ptrs(priv)) {
286 /* Runtime instruction load won't happen;
287 * take it all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800288 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800289 goto restart;
290 }
291 return;
292
293restart:
294 queue_work(priv->workqueue, &priv->restart);
295}
296
Wey-Yi Guy7aafef12009-08-07 15:41:38 -0700297static bool is_ht40_channel(__le32 rxon_flags)
Zhu Yib481de92007-09-25 17:54:57 -0700298{
Wey-Yi Guya2b0f022009-05-22 11:01:49 -0700299 int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
300 >> RXON_FLG_CHANNEL_MODE_POS;
301 return ((chan_mod == CHANNEL_MODE_PURE_40) ||
302 (chan_mod == CHANNEL_MODE_MIXED));
Zhu Yib481de92007-09-25 17:54:57 -0700303}
304
Tomas Winkler8614f362008-04-23 17:14:55 -0700305/*
306 * EEPROM handlers
307 */
Tomas Winkler0ef2ca62008-10-23 23:48:51 -0700308static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
Tomas Winkler8614f362008-04-23 17:14:55 -0700309{
Tomas Winkler0ef2ca62008-10-23 23:48:51 -0700310 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
Tomas Winkler8614f362008-04-23 17:14:55 -0700311}
Zhu Yib481de92007-09-25 17:54:57 -0700312
Tomas Winklerda1bc452008-05-29 16:35:00 +0800313/*
Tomas Winklera96a27f2008-10-23 23:48:56 -0700314 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
Tomas Winklerda1bc452008-05-29 16:35:00 +0800315 * must be called under priv->lock and mac access
316 */
317static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
Zhu Yib481de92007-09-25 17:54:57 -0700318{
Tomas Winklerda1bc452008-05-29 16:35:00 +0800319 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
Zhu Yib481de92007-09-25 17:54:57 -0700320}
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800321
Tomas Winkler91238712008-04-23 17:14:53 -0700322static int iwl4965_apm_init(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700323{
Tomas Winkler91238712008-04-23 17:14:53 -0700324 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700325
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700326 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
Tomas Winkler91238712008-04-23 17:14:53 -0700327 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
Zhu Yib481de92007-09-25 17:54:57 -0700328
Tomas Winkler8f061892008-05-29 16:34:56 +0800329 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
330 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
331 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
332
Tomas Winkler91238712008-04-23 17:14:53 -0700333 /* set "initialization complete" bit to move adapter
334 * D0U* --> D0A* state */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700335 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winkler91238712008-04-23 17:14:53 -0700336
337 /* wait for clock stabilization */
Abhijeet Kolekar1739d332009-10-02 13:44:05 -0700338 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
339 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
Zhu, Yi73d7b5a2008-12-05 07:58:40 -0800340 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
Tomas Winkler91238712008-04-23 17:14:53 -0700341 if (ret < 0) {
Tomas Winklere1623442009-01-27 14:27:56 -0800342 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
Tomas Winkler91238712008-04-23 17:14:53 -0700343 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700344 }
345
Tomas Winkler91238712008-04-23 17:14:53 -0700346 /* enable DMA */
Tomas Winkler8f061892008-05-29 16:34:56 +0800347 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
348 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700349
350 udelay(20);
351
Tomas Winkler8f061892008-05-29 16:34:56 +0800352 /* disable L1-Active */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700353 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
Tomas Winkler91238712008-04-23 17:14:53 -0700354 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700355
Tomas Winkler91238712008-04-23 17:14:53 -0700356out:
Tomas Winkler91238712008-04-23 17:14:53 -0700357 return ret;
358}
359
Tomas Winkler694cc562008-04-24 11:55:22 -0700360
361static void iwl4965_nic_config(struct iwl_priv *priv)
362{
363 unsigned long flags;
Tomas Winkler694cc562008-04-24 11:55:22 -0700364 u16 radio_cfg;
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800365 u16 lctl;
Tomas Winkler694cc562008-04-24 11:55:22 -0700366
367 spin_lock_irqsave(&priv->lock, flags);
368
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800369 lctl = iwl_pcie_link_ctl(priv);
Tomas Winkler694cc562008-04-24 11:55:22 -0700370
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800371 /* HW bug W/A - negligible power consumption */
372 /* L1-ASPM is enabled by BIOS */
373 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
374 /* L1-ASPM enabled: disable L0S */
Tomas Winkler8f061892008-05-29 16:34:56 +0800375 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
376 else
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800377 /* L1-ASPM disabled: enable L0S */
Tomas Winkler8f061892008-05-29 16:34:56 +0800378 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
Tomas Winkler694cc562008-04-24 11:55:22 -0700379
380 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
381
382 /* write radio config values to register */
383 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
384 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
385 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
386 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
387 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
388
389 /* set CSR_HW_CONFIG_REG for uCode use */
390 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
391 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
392 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
393
394 priv->calib_info = (struct iwl_eeprom_calib_info *)
395 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
396
397 spin_unlock_irqrestore(&priv->lock, flags);
398}
399
Zhu Yib481de92007-09-25 17:54:57 -0700400/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
401 * Called after every association, but this runs only once!
402 * ... once chain noise is calibrated the first time, it's good forever. */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700403static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700404{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700405 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
Zhu Yib481de92007-09-25 17:54:57 -0700406
Tomas Winkler3109ece2008-03-28 16:33:35 -0700407 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
Tomas Winklerf69f42a2008-10-23 23:48:52 -0700408 struct iwl_calib_diff_gain_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700409
410 memset(&cmd, 0, sizeof(cmd));
Tomas Winkler0d950d82008-11-25 13:36:01 -0800411 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
Zhu Yib481de92007-09-25 17:54:57 -0700412 cmd.diff_gain_a = 0;
413 cmd.diff_gain_b = 0;
414 cmd.diff_gain_c = 0;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700415 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
416 sizeof(cmd), &cmd))
Winkler, Tomas15b16872008-12-19 10:37:33 +0800417 IWL_ERR(priv,
418 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
Zhu Yib481de92007-09-25 17:54:57 -0700419 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
Tomas Winklere1623442009-01-27 14:27:56 -0800420 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
Zhu Yib481de92007-09-25 17:54:57 -0700421 }
Zhu Yib481de92007-09-25 17:54:57 -0700422}
423
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700424static void iwl4965_gain_computation(struct iwl_priv *priv,
425 u32 *average_noise,
426 u16 min_average_noise_antenna_i,
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -0700427 u32 min_average_noise,
428 u8 default_chain)
Zhu Yib481de92007-09-25 17:54:57 -0700429{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700430 int i, ret;
431 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
Zhu Yib481de92007-09-25 17:54:57 -0700432
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700433 data->delta_gain_code[min_average_noise_antenna_i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700434
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -0700435 for (i = default_chain; i < NUM_RX_CHAINS; i++) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700436 s32 delta_g = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700437
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700438 if (!(data->disconn_array[i]) &&
439 (data->delta_gain_code[i] ==
Zhu Yib481de92007-09-25 17:54:57 -0700440 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700441 delta_g = average_noise[i] - min_average_noise;
442 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
443 data->delta_gain_code[i] =
444 min(data->delta_gain_code[i],
445 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
Zhu Yib481de92007-09-25 17:54:57 -0700446
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700447 data->delta_gain_code[i] =
448 (data->delta_gain_code[i] | (1 << 2));
449 } else {
450 data->delta_gain_code[i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700451 }
Zhu Yib481de92007-09-25 17:54:57 -0700452 }
Tomas Winklere1623442009-01-27 14:27:56 -0800453 IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700454 data->delta_gain_code[0],
455 data->delta_gain_code[1],
456 data->delta_gain_code[2]);
Zhu Yib481de92007-09-25 17:54:57 -0700457
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700458 /* Differential gain gets sent to uCode only once */
459 if (!data->radio_write) {
Tomas Winklerf69f42a2008-10-23 23:48:52 -0700460 struct iwl_calib_diff_gain_cmd cmd;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700461 data->radio_write = 1;
Zhu Yib481de92007-09-25 17:54:57 -0700462
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700463 memset(&cmd, 0, sizeof(cmd));
Tomas Winkler0d950d82008-11-25 13:36:01 -0800464 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700465 cmd.diff_gain_a = data->delta_gain_code[0];
466 cmd.diff_gain_b = data->delta_gain_code[1];
467 cmd.diff_gain_c = data->delta_gain_code[2];
468 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
469 sizeof(cmd), &cmd);
470 if (ret)
Tomas Winklere1623442009-01-27 14:27:56 -0800471 IWL_DEBUG_CALIB(priv, "fail sending cmd "
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700472 "REPLY_PHY_CALIBRATION_CMD \n");
Zhu Yib481de92007-09-25 17:54:57 -0700473
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700474 /* TODO we might want recalculate
475 * rx_chain in rxon cmd */
476
477 /* Mark so we run this algo only once! */
478 data->state = IWL_CHAIN_NOISE_CALIBRATED;
Zhu Yib481de92007-09-25 17:54:57 -0700479 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700480 data->chain_noise_a = 0;
481 data->chain_noise_b = 0;
482 data->chain_noise_c = 0;
483 data->chain_signal_a = 0;
484 data->chain_signal_b = 0;
485 data->chain_signal_c = 0;
486 data->beacon_count = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700487}
488
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800489static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
490 __le32 *tx_flags)
491{
Johannes Berge6a98542008-10-21 12:40:02 +0200492 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800493 *tx_flags |= TX_CMD_FLG_RTS_MSK;
494 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
Johannes Berge6a98542008-10-21 12:40:02 +0200495 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800496 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
497 *tx_flags |= TX_CMD_FLG_CTS_MSK;
498 }
499}
500
Zhu Yib481de92007-09-25 17:54:57 -0700501static void iwl4965_bg_txpower_work(struct work_struct *work)
502{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700503 struct iwl_priv *priv = container_of(work, struct iwl_priv,
Zhu Yib481de92007-09-25 17:54:57 -0700504 txpower_work);
505
506 /* If a scan happened to start before we got here
507 * then just return; the statistics notification will
508 * kick off another scheduled work to compensate for
509 * any temperature delta we missed here. */
510 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
511 test_bit(STATUS_SCANNING, &priv->status))
512 return;
513
514 mutex_lock(&priv->mutex);
515
Tomas Winklera96a27f2008-10-23 23:48:56 -0700516 /* Regardless of if we are associated, we must reconfigure the
Zhu Yib481de92007-09-25 17:54:57 -0700517 * TX power since frames can be sent on non-radar channels while
518 * not associated */
Tomas Winkler630fe9b2008-06-12 09:47:08 +0800519 iwl4965_send_tx_power(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700520
521 /* Update last_temperature to keep is_calib_needed from running
522 * when it isn't needed... */
523 priv->last_temperature = priv->temperature;
524
525 mutex_unlock(&priv->mutex);
526}
527
528/*
529 * Acquire priv->lock before calling this function !
530 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700531static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
Zhu Yib481de92007-09-25 17:54:57 -0700532{
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700533 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
Zhu Yib481de92007-09-25 17:54:57 -0700534 (index & 0xff) | (txq_id << 8));
Tomas Winkler12a81f62008-04-03 16:05:20 -0700535 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
Zhu Yib481de92007-09-25 17:54:57 -0700536}
537
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800538/**
539 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
540 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
541 * @scd_retry: (1) Indicates queue will be used in aggregation mode
542 *
543 * NOTE: Acquire priv->lock before calling this function !
Zhu Yib481de92007-09-25 17:54:57 -0700544 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700545static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +0800546 struct iwl_tx_queue *txq,
Zhu Yib481de92007-09-25 17:54:57 -0700547 int tx_fifo_id, int scd_retry)
548{
549 int txq_id = txq->q.id;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800550
551 /* Find out whether to activate Tx queue */
Abhijeet Kolekarc3056062008-11-12 13:14:08 -0800552 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
Zhu Yib481de92007-09-25 17:54:57 -0700553
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800554 /* Set up and activate */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700555 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700556 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
557 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
558 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
559 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
560 IWL49_SCD_QUEUE_STTS_REG_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700561
562 txq->sched_retry = scd_retry;
563
Tomas Winklere1623442009-01-27 14:27:56 -0800564 IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800565 active ? "Activate" : "Deactivate",
Zhu Yib481de92007-09-25 17:54:57 -0700566 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
567}
568
569static const u16 default_queue_to_tx_fifo[] = {
570 IWL_TX_FIFO_AC3,
571 IWL_TX_FIFO_AC2,
572 IWL_TX_FIFO_AC1,
573 IWL_TX_FIFO_AC0,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700574 IWL49_CMD_FIFO_NUM,
Zhu Yib481de92007-09-25 17:54:57 -0700575 IWL_TX_FIFO_HCCA_1,
576 IWL_TX_FIFO_HCCA_2
577};
578
Emmanuel Grumbachbe1f3ab62008-06-12 09:47:18 +0800579static int iwl4965_alive_notify(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700580{
581 u32 a;
Zhu Yib481de92007-09-25 17:54:57 -0700582 unsigned long flags;
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800583 int i, chan;
Winkler, Tomas40fc95d2008-11-19 15:32:27 -0800584 u32 reg_val;
Zhu Yib481de92007-09-25 17:54:57 -0700585
586 spin_lock_irqsave(&priv->lock, flags);
587
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800588 /* Clear 4965's internal Tx Scheduler data base */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700589 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700590 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
591 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700592 iwl_write_targ_mem(priv, a, 0);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700593 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700594 iwl_write_targ_mem(priv, a, 0);
Huaxu Wan39d5e0c2009-10-02 13:44:00 -0700595 for (; a < priv->scd_base_addr +
596 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700597 iwl_write_targ_mem(priv, a, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700598
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800599 /* Tel 4965 where to find Tx byte count tables */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700600 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800601 priv->scd_bc_tbls.dma >> 10);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800602
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800603 /* Enable DMA channel */
604 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
605 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
606 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
607 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
608
Winkler, Tomas40fc95d2008-11-19 15:32:27 -0800609 /* Update FH chicken bits */
610 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
611 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
612 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
613
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800614 /* Disable chain mode for all queues */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700615 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700616
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800617 /* Initialize each Tx queue (including the command queue) */
Tomas Winkler5425e492008-04-15 16:01:38 -0700618 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800619
620 /* TFD circular buffer read/write indexes */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700621 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700622 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800623
624 /* Max Tx Window size for Scheduler-ACK mode */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700625 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700626 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
627 (SCD_WIN_SIZE <<
628 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
629 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800630
631 /* Frame limit */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700632 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700633 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
634 sizeof(u32),
635 (SCD_FRAME_LIMIT <<
636 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
637 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700638
639 }
Tomas Winkler12a81f62008-04-03 16:05:20 -0700640 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
Tomas Winkler5425e492008-04-15 16:01:38 -0700641 (1 << priv->hw_params.max_txq_num) - 1);
Zhu Yib481de92007-09-25 17:54:57 -0700642
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800643 /* Activate all Tx DMA/FIFO channels */
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800644 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
Zhu Yib481de92007-09-25 17:54:57 -0700645
646 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800647
648 /* Map each Tx/cmd queue to its corresponding fifo */
Zhu Yib481de92007-09-25 17:54:57 -0700649 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
650 int ac = default_queue_to_tx_fifo[i];
Ron Rindjunsky36470742008-05-15 13:54:10 +0800651 iwl_txq_ctx_activate(priv, i);
Zhu Yib481de92007-09-25 17:54:57 -0700652 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
653 }
654
Zhu Yib481de92007-09-25 17:54:57 -0700655 spin_unlock_irqrestore(&priv->lock, flags);
656
Mohamed Abbasa8b50a02009-05-22 11:01:47 -0700657 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700658}
659
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700660static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
661 .min_nrg_cck = 97,
Wey-Yi Guyfe6efb42009-06-12 13:22:54 -0700662 .max_nrg_cck = 0, /* not used, set to 0 */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700663
664 .auto_corr_min_ofdm = 85,
665 .auto_corr_min_ofdm_mrc = 170,
666 .auto_corr_min_ofdm_x1 = 105,
667 .auto_corr_min_ofdm_mrc_x1 = 220,
668
669 .auto_corr_max_ofdm = 120,
670 .auto_corr_max_ofdm_mrc = 210,
671 .auto_corr_max_ofdm_x1 = 140,
672 .auto_corr_max_ofdm_mrc_x1 = 270,
673
674 .auto_corr_min_cck = 125,
675 .auto_corr_max_cck = 200,
676 .auto_corr_min_cck_mrc = 200,
677 .auto_corr_max_cck_mrc = 400,
678
679 .nrg_th_cck = 100,
680 .nrg_th_ofdm = 100,
Wey-Yi Guy55036d62009-10-09 13:20:24 -0700681
682 .barker_corr_th_min = 190,
683 .barker_corr_th_min_mrc = 390,
684 .nrg_th_cca = 62,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700685};
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700686
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700687static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
688{
689 /* want Kelvin */
Wey-Yi Guy672639d2009-07-24 11:13:01 -0700690 priv->hw_params.ct_kill_threshold =
691 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700692}
693
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800694/**
Tomas Winkler5425e492008-04-15 16:01:38 -0700695 * iwl4965_hw_set_hw_params
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800696 *
697 * Called when initializing driver
698 */
Emmanuel Grumbachbe1f3ab62008-06-12 09:47:18 +0800699static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700700{
Assaf Krauss316c30d2008-03-14 10:38:46 -0700701
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700702 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
Assaf Krauss1ea87392008-03-18 14:57:50 -0700703 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800704 IWL_ERR(priv,
705 "invalid queues_num, should be between %d and %d\n",
706 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
Tomas Winkler059ff822008-04-14 21:16:14 -0700707 return -EINVAL;
Assaf Krauss316c30d2008-03-14 10:38:46 -0700708 }
709
Tomas Winkler5425e492008-04-15 16:01:38 -0700710 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
Zhu Yif3f911d2008-12-02 12:14:04 -0800711 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800712 priv->hw_params.scd_bc_tbls_size =
713 IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
Samuel Ortiza8e74e22009-01-23 13:45:14 -0800714 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
Tomas Winkler5425e492008-04-15 16:01:38 -0700715 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
716 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700717 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
718 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
719 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -0700720 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700721
Winkler, Tomas141c43a2009-01-08 10:19:53 -0800722 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
723
Tomas Winklerec35cf22008-04-15 16:01:39 -0700724 priv->hw_params.tx_chains_num = 2;
725 priv->hw_params.rx_chains_num = 2;
Guy Cohenfde0db32008-04-21 15:42:01 -0700726 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
727 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700728 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
729 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700730
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700731 priv->hw_params.sens = &iwl4965_sensitivity;
Tomas Winkler3e82a822008-02-13 11:32:31 -0800732
Tomas Winkler059ff822008-04-14 21:16:14 -0700733 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700734}
735
Zhu Yib481de92007-09-25 17:54:57 -0700736static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
737{
738 s32 sign = 1;
739
740 if (num < 0) {
741 sign = -sign;
742 num = -num;
743 }
744 if (denom < 0) {
745 sign = -sign;
746 denom = -denom;
747 }
748 *res = 1;
749 *res = ((num * 2 + denom) / (denom * 2)) * sign;
750
751 return 1;
752}
753
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800754/**
755 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
756 *
757 * Determines power supply voltage compensation for txpower calculations.
758 * Returns number of 1/2-dB steps to subtract from gain table index,
759 * to compensate for difference between power supply voltage during
760 * factory measurements, vs. current power supply voltage.
761 *
762 * Voltage indication is higher for lower voltage.
763 * Lower voltage requires more gain (lower gain table index).
764 */
Zhu Yib481de92007-09-25 17:54:57 -0700765static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
766 s32 current_voltage)
767{
768 s32 comp = 0;
769
770 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
771 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
772 return 0;
773
774 iwl4965_math_div_round(current_voltage - eeprom_voltage,
775 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
776
777 if (current_voltage > eeprom_voltage)
778 comp *= 2;
779 if ((comp < -2) || (comp > 2))
780 comp = 0;
781
782 return comp;
783}
784
Zhu Yib481de92007-09-25 17:54:57 -0700785static s32 iwl4965_get_tx_atten_grp(u16 channel)
786{
787 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
788 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
789 return CALIB_CH_GROUP_5;
790
791 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
792 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
793 return CALIB_CH_GROUP_1;
794
795 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
796 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
797 return CALIB_CH_GROUP_2;
798
799 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
800 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
801 return CALIB_CH_GROUP_3;
802
803 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
804 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
805 return CALIB_CH_GROUP_4;
806
Zhu Yib481de92007-09-25 17:54:57 -0700807 return -1;
808}
809
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700810static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700811{
812 s32 b = -1;
813
814 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -0700815 if (priv->calib_info->band_info[b].ch_from == 0)
Zhu Yib481de92007-09-25 17:54:57 -0700816 continue;
817
Tomas Winkler073d3f52008-04-21 15:41:52 -0700818 if ((channel >= priv->calib_info->band_info[b].ch_from)
819 && (channel <= priv->calib_info->band_info[b].ch_to))
Zhu Yib481de92007-09-25 17:54:57 -0700820 break;
821 }
822
823 return b;
824}
825
826static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
827{
828 s32 val;
829
830 if (x2 == x1)
831 return y1;
832 else {
833 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
834 return val + y2;
835 }
836}
837
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800838/**
839 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
840 *
841 * Interpolates factory measurements from the two sample channels within a
842 * sub-band, to apply to channel of interest. Interpolation is proportional to
843 * differences in channel frequencies, which is proportional to differences
844 * in channel number.
845 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700846static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
Tomas Winkler073d3f52008-04-21 15:41:52 -0700847 struct iwl_eeprom_calib_ch_info *chan_info)
Zhu Yib481de92007-09-25 17:54:57 -0700848{
849 s32 s = -1;
850 u32 c;
851 u32 m;
Tomas Winkler073d3f52008-04-21 15:41:52 -0700852 const struct iwl_eeprom_calib_measure *m1;
853 const struct iwl_eeprom_calib_measure *m2;
854 struct iwl_eeprom_calib_measure *omeas;
Zhu Yib481de92007-09-25 17:54:57 -0700855 u32 ch_i1;
856 u32 ch_i2;
857
858 s = iwl4965_get_sub_band(priv, channel);
859 if (s >= EEPROM_TX_POWER_BANDS) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800860 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
Zhu Yib481de92007-09-25 17:54:57 -0700861 return -1;
862 }
863
Tomas Winkler073d3f52008-04-21 15:41:52 -0700864 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
865 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
Zhu Yib481de92007-09-25 17:54:57 -0700866 chan_info->ch_num = (u8) channel;
867
Tomas Winklere1623442009-01-27 14:27:56 -0800868 IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700869 channel, s, ch_i1, ch_i2);
870
871 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
872 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -0700873 m1 = &(priv->calib_info->band_info[s].ch1.
Zhu Yib481de92007-09-25 17:54:57 -0700874 measurements[c][m]);
Tomas Winkler073d3f52008-04-21 15:41:52 -0700875 m2 = &(priv->calib_info->band_info[s].ch2.
Zhu Yib481de92007-09-25 17:54:57 -0700876 measurements[c][m]);
877 omeas = &(chan_info->measurements[c][m]);
878
879 omeas->actual_pow =
880 (u8) iwl4965_interpolate_value(channel, ch_i1,
881 m1->actual_pow,
882 ch_i2,
883 m2->actual_pow);
884 omeas->gain_idx =
885 (u8) iwl4965_interpolate_value(channel, ch_i1,
886 m1->gain_idx, ch_i2,
887 m2->gain_idx);
888 omeas->temperature =
889 (u8) iwl4965_interpolate_value(channel, ch_i1,
890 m1->temperature,
891 ch_i2,
892 m2->temperature);
893 omeas->pa_det =
894 (s8) iwl4965_interpolate_value(channel, ch_i1,
895 m1->pa_det, ch_i2,
896 m2->pa_det);
897
Tomas Winklere1623442009-01-27 14:27:56 -0800898 IWL_DEBUG_TXPOWER(priv,
899 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
900 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
901 IWL_DEBUG_TXPOWER(priv,
902 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
903 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
904 IWL_DEBUG_TXPOWER(priv,
905 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
906 m1->pa_det, m2->pa_det, omeas->pa_det);
907 IWL_DEBUG_TXPOWER(priv,
908 "chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
909 m1->temperature, m2->temperature,
910 omeas->temperature);
Zhu Yib481de92007-09-25 17:54:57 -0700911 }
912 }
913
914 return 0;
915}
916
917/* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
918 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
919static s32 back_off_table[] = {
920 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
921 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
922 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
923 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
924 10 /* CCK */
925};
926
927/* Thermal compensation values for txpower for various frequency ranges ...
928 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800929static struct iwl4965_txpower_comp_entry {
Zhu Yib481de92007-09-25 17:54:57 -0700930 s32 degrees_per_05db_a;
931 s32 degrees_per_05db_a_denom;
932} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
933 {9, 2}, /* group 0 5.2, ch 34-43 */
934 {4, 1}, /* group 1 5.2, ch 44-70 */
935 {4, 1}, /* group 2 5.2, ch 71-124 */
936 {4, 1}, /* group 3 5.2, ch 125-200 */
937 {3, 1} /* group 4 2.4, ch all */
938};
939
940static s32 get_min_power_index(s32 rate_power_index, u32 band)
941{
942 if (!band) {
943 if ((rate_power_index & 7) <= 4)
944 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
945 }
946 return MIN_TX_GAIN_INDEX;
947}
948
949struct gain_entry {
950 u8 dsp;
951 u8 radio;
952};
953
954static const struct gain_entry gain_table[2][108] = {
955 /* 5.2GHz power gain index table */
956 {
957 {123, 0x3F}, /* highest txpower */
958 {117, 0x3F},
959 {110, 0x3F},
960 {104, 0x3F},
961 {98, 0x3F},
962 {110, 0x3E},
963 {104, 0x3E},
964 {98, 0x3E},
965 {110, 0x3D},
966 {104, 0x3D},
967 {98, 0x3D},
968 {110, 0x3C},
969 {104, 0x3C},
970 {98, 0x3C},
971 {110, 0x3B},
972 {104, 0x3B},
973 {98, 0x3B},
974 {110, 0x3A},
975 {104, 0x3A},
976 {98, 0x3A},
977 {110, 0x39},
978 {104, 0x39},
979 {98, 0x39},
980 {110, 0x38},
981 {104, 0x38},
982 {98, 0x38},
983 {110, 0x37},
984 {104, 0x37},
985 {98, 0x37},
986 {110, 0x36},
987 {104, 0x36},
988 {98, 0x36},
989 {110, 0x35},
990 {104, 0x35},
991 {98, 0x35},
992 {110, 0x34},
993 {104, 0x34},
994 {98, 0x34},
995 {110, 0x33},
996 {104, 0x33},
997 {98, 0x33},
998 {110, 0x32},
999 {104, 0x32},
1000 {98, 0x32},
1001 {110, 0x31},
1002 {104, 0x31},
1003 {98, 0x31},
1004 {110, 0x30},
1005 {104, 0x30},
1006 {98, 0x30},
1007 {110, 0x25},
1008 {104, 0x25},
1009 {98, 0x25},
1010 {110, 0x24},
1011 {104, 0x24},
1012 {98, 0x24},
1013 {110, 0x23},
1014 {104, 0x23},
1015 {98, 0x23},
1016 {110, 0x22},
1017 {104, 0x18},
1018 {98, 0x18},
1019 {110, 0x17},
1020 {104, 0x17},
1021 {98, 0x17},
1022 {110, 0x16},
1023 {104, 0x16},
1024 {98, 0x16},
1025 {110, 0x15},
1026 {104, 0x15},
1027 {98, 0x15},
1028 {110, 0x14},
1029 {104, 0x14},
1030 {98, 0x14},
1031 {110, 0x13},
1032 {104, 0x13},
1033 {98, 0x13},
1034 {110, 0x12},
1035 {104, 0x08},
1036 {98, 0x08},
1037 {110, 0x07},
1038 {104, 0x07},
1039 {98, 0x07},
1040 {110, 0x06},
1041 {104, 0x06},
1042 {98, 0x06},
1043 {110, 0x05},
1044 {104, 0x05},
1045 {98, 0x05},
1046 {110, 0x04},
1047 {104, 0x04},
1048 {98, 0x04},
1049 {110, 0x03},
1050 {104, 0x03},
1051 {98, 0x03},
1052 {110, 0x02},
1053 {104, 0x02},
1054 {98, 0x02},
1055 {110, 0x01},
1056 {104, 0x01},
1057 {98, 0x01},
1058 {110, 0x00},
1059 {104, 0x00},
1060 {98, 0x00},
1061 {93, 0x00},
1062 {88, 0x00},
1063 {83, 0x00},
1064 {78, 0x00},
1065 },
1066 /* 2.4GHz power gain index table */
1067 {
1068 {110, 0x3f}, /* highest txpower */
1069 {104, 0x3f},
1070 {98, 0x3f},
1071 {110, 0x3e},
1072 {104, 0x3e},
1073 {98, 0x3e},
1074 {110, 0x3d},
1075 {104, 0x3d},
1076 {98, 0x3d},
1077 {110, 0x3c},
1078 {104, 0x3c},
1079 {98, 0x3c},
1080 {110, 0x3b},
1081 {104, 0x3b},
1082 {98, 0x3b},
1083 {110, 0x3a},
1084 {104, 0x3a},
1085 {98, 0x3a},
1086 {110, 0x39},
1087 {104, 0x39},
1088 {98, 0x39},
1089 {110, 0x38},
1090 {104, 0x38},
1091 {98, 0x38},
1092 {110, 0x37},
1093 {104, 0x37},
1094 {98, 0x37},
1095 {110, 0x36},
1096 {104, 0x36},
1097 {98, 0x36},
1098 {110, 0x35},
1099 {104, 0x35},
1100 {98, 0x35},
1101 {110, 0x34},
1102 {104, 0x34},
1103 {98, 0x34},
1104 {110, 0x33},
1105 {104, 0x33},
1106 {98, 0x33},
1107 {110, 0x32},
1108 {104, 0x32},
1109 {98, 0x32},
1110 {110, 0x31},
1111 {104, 0x31},
1112 {98, 0x31},
1113 {110, 0x30},
1114 {104, 0x30},
1115 {98, 0x30},
1116 {110, 0x6},
1117 {104, 0x6},
1118 {98, 0x6},
1119 {110, 0x5},
1120 {104, 0x5},
1121 {98, 0x5},
1122 {110, 0x4},
1123 {104, 0x4},
1124 {98, 0x4},
1125 {110, 0x3},
1126 {104, 0x3},
1127 {98, 0x3},
1128 {110, 0x2},
1129 {104, 0x2},
1130 {98, 0x2},
1131 {110, 0x1},
1132 {104, 0x1},
1133 {98, 0x1},
1134 {110, 0x0},
1135 {104, 0x0},
1136 {98, 0x0},
1137 {97, 0},
1138 {96, 0},
1139 {95, 0},
1140 {94, 0},
1141 {93, 0},
1142 {92, 0},
1143 {91, 0},
1144 {90, 0},
1145 {89, 0},
1146 {88, 0},
1147 {87, 0},
1148 {86, 0},
1149 {85, 0},
1150 {84, 0},
1151 {83, 0},
1152 {82, 0},
1153 {81, 0},
1154 {80, 0},
1155 {79, 0},
1156 {78, 0},
1157 {77, 0},
1158 {76, 0},
1159 {75, 0},
1160 {74, 0},
1161 {73, 0},
1162 {72, 0},
1163 {71, 0},
1164 {70, 0},
1165 {69, 0},
1166 {68, 0},
1167 {67, 0},
1168 {66, 0},
1169 {65, 0},
1170 {64, 0},
1171 {63, 0},
1172 {62, 0},
1173 {61, 0},
1174 {60, 0},
1175 {59, 0},
1176 }
1177};
1178
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001179static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001180 u8 is_ht40, u8 ctrl_chan_high,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001181 struct iwl4965_tx_power_db *tx_power_tbl)
Zhu Yib481de92007-09-25 17:54:57 -07001182{
1183 u8 saturation_power;
1184 s32 target_power;
1185 s32 user_target_power;
1186 s32 power_limit;
1187 s32 current_temp;
1188 s32 reg_limit;
1189 s32 current_regulatory;
1190 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1191 int i;
1192 int c;
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001193 const struct iwl_channel_info *ch_info = NULL;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001194 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1195 const struct iwl_eeprom_calib_measure *measurement;
Zhu Yib481de92007-09-25 17:54:57 -07001196 s16 voltage;
1197 s32 init_voltage;
1198 s32 voltage_compensation;
1199 s32 degrees_per_05db_num;
1200 s32 degrees_per_05db_denom;
1201 s32 factory_temp;
1202 s32 temperature_comp[2];
1203 s32 factory_gain_index[2];
1204 s32 factory_actual_pwr[2];
1205 s32 power_index;
1206
Winkler, Tomas62ea9c52009-01-19 15:30:29 -08001207 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
Zhu Yib481de92007-09-25 17:54:57 -07001208 * are used for indexing into txpower table) */
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001209 user_target_power = 2 * priv->tx_power_user_lmt;
Zhu Yib481de92007-09-25 17:54:57 -07001210
1211 /* Get current (RXON) channel, band, width */
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001212 IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1213 is_ht40);
Zhu Yib481de92007-09-25 17:54:57 -07001214
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001215 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1216
1217 if (!is_channel_valid(ch_info))
Zhu Yib481de92007-09-25 17:54:57 -07001218 return -EINVAL;
1219
1220 /* get txatten group, used to select 1) thermal txpower adjustment
1221 * and 2) mimo txpower balance between Tx chains. */
1222 txatten_grp = iwl4965_get_tx_atten_grp(channel);
Samuel Ortiza3139c52008-12-19 10:37:09 +08001223 if (txatten_grp < 0) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001224 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
Samuel Ortiza3139c52008-12-19 10:37:09 +08001225 channel);
Zhu Yib481de92007-09-25 17:54:57 -07001226 return -EINVAL;
Samuel Ortiza3139c52008-12-19 10:37:09 +08001227 }
Zhu Yib481de92007-09-25 17:54:57 -07001228
Tomas Winklere1623442009-01-27 14:27:56 -08001229 IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001230 channel, txatten_grp);
1231
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001232 if (is_ht40) {
Zhu Yib481de92007-09-25 17:54:57 -07001233 if (ctrl_chan_high)
1234 channel -= 2;
1235 else
1236 channel += 2;
1237 }
1238
1239 /* hardware txpower limits ...
1240 * saturation (clipping distortion) txpowers are in half-dBm */
1241 if (band)
Tomas Winkler073d3f52008-04-21 15:41:52 -07001242 saturation_power = priv->calib_info->saturation_power24;
Zhu Yib481de92007-09-25 17:54:57 -07001243 else
Tomas Winkler073d3f52008-04-21 15:41:52 -07001244 saturation_power = priv->calib_info->saturation_power52;
Zhu Yib481de92007-09-25 17:54:57 -07001245
1246 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1247 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1248 if (band)
1249 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1250 else
1251 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1252 }
1253
1254 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1255 * max_power_avg values are in dBm, convert * 2 */
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001256 if (is_ht40)
1257 reg_limit = ch_info->ht40_max_power_avg * 2;
Zhu Yib481de92007-09-25 17:54:57 -07001258 else
1259 reg_limit = ch_info->max_power_avg * 2;
1260
1261 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1262 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1263 if (band)
1264 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1265 else
1266 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1267 }
1268
1269 /* Interpolate txpower calibration values for this channel,
1270 * based on factory calibration tests on spaced channels. */
1271 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1272
1273 /* calculate tx gain adjustment based on power supply voltage */
Tomas Winkler073d3f52008-04-21 15:41:52 -07001274 voltage = priv->calib_info->voltage;
Zhu Yib481de92007-09-25 17:54:57 -07001275 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1276 voltage_compensation =
1277 iwl4965_get_voltage_compensation(voltage, init_voltage);
1278
Tomas Winklere1623442009-01-27 14:27:56 -08001279 IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001280 init_voltage,
1281 voltage, voltage_compensation);
1282
1283 /* get current temperature (Celsius) */
1284 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1285 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1286 current_temp = KELVIN_TO_CELSIUS(current_temp);
1287
1288 /* select thermal txpower adjustment params, based on channel group
1289 * (same frequency group used for mimo txatten adjustment) */
1290 degrees_per_05db_num =
1291 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1292 degrees_per_05db_denom =
1293 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1294
1295 /* get per-chain txpower values from factory measurements */
1296 for (c = 0; c < 2; c++) {
1297 measurement = &ch_eeprom_info.measurements[c][1];
1298
1299 /* txgain adjustment (in half-dB steps) based on difference
1300 * between factory and current temperature */
1301 factory_temp = measurement->temperature;
1302 iwl4965_math_div_round((current_temp - factory_temp) *
1303 degrees_per_05db_denom,
1304 degrees_per_05db_num,
1305 &temperature_comp[c]);
1306
1307 factory_gain_index[c] = measurement->gain_idx;
1308 factory_actual_pwr[c] = measurement->actual_pow;
1309
Tomas Winklere1623442009-01-27 14:27:56 -08001310 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1311 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
Zhu Yib481de92007-09-25 17:54:57 -07001312 "curr tmp %d, comp %d steps\n",
1313 factory_temp, current_temp,
1314 temperature_comp[c]);
1315
Tomas Winklere1623442009-01-27 14:27:56 -08001316 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001317 factory_gain_index[c],
1318 factory_actual_pwr[c]);
1319 }
1320
1321 /* for each of 33 bit-rates (including 1 for CCK) */
1322 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1323 u8 is_mimo_rate;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001324 union iwl4965_tx_power_dual_stream tx_power;
Zhu Yib481de92007-09-25 17:54:57 -07001325
1326 /* for mimo, reduce each chain's txpower by half
1327 * (3dB, 6 steps), so total output power is regulatory
1328 * compliant. */
1329 if (i & 0x8) {
1330 current_regulatory = reg_limit -
1331 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1332 is_mimo_rate = 1;
1333 } else {
1334 current_regulatory = reg_limit;
1335 is_mimo_rate = 0;
1336 }
1337
1338 /* find txpower limit, either hardware or regulatory */
1339 power_limit = saturation_power - back_off_table[i];
1340 if (power_limit > current_regulatory)
1341 power_limit = current_regulatory;
1342
1343 /* reduce user's txpower request if necessary
1344 * for this rate on this channel */
1345 target_power = user_target_power;
1346 if (target_power > power_limit)
1347 target_power = power_limit;
1348
Tomas Winklere1623442009-01-27 14:27:56 -08001349 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001350 i, saturation_power - back_off_table[i],
1351 current_regulatory, user_target_power,
1352 target_power);
1353
1354 /* for each of 2 Tx chains (radio transmitters) */
1355 for (c = 0; c < 2; c++) {
1356 s32 atten_value;
1357
1358 if (is_mimo_rate)
1359 atten_value =
1360 (s32)le32_to_cpu(priv->card_alive_init.
1361 tx_atten[txatten_grp][c]);
1362 else
1363 atten_value = 0;
1364
1365 /* calculate index; higher index means lower txpower */
1366 power_index = (u8) (factory_gain_index[c] -
1367 (target_power -
1368 factory_actual_pwr[c]) -
1369 temperature_comp[c] -
1370 voltage_compensation +
1371 atten_value);
1372
Tomas Winklere1623442009-01-27 14:27:56 -08001373/* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001374 power_index); */
1375
1376 if (power_index < get_min_power_index(i, band))
1377 power_index = get_min_power_index(i, band);
1378
1379 /* adjust 5 GHz index to support negative indexes */
1380 if (!band)
1381 power_index += 9;
1382
1383 /* CCK, rate 32, reduce txpower for CCK */
1384 if (i == POWER_TABLE_CCK_ENTRY)
1385 power_index +=
1386 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1387
1388 /* stay within the table! */
1389 if (power_index > 107) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001390 IWL_WARN(priv, "txpower index %d > 107\n",
Zhu Yib481de92007-09-25 17:54:57 -07001391 power_index);
1392 power_index = 107;
1393 }
1394 if (power_index < 0) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001395 IWL_WARN(priv, "txpower index %d < 0\n",
Zhu Yib481de92007-09-25 17:54:57 -07001396 power_index);
1397 power_index = 0;
1398 }
1399
1400 /* fill txpower command for this rate/chain */
1401 tx_power.s.radio_tx_gain[c] =
1402 gain_table[band][power_index].radio;
1403 tx_power.s.dsp_predis_atten[c] =
1404 gain_table[band][power_index].dsp;
1405
Tomas Winklere1623442009-01-27 14:27:56 -08001406 IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
Zhu Yib481de92007-09-25 17:54:57 -07001407 "gain 0x%02x dsp %d\n",
1408 c, atten_value, power_index,
1409 tx_power.s.radio_tx_gain[c],
1410 tx_power.s.dsp_predis_atten[c]);
Tomas Winkler3ac7f142008-07-21 02:40:14 +03001411 } /* for each chain */
Zhu Yib481de92007-09-25 17:54:57 -07001412
1413 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1414
Tomas Winkler3ac7f142008-07-21 02:40:14 +03001415 } /* for each rate */
Zhu Yib481de92007-09-25 17:54:57 -07001416
1417 return 0;
1418}
1419
1420/**
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001421 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
Zhu Yib481de92007-09-25 17:54:57 -07001422 *
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001423 * Uses the active RXON for channel, band, and characteristics (ht40, high)
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001424 * The power limit is taken from priv->tx_power_user_lmt.
Zhu Yib481de92007-09-25 17:54:57 -07001425 */
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001426static int iwl4965_send_tx_power(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001427{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001428 struct iwl4965_txpowertable_cmd cmd = { 0 };
Tomas Winkler857485c2008-03-21 13:53:44 -07001429 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07001430 u8 band = 0;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001431 bool is_ht40 = false;
Zhu Yib481de92007-09-25 17:54:57 -07001432 u8 ctrl_chan_high = 0;
1433
1434 if (test_bit(STATUS_SCANNING, &priv->status)) {
1435 /* If this gets hit a lot, switch it to a BUG() and catch
1436 * the stack trace to find out who is calling this during
1437 * a scan. */
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001438 IWL_WARN(priv, "TX Power requested while scanning!\n");
Zhu Yib481de92007-09-25 17:54:57 -07001439 return -EAGAIN;
1440 }
1441
Johannes Berg8318d782008-01-24 19:38:38 +01001442 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001443
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001444 is_ht40 = is_ht40_channel(priv->active_rxon.flags);
Zhu Yib481de92007-09-25 17:54:57 -07001445
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001446 if (is_ht40 &&
Zhu Yib481de92007-09-25 17:54:57 -07001447 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1448 ctrl_chan_high = 1;
1449
1450 cmd.band = band;
1451 cmd.channel = priv->active_rxon.channel;
1452
Tomas Winkler857485c2008-03-21 13:53:44 -07001453 ret = iwl4965_fill_txpower_tbl(priv, band,
Zhu Yib481de92007-09-25 17:54:57 -07001454 le16_to_cpu(priv->active_rxon.channel),
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001455 is_ht40, ctrl_chan_high, &cmd.tx_power);
Tomas Winkler857485c2008-03-21 13:53:44 -07001456 if (ret)
1457 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07001458
Tomas Winkler857485c2008-03-21 13:53:44 -07001459 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1460
1461out:
1462 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07001463}
1464
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001465static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1466{
1467 int ret = 0;
1468 struct iwl4965_rxon_assoc_cmd rxon_assoc;
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001469 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1470 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001471
1472 if ((rxon1->flags == rxon2->flags) &&
1473 (rxon1->filter_flags == rxon2->filter_flags) &&
1474 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1475 (rxon1->ofdm_ht_single_stream_basic_rates ==
1476 rxon2->ofdm_ht_single_stream_basic_rates) &&
1477 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1478 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1479 (rxon1->rx_chain == rxon2->rx_chain) &&
1480 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
Tomas Winklere1623442009-01-27 14:27:56 -08001481 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001482 return 0;
1483 }
1484
1485 rxon_assoc.flags = priv->staging_rxon.flags;
1486 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1487 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1488 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1489 rxon_assoc.reserved = 0;
1490 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1491 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1492 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1493 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1494 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1495
1496 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1497 sizeof(rxon_assoc), &rxon_assoc, NULL);
1498 if (ret)
1499 return ret;
1500
1501 return ret;
1502}
1503
Zhu Yi3c935522008-09-03 11:26:57 +08001504#ifdef IEEE80211_CONF_CHANNEL_SWITCH
Emmanuel Grumbacha33c2f42008-09-03 11:26:56 +08001505static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001506{
1507 int rc;
1508 u8 band = 0;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001509 bool is_ht40 = false;
Zhu Yib481de92007-09-25 17:54:57 -07001510 u8 ctrl_chan_high = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001511 struct iwl4965_channel_switch_cmd cmd = { 0 };
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001512 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001513
Johannes Berg8318d782008-01-24 19:38:38 +01001514 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001515
Assaf Krauss8622e702008-03-21 13:53:43 -07001516 ch_info = iwl_get_channel_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001517
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001518 is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
Zhu Yib481de92007-09-25 17:54:57 -07001519
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001520 if (is_ht40 &&
Zhu Yib481de92007-09-25 17:54:57 -07001521 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1522 ctrl_chan_high = 1;
1523
1524 cmd.band = band;
1525 cmd.expect_beacon = 0;
1526 cmd.channel = cpu_to_le16(channel);
1527 cmd.rxon_flags = priv->active_rxon.flags;
1528 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1529 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1530 if (ch_info)
1531 cmd.expect_beacon = is_channel_radar(ch_info);
1532 else
1533 cmd.expect_beacon = 1;
1534
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001535 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
Zhu Yib481de92007-09-25 17:54:57 -07001536 ctrl_chan_high, &cmd.tx_power);
1537 if (rc) {
Tomas Winklere1623442009-01-27 14:27:56 -08001538 IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc);
Zhu Yib481de92007-09-25 17:54:57 -07001539 return rc;
1540 }
1541
Tomas Winkler857485c2008-03-21 13:53:44 -07001542 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001543 return rc;
1544}
Zhu Yi3c935522008-09-03 11:26:57 +08001545#endif
Zhu Yib481de92007-09-25 17:54:57 -07001546
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001547/**
Tomas Winklere2a722e2008-04-14 21:16:10 -07001548 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001549 */
Tomas Winklere2a722e2008-04-14 21:16:10 -07001550static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +08001551 struct iwl_tx_queue *txq,
Tomas Winklere2a722e2008-04-14 21:16:10 -07001552 u16 byte_cnt)
Zhu Yib481de92007-09-25 17:54:57 -07001553{
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001554 struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
Tomas Winkler127901a2008-10-23 23:48:55 -07001555 int txq_id = txq->q.id;
1556 int write_ptr = txq->q.write_ptr;
1557 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1558 __le16 bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001559
Tomas Winkler127901a2008-10-23 23:48:55 -07001560 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
Zhu Yib481de92007-09-25 17:54:57 -07001561
Tomas Winkler127901a2008-10-23 23:48:55 -07001562 bc_ent = cpu_to_le16(len & 0xFFF);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001563 /* Set up byte count within first 256 entries */
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001564 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001565
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001566 /* If within first 64 entries, duplicate at end */
Tomas Winkler127901a2008-10-23 23:48:55 -07001567 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001568 scd_bc_tbl[txq_id].
Tomas Winkler127901a2008-10-23 23:48:55 -07001569 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001570}
1571
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001572/**
Zhu Yib481de92007-09-25 17:54:57 -07001573 * sign_extend - Sign extend a value using specified bit as sign-bit
1574 *
1575 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1576 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1577 *
1578 * @param oper value to sign extend
1579 * @param index 0 based bit index (0<=index<32) to sign bit
1580 */
1581static s32 sign_extend(u32 oper, int index)
1582{
1583 u8 shift = 31 - index;
1584
1585 return (s32)(oper << shift) >> shift;
1586}
1587
1588/**
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001589 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
Zhu Yib481de92007-09-25 17:54:57 -07001590 * @statistics: Provides the temperature reading from the uCode
1591 *
1592 * A return of <0 indicates bogus data in the statistics
1593 */
Reinette Chatre3d816c72009-08-07 15:41:37 -07001594static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001595{
1596 s32 temperature;
1597 s32 vt;
1598 s32 R1, R2, R3;
1599 u32 R4;
1600
1601 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001602 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1603 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
Zhu Yib481de92007-09-25 17:54:57 -07001604 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1605 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1606 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1607 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1608 } else {
Tomas Winklere1623442009-01-27 14:27:56 -08001609 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
Zhu Yib481de92007-09-25 17:54:57 -07001610 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1611 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1612 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1613 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1614 }
1615
1616 /*
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001617 * Temperature is only 23 bits, so sign extend out to 32.
Zhu Yib481de92007-09-25 17:54:57 -07001618 *
1619 * NOTE If we haven't received a statistics notification yet
1620 * with an updated temperature, use R4 provided to us in the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001621 * "initialize" ALIVE response.
1622 */
Zhu Yib481de92007-09-25 17:54:57 -07001623 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1624 vt = sign_extend(R4, 23);
1625 else
1626 vt = sign_extend(
1627 le32_to_cpu(priv->statistics.general.temperature), 23);
1628
Tomas Winklere1623442009-01-27 14:27:56 -08001629 IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
Zhu Yib481de92007-09-25 17:54:57 -07001630
1631 if (R3 == R1) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001632 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
Zhu Yib481de92007-09-25 17:54:57 -07001633 return -1;
1634 }
1635
1636 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1637 * Add offset to center the adjustment around 0 degrees Centigrade. */
1638 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1639 temperature /= (R3 - R1);
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001640 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
Zhu Yib481de92007-09-25 17:54:57 -07001641
Tomas Winklere1623442009-01-27 14:27:56 -08001642 IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001643 temperature, KELVIN_TO_CELSIUS(temperature));
Zhu Yib481de92007-09-25 17:54:57 -07001644
1645 return temperature;
1646}
1647
1648/* Adjust Txpower only if temperature variance is greater than threshold. */
1649#define IWL_TEMPERATURE_THRESHOLD 3
1650
1651/**
1652 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1653 *
1654 * If the temperature changed has changed sufficiently, then a recalibration
1655 * is needed.
1656 *
1657 * Assumes caller will replace priv->last_temperature once calibration
1658 * executed.
1659 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001660static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001661{
1662 int temp_diff;
1663
1664 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
Tomas Winklere1623442009-01-27 14:27:56 -08001665 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001666 return 0;
1667 }
1668
1669 temp_diff = priv->temperature - priv->last_temperature;
1670
1671 /* get absolute value */
1672 if (temp_diff < 0) {
Tomas Winklere1623442009-01-27 14:27:56 -08001673 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
Zhu Yib481de92007-09-25 17:54:57 -07001674 temp_diff = -temp_diff;
1675 } else if (temp_diff == 0)
Tomas Winklere1623442009-01-27 14:27:56 -08001676 IWL_DEBUG_POWER(priv, "Same temp, \n");
Zhu Yib481de92007-09-25 17:54:57 -07001677 else
Tomas Winklere1623442009-01-27 14:27:56 -08001678 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
Zhu Yib481de92007-09-25 17:54:57 -07001679
1680 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
Tomas Winklere1623442009-01-27 14:27:56 -08001681 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
Zhu Yib481de92007-09-25 17:54:57 -07001682 return 0;
1683 }
1684
Tomas Winklere1623442009-01-27 14:27:56 -08001685 IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
Zhu Yib481de92007-09-25 17:54:57 -07001686
1687 return 1;
1688}
1689
Zhu Yi52256402008-06-30 17:23:31 +08001690static void iwl4965_temperature_calib(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001691{
Zhu Yib481de92007-09-25 17:54:57 -07001692 s32 temp;
Zhu Yib481de92007-09-25 17:54:57 -07001693
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001694 temp = iwl4965_hw_get_temperature(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001695 if (temp < 0)
1696 return;
1697
1698 if (priv->temperature != temp) {
1699 if (priv->temperature)
Tomas Winklere1623442009-01-27 14:27:56 -08001700 IWL_DEBUG_TEMP(priv, "Temperature changed "
Zhu Yib481de92007-09-25 17:54:57 -07001701 "from %dC to %dC\n",
1702 KELVIN_TO_CELSIUS(priv->temperature),
1703 KELVIN_TO_CELSIUS(temp));
1704 else
Tomas Winklere1623442009-01-27 14:27:56 -08001705 IWL_DEBUG_TEMP(priv, "Temperature "
Zhu Yib481de92007-09-25 17:54:57 -07001706 "initialized to %dC\n",
1707 KELVIN_TO_CELSIUS(temp));
1708 }
1709
1710 priv->temperature = temp;
Wey-Yi Guy39b73fb2009-07-24 11:13:02 -07001711 iwl_tt_handler(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001712 set_bit(STATUS_TEMPERATURE, &priv->status);
1713
Emmanuel Grumbach203566f2008-06-12 09:46:54 +08001714 if (!priv->disable_tx_power_cal &&
1715 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1716 iwl4965_is_temp_calib_needed(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001717 queue_work(priv->workqueue, &priv->txpower_work);
1718}
1719
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001720/**
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001721 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1722 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001723static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001724 u16 txq_id)
1725{
1726 /* Simply stop the queue, but don't change any configuration;
1727 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001728 iwl_write_prph(priv,
Tomas Winkler12a81f62008-04-03 16:05:20 -07001729 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001730 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1731 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001732}
1733
1734/**
Ron Rindjunsky7f3e4bb2008-06-12 09:46:55 +08001735 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08001736 * priv->lock must be held by the caller
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001737 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08001738static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1739 u16 ssn_idx, u8 tx_fifo)
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001740{
Tomas Winkler9f17b312008-07-11 11:53:35 +08001741 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1742 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001743 IWL_WARN(priv,
1744 "queue number out of range: %d, must be %d to %d\n",
Tomas Winkler9f17b312008-07-11 11:53:35 +08001745 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1746 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001747 return -EINVAL;
1748 }
1749
1750 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1751
Tomas Winkler12a81f62008-04-03 16:05:20 -07001752 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001753
1754 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1755 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1756 /* supposes that ssn_idx is valid (!= 0xFFF) */
1757 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1758
Tomas Winkler12a81f62008-04-03 16:05:20 -07001759 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Ron Rindjunsky36470742008-05-15 13:54:10 +08001760 iwl_txq_ctx_deactivate(priv, txq_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001761 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1762
1763 return 0;
1764}
1765
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001766/**
1767 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1768 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001769static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
Zhu Yib481de92007-09-25 17:54:57 -07001770 u16 txq_id)
1771{
1772 u32 tbl_dw_addr;
1773 u32 tbl_dw;
1774 u16 scd_q2ratid;
1775
Tomas Winkler30e553e2008-05-29 16:35:16 +08001776 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
Zhu Yib481de92007-09-25 17:54:57 -07001777
1778 tbl_dw_addr = priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001779 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
Zhu Yib481de92007-09-25 17:54:57 -07001780
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001781 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
Zhu Yib481de92007-09-25 17:54:57 -07001782
1783 if (txq_id & 0x1)
1784 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1785 else
1786 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1787
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001788 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
Zhu Yib481de92007-09-25 17:54:57 -07001789
1790 return 0;
1791}
1792
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001793
Zhu Yib481de92007-09-25 17:54:57 -07001794/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001795 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1796 *
Ron Rindjunsky7f3e4bb2008-06-12 09:46:55 +08001797 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001798 * i.e. it must be one of the higher queues used for aggregation
Zhu Yib481de92007-09-25 17:54:57 -07001799 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08001800static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1801 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
Zhu Yib481de92007-09-25 17:54:57 -07001802{
1803 unsigned long flags;
Zhu Yib481de92007-09-25 17:54:57 -07001804 u16 ra_tid;
1805
Tomas Winkler9f17b312008-07-11 11:53:35 +08001806 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1807 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001808 IWL_WARN(priv,
1809 "queue number out of range: %d, must be %d to %d\n",
Tomas Winkler9f17b312008-07-11 11:53:35 +08001810 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1811 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1812 return -EINVAL;
1813 }
Zhu Yib481de92007-09-25 17:54:57 -07001814
1815 ra_tid = BUILD_RAxTID(sta_id, tid);
1816
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001817 /* Modify device's station table to Tx this TID */
Tomas Winkler9f586712008-11-12 13:14:05 -08001818 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
Zhu Yib481de92007-09-25 17:54:57 -07001819
1820 spin_lock_irqsave(&priv->lock, flags);
Zhu Yib481de92007-09-25 17:54:57 -07001821
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001822 /* Stop this Tx queue before configuring it */
Zhu Yib481de92007-09-25 17:54:57 -07001823 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1824
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001825 /* Map receiver-address / traffic-ID to this queue */
Zhu Yib481de92007-09-25 17:54:57 -07001826 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1827
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001828 /* Set this queue as a chain-building queue */
Tomas Winkler12a81f62008-04-03 16:05:20 -07001829 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07001830
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001831 /* Place first TFD at index corresponding to start sequence number.
1832 * Assumes that ssn_idx is valid (!= 0xFFF) */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08001833 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1834 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
Zhu Yib481de92007-09-25 17:54:57 -07001835 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1836
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001837 /* Set up Tx window size and frame limit for this queue */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001838 iwl_write_targ_mem(priv,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001839 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1840 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1841 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001842
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001843 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001844 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1845 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1846 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001847
Tomas Winkler12a81f62008-04-03 16:05:20 -07001848 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07001849
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001850 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
Zhu Yib481de92007-09-25 17:54:57 -07001851 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1852
Zhu Yib481de92007-09-25 17:54:57 -07001853 spin_unlock_irqrestore(&priv->lock, flags);
1854
1855 return 0;
1856}
1857
Tomas Winkler133636d2008-05-05 10:22:34 +08001858
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001859static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1860{
1861 switch (cmd_id) {
1862 case REPLY_RXON:
1863 return (u16) sizeof(struct iwl4965_rxon_cmd);
1864 default:
1865 return len;
1866 }
1867}
1868
Tomas Winkler133636d2008-05-05 10:22:34 +08001869static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1870{
1871 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1872 addsta->mode = cmd->mode;
1873 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1874 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1875 addsta->station_flags = cmd->station_flags;
1876 addsta->station_flags_msk = cmd->station_flags_msk;
1877 addsta->tid_disable_tx = cmd->tid_disable_tx;
1878 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1879 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1880 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
Harvey Harrisonc1b4aa32009-01-29 13:26:44 -08001881 addsta->reserved1 = cpu_to_le16(0);
1882 addsta->reserved2 = cpu_to_le32(0);
Tomas Winkler133636d2008-05-05 10:22:34 +08001883
1884 return (u16)sizeof(struct iwl4965_addsta_cmd);
1885}
Tomas Winklerf20217d2008-05-29 16:35:10 +08001886
Tomas Winklerf20217d2008-05-29 16:35:10 +08001887static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1888{
Tomas Winkler25a65722008-06-12 09:47:07 +08001889 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001890}
1891
1892/**
Tomas Winklera96a27f2008-10-23 23:48:56 -07001893 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
Tomas Winklerf20217d2008-05-29 16:35:10 +08001894 */
1895static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1896 struct iwl_ht_agg *agg,
Tomas Winkler25a65722008-06-12 09:47:07 +08001897 struct iwl4965_tx_resp *tx_resp,
1898 int txq_id, u16 start_idx)
Tomas Winklerf20217d2008-05-29 16:35:10 +08001899{
1900 u16 status;
Tomas Winkler25a65722008-06-12 09:47:07 +08001901 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001902 struct ieee80211_tx_info *info = NULL;
1903 struct ieee80211_hdr *hdr = NULL;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001904 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
Tomas Winkler25a65722008-06-12 09:47:07 +08001905 int i, sh, idx;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001906 u16 seq;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001907 if (agg->wait_for_ba)
Tomas Winklere1623442009-01-27 14:27:56 -08001908 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08001909
1910 agg->frame_count = tx_resp->frame_count;
1911 agg->start_idx = start_idx;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001912 agg->rate_n_flags = rate_n_flags;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001913 agg->bitmap = 0;
1914
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001915 /* num frames attempted by Tx command */
Tomas Winklerf20217d2008-05-29 16:35:10 +08001916 if (agg->frame_count == 1) {
1917 /* Only one frame was attempted; no block-ack will arrive */
1918 status = le16_to_cpu(frame_status[0].status);
Tomas Winkler25a65722008-06-12 09:47:07 +08001919 idx = start_idx;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001920
1921 /* FIXME: code repetition */
Tomas Winklere1623442009-01-27 14:27:56 -08001922 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001923 agg->frame_count, agg->start_idx, idx);
1924
1925 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
Johannes Berge6a98542008-10-21 12:40:02 +02001926 info->status.rates[0].count = tx_resp->failure_frame + 1;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001927 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
Abhijeet Kolekarc3056062008-11-12 13:14:08 -08001928 info->flags |= iwl_is_tx_success(status) ?
Tomas Winklerf20217d2008-05-29 16:35:10 +08001929 IEEE80211_TX_STAT_ACK : 0;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001930 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001931 /* FIXME: code repetition end */
1932
Tomas Winklere1623442009-01-27 14:27:56 -08001933 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001934 status & 0xff, tx_resp->failure_frame);
Tomas Winklere1623442009-01-27 14:27:56 -08001935 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001936
1937 agg->wait_for_ba = 0;
1938 } else {
1939 /* Two or more frames were attempted; expect block-ack */
1940 u64 bitmap = 0;
1941 int start = agg->start_idx;
1942
1943 /* Construct bit-map of pending frames within Tx window */
1944 for (i = 0; i < agg->frame_count; i++) {
1945 u16 sc;
1946 status = le16_to_cpu(frame_status[i].status);
1947 seq = le16_to_cpu(frame_status[i].sequence);
1948 idx = SEQ_TO_INDEX(seq);
1949 txq_id = SEQ_TO_QUEUE(seq);
1950
1951 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1952 AGG_TX_STATE_ABORT_MSK))
1953 continue;
1954
Tomas Winklere1623442009-01-27 14:27:56 -08001955 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001956 agg->frame_count, txq_id, idx);
1957
1958 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
Stanislaw Gruszka6c6a22e2009-09-23 10:51:34 +02001959 if (!hdr) {
1960 IWL_ERR(priv,
1961 "BUG_ON idx doesn't point to valid skb"
1962 " idx=%d, txq_id=%d\n", idx, txq_id);
1963 return -1;
1964 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08001965
1966 sc = le16_to_cpu(hdr->seq_ctrl);
1967 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001968 IWL_ERR(priv,
1969 "BUG_ON idx doesn't match seq control"
1970 " idx=%d, seq_idx=%d, seq=%d\n",
1971 idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001972 return -1;
1973 }
1974
Tomas Winklere1623442009-01-27 14:27:56 -08001975 IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001976 i, idx, SEQ_TO_SN(sc));
1977
1978 sh = idx - start;
1979 if (sh > 64) {
1980 sh = (start - idx) + 0xff;
1981 bitmap = bitmap << sh;
1982 sh = 0;
1983 start = idx;
1984 } else if (sh < -64)
1985 sh = 0xff - (start - idx);
1986 else if (sh < 0) {
1987 sh = start - idx;
1988 start = idx;
1989 bitmap = bitmap << sh;
1990 sh = 0;
1991 }
Emmanuel Grumbach4aa41f12008-07-18 13:53:09 +08001992 bitmap |= 1ULL << sh;
Tomas Winklere1623442009-01-27 14:27:56 -08001993 IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
Emmanuel Grumbach4aa41f12008-07-18 13:53:09 +08001994 start, (unsigned long long)bitmap);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001995 }
1996
1997 agg->bitmap = bitmap;
1998 agg->start_idx = start;
Tomas Winklere1623442009-01-27 14:27:56 -08001999 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08002000 agg->frame_count, agg->start_idx,
2001 (unsigned long long)agg->bitmap);
2002
2003 if (bitmap)
2004 agg->wait_for_ba = 1;
2005 }
2006 return 0;
2007}
Tomas Winklerf20217d2008-05-29 16:35:10 +08002008
2009/**
2010 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2011 */
2012static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2013 struct iwl_rx_mem_buffer *rxb)
2014{
2015 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2016 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2017 int txq_id = SEQ_TO_QUEUE(sequence);
2018 int index = SEQ_TO_INDEX(sequence);
2019 struct iwl_tx_queue *txq = &priv->txq[txq_id];
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002020 struct ieee80211_hdr *hdr;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002021 struct ieee80211_tx_info *info;
2022 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Tomas Winkler25a65722008-06-12 09:47:07 +08002023 u32 status = le32_to_cpu(tx_resp->u.status);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002024 int tid = MAX_TID_COUNT;
2025 int sta_id;
2026 int freed;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002027 u8 *qc = NULL;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002028
2029 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002030 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
Tomas Winklerf20217d2008-05-29 16:35:10 +08002031 "is out of range [0-%d] %d %d\n", txq_id,
2032 index, txq->q.n_bd, txq->q.write_ptr,
2033 txq->q.read_ptr);
2034 return;
2035 }
2036
2037 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2038 memset(&info->status, 0, sizeof(info->status));
2039
Tomas Winklerf20217d2008-05-29 16:35:10 +08002040 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002041 if (ieee80211_is_data_qos(hdr->frame_control)) {
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002042 qc = ieee80211_get_qos_ctl(hdr);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002043 tid = qc[0] & 0xf;
2044 }
2045
2046 sta_id = iwl_get_ra_sta_id(priv, hdr);
2047 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002048 IWL_ERR(priv, "Station not known\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08002049 return;
2050 }
2051
2052 if (txq->sched_retry) {
2053 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2054 struct iwl_ht_agg *agg = NULL;
2055
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002056 WARN_ON(!qc);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002057
2058 agg = &priv->stations[sta_id].tid[tid].agg;
2059
Tomas Winkler25a65722008-06-12 09:47:07 +08002060 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002061
Ron Rindjunsky32354272008-07-01 10:44:51 +03002062 /* check if BAR is needed */
2063 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2064 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002065
2066 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
Tomas Winklerf20217d2008-05-29 16:35:10 +08002067 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
Tomas Winklere1623442009-01-27 14:27:56 -08002068 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
Tomas Winklerf20217d2008-05-29 16:35:10 +08002069 "%d index %d\n", scd_ssn , index);
Tomas Winkler17b88922008-05-29 16:35:12 +08002070 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002071 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2072
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002073 if (priv->mac80211_registered &&
2074 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2075 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
Tomas Winklerf20217d2008-05-29 16:35:10 +08002076 if (agg->state == IWL_AGG_OFF)
Johannes Berge4e72fb2009-03-23 17:28:42 +01002077 iwl_wake_queue(priv, txq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002078 else
Johannes Berge4e72fb2009-03-23 17:28:42 +01002079 iwl_wake_queue(priv, txq->swq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002080 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002081 }
2082 } else {
Johannes Berge6a98542008-10-21 12:40:02 +02002083 info->status.rates[0].count = tx_resp->failure_frame + 1;
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002084 info->flags |= iwl_is_tx_success(status) ?
2085 IEEE80211_TX_STAT_ACK : 0;
Tomas Winklere7d326a2008-06-12 09:47:11 +08002086 iwl_hwrate_to_tx_control(priv,
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03002087 le32_to_cpu(tx_resp->rate_n_flags),
2088 info);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002089
Tomas Winklere1623442009-01-27 14:27:56 -08002090 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002091 "rate_n_flags 0x%x retries %d\n",
2092 txq_id,
2093 iwl_get_tx_fail_reason(status), status,
2094 le32_to_cpu(tx_resp->rate_n_flags),
2095 tx_resp->failure_frame);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002096
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002097 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
Tomas Winklered7fafe2008-10-23 23:48:50 -07002098 if (qc && likely(sta_id != IWL_INVALID_STATION))
Tomas Winklerf20217d2008-05-29 16:35:10 +08002099 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002100
2101 if (priv->mac80211_registered &&
2102 (iwl_queue_space(&txq->q) > txq->q.low_mark))
Johannes Berge4e72fb2009-03-23 17:28:42 +01002103 iwl_wake_queue(priv, txq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002104 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002105
Tomas Winklered7fafe2008-10-23 23:48:50 -07002106 if (qc && likely(sta_id != IWL_INVALID_STATION))
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002107 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2108
Tomas Winklerf20217d2008-05-29 16:35:10 +08002109 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
Winkler, Tomas15b16872008-12-19 10:37:33 +08002110 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08002111}
2112
Tomas Winklercaab8f12008-08-04 16:00:42 +08002113static int iwl4965_calc_rssi(struct iwl_priv *priv,
2114 struct iwl_rx_phy_res *rx_resp)
2115{
2116 /* data from PHY/DSP regarding signal strength, etc.,
2117 * contents are always there, not configurable by host. */
2118 struct iwl4965_rx_non_cfg_phy *ncphy =
2119 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2120 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2121 >> IWL49_AGC_DB_POS;
2122
2123 u32 valid_antennae =
2124 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2125 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2126 u8 max_rssi = 0;
2127 u32 i;
2128
2129 /* Find max rssi among 3 possible receivers.
2130 * These values are measured by the digital signal processor (DSP).
2131 * They should stay fairly constant even as the signal strength varies,
2132 * if the radio's automatic gain control (AGC) is working right.
2133 * AGC value (see below) will provide the "interesting" info. */
2134 for (i = 0; i < 3; i++)
2135 if (valid_antennae & (1 << i))
2136 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2137
Tomas Winklere1623442009-01-27 14:27:56 -08002138 IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
Tomas Winklercaab8f12008-08-04 16:00:42 +08002139 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2140 max_rssi, agc);
2141
2142 /* dBm = max_rssi dB - agc dB - constant.
2143 * Higher AGC (higher radio gain) means lower signal. */
Samuel Ortiz250bdd22008-12-19 10:37:11 +08002144 return max_rssi - agc - IWL49_RSSI_OFFSET;
Tomas Winklercaab8f12008-08-04 16:00:42 +08002145}
2146
Tomas Winklerf20217d2008-05-29 16:35:10 +08002147
Zhu Yib481de92007-09-25 17:54:57 -07002148/* Set up 4965-specific Rx frame reply handlers */
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07002149static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002150{
2151 /* Legacy Rx frames */
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08002152 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
Ron Rindjunsky37a44212008-05-29 16:35:18 +08002153 /* Tx response */
Tomas Winklerf20217d2008-05-29 16:35:10 +08002154 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07002155}
2156
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002157static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002158{
2159 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
Zhu Yib481de92007-09-25 17:54:57 -07002160}
2161
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002162static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002163{
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002164 cancel_work_sync(&priv->txpower_work);
Zhu Yib481de92007-09-25 17:54:57 -07002165}
2166
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002167#define IWL4965_UCODE_GET(item) \
2168static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2169 u32 api_ver) \
2170{ \
2171 return le32_to_cpu(ucode->u.v1.item); \
2172}
2173
2174static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2175{
2176 return UCODE_HEADER_SIZE(1);
2177}
2178static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2179 u32 api_ver)
2180{
2181 return 0;
2182}
2183static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2184 u32 api_ver)
2185{
2186 return (u8 *) ucode->u.v1.data;
2187}
2188
2189IWL4965_UCODE_GET(inst_size);
2190IWL4965_UCODE_GET(data_size);
2191IWL4965_UCODE_GET(init_size);
2192IWL4965_UCODE_GET(init_data_size);
2193IWL4965_UCODE_GET(boot_size);
2194
Tomas Winkler3c424c22008-04-15 16:01:42 -07002195static struct iwl_hcmd_ops iwl4965_hcmd = {
Tomas Winkler7e8c5192008-04-15 16:01:43 -07002196 .rxon_assoc = iwl4965_send_rxon_assoc,
Abhijeet Kolekare0158e62009-04-08 11:26:37 -07002197 .commit_rxon = iwl_commit_rxon,
Abhijeet Kolekar45823532009-04-08 11:26:44 -07002198 .set_rxon_chain = iwl_set_rxon_chain,
Tomas Winkler3c424c22008-04-15 16:01:42 -07002199};
2200
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002201static struct iwl_ucode_ops iwl4965_ucode = {
2202 .get_header_size = iwl4965_ucode_get_header_size,
2203 .get_build = iwl4965_ucode_get_build,
2204 .get_inst_size = iwl4965_ucode_get_inst_size,
2205 .get_data_size = iwl4965_ucode_get_data_size,
2206 .get_init_size = iwl4965_ucode_get_init_size,
2207 .get_init_data_size = iwl4965_ucode_get_init_data_size,
2208 .get_boot_size = iwl4965_ucode_get_boot_size,
2209 .get_data = iwl4965_ucode_get_data,
2210};
Tomas Winkler857485c2008-03-21 13:53:44 -07002211static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08002212 .get_hcmd_size = iwl4965_get_hcmd_size,
Tomas Winkler133636d2008-05-05 10:22:34 +08002213 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002214 .chain_noise_reset = iwl4965_chain_noise_reset,
2215 .gain_computation = iwl4965_gain_computation,
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +08002216 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
Tomas Winklercaab8f12008-08-04 16:00:42 +08002217 .calc_rssi = iwl4965_calc_rssi,
Tomas Winkler857485c2008-03-21 13:53:44 -07002218};
2219
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002220static struct iwl_lib_ops iwl4965_lib = {
Tomas Winkler5425e492008-04-15 16:01:38 -07002221 .set_hw_params = iwl4965_hw_set_hw_params,
Tomas Winklere2a722e2008-04-14 21:16:10 -07002222 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
Tomas Winklerda1bc452008-05-29 16:35:00 +08002223 .txq_set_sched = iwl4965_txq_set_sched,
Tomas Winkler30e553e2008-05-29 16:35:16 +08002224 .txq_agg_enable = iwl4965_txq_agg_enable,
2225 .txq_agg_disable = iwl4965_txq_agg_disable,
Samuel Ortiz7aaa1d72009-01-19 15:30:26 -08002226 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2227 .txq_free_tfd = iwl_hw_txq_free_tfd,
Samuel Ortiza8e74e22009-01-23 13:45:14 -08002228 .txq_init = iwl_hw_tx_queue_init,
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07002229 .rx_handler_setup = iwl4965_rx_handler_setup,
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002230 .setup_deferred_work = iwl4965_setup_deferred_work,
2231 .cancel_deferred_work = iwl4965_cancel_deferred_work,
Tomas Winkler57aab752008-04-14 21:16:03 -07002232 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2233 .alive_notify = iwl4965_alive_notify,
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +08002234 .init_alive_start = iwl4965_init_alive_start,
Tomas Winkler57aab752008-04-14 21:16:03 -07002235 .load_ucode = iwl4965_load_bsm,
Reinette Chatreb7a79402009-09-25 14:24:23 -07002236 .dump_nic_event_log = iwl_dump_nic_event_log,
2237 .dump_nic_error_log = iwl_dump_nic_error_log,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07002238 .apm_ops = {
Tomas Winkler91238712008-04-23 17:14:53 -07002239 .init = iwl4965_apm_init,
Abhijeet Kolekard68b6032009-10-02 13:44:04 -07002240 .stop = iwl_apm_stop,
Tomas Winkler694cc562008-04-24 11:55:22 -07002241 .config = iwl4965_nic_config,
Emmanuel Grumbach5b9f8cd2008-10-29 14:05:46 -07002242 .set_pwr_src = iwl_set_pwr_src,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07002243 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002244 .eeprom_ops = {
Tomas Winkler073d3f52008-04-21 15:41:52 -07002245 .regulatory_bands = {
2246 EEPROM_REGULATORY_BAND_1_CHANNELS,
2247 EEPROM_REGULATORY_BAND_2_CHANNELS,
2248 EEPROM_REGULATORY_BAND_3_CHANNELS,
2249 EEPROM_REGULATORY_BAND_4_CHANNELS,
2250 EEPROM_REGULATORY_BAND_5_CHANNELS,
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07002251 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2252 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
Tomas Winkler073d3f52008-04-21 15:41:52 -07002253 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002254 .verify_signature = iwlcore_eeprom_verify_signature,
2255 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2256 .release_semaphore = iwlcore_eeprom_release_semaphore,
Tomas Winkler0ef2ca62008-10-23 23:48:51 -07002257 .calib_version = iwl4965_eeprom_calib_version,
Tomas Winkler073d3f52008-04-21 15:41:52 -07002258 .query_addr = iwlcore_eeprom_query_addr,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002259 },
Tomas Winkler630fe9b2008-06-12 09:47:08 +08002260 .send_tx_power = iwl4965_send_tx_power,
Emmanuel Grumbach5b9f8cd2008-10-29 14:05:46 -07002261 .update_chain_flags = iwl_update_chain_flags,
Abhijeet Kolekar5bbe2332009-04-08 11:26:35 -07002262 .post_associate = iwl_post_associate,
Abhijeet Kolekar60690a62009-04-08 11:26:49 -07002263 .config_ap = iwl_config_ap,
Mohamed Abbasef850d72009-05-22 11:01:50 -07002264 .isr = iwl_isr_legacy,
Wey-Yi Guy62161ae2009-05-21 13:44:23 -07002265 .temp_ops = {
2266 .temperature = iwl4965_temperature_calib,
2267 .set_ct_kill = iwl4965_set_ct_threshold,
2268 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002269};
2270
2271static struct iwl_ops iwl4965_ops = {
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002272 .ucode = &iwl4965_ucode,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002273 .lib = &iwl4965_lib,
Tomas Winkler3c424c22008-04-15 16:01:42 -07002274 .hcmd = &iwl4965_hcmd,
Tomas Winkler857485c2008-03-21 13:53:44 -07002275 .utils = &iwl4965_hcmd_utils,
Johannes Berge932a602009-10-02 13:44:03 -07002276 .led = &iwlagn_led_ops,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002277};
2278
Ron Rindjunskyfed90172008-04-15 16:01:41 -07002279struct iwl_cfg iwl4965_agn_cfg = {
Tomas Winkler82b9a122008-03-04 18:09:30 -08002280 .name = "4965AGN",
Reinette Chatrea0987a82008-12-02 12:14:06 -08002281 .fw_name_pre = IWL4965_FW_PRE,
2282 .ucode_api_max = IWL4965_UCODE_API_MAX,
2283 .ucode_api_min = IWL4965_UCODE_API_MIN,
Tomas Winkler82b9a122008-03-04 18:09:30 -08002284 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
Tomas Winkler073d3f52008-04-21 15:41:52 -07002285 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
Tomas Winkler0ef2ca62008-10-23 23:48:51 -07002286 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2287 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002288 .ops = &iwl4965_ops,
Assaf Krauss1ea87392008-03-18 14:57:50 -07002289 .mod_params = &iwl4965_mod_params,
Daniel C Halperinb2617932009-08-13 13:30:59 -07002290 .use_isr_legacy = true,
2291 .ht_greenfield_support = false,
Johannes Berg96d8c6a2009-09-11 10:50:37 -07002292 .broken_powersave = true,
Wey-Yi Guyf2d0d0e2009-09-11 10:38:14 -07002293 .led_compensation = 61,
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -07002294 .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
Tomas Winkler82b9a122008-03-04 18:09:30 -08002295};
2296
Tomas Winklerd16dc482008-07-11 11:53:38 +08002297/* Module firmware */
Reinette Chatrea0987a82008-12-02 12:14:06 -08002298MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
Tomas Winklerd16dc482008-07-11 11:53:38 +08002299
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002300module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002301MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002302module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
Niels de Vos61a2d072008-07-31 00:07:23 -07002303MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
Assaf Krauss1ea87392008-03-18 14:57:50 -07002304module_param_named(
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002305 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002306MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2307
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002308module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002309MODULE_PARM_DESC(queues_num, "number of hw queues.");
Ron Rindjunsky49779292008-06-30 17:23:21 +08002310/* 11n */
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002311module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
Ron Rindjunsky49779292008-06-30 17:23:21 +08002312MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002313module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2314 int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002315MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
Ron Rindjunsky49779292008-06-30 17:23:21 +08002316
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002317module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
Ester Kummer3a1081e2008-05-06 11:05:14 +08002318MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");