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Steven Tothd19770e2007-03-11 20:44:05 -03001/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
Steven Toth6d897612008-09-03 17:12:12 -03004 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
Steven Tothd19770e2007-03-11 20:44:05 -03005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
Steven Toth7b888012008-01-10 03:40:49 -030026#include <media/cx25840.h>
Igor M. Liplianin78db8542011-01-25 17:04:00 -030027#include <linux/firmware.h>
28#include <staging/altera.h>
Steven Tothd19770e2007-03-11 20:44:05 -030029
30#include "cx23885.h"
Steven Toth90a71b12008-08-04 21:38:46 -030031#include "tuner-xc2028.h"
Igor M. Liplianin5a23b072009-03-03 12:06:09 -030032#include "netup-init.h"
Igor M. Liplianin78db8542011-01-25 17:04:00 -030033#include "altera-ci.h"
34#include "xc5000.h"
Andy Walls29f8a0a2009-09-26 23:17:30 -030035#include "cx23888-ir.h"
Steven Tothd19770e2007-03-11 20:44:05 -030036
Andy Wallsfa647f22010-07-19 21:22:05 -030037static unsigned int enable_885_ir;
38module_param(enable_885_ir, int, 0644);
39MODULE_PARM_DESC(enable_885_ir,
40 "Enable integrated IR controller for supported\n"
41 "\t\t CX2388[57] boards that are wired for it:\n"
42 "\t\t\tHVR-1250 (reported safe)\n"
43 "\t\t\tTeVii S470 (reported unsafe)\n"
44 "\t\t This can cause an interrupt storm with some cards.\n"
45 "\t\t Default: 0 [Disabled]");
46
Steven Tothd19770e2007-03-11 20:44:05 -030047/* ------------------------------------------------------------------ */
48/* board config info */
49
50struct cx23885_board cx23885_boards[] = {
51 [CX23885_BOARD_UNKNOWN] = {
52 .name = "UNKNOWN/GENERIC",
Steven Tothc7712612008-01-10 02:24:27 -030053 /* Ensure safe default for unknown boards */
54 .clk_freq = 0,
Steven Tothd19770e2007-03-11 20:44:05 -030055 .input = {{
56 .type = CX23885_VMUX_COMPOSITE1,
57 .vmux = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -030058 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030059 .type = CX23885_VMUX_COMPOSITE2,
60 .vmux = 1,
Steven Toth9c8ced52008-10-16 20:18:44 -030061 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030062 .type = CX23885_VMUX_COMPOSITE3,
63 .vmux = 2,
Steven Toth9c8ced52008-10-16 20:18:44 -030064 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030065 .type = CX23885_VMUX_COMPOSITE4,
66 .vmux = 3,
Steven Toth9c8ced52008-10-16 20:18:44 -030067 } },
Steven Tothd19770e2007-03-11 20:44:05 -030068 },
69 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
70 .name = "Hauppauge WinTV-HVR1800lp",
Steven Tothd19770e2007-03-11 20:44:05 -030071 .portc = CX23885_MPEG_DVB,
72 .input = {{
73 .type = CX23885_VMUX_TELEVISION,
74 .vmux = 0,
75 .gpio0 = 0xff00,
Steven Toth9c8ced52008-10-16 20:18:44 -030076 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030077 .type = CX23885_VMUX_DEBUG,
78 .vmux = 0,
79 .gpio0 = 0xff01,
Steven Toth9c8ced52008-10-16 20:18:44 -030080 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030081 .type = CX23885_VMUX_COMPOSITE1,
82 .vmux = 1,
83 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -030084 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030085 .type = CX23885_VMUX_SVIDEO,
86 .vmux = 2,
87 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -030088 } },
Steven Tothd19770e2007-03-11 20:44:05 -030089 },
90 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
91 .name = "Hauppauge WinTV-HVR1800",
Steven Toth7b888012008-01-10 03:40:49 -030092 .porta = CX23885_ANALOG_VIDEO,
Steven Totha589b662008-01-13 23:44:47 -030093 .portb = CX23885_MPEG_ENCODER,
Steven Tothd19770e2007-03-11 20:44:05 -030094 .portc = CX23885_MPEG_DVB,
Steven Toth7b888012008-01-10 03:40:49 -030095 .tuner_type = TUNER_PHILIPS_TDA8290,
96 .tuner_addr = 0x42, /* 0x84 >> 1 */
Igor M. Liplianin557f48d2011-01-25 17:05:00 -030097 .tuner_bus = 1,
Steven Tothd19770e2007-03-11 20:44:05 -030098 .input = {{
99 .type = CX23885_VMUX_TELEVISION,
Steven Toth7b888012008-01-10 03:40:49 -0300100 .vmux = CX25840_VIN7_CH3 |
101 CX25840_VIN5_CH2 |
102 CX25840_VIN2_CH1,
103 .gpio0 = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -0300104 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300105 .type = CX23885_VMUX_COMPOSITE1,
Steven Toth7b888012008-01-10 03:40:49 -0300106 .vmux = CX25840_VIN7_CH3 |
107 CX25840_VIN4_CH2 |
108 CX25840_VIN6_CH1,
109 .gpio0 = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -0300110 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300111 .type = CX23885_VMUX_SVIDEO,
Steven Toth7b888012008-01-10 03:40:49 -0300112 .vmux = CX25840_VIN7_CH3 |
113 CX25840_VIN4_CH2 |
114 CX25840_VIN8_CH1 |
115 CX25840_SVIDEO_ON,
116 .gpio0 = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -0300117 } },
Steven Tothd19770e2007-03-11 20:44:05 -0300118 },
Steven Totha77743b2007-08-22 21:01:20 -0300119 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
120 .name = "Hauppauge WinTV-HVR1250",
121 .portc = CX23885_MPEG_DVB,
122 .input = {{
123 .type = CX23885_VMUX_TELEVISION,
124 .vmux = 0,
125 .gpio0 = 0xff00,
Steven Toth9c8ced52008-10-16 20:18:44 -0300126 }, {
Steven Totha77743b2007-08-22 21:01:20 -0300127 .type = CX23885_VMUX_DEBUG,
128 .vmux = 0,
129 .gpio0 = 0xff01,
Steven Toth9c8ced52008-10-16 20:18:44 -0300130 }, {
Steven Totha77743b2007-08-22 21:01:20 -0300131 .type = CX23885_VMUX_COMPOSITE1,
132 .vmux = 1,
133 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -0300134 }, {
Steven Totha77743b2007-08-22 21:01:20 -0300135 .type = CX23885_VMUX_SVIDEO,
136 .vmux = 2,
137 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -0300138 } },
Steven Totha77743b2007-08-22 21:01:20 -0300139 },
Michael Krufky9bc37ca2007-09-08 15:17:13 -0300140 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
141 .name = "DViCO FusionHDTV5 Express",
Steven Totha6a3f142007-09-08 21:31:56 -0300142 .portb = CX23885_MPEG_DVB,
Michael Krufky9bc37ca2007-09-08 15:17:13 -0300143 },
Steven Tothd1987d52007-12-18 01:57:06 -0300144 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
145 .name = "Hauppauge WinTV-HVR1500Q",
146 .portc = CX23885_MPEG_DVB,
147 },
Michael Krufky07b4a832007-12-18 01:09:11 -0300148 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
149 .name = "Hauppauge WinTV-HVR1500",
150 .portc = CX23885_MPEG_DVB,
151 },
Steven Tothb3ea0162008-04-19 01:14:19 -0300152 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
153 .name = "Hauppauge WinTV-HVR1200",
154 .portc = CX23885_MPEG_DVB,
155 },
Steven Totha780a312008-04-19 01:25:52 -0300156 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
157 .name = "Hauppauge WinTV-HVR1700",
158 .portc = CX23885_MPEG_DVB,
159 },
Steven Toth66762372008-04-22 15:38:26 -0300160 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
161 .name = "Hauppauge WinTV-HVR1400",
162 .portc = CX23885_MPEG_DVB,
163 },
Michael Krufky335377b2008-05-07 01:43:10 -0300164 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
165 .name = "DViCO FusionHDTV7 Dual Express",
Steven Tothaaadeac2008-06-30 20:58:38 -0300166 .portb = CX23885_MPEG_DVB,
Michael Krufky335377b2008-05-07 01:43:10 -0300167 .portc = CX23885_MPEG_DVB,
168 },
Steven Tothaef2d182008-08-04 21:39:53 -0300169 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
170 .name = "DViCO FusionHDTV DVB-T Dual Express",
171 .portb = CX23885_MPEG_DVB,
172 .portc = CX23885_MPEG_DVB,
173 },
Steven Toth4c56b042008-08-12 13:30:03 -0300174 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
175 .name = "Leadtek Winfast PxDVR3200 H",
176 .portc = CX23885_MPEG_DVB,
177 },
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300178 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
179 .name = "Compro VideoMate E650F",
180 .portc = CX23885_MPEG_DVB,
181 },
Igor M. Liplianin96318d02009-01-17 12:11:20 -0300182 [CX23885_BOARD_TBS_6920] = {
183 .name = "TurboSight TBS 6920",
184 .portb = CX23885_MPEG_DVB,
185 },
Igor M. Liplianin579943f2009-01-17 12:18:26 -0300186 [CX23885_BOARD_TEVII_S470] = {
187 .name = "TeVii S470",
188 .portb = CX23885_MPEG_DVB,
189 },
Igor M. Liplianinc9b8b042009-01-17 12:23:31 -0300190 [CX23885_BOARD_DVBWORLD_2005] = {
191 .name = "DVBWorld DVB-S2 2005",
192 .portb = CX23885_MPEG_DVB,
193 },
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300194 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300195 .ci_type = 1,
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300196 .name = "NetUP Dual DVB-S2 CI",
197 .portb = CX23885_MPEG_DVB,
198 .portc = CX23885_MPEG_DVB,
199 },
Steven Toth2074dff2009-05-02 11:39:46 -0300200 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
201 .name = "Hauppauge WinTV-HVR1270",
Michael Krufkya5dbf452009-05-03 23:27:02 -0300202 .portc = CX23885_MPEG_DVB,
Steven Toth2074dff2009-05-02 11:39:46 -0300203 },
Michael Krufkyd099bec2009-05-08 22:39:24 -0300204 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
205 .name = "Hauppauge WinTV-HVR1275",
206 .portc = CX23885_MPEG_DVB,
207 },
Michael Krufky19bc5792009-05-08 16:05:29 -0300208 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
209 .name = "Hauppauge WinTV-HVR1255",
210 .portc = CX23885_MPEG_DVB,
211 },
Michael Krufky6b926ec2009-05-12 17:32:17 -0300212 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
213 .name = "Hauppauge WinTV-HVR1210",
214 .portc = CX23885_MPEG_DVB,
215 },
David Wong493b7122009-05-18 05:25:49 -0300216 [CX23885_BOARD_MYGICA_X8506] = {
217 .name = "Mygica X8506 DMB-TH",
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300218 .tuner_type = TUNER_XC5000,
219 .tuner_addr = 0x61,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300220 .tuner_bus = 1,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300221 .porta = CX23885_ANALOG_VIDEO,
David Wong493b7122009-05-18 05:25:49 -0300222 .portb = CX23885_MPEG_DVB,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300223 .input = {
224 {
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300225 .type = CX23885_VMUX_TELEVISION,
226 .vmux = CX25840_COMPOSITE2,
227 },
228 {
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300229 .type = CX23885_VMUX_COMPOSITE1,
230 .vmux = CX25840_COMPOSITE8,
231 },
232 {
233 .type = CX23885_VMUX_SVIDEO,
234 .vmux = CX25840_SVIDEO_LUMA3 |
235 CX25840_SVIDEO_CHROMA4,
236 },
237 {
238 .type = CX23885_VMUX_COMPONENT,
239 .vmux = CX25840_COMPONENT_ON |
240 CX25840_VIN1_CH1 |
241 CX25840_VIN6_CH2 |
242 CX25840_VIN7_CH3,
243 },
244 },
David Wong493b7122009-05-18 05:25:49 -0300245 },
David Wong2365b2d2009-06-17 01:38:12 -0300246 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
247 .name = "Magic-Pro ProHDTV Extreme 2",
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300248 .tuner_type = TUNER_XC5000,
249 .tuner_addr = 0x61,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300250 .tuner_bus = 1,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300251 .porta = CX23885_ANALOG_VIDEO,
David Wong2365b2d2009-06-17 01:38:12 -0300252 .portb = CX23885_MPEG_DVB,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300253 .input = {
254 {
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300255 .type = CX23885_VMUX_TELEVISION,
256 .vmux = CX25840_COMPOSITE2,
257 },
258 {
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300259 .type = CX23885_VMUX_COMPOSITE1,
260 .vmux = CX25840_COMPOSITE8,
261 },
262 {
263 .type = CX23885_VMUX_SVIDEO,
264 .vmux = CX25840_SVIDEO_LUMA3 |
265 CX25840_SVIDEO_CHROMA4,
266 },
267 {
268 .type = CX23885_VMUX_COMPONENT,
269 .vmux = CX25840_COMPONENT_ON |
270 CX25840_VIN1_CH1 |
271 CX25840_VIN6_CH2 |
272 CX25840_VIN7_CH3,
273 },
274 },
David Wong2365b2d2009-06-17 01:38:12 -0300275 },
Steven Toth136973802009-07-20 15:37:25 -0300276 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
277 .name = "Hauppauge WinTV-HVR1850",
278 .portb = CX23885_MPEG_ENCODER,
279 .portc = CX23885_MPEG_DVB,
280 },
Vladimir Geroy34e383d2009-09-18 18:55:47 -0300281 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
282 .name = "Compro VideoMate E800",
283 .portc = CX23885_MPEG_DVB,
284 },
Michael Krufkyaee0b242009-11-11 01:52:45 -0300285 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
286 .name = "Hauppauge WinTV-HVR1290",
287 .portc = CX23885_MPEG_DVB,
288 },
David T. L. Wongea5697f2009-10-26 08:54:04 -0300289 [CX23885_BOARD_MYGICA_X8558PRO] = {
290 .name = "Mygica X8558 PRO DMB-TH",
291 .portb = CX23885_MPEG_DVB,
292 .portc = CX23885_MPEG_DVB,
293 },
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300294 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
295 .name = "LEADTEK WinFast PxTV1200",
296 .porta = CX23885_ANALOG_VIDEO,
297 .tuner_type = TUNER_XC2028,
298 .tuner_addr = 0x61,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300299 .tuner_bus = 1,
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300300 .input = {{
301 .type = CX23885_VMUX_TELEVISION,
302 .vmux = CX25840_VIN2_CH1 |
303 CX25840_VIN5_CH2 |
304 CX25840_NONE0_CH3,
305 }, {
306 .type = CX23885_VMUX_COMPOSITE1,
307 .vmux = CX25840_COMPOSITE1,
308 }, {
309 .type = CX23885_VMUX_SVIDEO,
310 .vmux = CX25840_SVIDEO_LUMA3 |
311 CX25840_SVIDEO_CHROMA4,
312 }, {
313 .type = CX23885_VMUX_COMPONENT,
314 .vmux = CX25840_VIN7_CH1 |
315 CX25840_VIN6_CH2 |
316 CX25840_VIN8_CH3 |
317 CX25840_COMPONENT_ON,
318 } },
319 },
Alexey Chernov9028f582010-12-06 17:09:53 -0300320 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
321 .name = "GoTView X5 3D Hybrid",
322 .tuner_type = TUNER_XC5000,
323 .tuner_addr = 0x64,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300324 .tuner_bus = 1,
Alexey Chernov9028f582010-12-06 17:09:53 -0300325 .porta = CX23885_ANALOG_VIDEO,
326 .portb = CX23885_MPEG_DVB,
327 .input = {{
328 .type = CX23885_VMUX_TELEVISION,
329 .vmux = CX25840_VIN2_CH1 |
330 CX25840_VIN5_CH2,
331 .gpio0 = 0x02,
332 }, {
333 .type = CX23885_VMUX_COMPOSITE1,
334 .vmux = CX23885_VMUX_COMPOSITE1,
335 }, {
336 .type = CX23885_VMUX_SVIDEO,
337 .vmux = CX25840_SVIDEO_LUMA3 |
338 CX25840_SVIDEO_CHROMA4,
339 } },
340 },
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300341 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
342 .ci_type = 2,
343 .name = "NetUP Dual DVB-T/C-CI RF",
344 .porta = CX23885_ANALOG_VIDEO,
345 .portb = CX23885_MPEG_DVB,
346 .portc = CX23885_MPEG_DVB,
347 .tuner_type = TUNER_XC5000,
348 .tuner_addr = 0x64,
349 .input = { {
350 .type = CX23885_VMUX_TELEVISION,
351 .vmux = CX25840_COMPOSITE1,
352 } },
353 },
Steven Tothd19770e2007-03-11 20:44:05 -0300354};
355const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
356
357/* ------------------------------------------------------------------ */
358/* PCI subsystem IDs */
359
360struct cx23885_subid cx23885_subids[] = {
361 {
362 .subvendor = 0x0070,
363 .subdevice = 0x3400,
364 .card = CX23885_BOARD_UNKNOWN,
Steven Toth9c8ced52008-10-16 20:18:44 -0300365 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300366 .subvendor = 0x0070,
367 .subdevice = 0x7600,
368 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
Steven Toth9c8ced52008-10-16 20:18:44 -0300369 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300370 .subvendor = 0x0070,
371 .subdevice = 0x7800,
372 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
Steven Toth9c8ced52008-10-16 20:18:44 -0300373 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300374 .subvendor = 0x0070,
375 .subdevice = 0x7801,
376 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
Steven Toth9c8ced52008-10-16 20:18:44 -0300377 }, {
Steven Totha77743b2007-08-22 21:01:20 -0300378 .subvendor = 0x0070,
Michael Krufky6ccb8cf2007-12-27 21:46:34 -0300379 .subdevice = 0x7809,
380 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
Steven Toth9c8ced52008-10-16 20:18:44 -0300381 }, {
Michael Krufky6ccb8cf2007-12-27 21:46:34 -0300382 .subvendor = 0x0070,
Steven Totha77743b2007-08-22 21:01:20 -0300383 .subdevice = 0x7911,
384 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
Steven Toth9c8ced52008-10-16 20:18:44 -0300385 }, {
Michael Krufky9bc37ca2007-09-08 15:17:13 -0300386 .subvendor = 0x18ac,
387 .subdevice = 0xd500,
388 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
Steven Toth9c8ced52008-10-16 20:18:44 -0300389 }, {
Steven Tothd1987d52007-12-18 01:57:06 -0300390 .subvendor = 0x0070,
Michael Krufkyb00fff02007-12-27 22:19:31 -0300391 .subdevice = 0x7790,
392 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
Steven Toth9c8ced52008-10-16 20:18:44 -0300393 }, {
Michael Krufkyb00fff02007-12-27 22:19:31 -0300394 .subvendor = 0x0070,
Steven Tothd1987d52007-12-18 01:57:06 -0300395 .subdevice = 0x7797,
396 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
Steven Toth9c8ced52008-10-16 20:18:44 -0300397 }, {
Michael Krufky07b4a832007-12-18 01:09:11 -0300398 .subvendor = 0x0070,
Michael Krufkyb00fff02007-12-27 22:19:31 -0300399 .subdevice = 0x7710,
400 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
Steven Toth9c8ced52008-10-16 20:18:44 -0300401 }, {
Michael Krufkyb00fff02007-12-27 22:19:31 -0300402 .subvendor = 0x0070,
Michael Krufky07b4a832007-12-18 01:09:11 -0300403 .subdevice = 0x7717,
404 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
Steven Tothb3ea0162008-04-19 01:14:19 -0300405 }, {
406 .subvendor = 0x0070,
407 .subdevice = 0x71d1,
408 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
Steven Totha780a312008-04-19 01:25:52 -0300409 }, {
410 .subvendor = 0x0070,
Michael Krufky3c3852c2008-05-02 16:12:44 -0300411 .subdevice = 0x71d3,
412 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
413 }, {
414 .subvendor = 0x0070,
Steven Totha780a312008-04-19 01:25:52 -0300415 .subdevice = 0x8101,
416 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
Steven Toth66762372008-04-22 15:38:26 -0300417 }, {
418 .subvendor = 0x0070,
419 .subdevice = 0x8010,
420 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
Steven Toth9c8ced52008-10-16 20:18:44 -0300421 }, {
Michael Krufky335377b2008-05-07 01:43:10 -0300422 .subvendor = 0x18ac,
423 .subdevice = 0xd618,
424 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
Steven Toth9c8ced52008-10-16 20:18:44 -0300425 }, {
Steven Tothaef2d182008-08-04 21:39:53 -0300426 .subvendor = 0x18ac,
427 .subdevice = 0xdb78,
428 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
Steven Toth4c56b042008-08-12 13:30:03 -0300429 }, {
430 .subvendor = 0x107d,
431 .subdevice = 0x6681,
432 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300433 }, {
434 .subvendor = 0x185b,
435 .subdevice = 0xe800,
436 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
Igor M. Liplianin96318d02009-01-17 12:11:20 -0300437 }, {
438 .subvendor = 0x6920,
439 .subdevice = 0x8888,
440 .card = CX23885_BOARD_TBS_6920,
Igor M. Liplianin579943f2009-01-17 12:18:26 -0300441 }, {
442 .subvendor = 0xd470,
443 .subdevice = 0x9022,
444 .card = CX23885_BOARD_TEVII_S470,
Igor M. Liplianinc9b8b042009-01-17 12:23:31 -0300445 }, {
446 .subvendor = 0x0001,
447 .subdevice = 0x2005,
448 .card = CX23885_BOARD_DVBWORLD_2005,
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300449 }, {
450 .subvendor = 0x1b55,
451 .subdevice = 0x2a2c,
452 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
Steven Toth2074dff2009-05-02 11:39:46 -0300453 }, {
454 .subvendor = 0x0070,
455 .subdevice = 0x2211,
456 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
Michael Krufkyd099bec2009-05-08 22:39:24 -0300457 }, {
458 .subvendor = 0x0070,
459 .subdevice = 0x2215,
460 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
Michael Krufky19bc5792009-05-08 16:05:29 -0300461 }, {
462 .subvendor = 0x0070,
Michael Krufky7d7b5282010-06-30 18:17:35 -0300463 .subdevice = 0x221d,
464 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
465 }, {
466 .subvendor = 0x0070,
Michael Krufky19bc5792009-05-08 16:05:29 -0300467 .subdevice = 0x2251,
468 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
Michael Krufky6b926ec2009-05-12 17:32:17 -0300469 }, {
470 .subvendor = 0x0070,
Michael Krufky7d7b5282010-06-30 18:17:35 -0300471 .subdevice = 0x2259,
472 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
473 }, {
474 .subvendor = 0x0070,
Michael Krufky6b926ec2009-05-12 17:32:17 -0300475 .subdevice = 0x2291,
476 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
477 }, {
478 .subvendor = 0x0070,
479 .subdevice = 0x2295,
480 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
David Wong493b7122009-05-18 05:25:49 -0300481 }, {
Michael Krufky7d7b5282010-06-30 18:17:35 -0300482 .subvendor = 0x0070,
483 .subdevice = 0x2299,
484 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
485 }, {
486 .subvendor = 0x0070,
487 .subdevice = 0x229d,
488 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
489 }, {
490 .subvendor = 0x0070,
491 .subdevice = 0x22f0,
492 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
493 }, {
494 .subvendor = 0x0070,
495 .subdevice = 0x22f1,
496 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
497 }, {
498 .subvendor = 0x0070,
499 .subdevice = 0x22f2,
500 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
501 }, {
502 .subvendor = 0x0070,
503 .subdevice = 0x22f3,
504 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
505 }, {
506 .subvendor = 0x0070,
507 .subdevice = 0x22f4,
508 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
509 }, {
510 .subvendor = 0x0070,
511 .subdevice = 0x22f5,
512 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
513 }, {
David Wong493b7122009-05-18 05:25:49 -0300514 .subvendor = 0x14f1,
515 .subdevice = 0x8651,
516 .card = CX23885_BOARD_MYGICA_X8506,
David Wong2365b2d2009-06-17 01:38:12 -0300517 }, {
518 .subvendor = 0x14f1,
519 .subdevice = 0x8657,
520 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
Steven Toth136973802009-07-20 15:37:25 -0300521 }, {
522 .subvendor = 0x0070,
523 .subdevice = 0x8541,
524 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
Vladimir Geroy34e383d2009-09-18 18:55:47 -0300525 }, {
526 .subvendor = 0x1858,
527 .subdevice = 0xe800,
528 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
Michael Krufkyaee0b242009-11-11 01:52:45 -0300529 }, {
530 .subvendor = 0x0070,
531 .subdevice = 0x8551,
532 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
David T. L. Wongea5697f2009-10-26 08:54:04 -0300533 }, {
534 .subvendor = 0x14f1,
535 .subdevice = 0x8578,
536 .card = CX23885_BOARD_MYGICA_X8558PRO,
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300537 }, {
538 .subvendor = 0x107d,
539 .subdevice = 0x6f22,
540 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
Alexey Chernov9028f582010-12-06 17:09:53 -0300541 }, {
542 .subvendor = 0x5654,
543 .subdevice = 0x2390,
544 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300545 }, {
546 .subvendor = 0x1b55,
547 .subdevice = 0xe2e4,
548 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
Steven Tothd19770e2007-03-11 20:44:05 -0300549 },
550};
551const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
552
553void cx23885_card_list(struct cx23885_dev *dev)
554{
555 int i;
556
557 if (0 == dev->pci->subsystem_vendor &&
558 0 == dev->pci->subsystem_device) {
Steven Toth9c8ced52008-10-16 20:18:44 -0300559 printk(KERN_INFO
560 "%s: Board has no valid PCIe Subsystem ID and can't\n"
561 "%s: be autodetected. Pass card=<n> insmod option\n"
562 "%s: to workaround that. Redirect complaints to the\n"
563 "%s: vendor of the TV card. Best regards,\n"
Steven Tothd19770e2007-03-11 20:44:05 -0300564 "%s: -- tux\n",
565 dev->name, dev->name, dev->name, dev->name, dev->name);
566 } else {
Steven Toth9c8ced52008-10-16 20:18:44 -0300567 printk(KERN_INFO
568 "%s: Your board isn't known (yet) to the driver.\n"
569 "%s: Try to pick one of the existing card configs via\n"
Steven Tothd19770e2007-03-11 20:44:05 -0300570 "%s: card=<n> insmod option. Updating to the latest\n"
571 "%s: version might help as well.\n",
572 dev->name, dev->name, dev->name, dev->name);
573 }
Steven Toth9c8ced52008-10-16 20:18:44 -0300574 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
Steven Tothd19770e2007-03-11 20:44:05 -0300575 dev->name);
576 for (i = 0; i < cx23885_bcount; i++)
Steven Toth9c8ced52008-10-16 20:18:44 -0300577 printk(KERN_INFO "%s: card=%d -> %s\n",
Steven Tothd19770e2007-03-11 20:44:05 -0300578 dev->name, i, cx23885_boards[i].name);
579}
580
581static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
582{
583 struct tveeprom tv;
584
Steven Toth9c8ced52008-10-16 20:18:44 -0300585 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
586 eeprom_data);
Steven Tothd19770e2007-03-11 20:44:05 -0300587
Steven Tothd19770e2007-03-11 20:44:05 -0300588 /* Make sure we support the board model */
Steven Toth9c8ced52008-10-16 20:18:44 -0300589 switch (tv.model) {
Michael Krufky5308cf02009-05-12 18:37:35 -0300590 case 22001:
591 /* WinTV-HVR1270 (PCIe, Retail, half height)
592 * ATSC/QAM and basic analog, IR Blast */
593 case 22009:
594 /* WinTV-HVR1210 (PCIe, Retail, half height)
595 * DVB-T and basic analog, IR Blast */
596 case 22011:
597 /* WinTV-HVR1270 (PCIe, Retail, half height)
598 * ATSC/QAM and basic analog, IR Recv */
599 case 22019:
600 /* WinTV-HVR1210 (PCIe, Retail, half height)
601 * DVB-T and basic analog, IR Recv */
602 case 22021:
603 /* WinTV-HVR1275 (PCIe, Retail, half height)
604 * ATSC/QAM and basic analog, IR Recv */
605 case 22029:
606 /* WinTV-HVR1210 (PCIe, Retail, half height)
607 * DVB-T and basic analog, IR Recv */
608 case 22101:
609 /* WinTV-HVR1270 (PCIe, Retail, full height)
610 * ATSC/QAM and basic analog, IR Blast */
611 case 22109:
612 /* WinTV-HVR1210 (PCIe, Retail, full height)
613 * DVB-T and basic analog, IR Blast */
614 case 22111:
615 /* WinTV-HVR1270 (PCIe, Retail, full height)
616 * ATSC/QAM and basic analog, IR Recv */
617 case 22119:
618 /* WinTV-HVR1210 (PCIe, Retail, full height)
619 * DVB-T and basic analog, IR Recv */
620 case 22121:
621 /* WinTV-HVR1275 (PCIe, Retail, full height)
622 * ATSC/QAM and basic analog, IR Recv */
623 case 22129:
624 /* WinTV-HVR1210 (PCIe, Retail, full height)
625 * DVB-T and basic analog, IR Recv */
Michael Krufky36396c82008-05-02 16:14:33 -0300626 case 71009:
627 /* WinTV-HVR1200 (PCIe, Retail, full height)
628 * DVB-T and basic analog */
629 case 71359:
630 /* WinTV-HVR1200 (PCIe, OEM, half height)
631 * DVB-T and basic analog */
632 case 71439:
633 /* WinTV-HVR1200 (PCIe, OEM, half height)
634 * DVB-T and basic analog */
635 case 71449:
636 /* WinTV-HVR1200 (PCIe, OEM, full height)
637 * DVB-T and basic analog */
638 case 71939:
639 /* WinTV-HVR1200 (PCIe, OEM, half height)
640 * DVB-T and basic analog */
641 case 71949:
642 /* WinTV-HVR1200 (PCIe, OEM, full height)
643 * DVB-T and basic analog */
644 case 71959:
645 /* WinTV-HVR1200 (PCIe, OEM, full height)
646 * DVB-T and basic analog */
647 case 71979:
648 /* WinTV-HVR1200 (PCIe, OEM, half height)
649 * DVB-T and basic analog */
650 case 71999:
651 /* WinTV-HVR1200 (PCIe, OEM, full height)
652 * DVB-T and basic analog */
Steven Toth9c8ced52008-10-16 20:18:44 -0300653 case 76601:
654 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
655 channel ATSC and MPEG2 HW Encoder */
656 case 77001:
657 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
658 and Basic analog */
659 case 77011:
660 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
661 and Basic analog */
662 case 77041:
663 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
664 and Basic analog */
665 case 77051:
666 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
667 and Basic analog */
668 case 78011:
669 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
670 Dual channel ATSC and MPEG2 HW Encoder */
671 case 78501:
672 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
673 Dual channel ATSC and MPEG2 HW Encoder */
674 case 78521:
675 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
676 Dual channel ATSC and MPEG2 HW Encoder */
677 case 78531:
678 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
679 Dual channel ATSC and MPEG2 HW Encoder */
680 case 78631:
681 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
682 Dual channel ATSC and MPEG2 HW Encoder */
683 case 79001:
684 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
685 ATSC and Basic analog */
686 case 79101:
687 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
688 ATSC and Basic analog */
Andy Wallsebbeb462010-07-18 17:35:00 -0300689 case 79501:
690 /* WinTV-HVR1250 (PCIe, No IR, half height,
691 ATSC [at least] and Basic analog) */
Steven Toth9c8ced52008-10-16 20:18:44 -0300692 case 79561:
693 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
694 ATSC and Basic analog */
695 case 79571:
696 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
697 ATSC and Basic analog */
698 case 79671:
699 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
700 ATSC and Basic analog */
Steven Toth66762372008-04-22 15:38:26 -0300701 case 80019:
702 /* WinTV-HVR1400 (Express Card, Retail, IR,
703 * DVB-T and Basic analog */
Michael Krufky36396c82008-05-02 16:14:33 -0300704 case 81509:
705 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
706 * DVB-T and MPEG2 HW Encoder */
Steven Totha780a312008-04-19 01:25:52 -0300707 case 81519:
Michael Krufky36396c82008-05-02 16:14:33 -0300708 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
Steven Totha780a312008-04-19 01:25:52 -0300709 * DVB-T and MPEG2 HW Encoder */
Steven Tothd19770e2007-03-11 20:44:05 -0300710 break;
Steven Toth136973802009-07-20 15:37:25 -0300711 case 85021:
Michael Krufky73a5f412009-11-11 10:46:40 -0300712 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
Steven Toth136973802009-07-20 15:37:25 -0300713 Dual channel ATSC and MPEG2 HW Encoder */
714 break;
Michael Krufky73a5f412009-11-11 10:46:40 -0300715 case 85721:
716 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
717 Dual channel ATSC and Basic analog */
718 break;
Steven Tothd19770e2007-03-11 20:44:05 -0300719 default:
Steven Toth136973802009-07-20 15:37:25 -0300720 printk(KERN_WARNING "%s: warning: "
721 "unknown hauppauge model #%d\n",
Steven Toth9c8ced52008-10-16 20:18:44 -0300722 dev->name, tv.model);
Steven Tothd19770e2007-03-11 20:44:05 -0300723 break;
724 }
725
726 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
727 dev->name, tv.model);
728}
729
Michael Krufkyd7cba042008-09-12 13:31:45 -0300730int cx23885_tuner_callback(void *priv, int component, int command, int arg)
Steven Toth8c700172008-01-05 16:55:45 -0300731{
Steven Toth89ce2212008-08-04 22:18:19 -0300732 struct cx23885_tsport *port = priv;
733 struct cx23885_dev *dev = port->dev;
Steven Toth6df51692008-06-30 22:17:05 -0300734 u32 bitmask = 0;
735
Steven Toth89ce2212008-08-04 22:18:19 -0300736 if (command == XC2028_RESET_CLK)
737 return 0;
738
Steven Toth6df51692008-06-30 22:17:05 -0300739 if (command != 0) {
740 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
741 __func__, command);
742 return -EINVAL;
743 }
Steven Toth8c700172008-01-05 16:55:45 -0300744
Steven Toth9c8ced52008-10-16 20:18:44 -0300745 switch (dev->board) {
Steven Toth90a71b12008-08-04 21:38:46 -0300746 case CX23885_BOARD_HAUPPAUGE_HVR1400:
747 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Toth8c700172008-01-05 16:55:45 -0300748 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Toth4c56b042008-08-12 13:30:03 -0300749 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300750 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Vladimir Geroy34e383d2009-09-18 18:55:47 -0300751 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300752 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
Steven Toth90a71b12008-08-04 21:38:46 -0300753 /* Tuner Reset Command */
Steven Toth4c56b042008-08-12 13:30:03 -0300754 bitmask = 0x04;
Steven Toth6df51692008-06-30 22:17:05 -0300755 break;
756 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
Steven Tothaef2d182008-08-04 21:39:53 -0300757 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
Steven Toth4c56b042008-08-12 13:30:03 -0300758 /* Two identical tuners on two different i2c buses,
759 * we need to reset the correct gpio. */
Christopher Pascoed4dc6732009-04-27 11:27:04 -0300760 if (port->nr == 1)
Steven Toth4c56b042008-08-12 13:30:03 -0300761 bitmask = 0x01;
Christopher Pascoed4dc6732009-04-27 11:27:04 -0300762 else if (port->nr == 2)
Steven Toth4c56b042008-08-12 13:30:03 -0300763 bitmask = 0x04;
Steven Toth8c700172008-01-05 16:55:45 -0300764 break;
Alexey Chernov9028f582010-12-06 17:09:53 -0300765 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
766 /* Tuner Reset Command */
767 bitmask = 0x02;
768 break;
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300769 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
770 altera_ci_tuner_reset(dev, port->nr);
771 break;
Steven Toth8c700172008-01-05 16:55:45 -0300772 }
773
Steven Toth6df51692008-06-30 22:17:05 -0300774 if (bitmask) {
775 /* Drive the tuner into reset and back out */
776 cx_clear(GP0_IO, bitmask);
777 mdelay(200);
778 cx_set(GP0_IO, bitmask);
779 }
780
781 return 0;
Steven Toth8c700172008-01-05 16:55:45 -0300782}
Steven Toth73c993a2008-01-05 17:08:05 -0300783
Steven Totha6a3f142007-09-08 21:31:56 -0300784void cx23885_gpio_setup(struct cx23885_dev *dev)
785{
Steven Toth9c8ced52008-10-16 20:18:44 -0300786 switch (dev->board) {
Steven Totha6a3f142007-09-08 21:31:56 -0300787 case CX23885_BOARD_HAUPPAUGE_HVR1250:
788 /* GPIO-0 cx24227 demodulator reset */
789 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
790 break;
Michael Krufky07b4a832007-12-18 01:09:11 -0300791 case CX23885_BOARD_HAUPPAUGE_HVR1500:
792 /* GPIO-0 cx24227 demodulator */
793 /* GPIO-2 xc3028 tuner */
794
795 /* Put the parts into reset */
796 cx_set(GP0_IO, 0x00050000);
797 cx_clear(GP0_IO, 0x00000005);
798 msleep(5);
799
800 /* Bring the parts out of reset */
801 cx_set(GP0_IO, 0x00050005);
802 break;
Steven Tothd1987d52007-12-18 01:57:06 -0300803 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
804 /* GPIO-0 cx24227 demodulator reset */
805 /* GPIO-2 xc5000 tuner reset */
806 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
807 break;
Steven Totha6a3f142007-09-08 21:31:56 -0300808 case CX23885_BOARD_HAUPPAUGE_HVR1800:
809 /* GPIO-0 656_CLK */
810 /* GPIO-1 656_D0 */
811 /* GPIO-2 8295A Reset */
812 /* GPIO-3-10 cx23417 data0-7 */
813 /* GPIO-11-14 cx23417 addr0-3 */
814 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
815 /* GPIO-19 IR_RX */
Michael Krufky3ba71d22007-12-07 01:40:36 -0300816
Steven Totha589b662008-01-13 23:44:47 -0300817 /* CX23417 GPIO's */
818 /* EIO15 Zilog Reset */
819 /* EIO14 S5H1409/CX24227 Reset */
Steven Tothf659c512009-06-25 23:43:31 -0300820 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
821
822 /* Put the demod into reset and protect the eeprom */
823 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
824 mdelay(100);
825
826 /* Bring the demod and blaster out of reset */
827 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
828 mdelay(100);
Steven Totha589b662008-01-13 23:44:47 -0300829
Steven Toth5206d6e2008-01-10 02:09:27 -0300830 /* Force the TDA8295A into reset and back */
Steven Toth21ff3e42009-06-25 23:50:39 -0300831 cx23885_gpio_enable(dev, GPIO_2, 1);
832 cx23885_gpio_set(dev, GPIO_2);
Steven Toth5206d6e2008-01-10 02:09:27 -0300833 mdelay(20);
Steven Toth21ff3e42009-06-25 23:50:39 -0300834 cx23885_gpio_clear(dev, GPIO_2);
Steven Toth5206d6e2008-01-10 02:09:27 -0300835 mdelay(20);
Steven Toth21ff3e42009-06-25 23:50:39 -0300836 cx23885_gpio_set(dev, GPIO_2);
Steven Toth5206d6e2008-01-10 02:09:27 -0300837 mdelay(20);
Steven Totha6a3f142007-09-08 21:31:56 -0300838 break;
Steven Tothb3ea0162008-04-19 01:14:19 -0300839 case CX23885_BOARD_HAUPPAUGE_HVR1200:
840 /* GPIO-0 tda10048 demodulator reset */
841 /* GPIO-2 tda18271 tuner reset */
842
843 /* Put the parts into reset and back */
844 cx_set(GP0_IO, 0x00050000);
845 mdelay(20);
846 cx_clear(GP0_IO, 0x00000005);
847 mdelay(20);
848 cx_set(GP0_IO, 0x00050005);
849 break;
Steven Totha780a312008-04-19 01:25:52 -0300850 case CX23885_BOARD_HAUPPAUGE_HVR1700:
851 /* GPIO-0 TDA10048 demodulator reset */
852 /* GPIO-2 TDA8295A Reset */
853 /* GPIO-3-10 cx23417 data0-7 */
854 /* GPIO-11-14 cx23417 addr0-3 */
855 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
856
857 /* The following GPIO's are on the interna AVCore (cx25840) */
858 /* GPIO-19 IR_RX */
859 /* GPIO-20 IR_TX 416/DVBT Select */
860 /* GPIO-21 IIS DAT */
861 /* GPIO-22 IIS WCLK */
862 /* GPIO-23 IIS BCLK */
863
864 /* Put the parts into reset and back */
865 cx_set(GP0_IO, 0x00050000);
866 mdelay(20);
867 cx_clear(GP0_IO, 0x00000005);
868 mdelay(20);
869 cx_set(GP0_IO, 0x00050005);
870 break;
Steven Toth66762372008-04-22 15:38:26 -0300871 case CX23885_BOARD_HAUPPAUGE_HVR1400:
872 /* GPIO-0 Dibcom7000p demodulator reset */
873 /* GPIO-2 xc3028L tuner reset */
874 /* GPIO-13 LED */
875
876 /* Put the parts into reset and back */
877 cx_set(GP0_IO, 0x00050000);
878 mdelay(20);
879 cx_clear(GP0_IO, 0x00000005);
880 mdelay(20);
881 cx_set(GP0_IO, 0x00050005);
882 break;
Steven Toth1ecc5ae2008-06-30 21:23:50 -0300883 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
884 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
885 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
886 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
887 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
888
889 /* Put the parts into reset and back */
890 cx_set(GP0_IO, 0x000f0000);
891 mdelay(20);
892 cx_clear(GP0_IO, 0x0000000f);
893 mdelay(20);
894 cx_set(GP0_IO, 0x000f000f);
895 break;
Steven Tothaef2d182008-08-04 21:39:53 -0300896 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
897 /* GPIO-0 portb xc3028 reset */
898 /* GPIO-1 portb zl10353 reset */
899 /* GPIO-2 portc xc3028 reset */
900 /* GPIO-3 portc zl10353 reset */
901
902 /* Put the parts into reset and back */
903 cx_set(GP0_IO, 0x000f0000);
904 mdelay(20);
905 cx_clear(GP0_IO, 0x0000000f);
906 mdelay(20);
907 cx_set(GP0_IO, 0x000f000f);
908 break;
Steven Toth4c56b042008-08-12 13:30:03 -0300909 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300910 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Vladimir Geroy34e383d2009-09-18 18:55:47 -0300911 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300912 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
Steven Toth4c56b042008-08-12 13:30:03 -0300913 /* GPIO-2 xc3028 tuner reset */
914
915 /* The following GPIO's are on the internal AVCore (cx25840) */
916 /* GPIO-? zl10353 demod reset */
917
918 /* Put the parts into reset and back */
919 cx_set(GP0_IO, 0x00040000);
920 mdelay(20);
921 cx_clear(GP0_IO, 0x00000004);
922 mdelay(20);
923 cx_set(GP0_IO, 0x00040004);
924 break;
Igor M. Liplianin96318d02009-01-17 12:11:20 -0300925 case CX23885_BOARD_TBS_6920:
926 cx_write(MC417_CTL, 0x00000036);
927 cx_write(MC417_OEN, 0x00001000);
Igor M. Liplianin09ea33e2009-11-24 20:16:04 -0300928 cx_set(MC417_RWD, 0x00000002);
929 mdelay(200);
930 cx_clear(MC417_RWD, 0x00000800);
931 mdelay(200);
932 cx_set(MC417_RWD, 0x00000800);
933 mdelay(200);
Igor M. Liplianin96318d02009-01-17 12:11:20 -0300934 break;
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300935 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
936 /* GPIO-0 INTA from CiMax1
937 GPIO-1 INTB from CiMax2
938 GPIO-2 reset chips
939 GPIO-3 to GPIO-10 data/addr for CA
940 GPIO-11 ~CS0 to CiMax1
941 GPIO-12 ~CS1 to CiMax2
942 GPIO-13 ADL0 load LSB addr
943 GPIO-14 ADL1 load MSB addr
944 GPIO-15 ~RDY from CiMax
945 GPIO-17 ~RD to CiMax
946 GPIO-18 ~WR to CiMax
947 */
948 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
949 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
950 cx_clear(GP0_IO, 0x00030004);
951 mdelay(100);/* reset delay */
952 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
953 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
954 /* GPIO-15 IN as ~ACK, rest as OUT */
955 cx_write(MC417_OEN, 0x00001000);
956 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
957 cx_write(MC417_RWD, 0x0000c300);
958 /* enable irq */
959 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
960 break;
Steven Toth2074dff2009-05-02 11:39:46 -0300961 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -0300962 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -0300963 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Michael Krufky6b926ec2009-05-12 17:32:17 -0300964 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Michael Krufkyd099bec2009-05-08 22:39:24 -0300965 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
Michael Krufky6b926ec2009-05-12 17:32:17 -0300966 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
967 /* GPIO-9 Demod reset */
Steven Toth2074dff2009-05-02 11:39:46 -0300968
969 /* Put the parts into reset and back */
Michael Krufkyd099bec2009-05-08 22:39:24 -0300970 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
971 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
Steven Toth2074dff2009-05-02 11:39:46 -0300972 cx23885_gpio_clear(dev, GPIO_9);
973 mdelay(20);
974 cx23885_gpio_set(dev, GPIO_9);
975 break;
David Wong493b7122009-05-18 05:25:49 -0300976 case CX23885_BOARD_MYGICA_X8506:
David Wong2365b2d2009-06-17 01:38:12 -0300977 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
David T.L. Wong8e069bb2009-10-21 12:29:11 -0300978 /* GPIO-0 (0)Analog / (1)Digital TV */
David Wong493b7122009-05-18 05:25:49 -0300979 /* GPIO-1 reset XC5000 */
David Wong2365b2d2009-06-17 01:38:12 -0300980 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
David T.L. Wong8e069bb2009-10-21 12:29:11 -0300981 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
982 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
David Wong493b7122009-05-18 05:25:49 -0300983 mdelay(100);
David T.L. Wong8e069bb2009-10-21 12:29:11 -0300984 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
David Wong493b7122009-05-18 05:25:49 -0300985 mdelay(100);
986 break;
David T. L. Wongea5697f2009-10-26 08:54:04 -0300987 case CX23885_BOARD_MYGICA_X8558PRO:
988 /* GPIO-0 reset first ATBM8830 */
989 /* GPIO-1 reset second ATBM8830 */
990 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
991 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
992 mdelay(100);
993 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
994 mdelay(100);
995 break;
Steven Toth136973802009-07-20 15:37:25 -0300996 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufkyaee0b242009-11-11 01:52:45 -0300997 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Steven Toth136973802009-07-20 15:37:25 -0300998 /* GPIO-0 656_CLK */
999 /* GPIO-1 656_D0 */
1000 /* GPIO-2 Wake# */
1001 /* GPIO-3-10 cx23417 data0-7 */
1002 /* GPIO-11-14 cx23417 addr0-3 */
1003 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1004 /* GPIO-19 IR_RX */
1005 /* GPIO-20 C_IR_TX */
1006 /* GPIO-21 I2S DAT */
1007 /* GPIO-22 I2S WCLK */
1008 /* GPIO-23 I2S BCLK */
1009 /* ALT GPIO: EXP GPIO LATCH */
1010
1011 /* CX23417 GPIO's */
1012 /* GPIO-14 S5H1411/CX24228 Reset */
1013 /* GPIO-13 EEPROM write protect */
1014 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1015
1016 /* Put the demod into reset and protect the eeprom */
1017 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1018 mdelay(100);
1019
1020 /* Bring the demod out of reset */
1021 mc417_gpio_set(dev, GPIO_14);
1022 mdelay(100);
1023
1024 /* CX24228 GPIO */
1025 /* Connected to IF / Mux */
1026 break;
Alexey Chernov9028f582010-12-06 17:09:53 -03001027 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1028 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1029 break;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001030 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1031 /* GPIO-0 ~INT in
1032 GPIO-1 TMS out
1033 GPIO-2 ~reset chips out
1034 GPIO-3 to GPIO-10 data/addr for CA in/out
1035 GPIO-11 ~CS out
1036 GPIO-12 ADDR out
1037 GPIO-13 ~WR out
1038 GPIO-14 ~RD out
1039 GPIO-15 ~RDY in
1040 GPIO-16 TCK out
1041 GPIO-17 TDO in
1042 GPIO-18 TDI out
1043 */
1044 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1045 /* GPIO-0 as INT, reset & TMS low */
1046 cx_clear(GP0_IO, 0x00010006);
1047 mdelay(100);/* reset delay */
1048 cx_set(GP0_IO, 0x00000004); /* reset high */
1049 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1050 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1051 cx_write(MC417_OEN, 0x00005000);
1052 /* ~RD, ~WR high; ADDR low; ~CS high */
1053 cx_write(MC417_RWD, 0x00000d00);
1054 /* enable irq */
1055 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1056 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001057 }
1058}
1059
1060int cx23885_ir_init(struct cx23885_dev *dev)
1061{
Andy Walls98d109f2010-07-19 00:41:41 -03001062 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
Andy Walls81f287d2010-07-18 20:26:37 -03001063 {
1064 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1065 .pin = CX23885_PIN_IR_RX_GPIO19,
1066 .function = CX23885_PAD_IR_RX,
1067 .value = 0,
1068 .strength = CX25840_PIN_DRIVE_MEDIUM,
1069 }, {
1070 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1071 .pin = CX23885_PIN_IR_TX_GPIO20,
1072 .function = CX23885_PAD_IR_TX,
1073 .value = 0,
1074 .strength = CX25840_PIN_DRIVE_MEDIUM,
1075 }
1076 };
Andy Walls98d109f2010-07-19 00:41:41 -03001077 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1078
1079 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1080 {
1081 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1082 .pin = CX23885_PIN_IR_RX_GPIO19,
1083 .function = CX23885_PAD_IR_RX,
1084 .value = 0,
1085 .strength = CX25840_PIN_DRIVE_MEDIUM,
1086 }
1087 };
1088 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
Andy Walls81f287d2010-07-18 20:26:37 -03001089
1090 struct v4l2_subdev_ir_parameters params;
Andy Walls29f8a0a2009-09-26 23:17:30 -03001091 int ret = 0;
Steven Totha6a3f142007-09-08 21:31:56 -03001092 switch (dev->board) {
Michael Krufky07b4a832007-12-18 01:09:11 -03001093 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Tothd1987d52007-12-18 01:57:06 -03001094 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Totha6a3f142007-09-08 21:31:56 -03001095 case CX23885_BOARD_HAUPPAUGE_HVR1800:
Steven Tothb3ea0162008-04-19 01:14:19 -03001096 case CX23885_BOARD_HAUPPAUGE_HVR1200:
Steven Toth66762372008-04-22 15:38:26 -03001097 case CX23885_BOARD_HAUPPAUGE_HVR1400:
Steven Toth2074dff2009-05-02 11:39:46 -03001098 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001099 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001100 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001101 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Steven Totha6a3f142007-09-08 21:31:56 -03001102 /* FIXME: Implement me */
1103 break;
Andy Walls29f8a0a2009-09-26 23:17:30 -03001104 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -03001105 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Walls29f8a0a2009-09-26 23:17:30 -03001106 ret = cx23888_ir_probe(dev);
1107 if (ret)
1108 break;
1109 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
Andy Walls81f287d2010-07-18 20:26:37 -03001110 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
Andy Walls98d109f2010-07-19 00:41:41 -03001111 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
Andy Walls81f287d2010-07-18 20:26:37 -03001112 /*
1113 * For these boards we need to invert the Tx output via the
1114 * IR controller to have the LED off while idle
1115 */
1116 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1117 params.enable = false;
1118 params.shutdown = false;
1119 params.invert_level = true;
1120 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1121 params.shutdown = true;
1122 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
Andy Walls29f8a0a2009-09-26 23:17:30 -03001123 break;
Andy Walls98d109f2010-07-19 00:41:41 -03001124 case CX23885_BOARD_TEVII_S470:
Andy Wallsfa647f22010-07-19 21:22:05 -03001125 if (!enable_885_ir)
1126 break;
Andy Walls98d109f2010-07-19 00:41:41 -03001127 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1128 if (dev->sd_ir == NULL) {
1129 ret = -ENODEV;
1130 break;
1131 }
1132 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1133 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
Andy Walls98d109f2010-07-19 00:41:41 -03001134 break;
1135 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsfa647f22010-07-19 21:22:05 -03001136 if (!enable_885_ir)
1137 break;
Andy Walls98d109f2010-07-19 00:41:41 -03001138 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1139 if (dev->sd_ir == NULL) {
1140 ret = -ENODEV;
1141 break;
1142 }
1143 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1144 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
Andy Walls98d109f2010-07-19 00:41:41 -03001145 break;
Steven Toth12886872008-08-04 21:41:06 -03001146 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1147 request_module("ir-kbd-i2c");
1148 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001149 }
1150
Andy Walls29f8a0a2009-09-26 23:17:30 -03001151 return ret;
Steven Totha6a3f142007-09-08 21:31:56 -03001152}
1153
Andy Wallsf59ad612009-09-27 19:51:50 -03001154void cx23885_ir_fini(struct cx23885_dev *dev)
1155{
1156 switch (dev->board) {
1157 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -03001158 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001159 cx23885_irq_remove(dev, PCI_MSK_IR);
Andy Wallsf59ad612009-09-27 19:51:50 -03001160 cx23888_ir_remove(dev);
1161 dev->sd_ir = NULL;
1162 break;
Andy Walls98d109f2010-07-19 00:41:41 -03001163 case CX23885_BOARD_TEVII_S470:
1164 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001165 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
Andy Walls98d109f2010-07-19 00:41:41 -03001166 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1167 dev->sd_ir = NULL;
1168 break;
Andy Wallsf59ad612009-09-27 19:51:50 -03001169 }
1170}
1171
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001172int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1173{
1174 int data;
1175 int tdo = 0;
1176 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1177 /*TMS*/
1178 data = ((cx_read(GP0_IO)) & (~0x00000002));
1179 data |= (tms ? 0x00020002 : 0x00020000);
1180 cx_write(GP0_IO, data);
1181
1182 /*TDI*/
1183 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1184 data |= (tdi ? 0x00008000 : 0);
1185 cx_write(MC417_RWD, data);
1186 if (read_tdo)
1187 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1188
1189 cx_write(MC417_RWD, data | 0x00002000);
1190 udelay(1);
1191 /*TCK*/
1192 cx_write(MC417_RWD, data);
1193
1194 return tdo;
1195}
1196
Andy Wallsf59ad612009-09-27 19:51:50 -03001197void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1198{
1199 switch (dev->board) {
1200 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -03001201 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001202 if (dev->sd_ir)
1203 cx23885_irq_add_enable(dev, PCI_MSK_IR);
Andy Wallsf59ad612009-09-27 19:51:50 -03001204 break;
Andy Walls98d109f2010-07-19 00:41:41 -03001205 case CX23885_BOARD_TEVII_S470:
1206 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001207 if (dev->sd_ir)
1208 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
Andy Walls98d109f2010-07-19 00:41:41 -03001209 break;
Andy Wallsf59ad612009-09-27 19:51:50 -03001210 }
1211}
1212
Steven Tothd19770e2007-03-11 20:44:05 -03001213void cx23885_card_setup(struct cx23885_dev *dev)
1214{
Steven Totha6a3f142007-09-08 21:31:56 -03001215 struct cx23885_tsport *ts1 = &dev->ts1;
1216 struct cx23885_tsport *ts2 = &dev->ts2;
1217
Steven Tothd19770e2007-03-11 20:44:05 -03001218 static u8 eeprom[256];
1219
1220 if (dev->i2c_bus[0].i2c_rc == 0) {
1221 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
Michael Krufky44a64812007-03-20 23:00:18 -03001222 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1223 eeprom, sizeof(eeprom));
Steven Tothd19770e2007-03-11 20:44:05 -03001224 }
1225
1226 switch (dev->board) {
Steven Totha77743b2007-08-22 21:01:20 -03001227 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsebbeb462010-07-18 17:35:00 -03001228 if (dev->i2c_bus[0].i2c_rc == 0) {
1229 if (eeprom[0x80] != 0x84)
1230 hauppauge_eeprom(dev, eeprom+0xc0);
1231 else
1232 hauppauge_eeprom(dev, eeprom+0x80);
1233 }
1234 break;
Michael Krufky07b4a832007-12-18 01:09:11 -03001235 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Tothd1987d52007-12-18 01:57:06 -03001236 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Toth66762372008-04-22 15:38:26 -03001237 case CX23885_BOARD_HAUPPAUGE_HVR1400:
Steven Tothc88133e2008-03-29 17:36:09 -03001238 if (dev->i2c_bus[0].i2c_rc == 0)
1239 hauppauge_eeprom(dev, eeprom+0x80);
1240 break;
Steven Tothd19770e2007-03-11 20:44:05 -03001241 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1242 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
Steven Tothb3ea0162008-04-19 01:14:19 -03001243 case CX23885_BOARD_HAUPPAUGE_HVR1200:
Steven Totha780a312008-04-19 01:25:52 -03001244 case CX23885_BOARD_HAUPPAUGE_HVR1700:
Steven Toth2074dff2009-05-02 11:39:46 -03001245 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001246 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001247 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001248 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Steven Toth136973802009-07-20 15:37:25 -03001249 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001250 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Steven Tothd19770e2007-03-11 20:44:05 -03001251 if (dev->i2c_bus[0].i2c_rc == 0)
Steven Tothc88133e2008-03-29 17:36:09 -03001252 hauppauge_eeprom(dev, eeprom+0xc0);
Steven Tothd19770e2007-03-11 20:44:05 -03001253 break;
1254 }
Steven Totha6a3f142007-09-08 21:31:56 -03001255
1256 switch (dev->board) {
Michael Krufky335377b2008-05-07 01:43:10 -03001257 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
Steven Tothaef2d182008-08-04 21:39:53 -03001258 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
Michael Krufky335377b2008-05-07 01:43:10 -03001259 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1260 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1261 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1262 /* break omitted intentionally */
Steven Totha6a3f142007-09-08 21:31:56 -03001263 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1264 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1265 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1266 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1267 break;
Steven Totha589b662008-01-13 23:44:47 -03001268 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1269 /* Defaults for VID B - Analog encoder */
1270 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1271 ts1->gen_ctrl_val = 0x10e;
1272 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1273 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1274
1275 /* APB_TSVALERR_POL (active low)*/
1276 ts1->vld_misc_val = 0x2000;
1277 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1278
1279 /* Defaults for VID C */
1280 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1281 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1282 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1283 break;
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001284 case CX23885_BOARD_TBS_6920:
Igor M. Liplianin09ea33e2009-11-24 20:16:04 -03001285 ts1->gen_ctrl_val = 0x4; /* Parallel */
1286 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1287 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1288 break;
1289 case CX23885_BOARD_TEVII_S470:
Igor M. Liplianinc9b8b042009-01-17 12:23:31 -03001290 case CX23885_BOARD_DVBWORLD_2005:
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001291 ts1->gen_ctrl_val = 0x5; /* Parallel */
1292 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1293 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1294 break;
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001295 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001296 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001297 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1298 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1299 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1300 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1301 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1302 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1303 break;
David Wong493b7122009-05-18 05:25:49 -03001304 case CX23885_BOARD_MYGICA_X8506:
David Wong2365b2d2009-06-17 01:38:12 -03001305 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
David Wong493b7122009-05-18 05:25:49 -03001306 ts1->gen_ctrl_val = 0x5; /* Parallel */
1307 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1308 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1309 break;
David T. L. Wongea5697f2009-10-26 08:54:04 -03001310 case CX23885_BOARD_MYGICA_X8558PRO:
1311 ts1->gen_ctrl_val = 0x5; /* Parallel */
1312 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1313 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1314 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1315 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1316 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1317 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001318 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Michael Krufky07b4a832007-12-18 01:09:11 -03001319 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Tothd1987d52007-12-18 01:57:06 -03001320 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Totha6a3f142007-09-08 21:31:56 -03001321 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
Steven Tothb3ea0162008-04-19 01:14:19 -03001322 case CX23885_BOARD_HAUPPAUGE_HVR1200:
Steven Totha780a312008-04-19 01:25:52 -03001323 case CX23885_BOARD_HAUPPAUGE_HVR1700:
Steven Toth66762372008-04-22 15:38:26 -03001324 case CX23885_BOARD_HAUPPAUGE_HVR1400:
Steven Toth4c56b042008-08-12 13:30:03 -03001325 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001326 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Steven Toth2074dff2009-05-02 11:39:46 -03001327 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001328 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001329 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001330 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Steven Toth136973802009-07-20 15:37:25 -03001331 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001332 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001333 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Alexey Chernov9028f582010-12-06 17:09:53 -03001334 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
Steven Totha6a3f142007-09-08 21:31:56 -03001335 default:
1336 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1337 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1338 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1339 }
1340
Steven Tothce89cfb2008-04-19 01:36:06 -03001341 /* Certain boards support analog, or require the avcore to be
1342 * loaded, ensure this happens.
1343 */
1344 switch (dev->board) {
Andy Wallsfa647f22010-07-19 21:22:05 -03001345 case CX23885_BOARD_TEVII_S470:
1346 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1347 /* Currently only enabled for the integrated IR controller */
1348 if (!enable_885_ir)
1349 break;
Steven Tothce89cfb2008-04-19 01:36:06 -03001350 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1351 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1352 case CX23885_BOARD_HAUPPAUGE_HVR1700:
Steven Toth4c56b042008-08-12 13:30:03 -03001353 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001354 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001355 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001356 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001357 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Andy Wallsc6b70532009-09-27 00:14:33 -03001358 case CX23885_BOARD_HAUPPAUGE_HVR1850:
David T.L. Wongbc1548a2009-10-21 11:09:28 -03001359 case CX23885_BOARD_MYGICA_X8506:
1360 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001361 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -03001362 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
Alexey Chernov9028f582010-12-06 17:09:53 -03001363 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
Hans Verkuile6574f22009-04-01 03:57:53 -03001364 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1365 &dev->i2c_bus[2].i2c_adap,
Laurent Pinchart9a1f8b32010-09-24 10:16:44 -03001366 "cx25840", 0x88 >> 1, NULL);
Andy Wallsd6b18502010-07-18 23:26:29 -03001367 if (dev->sd_cx25840) {
1368 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1369 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1370 }
Steven Tothce89cfb2008-04-19 01:36:06 -03001371 break;
1372 }
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001373
1374 /* AUX-PLL 27MHz CLK */
1375 switch (dev->board) {
1376 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1377 netup_initialize(dev);
1378 break;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001379 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1380 int ret;
1381 const struct firmware *fw;
1382 const char *filename = "dvb-netup-altera-01.fw";
1383 char *action = "configure";
1384 struct altera_config netup_config = {
1385 .dev = dev,
1386 .action = action,
1387 .jtag_io = netup_jtag_io,
1388 };
1389
1390 netup_initialize(dev);
1391
1392 ret = request_firmware(&fw, filename, &dev->pci->dev);
1393 if (ret != 0)
1394 printk(KERN_ERR "did not find the firmware file. (%s) "
1395 "Please see linux/Documentation/dvb/ for more details "
1396 "on firmware-problems.", filename);
1397 else
1398 altera_init(&netup_config, fw);
1399
1400 break;
1401 }
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001402 }
Steven Tothd19770e2007-03-11 20:44:05 -03001403}
1404
1405/* ------------------------------------------------------------------ */