Gitiles
Code Review Sign In
review.evervolv.com / android_kernel_oneplus_msm8996 / 56a79b7b021bf1b08334e63c2c14b280e2dbf47a / . / arch / mips / netlogic / xlp / usb-init.c
blob: 1d0b66c62fd1beed8f4f601a380170bcb16c17df [file] [log] [blame]
Ganesan Ramalingam10041652012-07-24 17:28:54 +0200[diff] [blame]1/*
2 * Copyright (c) 2003-2012 Broadcom Corporation
3 * All Rights Reserved
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the Broadcom
9 * license below:
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
20 * distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <linux/dma-mapping.h>
36#include <linux/kernel.h>
37#include <linux/delay.h>
38#include <linux/init.h>
39#include <linux/pci.h>
40#include <linux/platform_device.h>
41
42#include <asm/netlogic/haldefs.h>
43#include <asm/netlogic/xlp-hal/iomap.h>
44#include <asm/netlogic/xlp-hal/xlp.h>
45#include <asm/netlogic/xlp-hal/usb.h>
46
47static void nlm_usb_intr_en(int node, int port)
48{
49 uint32_t val;
50 uint64_t port_addr;
51
52 port_addr = nlm_get_usb_regbase(node, port);
53 val = nlm_read_usb_reg(port_addr, USB_INT_EN);
54 val = USB_CTRL_INTERRUPT_EN | USB_OHCI_INTERRUPT_EN |
Ralf Baechle70342282013-01-22 12:59:30 +0100[diff] [blame]55 USB_OHCI_INTERRUPT1_EN | USB_CTRL_INTERRUPT_EN |
Ganesan Ramalingam10041652012-07-24 17:28:54 +0200[diff] [blame]56 USB_OHCI_INTERRUPT_EN | USB_OHCI_INTERRUPT2_EN;
57 nlm_write_usb_reg(port_addr, USB_INT_EN, val);
58}
59
60static void nlm_usb_hw_reset(int node, int port)
61{
62 uint64_t port_addr;
63 uint32_t val;
64
65 /* reset USB phy */
66 port_addr = nlm_get_usb_regbase(node, port);
67 val = nlm_read_usb_reg(port_addr, USB_PHY_0);
68 val &= ~(USB_PHY_RESET | USB_PHY_PORT_RESET_0 | USB_PHY_PORT_RESET_1);
69 nlm_write_usb_reg(port_addr, USB_PHY_0, val);
70
71 mdelay(100);
72 val = nlm_read_usb_reg(port_addr, USB_CTL_0);
73 val &= ~(USB_CONTROLLER_RESET);
74 val |= 0x4;
75 nlm_write_usb_reg(port_addr, USB_CTL_0, val);
76}
77
78static int __init nlm_platform_usb_init(void)
79{
80 pr_info("Initializing USB Interface\n");
81 nlm_usb_hw_reset(0, 0);
82 nlm_usb_hw_reset(0, 3);
83
84 /* Enable PHY interrupts */
85 nlm_usb_intr_en(0, 0);
86 nlm_usb_intr_en(0, 3);
87
88 return 0;
89}
90
91arch_initcall(nlm_platform_usb_init);
92
93static u64 xlp_usb_dmamask = ~(u32)0;
94
95/* Fixup the IRQ for USB devices which is exist on XLP SOC PCIE bus */
96static void nlm_usb_fixup_final(struct pci_dev *dev)
97{
98 dev->dev.dma_mask = &xlp_usb_dmamask;
99 dev->dev.coherent_dma_mask = DMA_BIT_MASK(64);
100 switch (dev->devfn) {
101 case 0x10:
102 dev->irq = PIC_EHCI_0_IRQ;
103 break;
104 case 0x11:
105 dev->irq = PIC_OHCI_0_IRQ;
106 break;
107 case 0x12:
108 dev->irq = PIC_OHCI_1_IRQ;
109 break;
110 case 0x13:
111 dev->irq = PIC_EHCI_1_IRQ;
112 break;
113 case 0x14:
114 dev->irq = PIC_OHCI_2_IRQ;
115 break;
116 case 0x15:
117 dev->irq = PIC_OHCI_3_IRQ;
118 break;
119 }
120}
121DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_NETLOGIC, PCI_DEVICE_ID_NLM_EHCI,
122 nlm_usb_fixup_final);
123DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_NETLOGIC, PCI_DEVICE_ID_NLM_OHCI,
124 nlm_usb_fixup_final);