blob: 1d3a4b50194942d731e7bcaeb9bd97f7b4f3106f [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) 2000, 2001 Kanoj Sarcar
17 * Copyright (C) 2000, 2001 Ralf Baechle
18 * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
19 * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
20 */
21#include <linux/cache.h>
22#include <linux/delay.h>
23#include <linux/init.h>
24#include <linux/interrupt.h>
25#include <linux/spinlock.h>
26#include <linux/threads.h>
27#include <linux/module.h>
28#include <linux/time.h>
29#include <linux/timex.h>
30#include <linux/sched.h>
31#include <linux/cpumask.h>
32
33#include <asm/atomic.h>
34#include <asm/cpu.h>
35#include <asm/processor.h>
36#include <asm/system.h>
37#include <asm/mmu_context.h>
38#include <asm/smp.h>
39
40cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
41volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
42cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
43int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
44int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
45
46EXPORT_SYMBOL(phys_cpu_present_map);
47EXPORT_SYMBOL(cpu_online_map);
48
49static void smp_tune_scheduling (void)
50{
51 struct cache_desc *cd = &current_cpu_data.scache;
52 unsigned long cachesize; /* kB */
53 unsigned long bandwidth = 350; /* MB/s */
54 unsigned long cpu_khz;
55
56 /*
57 * Crude estimate until we actually meassure ...
58 */
59 cpu_khz = loops_per_jiffy * 2 * HZ / 1000;
60
61 /*
62 * Rough estimation for SMP scheduling, this is the number of
63 * cycles it takes for a fully memory-limited process to flush
64 * the SMP-local cache.
65 *
66 * (For a P5 this pretty much means we will choose another idle
67 * CPU almost always at wakeup time (this is due to the small
68 * L1 cache), on PIIs it's around 50-100 usecs, depending on
69 * the cache size)
70 */
71 if (!cpu_khz)
72 return;
73
74 cachesize = cd->linesz * cd->sets * cd->ways;
75}
76
77extern void __init calibrate_delay(void);
78extern ATTRIB_NORET void cpu_idle(void);
79
80/*
81 * First C code run on the secondary CPUs after being started up by
82 * the master.
83 */
84asmlinkage void start_secondary(void)
85{
86 unsigned int cpu = smp_processor_id();
87
88 cpu_probe();
89 cpu_report();
90 per_cpu_trap_init();
91 prom_init_secondary();
92
93 /*
94 * XXX parity protection should be folded in here when it's converted
95 * to an option instead of something based on .cputype
96 */
97
98 calibrate_delay();
99 cpu_data[cpu].udelay_val = loops_per_jiffy;
100
101 prom_smp_finish();
102
103 cpu_set(cpu, cpu_callin_map);
104
105 cpu_idle();
106}
107
108DEFINE_SPINLOCK(smp_call_lock);
109
110struct call_data_struct *call_data;
111
112/*
113 * Run a function on all other CPUs.
114 * <func> The function to run. This must be fast and non-blocking.
115 * <info> An arbitrary pointer to pass to the function.
116 * <retry> If true, keep retrying until ready.
117 * <wait> If true, wait until function has completed on other CPUs.
118 * [RETURNS] 0 on success, else a negative status code.
119 *
120 * Does not return until remote CPUs are nearly ready to execute <func>
121 * or are or have executed.
122 *
123 * You must not call this function with disabled interrupts or from a
Ralf Baechle57f00602005-02-10 12:00:06 +0000124 * hardware interrupt handler or from a bottom half handler:
125 *
126 * CPU A CPU B
127 * Disable interrupts
128 * smp_call_function()
129 * Take call_lock
130 * Send IPIs
131 * Wait for all cpus to acknowledge IPI
132 * CPU A has not responded, spin waiting
133 * for cpu A to respond, holding call_lock
134 * smp_call_function()
135 * Spin waiting for call_lock
136 * Deadlock Deadlock
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 */
138int smp_call_function (void (*func) (void *info), void *info, int retry,
139 int wait)
140{
141 struct call_data_struct data;
142 int i, cpus = num_online_cpus() - 1;
143 int cpu = smp_processor_id();
144
145 if (!cpus)
146 return 0;
147
148 /* Can deadlock when called with interrupts disabled */
149 WARN_ON(irqs_disabled());
150
151 data.func = func;
152 data.info = info;
153 atomic_set(&data.started, 0);
154 data.wait = wait;
155 if (wait)
156 atomic_set(&data.finished, 0);
157
158 spin_lock(&smp_call_lock);
159 call_data = &data;
160 mb();
161
162 /* Send a message to all other CPUs and wait for them to respond */
163 for (i = 0; i < NR_CPUS; i++)
164 if (cpu_online(i) && i != cpu)
165 core_send_ipi(i, SMP_CALL_FUNCTION);
166
167 /* Wait for response */
168 /* FIXME: lock-up detection, backtrace on lock-up */
169 while (atomic_read(&data.started) != cpus)
170 barrier();
171
172 if (wait)
173 while (atomic_read(&data.finished) != cpus)
174 barrier();
175 spin_unlock(&smp_call_lock);
176
177 return 0;
178}
179
180void smp_call_function_interrupt(void)
181{
182 void (*func) (void *info) = call_data->func;
183 void *info = call_data->info;
184 int wait = call_data->wait;
185
186 /*
187 * Notify initiating CPU that I've grabbed the data and am
188 * about to execute the function.
189 */
190 mb();
191 atomic_inc(&call_data->started);
192
193 /*
194 * At this point the info structure may be out of scope unless wait==1.
195 */
196 irq_enter();
197 (*func)(info);
198 irq_exit();
199
200 if (wait) {
201 mb();
202 atomic_inc(&call_data->finished);
203 }
204}
205
206static void stop_this_cpu(void *dummy)
207{
208 /*
209 * Remove this CPU:
210 */
211 cpu_clear(smp_processor_id(), cpu_online_map);
212 local_irq_enable(); /* May need to service _machine_restart IPI */
213 for (;;); /* Wait if available. */
214}
215
216void smp_send_stop(void)
217{
218 smp_call_function(stop_this_cpu, NULL, 1, 0);
219}
220
221void __init smp_cpus_done(unsigned int max_cpus)
222{
223 prom_cpus_done();
224}
225
226/* called from main before smp_init() */
227void __init smp_prepare_cpus(unsigned int max_cpus)
228{
229 cpu_data[0].udelay_val = loops_per_jiffy;
230 init_new_context(current, &init_mm);
231 current_thread_info()->cpu = 0;
232 smp_tune_scheduling();
233 prom_prepare_cpus(max_cpus);
234}
235
236/* preload SMP state for boot cpu */
237void __devinit smp_prepare_boot_cpu(void)
238{
239 /*
240 * This assumes that bootup is always handled by the processor
241 * with the logic and physical number 0.
242 */
243 __cpu_number_map[0] = 0;
244 __cpu_logical_map[0] = 0;
245 cpu_set(0, phys_cpu_present_map);
246 cpu_set(0, cpu_online_map);
247 cpu_set(0, cpu_callin_map);
248}
249
250/*
251 * Startup the CPU with this logical number
252 */
253static int __init do_boot_cpu(int cpu)
254{
255 struct task_struct *idle;
256
257 /*
258 * The following code is purely to make sure
259 * Linux can schedule processes on this slave.
260 */
261 idle = fork_idle(cpu);
262 if (IS_ERR(idle))
263 panic("failed fork for CPU %d\n", cpu);
264
265 prom_boot_secondary(cpu, idle);
266
267 /* XXXKW timeout */
268 while (!cpu_isset(cpu, cpu_callin_map))
269 udelay(100);
270
271 cpu_set(cpu, cpu_online_map);
272
273 return 0;
274}
275
276/*
277 * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
278 * and keep control until "cpu_online(cpu)" is set. Note: cpu is
279 * physical, not logical.
280 */
281int __devinit __cpu_up(unsigned int cpu)
282{
283 int ret;
284
285 /* Processor goes to start_secondary(), sets online flag */
286 ret = do_boot_cpu(cpu);
287 if (ret < 0)
288 return ret;
289
290 return 0;
291}
292
293/* Not really SMP stuff ... */
294int setup_profiling_timer(unsigned int multiplier)
295{
296 return 0;
297}
298
299static void flush_tlb_all_ipi(void *info)
300{
301 local_flush_tlb_all();
302}
303
304void flush_tlb_all(void)
305{
306 on_each_cpu(flush_tlb_all_ipi, 0, 1, 1);
307}
308
309static void flush_tlb_mm_ipi(void *mm)
310{
311 local_flush_tlb_mm((struct mm_struct *)mm);
312}
313
314/*
315 * The following tlb flush calls are invoked when old translations are
316 * being torn down, or pte attributes are changing. For single threaded
317 * address spaces, a new context is obtained on the current cpu, and tlb
318 * context on other cpus are invalidated to force a new context allocation
319 * at switch_mm time, should the mm ever be used on other cpus. For
320 * multithreaded address spaces, intercpu interrupts have to be sent.
321 * Another case where intercpu interrupts are required is when the target
322 * mm might be active on another cpu (eg debuggers doing the flushes on
323 * behalf of debugees, kswapd stealing pages from another process etc).
324 * Kanoj 07/00.
325 */
326
327void flush_tlb_mm(struct mm_struct *mm)
328{
329 preempt_disable();
330
331 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
332 smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1, 1);
333 } else {
334 int i;
335 for (i = 0; i < num_online_cpus(); i++)
336 if (smp_processor_id() != i)
337 cpu_context(i, mm) = 0;
338 }
339 local_flush_tlb_mm(mm);
340
341 preempt_enable();
342}
343
344struct flush_tlb_data {
345 struct vm_area_struct *vma;
346 unsigned long addr1;
347 unsigned long addr2;
348};
349
350static void flush_tlb_range_ipi(void *info)
351{
352 struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
353
354 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
355}
356
357void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
358{
359 struct mm_struct *mm = vma->vm_mm;
360
361 preempt_disable();
362 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
363 struct flush_tlb_data fd;
364
365 fd.vma = vma;
366 fd.addr1 = start;
367 fd.addr2 = end;
368 smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1, 1);
369 } else {
370 int i;
371 for (i = 0; i < num_online_cpus(); i++)
372 if (smp_processor_id() != i)
373 cpu_context(i, mm) = 0;
374 }
375 local_flush_tlb_range(vma, start, end);
376 preempt_enable();
377}
378
379static void flush_tlb_kernel_range_ipi(void *info)
380{
381 struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
382
383 local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
384}
385
386void flush_tlb_kernel_range(unsigned long start, unsigned long end)
387{
388 struct flush_tlb_data fd;
389
390 fd.addr1 = start;
391 fd.addr2 = end;
392 on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1);
393}
394
395static void flush_tlb_page_ipi(void *info)
396{
397 struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
398
399 local_flush_tlb_page(fd->vma, fd->addr1);
400}
401
402void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
403{
404 preempt_disable();
405 if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
406 struct flush_tlb_data fd;
407
408 fd.vma = vma;
409 fd.addr1 = page;
410 smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1, 1);
411 } else {
412 int i;
413 for (i = 0; i < num_online_cpus(); i++)
414 if (smp_processor_id() != i)
415 cpu_context(i, vma->vm_mm) = 0;
416 }
417 local_flush_tlb_page(vma, page);
418 preempt_enable();
419}
420
421static void flush_tlb_one_ipi(void *info)
422{
423 unsigned long vaddr = (unsigned long) info;
424
425 local_flush_tlb_one(vaddr);
426}
427
428void flush_tlb_one(unsigned long vaddr)
429{
430 smp_call_function(flush_tlb_one_ipi, (void *) vaddr, 1, 1);
431 local_flush_tlb_one(vaddr);
432}
433
434EXPORT_SYMBOL(flush_tlb_page);
435EXPORT_SYMBOL(flush_tlb_one);
436EXPORT_SYMBOL(cpu_data);
437EXPORT_SYMBOL(synchronize_irq);